From patchwork Fri Dec 8 17:02:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 175946 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:bcd1:0:b0:403:3b70:6f57 with SMTP id r17csp5588871vqy; Fri, 8 Dec 2023 09:04:51 -0800 (PST) X-Google-Smtp-Source: AGHT+IHhFr9MfNytzTS6f8FMGSIQInfyGEpsWUpz10nNJpPVaqTB5VjhRESJQxCLJxdKxD90+LUF X-Received: by 2002:a17:902:e802:b0:1d0:8285:a1fe with SMTP id u2-20020a170902e80200b001d08285a1femr369867plg.37.1702055091220; Fri, 08 Dec 2023 09:04:51 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1702055091; cv=none; d=google.com; s=arc-20160816; b=SPYIZKEATsmOqh0RoKY1rZhOUQ30g8O1yce0V+tCZXqfDpI+1Dg4MHxv862UfFhLLM JUdCmMxRCwTSvBRMVrU8w1ahvLnXGa1HAPqtD9uyTp+eZrEAvPV1EsCHTrE5lckwsgaG dMaSeSTdYwcyRxtKZLiL6D7VE/cHp7rwNeCXqwVCAymQrreCCtC3sS9a+9D5Mdmwnu+5 ucx66mBBQ2bbZAGnvCCQTKhp4vaHW21wbCUHrAQ0LPu0xSdzXYCsvxBYyYRswfrz6klK owCijwafmZ3gbfTiB/671SbHj8UYpUTpZMn0PlVHOkm7FmswDy79eVVZedT/MLVoXomu paGQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=F2TyOto+m9DkNg5IMe0g6gxq2jd0zPD7o3NLmQOsDL4=; fh=ZJpYoXBO1b6J/XX+cBUZ1SR7Li64ejvvuRmIauHDBq4=; b=U80WMU24awfGg5rt+sc5Y/OpcnqQIvuSCRlBQAA3QwhJhppi+zt8bAE1IlpJAgRfbB MYaTciJMMICYocWi2H9l5QZcQECu4EIDPseCNN2uhwwo6HLcvMAO5EbO4+5X+liDmkdj xdNNM1GH5ofmGE3CkBvkUXBYEnmlsotcMtxVQYp54kHxowuYGOxY45epK46mfTOp2z+A 9KxOLiIl6NpP1bBRpP5zcdf96Uhoc9w8imsq5OIRN3K11NrZCwr0tIl4gCZTqSRRn4bl 8Jfxa8brIBG/o6raH6aQffmT3SQpO+I0dHdohap1Xsbrkg4vz3kVV/NQMBxPA4zdgCtI EGaw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=P7HBq2KM; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.35 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from groat.vger.email (groat.vger.email. [23.128.96.35]) by mx.google.com with ESMTPS id ba6-20020a170902720600b001cfb52ebfdbsi1816160plb.152.2023.12.08.09.04.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Dec 2023 09:04:51 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.35 as permitted sender) client-ip=23.128.96.35; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=P7HBq2KM; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.35 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by groat.vger.email (Postfix) with ESMTP id 154488260F4D; Fri, 8 Dec 2023 09:04:46 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at groat.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233731AbjLHREh (ORCPT + 99 others); Fri, 8 Dec 2023 12:04:37 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57654 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232481AbjLHREe (ORCPT ); Fri, 8 Dec 2023 12:04:34 -0500 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.9]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 57B62BA; Fri, 8 Dec 2023 09:04:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1702055080; x=1733591080; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=eLexHLDuIGRipR5ryxhx1W/iX5Ccx/0q1xyo5G9jfrk=; b=P7HBq2KMBFmFmYHi0UzTeQW1RIib0WOQOzST4y4ZbpMQ8dv/mEL4T6Nb VYUGgUUeTgQAbgZak9yzeOQT4OYUxqzNALr6q63LEU4OdyhnJskgWjyr5 s61GGdODSFJs9pyCaIgXd+AxdzRNCRnaYdO2NBQs45vWTjXqRiQAFEWsB r8ZgoT7N0QDxBhdFCO2A2yB6JlsRRny256HQ3RlwvUuax1aDxVPqJybgn JP6dV8TY8uG+6CsINRw3Vso1BHxbpvsGQP4Ropmx00NuX71QdMUwVKzle TSQ6tbE0zOB1KCXoCEYa+Qbr88ttp0OT6JUD1uFlaTXQMtminZ93pPaqP g==; X-IronPort-AV: E=McAfee;i="6600,9927,10918"; a="1311101" X-IronPort-AV: E=Sophos;i="6.04,261,1695711600"; d="scan'208";a="1311101" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmvoesa103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Dec 2023 09:04:40 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10918"; a="838189000" X-IronPort-AV: E=Sophos;i="6.04,261,1695711600"; d="scan'208";a="838189000" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga008.fm.intel.com with ESMTP; 08 Dec 2023 09:04:38 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id A4707DE; Fri, 8 Dec 2023 19:04:37 +0200 (EET) From: Andy Shevchenko To: Andy Shevchenko , linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Mark Brown Subject: [PATCH v2 1/2] spi: pxa2xx: Use inclusive language Date: Fri, 8 Dec 2023 19:02:54 +0200 Message-ID: <20231208170436.3309648-2-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1.gbec44491f096 In-Reply-To: <20231208170436.3309648-1-andriy.shevchenko@linux.intel.com> References: <20231208170436.3309648-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on groat.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (groat.vger.email [0.0.0.0]); Fri, 08 Dec 2023 09:04:46 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1784734118823929408 X-GMAIL-MSGID: 1784734118823929408 Replace master/slave by host/peripheral language in the documentation. Signed-off-by: Andy Shevchenko --- Documentation/spi/pxa2xx.rst | 48 ++++++++++++++++++------------------ 1 file changed, 24 insertions(+), 24 deletions(-) diff --git a/Documentation/spi/pxa2xx.rst b/Documentation/spi/pxa2xx.rst index 04f2a3856c40..143f1df83f79 100644 --- a/Documentation/spi/pxa2xx.rst +++ b/Documentation/spi/pxa2xx.rst @@ -3,13 +3,13 @@ PXA2xx SPI on SSP driver HOWTO ============================== This a mini HOWTO on the pxa2xx_spi driver. The driver turns a PXA2xx -synchronous serial port into an SPI master controller +synchronous serial port into an SPI host controller (see Documentation/spi/spi-summary.rst). The driver has the following features - Support for any PXA2xx and compatible SSP. - SSP PIO and SSP DMA data transfers. - External and Internal (SSPFRM) chip selects. -- Per slave device (chip) configuration. +- Per peripheral device (chip) configuration. - Full suspend, freeze, resume support. The driver is built around a &struct spi_message FIFO serviced by kernel @@ -17,10 +17,10 @@ thread. The kernel thread, spi_pump_messages(), drives message FIFO and is responsible for queuing SPI transactions and setting up and launching the DMA or interrupt driven transfers. -Declaring PXA2xx Master Controllers ------------------------------------ -Typically, for a legacy platform, an SPI master is defined in the -arch/.../mach-*/board-*.c as a "platform device". The master configuration +Declaring PXA2xx host controllers +--------------------------------- +Typically, for a legacy platform, an SPI host controller is defined in the +arch/.../mach-*/board-*.c as a "platform device". The host controller configuration is passed to the driver via a table found in include/linux/spi/pxa2xx_spi.h:: struct pxa2xx_spi_controller { @@ -30,7 +30,7 @@ is passed to the driver via a table found in include/linux/spi/pxa2xx_spi.h:: }; The "pxa2xx_spi_controller.num_chipselect" field is used to determine the number of -slave device (chips) attached to this SPI master. +peripheral devices (chips) attached to this SPI host controller. The "pxa2xx_spi_controller.enable_dma" field informs the driver that SSP DMA should be used. This caused the driver to acquire two DMA channels: Rx channel and @@ -40,8 +40,8 @@ See the "PXA2xx Developer Manual" section "DMA Controller". For the new platforms the description of the controller and peripheral devices comes from Device Tree or ACPI. -NSSP MASTER SAMPLE ------------------- +NSSP HOST SAMPLE +---------------- Below is a sample configuration using the PXA255 NSSP for a legacy platform:: static struct resource pxa_spi_nssp_resources[] = { @@ -57,7 +57,7 @@ Below is a sample configuration using the PXA255 NSSP for a legacy platform:: }, }; - static struct pxa2xx_spi_controller pxa_nssp_master_info = { + static struct pxa2xx_spi_controller pxa_nssp_controller_info = { .num_chipselect = 1, /* Matches the number of chips attached to NSSP */ .enable_dma = 1, /* Enables NSSP DMA */ }; @@ -68,7 +68,7 @@ Below is a sample configuration using the PXA255 NSSP for a legacy platform:: .resource = pxa_spi_nssp_resources, .num_resources = ARRAY_SIZE(pxa_spi_nssp_resources), .dev = { - .platform_data = &pxa_nssp_master_info, /* Passed to driver */ + .platform_data = &pxa_nssp_controller_info, /* Passed to driver */ }, }; @@ -81,17 +81,17 @@ Below is a sample configuration using the PXA255 NSSP for a legacy platform:: (void)platform_add_device(devices, ARRAY_SIZE(devices)); } -Declaring Slave Devices ------------------------ -Typically, for a legacy platform, each SPI slave (chip) is defined in the +Declaring peripheral devices +---------------------------- +Typically, for a legacy platform, each SPI peripheral device (chip) is defined in the arch/.../mach-*/board-*.c using the "spi_board_info" structure found in "linux/spi/spi.h". See "Documentation/spi/spi-summary.rst" for additional information. -Each slave device attached to the PXA must provide slave specific configuration +Each peripheral device (chip) attached to the PXA2xx must provide specific chip configuration information via the structure "pxa2xx_spi_chip" found in -"include/linux/spi/pxa2xx_spi.h". The pxa2xx_spi master controller driver -will uses the configuration whenever the driver communicates with the slave +"include/linux/spi/pxa2xx_spi.h". The PXA2xx host controller driver will use +the configuration whenever the driver communicates with the peripheral device. All fields are optional. :: @@ -123,7 +123,7 @@ dma_burst_size == 0. The "pxa2xx_spi_chip.timeout" fields is used to efficiently handle trailing bytes in the SSP receiver FIFO. The correct value for this field is dependent on the SPI bus speed ("spi_board_info.max_speed_hz") and the specific -slave device. Please note that the PXA2xx SSP 1 does not support trailing byte +peripheral device. Please note that the PXA2xx SSP 1 does not support trailing byte timeouts and must busy-wait any trailing bytes. NOTE: the SPI driver cannot control the chip select if SSPFRM is used, so the @@ -132,8 +132,8 @@ asserted around the complete message. Use SSPFRM as a GPIO (through a descriptor to accommodate these chips. -NSSP SLAVE SAMPLE ------------------ +NSSP PERIPHERAL SAMPLE +---------------------- For a legacy platform or in some other cases, the pxa2xx_spi_chip structure is passed to the pxa2xx_spi driver in the "spi_board_info.controller_data" field. Below is a sample configuration using the PXA255 NSSP. @@ -161,16 +161,16 @@ field. Below is a sample configuration using the PXA255 NSSP. .bus_num = 2, /* Framework bus number */ .chip_select = 0, /* Framework chip select */ .platform_data = NULL; /* No spi_driver specific config */ - .controller_data = &cs8415a_chip_info, /* Master chip config */ - .irq = STREETRACER_APCI_IRQ, /* Slave device interrupt */ + .controller_data = &cs8415a_chip_info, /* Host controller config */ + .irq = STREETRACER_APCI_IRQ, /* Peripheral device interrupt */ }, { .modalias = "cs8405a", /* Name of spi_driver for this device */ .max_speed_hz = 3686400, /* Run SSP as fast a possible */ .bus_num = 2, /* Framework bus number */ .chip_select = 1, /* Framework chip select */ - .controller_data = &cs8405a_chip_info, /* Master chip config */ - .irq = STREETRACER_APCI_IRQ, /* Slave device interrupt */ + .controller_data = &cs8405a_chip_info, /* Host controller config */ + .irq = STREETRACER_APCI_IRQ, /* Peripheral device interrupt */ }, }; From patchwork Fri Dec 8 17:02:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 175945 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:bcd1:0:b0:403:3b70:6f57 with SMTP id r17csp5588786vqy; Fri, 8 Dec 2023 09:04:47 -0800 (PST) X-Google-Smtp-Source: AGHT+IFiqleW6wAkMMZ0ybk2lkmMePXQC7VvQZiCNKhGWD2NK03vZZ1yszYtdBLtHhfqIANISRpl X-Received: by 2002:a05:6a20:8419:b0:18f:97c:8a1d with SMTP id c25-20020a056a20841900b0018f097c8a1dmr348832pzd.72.1702055087417; Fri, 08 Dec 2023 09:04:47 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1702055087; cv=none; d=google.com; s=arc-20160816; b=i4qWDYWxUCwG4dhdyp3NOykupy71GuO07zIDND9Lf/s2nUL6SOcYo+r9eUtFhSUZVX fQJaUWBiTxcnlgHB1EA/LxdV6/1nx0cSt2rzd/DXl5wj83492tLV7PU0mGGzDXoY0cWh du8sjdMIRslTIgcLI7uPbNu5dhGUiGRjS5/G2VQXwLed3A971go6EmmQBPWXqscyJOX5 +cC7yTUrCulpaWIGY1gCu7JwR9LQTTD4yEg7PAgqarcwWTbQdOZXh1JE9dKPlIypePVO YfFxFhZfZXRluuchUea305dh3/0/hMl6KdImMytLack/oNmU3oitDmxGXVGpq4l6zg2a 1hBA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=GojPUKamnKvZG95rGc0INxWTSR3rFxPCcNQ6rqKX9bw=; fh=ZJpYoXBO1b6J/XX+cBUZ1SR7Li64ejvvuRmIauHDBq4=; b=hh4rbjHG9W3fIkdapflQ2nN0g88WiS8K2huHfI3L2ttHpjzGYWN4G0AQeK3yK2osa0 zdUsXe+nVQ1d79GD7o9mv5W/rBTY/xqkKJljZZDnXHuoAkMjV5rNl8FY+frQ/ZT2iwID QCB477aubi4IvW1q+yWWF5W7dqw5U6cpMxjDBCZ3umdgCUWXiSPZ1DOzweU+qADSV67J 43HAOqJe+LyB/ZCQHrxLbPUGjO/IN7FIzTxqtA8fjxEU7hKxwc/DQzP9a6FNikXZPXyK GWGCBg1sxdHGGUqYkq9LKYM8Oc4cOXO4gpZpYHN80ylESZPbxASHf8WzVa1dlty3cZ4v T1BA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=mNh0BFgf; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.31 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from morse.vger.email (morse.vger.email. [23.128.96.31]) by mx.google.com with ESMTPS id l190-20020a6325c7000000b005c219415020si1767106pgl.262.2023.12.08.09.04.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Dec 2023 09:04:47 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.31 as permitted sender) client-ip=23.128.96.31; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=mNh0BFgf; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.31 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by morse.vger.email (Postfix) with ESMTP id C69658313D24; Fri, 8 Dec 2023 09:04:43 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at morse.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233559AbjLHREf (ORCPT + 99 others); Fri, 8 Dec 2023 12:04:35 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57666 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232094AbjLHREe (ORCPT ); Fri, 8 Dec 2023 12:04:34 -0500 Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.151]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D23AF10EB; Fri, 8 Dec 2023 09:04:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1702055080; x=1733591080; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=VWVAoJVhNy69aBR1eMnYwRmj8xiYxr2EMDRIqEoEaI0=; b=mNh0BFgfbgeIC+FbCp14Dm8s0nIoYp4ddWMiEpgBD1eY7ap/uD0Oa5tz reAGinNZ/QjN1BlPtZI8Em1/6VUqdYBt3QlHEAdhiCw5Z4IzrOJo2BXUD i/lQsBa4kbn90v1Co077eMHdmfe4mucF6gvtRVpM6ToQOeZToIx6OE/3E w/Tm9oYDmm0d1gTJQEHSvRu9hBVfMThupjg4Q9U7dlnkxSVNAJCIGw7F9 gMPGD7t3OADB8zJ2FFy1X0/8qIMRSkIEymqlajrLf6atIYyxzdaqgUIHV ThaFqS50cJUizsQ43qSPco/e2JJc2gCzFRdqrBNlOKshOxojA7jGjQXz3 A==; X-IronPort-AV: E=McAfee;i="6600,9927,10918"; a="374593146" X-IronPort-AV: E=Sophos;i="6.04,261,1695711600"; d="scan'208";a="374593146" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Dec 2023 09:04:40 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10918"; a="748401426" X-IronPort-AV: E=Sophos;i="6.04,261,1695711600"; d="scan'208";a="748401426" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga006.jf.intel.com with ESMTP; 08 Dec 2023 09:04:38 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id AE54D284; Fri, 8 Dec 2023 19:04:37 +0200 (EET) From: Andy Shevchenko To: Andy Shevchenko , linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Mark Brown Subject: [PATCH v2 2/2] spi: pxa2xx: Update DMA mapping and using logic in the documentation Date: Fri, 8 Dec 2023 19:02:55 +0200 Message-ID: <20231208170436.3309648-3-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1.gbec44491f096 In-Reply-To: <20231208170436.3309648-1-andriy.shevchenko@linux.intel.com> References: <20231208170436.3309648-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on morse.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (morse.vger.email [0.0.0.0]); Fri, 08 Dec 2023 09:04:44 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1784734115398069721 X-GMAIL-MSGID: 1784734115398069721 Update DMA mapping and using logic in the documentation to follow what the code does. Signed-off-by: Andy Shevchenko --- Documentation/spi/pxa2xx.rst | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) diff --git a/Documentation/spi/pxa2xx.rst b/Documentation/spi/pxa2xx.rst index 143f1df83f79..19479b801826 100644 --- a/Documentation/spi/pxa2xx.rst +++ b/Documentation/spi/pxa2xx.rst @@ -193,17 +193,14 @@ mode supports both coherent and stream based DMA mappings. The following logic is used to determine the type of I/O to be used on a per "spi_transfer" basis:: - if !enable_dma then - always use PIO transfers + if spi_message.len > 65536 then + if spi_message.is_dma_mapped or rx_dma_buf != 0 or tx_dma_buf != 0 then + reject premapped transfers - if spi_message.len > 8191 then print "rate limited" warning use PIO transfers - if spi_message.is_dma_mapped and rx_dma_buf != 0 and tx_dma_buf != 0 then - use coherent DMA mode - - if rx_buf and tx_buf are aligned on 8 byte boundary then + if enable_dma and the size is in the range [DMA burst size..65536] then use streaming DMA mode otherwise