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[23.128.96.31]) by mx.google.com with ESMTPS id gx15-20020a17090b124f00b0028a18d957d1si1490506pjb.60.2023.12.08.02.38.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Dec 2023 02:38:08 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.31 as permitted sender) client-ip=23.128.96.31; Authentication-Results: mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b=PplmWTq3; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.31 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=microchip.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by morse.vger.email (Postfix) with ESMTP id 2FF76836E44D; Fri, 8 Dec 2023 02:38:06 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at morse.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1573611AbjLHKhx (ORCPT + 99 others); Fri, 8 Dec 2023 05:37:53 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59736 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1573469AbjLHKhv (ORCPT ); Fri, 8 Dec 2023 05:37:51 -0500 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 026DE10C2; Fri, 8 Dec 2023 02:37:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1702031878; x=1733567878; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=7fpfZLQ/wUMnvIzkFtnwjbFo65V7UhlC6XBu/GZbLfo=; b=PplmWTq3Hc1ZcVmtOfXwN706ZX/x7/XbFDascjkETd+5JFAIKnrjo4FQ aQJfVyvtmN6duzwVZJRxQv1ZF686K89tvtRTpL9gtQoayycR2ICR546u6 fpjQZOqD114gfHuIMlClhKa6jpJJDh5yL65ZoucajpKkqt0El27yE6Ivy XW2AHpyIbzm7Wbwenkos6MmIcyNGVdNOTIzaVLo3WFPODCmn19DDv1DIf kqEKUl4SxdCbtWoqcMiuHyirm06wVVf66YY+T2l4KPBSpHm9YCpcnacA9 +o2Wy3fLDld9zXzaoAEBT7jywDu42Hl4thrxrfNgt3+OUQknWeHzDFVJ+ Q==; X-CSE-ConnectionGUID: H3XQVRBZQ2qxsVmz7vJ8Sw== X-CSE-MsgGUID: Hl/X09+ES/+vFdJJftuD7g== X-ThreatScanner-Verdict: Negative X-IronPort-AV: E=Sophos;i="6.04,260,1695711600"; d="scan'208";a="13315277" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa2.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 08 Dec 2023 03:37:50 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Fri, 8 Dec 2023 03:37:50 -0700 Received: from microchip1-OptiPlex-9020.microchip.com (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Fri, 8 Dec 2023 03:37:45 -0700 From: shravan chippa To: , , , , , , CC: , , , , , , Subject: [PATCH v5 1/4] dmaengine: sf-pdma: Support of_dma_controller_register() Date: Fri, 8 Dec 2023 16:08:53 +0530 Message-ID: <20231208103856.3732998-2-shravan.chippa@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231208103856.3732998-1-shravan.chippa@microchip.com> References: <20231208103856.3732998-1-shravan.chippa@microchip.com> MIME-Version: 1.0 X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on morse.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (morse.vger.email [0.0.0.0]); Fri, 08 Dec 2023 02:38:06 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1784709789232129742 X-GMAIL-MSGID: 1784709789232129742 From: Shravan Chippa Update sf-pdma driver to adopt generic DMA device tree bindings. It calls of_dma_controller_register() with of_dma_xlate_by_chan_id to get the generic DMA device tree helper support and the DMA clients can look up the sf-pdma controller using standard APIs. Signed-off-by: Shravan Chippa --- drivers/dma/sf-pdma/sf-pdma.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/dma/sf-pdma/sf-pdma.c b/drivers/dma/sf-pdma/sf-pdma.c index 3125a2f162b4..6109e1c5a09e 100644 --- a/drivers/dma/sf-pdma/sf-pdma.c +++ b/drivers/dma/sf-pdma/sf-pdma.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include "sf-pdma.h" @@ -563,7 +564,20 @@ static int sf_pdma_probe(struct platform_device *pdev) return ret; } + ret = of_dma_controller_register(pdev->dev.of_node, + of_dma_xlate_by_chan_id, pdma); + if (ret < 0) { + dev_err(&pdev->dev, + "Can't register SiFive Platform OF_DMA. (%d)\n", ret); + goto err_unregister; + } + return 0; + +err_unregister: + dma_async_device_unregister(&pdma->dma_dev); + + return ret; } static void sf_pdma_remove(struct platform_device *pdev) @@ -583,6 +597,9 @@ static void sf_pdma_remove(struct platform_device *pdev) tasklet_kill(&ch->err_tasklet); } + if (pdev->dev.of_node) + of_dma_controller_free(pdev->dev.of_node); + dma_async_device_unregister(&pdma->dma_dev); } From patchwork Fri Dec 8 10:38:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: shravan chippa X-Patchwork-Id: 175763 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:bcd1:0:b0:403:3b70:6f57 with SMTP id r17csp5367275vqy; Fri, 8 Dec 2023 02:38:27 -0800 (PST) X-Google-Smtp-Source: AGHT+IHQpbSwh7enFb0XEJvYIYUQLrSObJltlNze+RXzsuA6JS/acKHM87aAZi1RP1mAU6e4Athm X-Received: by 2002:a17:90a:f186:b0:286:6cc1:8678 with SMTP id bv6-20020a17090af18600b002866cc18678mr3057815pjb.93.1702031907021; Fri, 08 Dec 2023 02:38:27 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1702031907; cv=none; d=google.com; s=arc-20160816; b=Z8nrsRaFZpZH1URPngVUlwEdoXrZN6/kzrswFMbzf1Vl70hvoV80Re+yT2DPmMZoch cwcUteDE894YGZnSHsrVBkGqi8rLG2MegVTJArAAHydpcJCx80jfUZjzPlAJcT3ABL+6 65f7NdmudOEb8CiqFPJiPX2XF0l6uIrykUkEDRk6cDVc3+HbaoHlhbYOl+9abhnlLD++ 4m0vOTujUsqBJsY402X//utQdZV2e0Yj3rganmhAs8da2fffFKP7VGbBZ1mTqQZ4g1yG ut4RhMXMJVvj5UqJr2rIGz1KmvzOPtax/HyHmD4c71vUqYd6d+FmG/hRT3JRwT9FZNl8 TJSQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=2AhRWMcEq8tmHBamltUSruil65DVvqAHbhJZ3g+WpCc=; fh=G3bdubTV0+o+8hUeMfd0vNMrcf0Z3JqHvJT+qGOcRCw=; b=LsmL5xWTHDjtgiyWxR2n1AtWTQhAyeENXkJR9yUXF5rdBlQbfGR7BqSIyLOtCxjcg8 L/N43GEYu4lktc/z0fy369rZHWXQqSRcIJfWhrJDlrzjD8M85ivRl5iUERlJOjWmxubb LljT2O3MjPpA89e2jMoTfeMYMdJbzbJwj8RR4SXn31zjcPjCEphRXe6w+G58cqBmwCab 8BfvyWy9NaJnWr9MI5DA29zt6tNFHMKiZwPOR33v8547Sowku3Fnn9ZBV4e8lgWnh+0G 3xMfnpUbK2XZXvrO+EFv83or9jU3xXIAI+wYc7Kt4QbStkUXbufV8orBYE/o5tQhzqWZ PKUQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b=NQh8oM1d; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.31 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=microchip.com Received: from morse.vger.email (morse.vger.email. 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X-CSE-ConnectionGUID: fyOiA1txSLWOb88DmV8r+w== X-CSE-MsgGUID: uCFtUYpPS+WMAhzQKqzSVA== X-ThreatScanner-Verdict: Negative X-IronPort-AV: E=Sophos;i="6.04,260,1695711600"; d="scan'208";a="13315298" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa2.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 08 Dec 2023 03:38:11 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Fri, 8 Dec 2023 03:37:58 -0700 Received: from microchip1-OptiPlex-9020.microchip.com (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Fri, 8 Dec 2023 03:37:52 -0700 From: shravan chippa To: , , , , , , CC: , , , , , , , Conor Dooley Subject: [PATCH v5 2/4] dt-bindings: dma: sf-pdma: add new compatible name Date: Fri, 8 Dec 2023 16:08:54 +0530 Message-ID: <20231208103856.3732998-3-shravan.chippa@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231208103856.3732998-1-shravan.chippa@microchip.com> References: <20231208103856.3732998-1-shravan.chippa@microchip.com> MIME-Version: 1.0 X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on morse.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (morse.vger.email [0.0.0.0]); Fri, 08 Dec 2023 02:38:24 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1784709808816832762 X-GMAIL-MSGID: 1784709808816832762 From: Shravan Chippa Add new compatible name microchip,mpfs-pdma to support out of order dma transfers Reviewed-by: Conor Dooley Signed-off-by: Shravan Chippa --- .../devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml b/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml index a1af0b906365..3b22183a1a37 100644 --- a/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml +++ b/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml @@ -29,6 +29,7 @@ properties: compatible: items: - enum: + - microchip,mpfs-pdma - sifive,fu540-c000-pdma - const: sifive,pdma0 description: From patchwork Fri Dec 8 10:38:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: shravan chippa X-Patchwork-Id: 175767 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:bcd1:0:b0:403:3b70:6f57 with SMTP id r17csp5367633vqy; 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[2620:137:e000::3:1]) by mx.google.com with ESMTPS id q16-20020a17090311d000b001d0c418175esi1355772plh.471.2023.12.08.02.39.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Dec 2023 02:39:33 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:1 as permitted sender) client-ip=2620:137:e000::3:1; Authentication-Results: mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b=XjMLrnR1; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:1 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=microchip.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by morse.vger.email (Postfix) with ESMTP id 4A5DC836E455; Fri, 8 Dec 2023 02:39:31 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at morse.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1573643AbjLHKjW (ORCPT + 99 others); Fri, 8 Dec 2023 05:39:22 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40010 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1573764AbjLHKjC (ORCPT ); Fri, 8 Dec 2023 05:39:02 -0500 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1D6BD1BE3; Fri, 8 Dec 2023 02:38:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1702031921; x=1733567921; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=2EQm1WbcHBB0qSzV6W9atlXp3QWQx/LQ8hNLQCOVPww=; b=XjMLrnR1BYOfqjIMufW5l5GNysiZ/p3l3qfCBzhheGmQQDKaZTid1kdl vQGPLV92AvzViZSt53UnpcaSkybXLtT08jsr0lcTZhs6G6B16i7wXPf+0 f9cviRjtNL1XyiJRUD248lHfCC3Ed3FzbVRyZ3pMZYdmryhL22EGszAL9 +AvbrT+Pakq+pjArkK4+Un3bJ8X2VWI7SHd+F1Nr2+5qAsvirrEVY3LQP bwDyO6FMH+I8iHC3BkPuTvSTvnWqcTgoMVUn2nJh4SBc3piSqoJN9A8MV 64SoeYeSXJKIYsqJ5gg0rjrFO99xx6/i77zJM7Ghq66pBh8QlbxEGE5+2 Q==; X-CSE-ConnectionGUID: Cvz3gSbpStiroKFn2Lwqew== X-CSE-MsgGUID: TlwQAlMGSYWg/x1j129+hg== X-ThreatScanner-Verdict: Negative X-IronPort-AV: E=Sophos;i="6.04,260,1695711600"; d="scan'208";a="13864089" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 08 Dec 2023 03:38:40 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Fri, 8 Dec 2023 03:38:04 -0700 Received: from microchip1-OptiPlex-9020.microchip.com (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Fri, 8 Dec 2023 03:37:59 -0700 From: shravan chippa To: , , , , , , CC: , , , , , , , Emil Renner Berthing Subject: [PATCH v5 3/4] dmaengine: sf-pdma: add mpfs-pdma compatible name Date: Fri, 8 Dec 2023 16:08:55 +0530 Message-ID: <20231208103856.3732998-4-shravan.chippa@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231208103856.3732998-1-shravan.chippa@microchip.com> References: <20231208103856.3732998-1-shravan.chippa@microchip.com> MIME-Version: 1.0 X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on morse.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (morse.vger.email [0.0.0.0]); Fri, 08 Dec 2023 02:39:31 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1784709878711884652 X-GMAIL-MSGID: 1784709878711884652 From: Shravan Chippa Sifive platform dma (sf-pdma) has both in-order and out-of-order configurations but sf-pdam driver configured to do in-order DMA transfers, with out-of-order configuration got better throughput in the PolarFire SoC platform. Add a PolarFire SoC specific compatible and code to support for out-of-order dma transfers Reviewed-by: Emil Renner Berthing Signed-off-by: Shravan Chippa --- drivers/dma/sf-pdma/sf-pdma.c | 27 ++++++++++++++++++++++++--- drivers/dma/sf-pdma/sf-pdma.h | 8 +++++++- 2 files changed, 31 insertions(+), 4 deletions(-) diff --git a/drivers/dma/sf-pdma/sf-pdma.c b/drivers/dma/sf-pdma/sf-pdma.c index 6109e1c5a09e..428473611115 100644 --- a/drivers/dma/sf-pdma/sf-pdma.c +++ b/drivers/dma/sf-pdma/sf-pdma.c @@ -25,6 +25,8 @@ #include "sf-pdma.h" +#define PDMA_QUIRK_NO_STRICT_ORDERING BIT(0) + #ifndef readq static inline unsigned long long readq(void __iomem *addr) { @@ -66,7 +68,7 @@ static struct sf_pdma_desc *sf_pdma_alloc_desc(struct sf_pdma_chan *chan) static void sf_pdma_fill_desc(struct sf_pdma_desc *desc, u64 dst, u64 src, u64 size) { - desc->xfer_type = PDMA_FULL_SPEED; + desc->xfer_type = desc->chan->pdma->transfer_type; desc->xfer_size = size; desc->dst_addr = dst; desc->src_addr = src; @@ -493,6 +495,7 @@ static void sf_pdma_setup_chans(struct sf_pdma *pdma) static int sf_pdma_probe(struct platform_device *pdev) { + const struct sf_pdma_driver_platdata *ddata; struct sf_pdma *pdma; int ret, n_chans; const enum dma_slave_buswidth widths = @@ -518,6 +521,14 @@ static int sf_pdma_probe(struct platform_device *pdev) pdma->n_chans = n_chans; + pdma->transfer_type = PDMA_FULL_SPEED | PDMA_STRICT_ORDERING; + + ddata = device_get_match_data(&pdev->dev); + if (ddata) { + if (ddata->quirks & PDMA_QUIRK_NO_STRICT_ORDERING) + pdma->transfer_type &= ~PDMA_STRICT_ORDERING; + } + pdma->membase = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(pdma->membase)) return PTR_ERR(pdma->membase); @@ -603,9 +614,19 @@ static void sf_pdma_remove(struct platform_device *pdev) dma_async_device_unregister(&pdma->dma_dev); } +static const struct sf_pdma_driver_platdata mpfs_pdma = { + .quirks = PDMA_QUIRK_NO_STRICT_ORDERING, +}; + static const struct of_device_id sf_pdma_dt_ids[] = { - { .compatible = "sifive,fu540-c000-pdma" }, - { .compatible = "sifive,pdma0" }, + { + .compatible = "sifive,fu540-c000-pdma", + }, { + .compatible = "sifive,pdma0", + }, { + .compatible = "microchip,mpfs-pdma", + .data = &mpfs_pdma, + }, {}, }; MODULE_DEVICE_TABLE(of, sf_pdma_dt_ids); diff --git a/drivers/dma/sf-pdma/sf-pdma.h b/drivers/dma/sf-pdma/sf-pdma.h index d05772b5d8d3..215e07183d7e 100644 --- a/drivers/dma/sf-pdma/sf-pdma.h +++ b/drivers/dma/sf-pdma/sf-pdma.h @@ -48,7 +48,8 @@ #define PDMA_ERR_STATUS_MASK GENMASK(31, 31) /* Transfer Type */ -#define PDMA_FULL_SPEED 0xFF000008 +#define PDMA_FULL_SPEED 0xFF000000 +#define PDMA_STRICT_ORDERING BIT(3) /* Error Recovery */ #define MAX_RETRY 1 @@ -112,8 +113,13 @@ struct sf_pdma { struct dma_device dma_dev; void __iomem *membase; void __iomem *mappedbase; + u32 transfer_type; u32 n_chans; struct sf_pdma_chan chans[] __counted_by(n_chans); }; +struct sf_pdma_driver_platdata { + u32 quirks; +}; + #endif /* _SF_PDMA_H */ From patchwork Fri Dec 8 10:38:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: shravan chippa X-Patchwork-Id: 175768 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:bcd1:0:b0:403:3b70:6f57 with SMTP id r17csp5367668vqy; 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[2620:137:e000::3:1]) by mx.google.com with ESMTPS id d3-20020a17090ab30300b00286785e0bfesi2761815pjr.147.2023.12.08.02.39.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Dec 2023 02:39:39 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:1 as permitted sender) client-ip=2620:137:e000::3:1; Authentication-Results: mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b=zctloH8A; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:1 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=microchip.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by morse.vger.email (Postfix) with ESMTP id A71128374BA7; Fri, 8 Dec 2023 02:39:37 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at morse.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1573654AbjLHKj0 (ORCPT + 99 others); Fri, 8 Dec 2023 05:39:26 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43448 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1573769AbjLHKjI (ORCPT ); Fri, 8 Dec 2023 05:39:08 -0500 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 06D23213A; Fri, 8 Dec 2023 02:38:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1702031925; x=1733567925; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=YqtwfEJlrD8L5HAaw7G5HYRJskztVsmoK7bidkNMsB4=; b=zctloH8AEKC14aTjLPffN5LArbkrK1k4hk39Lr3lgocidQfo+bno4cs/ kR3KZZYwby8eeOcyVcmLfIUMslm7zYl91yTve7jpGVeE0kEY7H+kmL+gj CLcaOztcTG3gwAjubhAO3D1iXaA3Qm0d9JN2lk+h7KfPUCVHEvt/kjnzt Q5DsWx+OAZIplA0aQGusK7ztD+Jm98CpuC3ffkucuZ54uIK9lZXMy5QtW ev3J0o7XH0MKVKQWH39fXdD01Dh/G4rIpF92faoXsTPj5+qMawJts3r8N PMvsiPWGAqFMFxEsac/aaoO6bap2cxfjdAlfIZAw49N4fnSXMToRYH8VO w==; X-CSE-ConnectionGUID: Cvz3gSbpStiroKFn2Lwqew== X-CSE-MsgGUID: P2J285XTS/SOK+VrfSFpng== X-ThreatScanner-Verdict: Negative X-IronPort-AV: E=Sophos;i="6.04,260,1695711600"; d="scan'208";a="13864092" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 08 Dec 2023 03:38:40 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Fri, 8 Dec 2023 03:38:11 -0700 Received: from microchip1-OptiPlex-9020.microchip.com (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Fri, 8 Dec 2023 03:38:06 -0700 From: shravan chippa To: , , , , , , CC: , , , , , , , Conor Dooley Subject: [PATCH v5 4/4] riscv: dts: microchip: add specific compatible for mpfs pdma Date: Fri, 8 Dec 2023 16:08:56 +0530 Message-ID: <20231208103856.3732998-5-shravan.chippa@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231208103856.3732998-1-shravan.chippa@microchip.com> References: <20231208103856.3732998-1-shravan.chippa@microchip.com> MIME-Version: 1.0 X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on morse.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (morse.vger.email [0.0.0.0]); Fri, 08 Dec 2023 02:39:37 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1784709885230655841 X-GMAIL-MSGID: 1784709885230655841 From: Shravan Chippa Add specific compatible for PolarFire SoC for The SiFive PDMA driver Reviewed-by: Conor Dooley Signed-off-by: Shravan Chippa --- arch/riscv/boot/dts/microchip/mpfs.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/riscv/boot/dts/microchip/mpfs.dtsi b/arch/riscv/boot/dts/microchip/mpfs.dtsi index a6faf24f1dba..e3e9c5b2b33c 100644 --- a/arch/riscv/boot/dts/microchip/mpfs.dtsi +++ b/arch/riscv/boot/dts/microchip/mpfs.dtsi @@ -236,7 +236,7 @@ plic: interrupt-controller@c000000 { }; pdma: dma-controller@3000000 { - compatible = "sifive,fu540-c000-pdma", "sifive,pdma0"; + compatible = "microchip,mpfs-pdma", "sifive,pdma0"; reg = <0x0 0x3000000 0x0 0x8000>; interrupt-parent = <&plic>; interrupts = <5 6>, <7 8>, <9 10>, <11 12>;