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[2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id k27-20020a67ef5b000000b0046447285292si973180vsr.733.2023.12.06.05.04.35 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Dec 2023 05:04:35 -0800 (PST) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; arc=pass (i=1); spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org" Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 70B953857C41 for ; Wed, 6 Dec 2023 13:04:31 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from smtpbgau1.qq.com (smtpbgau1.qq.com [54.206.16.166]) by sourceware.org (Postfix) with ESMTPS id 928F43858423 for ; Wed, 6 Dec 2023 13:03:59 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 928F43858423 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivai.ai Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivai.ai ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 928F43858423 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=54.206.16.166 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1701867845; cv=none; b=I1ImfGRfkS4o1TIykRmy0CvVvj08yqT4FZq1nCscXNw+KOwVCfQUVq7tahYTxzHucpBEkNVQBh6e3bpPouikDPq7Kq9UYWRc3ACk4mrBgvOiFdUepOFXiFsdhQMKignm5FniVpq/5TRA9aZi9KuHYywAd8Kp81NCUdLQAG4oeng= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1701867845; c=relaxed/simple; bh=Fa1Qrn8Z0c58wWgArTJZVSuSrs7nUWQx2Hs4/jWsI0o=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=BL3uyz0fl9L2GbcgU2lvGi2RF68ufgF4j1wrtt0LsokqSJc6DZKhyY5z2E/FEofg/BRWkiEcnyDP27azKrZXO+vgj6zyu4o+tkJB9TYmB7miEy89fzkGWAEX7oXdBqbYIhyXyHOK52XuaGkmUELzYQegBHMIP3JiogUAsRFvnX4= ARC-Authentication-Results: i=1; server2.sourceware.org X-QQ-mid: bizesmtp85t1701867833tpzc3cyj Received: from server1.localdomain ( [58.60.1.26]) by bizesmtp.qq.com (ESMTP) with id ; Wed, 06 Dec 2023 21:03:52 +0800 (CST) X-QQ-SSF: 01400000000000G0V000000A0000000 X-QQ-FEAT: 90EFqYDyPxB86riDgO3BlGBa2lE2yJ9fNuOxhwuyatINXvn9LRHHJeryp3q0X 6D4ue8SnqTYSZD7iPgjFu1BJtPtumLA/xlWADPFQZfQh3sf5IR0z25NurdYp+ITLUDeVIuZ fPXQDo+URp5K+uFTlRnAuappsnRA2SRG7YfvpQqs/ec5ZkMQcZJa9XfIGCrY9S8lC01dOJV J6azYa6d3yERHpsOT1nmVqnayXyzPv5FRnZcxj8p6NLxjtzs2/AUG5FAkbcyTClLIXJZqre h7Rg+ZIu8KBbAJS31t3aAbklLJvlycQX7N/7UQqItdB6KLxg7QDFZ72W79V4gnQmC5szS8v czKf2+ZEjglxY46j4Le26JSugk3+BIMRA3B2jSVBmuoP+tbu6AMDpaXe2cqS6qt+EzSCt/V E9AN6GImmH3s/FBjwPdvAAvW0sAEH+yl X-QQ-GoodBg: 2 X-BIZMAIL-ID: 6271608024015603774 From: Juzhe-Zhong To: gcc-patches@gcc.gnu.org Cc: kito.cheng@gmail.com, kito.cheng@sifive.com, jeffreyalaw@gmail.com, rdapp.gcc@gmail.com, Juzhe-Zhong Subject: [PATCH] RISC-V: Fix VSETVL PASS bug Date: Wed, 6 Dec 2023 21:03:50 +0800 Message-Id: <20231206130351.2573949-1-juzhe.zhong@rivai.ai> X-Mailer: git-send-email 2.36.3 MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:rivai.ai:qybglogicsvrgz:qybglogicsvrgz7a-one-0 X-Spam-Status: No, score=-10.3 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, KAM_SHORT, RCVD_IN_BARRACUDACENTRAL, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, SPF_HELO_PASS, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1784537810310895182 X-GMAIL-MSGID: 1784537810310895182 As PR112855 mentioned, the VSETVL PASS insert vsetvli in unexpected location. Due to 2 reasons: 1. incorrect transparant computation LCM data. We need to check VL operand defs and uses. 2. incorrect fusion of unrelated edge which is the edge never reach the vsetvl expression. PR target/112855 gcc/ChangeLog: * config/riscv/riscv-vsetvl.cc (pre_vsetvl::compute_lcm_local_properties): Fix transparant LCM data. (pre_vsetvl::earliest_fuse_vsetvl_info): Disable earliest fusion for unrelated edge. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/pr112855.c: New test. --- gcc/config/riscv/riscv-vsetvl.cc | 63 ++++++++++++++++++- .../gcc.target/riscv/rvv/autovec/pr112855.c | 26 ++++++++ 2 files changed, 86 insertions(+), 3 deletions(-) create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/pr112855.c diff --git a/gcc/config/riscv/riscv-vsetvl.cc b/gcc/config/riscv/riscv-vsetvl.cc index 484a8b3a514..f0dd43bece7 100644 --- a/gcc/config/riscv/riscv-vsetvl.cc +++ b/gcc/config/riscv/riscv-vsetvl.cc @@ -2034,7 +2034,7 @@ private: gcc_unreachable (); } - bool anticpatable_exp_p (const vsetvl_info &header_info) + bool anticipated_exp_p (const vsetvl_info &header_info) { if (!header_info.has_nonvlmax_reg_avl () && !header_info.has_vl ()) return true; @@ -2645,7 +2645,7 @@ pre_vsetvl::compute_lcm_local_properties () } } - for (const insn_info *insn : bb->real_nondebug_insns ()) + for (insn_info *insn : bb->real_nondebug_insns ()) { if (info.has_nonvlmax_reg_avl () && find_access (insn->defs (), REGNO (info.get_avl ()))) @@ -2653,6 +2653,59 @@ pre_vsetvl::compute_lcm_local_properties () bitmap_clear_bit (m_transp[bb_index], i); break; } + + if (info.has_vl () + && reg_mentioned_p (info.get_vl (), insn->rtl ())) + { + if (find_access (insn->defs (), REGNO (info.get_vl ()))) + /* We can't fuse vsetvl into the blocks that modify the + VL operand since successors of such blocks will need + the value of those blocks are defining. + + bb 4: def a5 + / \ + bb 5:use a5 bb 6:vsetvl a5, 5 + + The example above shows that we can't fuse vsetvl + from bb 6 into bb 4 since the successor bb 5 is using + the value defined in bb 4. */ + ; + else + { + /* We can't fuse vsetvl into the blocks that use the + VL operand which has different value from the + vsetvl info. + + bb 4: def a5 + | + bb 5: use a5 + | + bb 6: def a5 + | + bb 7: use a5 + + The example above shows that we can't fuse vsetvl + from bb 6 into bb 5 since their value is different. + */ + resource_info resource + = full_register (REGNO (info.get_vl ())); + def_lookup dl = crtl->ssa->find_def (resource, insn); + def_info *def + = dl.matching_set_or_last_def_of_prev_group (); + gcc_assert (def); + insn_info *def_insn = extract_single_source ( + dyn_cast (def)); + if (def_insn && vsetvl_insn_p (def_insn->rtl ())) + { + vsetvl_info def_info = vsetvl_info (def_insn); + if (m_dem.compatible_p (def_info, info)) + continue; + } + } + + bitmap_clear_bit (m_transp[bb_index], i); + break; + } } } @@ -2663,7 +2716,7 @@ pre_vsetvl::compute_lcm_local_properties () vsetvl_info &footer_info = block_info.get_exit_info (); if (header_info.valid_p () - && (anticpatable_exp_p (header_info) || block_info.full_available)) + && (anticipated_exp_p (header_info) || block_info.full_available)) bitmap_set_bit (m_antloc[bb_index], get_expr_index (m_exprs, header_info)); @@ -2920,6 +2973,10 @@ pre_vsetvl::earliest_fuse_vsetvl_info () || eg->dest == EXIT_BLOCK_PTR_FOR_FN (cfun)) continue; + /* Don't perform earliest fusion on unrelated edge. */ + if (bitmap_count_bits (e) != 1) + continue; + vsetvl_block_info &src_block_info = get_block_info (eg->src); vsetvl_block_info &dest_block_info = get_block_info (eg->dest); diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr112855.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr112855.c new file mode 100644 index 00000000000..f1fa6693d2d --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr112855.c @@ -0,0 +1,26 @@ +/* { dg-do run } */ +/* { dg-options "-O3" } */ +/* { dg-require-effective-target rv64 } */ +/* { dg-require-effective-target riscv_v } */ + +#include +int a; +int b = 100; +int c[25]; +int d; +int main() { + int e; + d = 0; + for (; d < 5; d++) { + e = 0; + for (; e < 5; e++) + c[d * 5 + e] = 0; + } + if (b) + if (a) + for (;;) + ; + b++; + int volatile f = *c; + assert(b == 101); +}