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Fri, 01 Dec 2023 12:06:26 +0000 Received: from pps.filterd (APBLRPPMTA01.qualcomm.com [127.0.0.1]) by APBLRPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTP id 3B1C6MLT020125; Fri, 1 Dec 2023 12:06:22 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA01.qualcomm.com (PPS) with ESMTP id 3unmf08sj4-1; Fri, 01 Dec 2023 12:06:22 +0000 Received: from APBLRPPMTA01.qualcomm.com (APBLRPPMTA01.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 3B1C6Mhv020119; Fri, 1 Dec 2023 12:06:22 GMT Received: from hu-sgudaval-hyd.qualcomm.com (hu-msarkar-hyd.qualcomm.com [10.213.111.194]) by APBLRPPMTA01.qualcomm.com (PPS) with ESMTP id 3B1C6Ml8020116; Fri, 01 Dec 2023 12:06:22 +0000 Received: by hu-sgudaval-hyd.qualcomm.com (Postfix, from userid 3891782) id A3B773064; Fri, 1 Dec 2023 17:36:21 +0530 (+0530) From: Mrinmay Sarkar To: agross@kernel.org, andersson@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, konrad.dybcio@linaro.org, mani@kernel.org, robh+dt@kernel.org Cc: quic_shazhuss@quicinc.com, quic_nitegupt@quicinc.com, quic_ramkri@quicinc.com, quic_nayiluri@quicinc.com, dmitry.baryshkov@linaro.org, robh@kernel.org, quic_krichai@quicinc.com, quic_vbadigan@quicinc.com, quic_parass@quicinc.com, quic_schintav@quicinc.com, quic_shijjose@quicinc.com, Mrinmay Sarkar , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Bjorn Helgaas , Kishon Vijay Abraham I , linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, mhi@lists.linux.dev Subject: [PATCH v9 1/5] dt-bindings: PCI: qcom-ep: Add support for SA8775P SoC Date: Fri, 1 Dec 2023 17:36:12 +0530 Message-Id: <1701432377-16899-2-git-send-email-quic_msarkar@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1701432377-16899-1-git-send-email-quic_msarkar@quicinc.com> References: <1701432377-16899-1-git-send-email-quic_msarkar@quicinc.com> X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: ZlZROCJ9mB-VIBC3PGuC6mNOQ6J1UZy8 X-Proofpoint-GUID: ZlZROCJ9mB-VIBC3PGuC6mNOQ6J1UZy8 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-12-01_09,2023-11-30_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 bulkscore=0 impostorscore=0 malwarescore=0 lowpriorityscore=0 priorityscore=1501 adultscore=0 mlxscore=0 phishscore=0 suspectscore=0 spamscore=0 mlxlogscore=979 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311060000 definitions=main-2312010080 X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on fry.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (fry.vger.email [0.0.0.0]); Fri, 01 Dec 2023 04:06:54 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1784081202536493588 X-GMAIL-MSGID: 1784081202536493588 Add devicetree bindings support for SA8775P SoC. It has DMA register space and dma interrupt to support HDMA. Signed-off-by: Mrinmay Sarkar Acked-by: Manivannan Sadhasivam Reviewed-by: Krzysztof Kozlowski --- .../devicetree/bindings/pci/qcom,pcie-ep.yaml | 64 +++++++++++++++++++++- 1 file changed, 62 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml index a223ce0..46802f7 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml @@ -13,6 +13,7 @@ properties: compatible: oneOf: - enum: + - qcom,sa8775p-pcie-ep - qcom,sdx55-pcie-ep - qcom,sm8450-pcie-ep - items: @@ -20,6 +21,7 @@ properties: - const: qcom,sdx55-pcie-ep reg: + minItems: 6 items: - description: Qualcomm-specific PARF configuration registers - description: DesignWare PCIe registers @@ -27,8 +29,10 @@ properties: - description: Address Translation Unit (ATU) registers - description: Memory region used to map remote RC address space - description: BAR memory region + - description: DMA register space reg-names: + minItems: 6 items: - const: parf - const: dbi @@ -36,13 +40,14 @@ properties: - const: atu - const: addr_space - const: mmio + - const: dma clocks: - minItems: 7 + minItems: 5 maxItems: 8 clock-names: - minItems: 7 + minItems: 5 maxItems: 8 qcom,perst-regs: @@ -57,14 +62,18 @@ properties: - description: Perst separation enable offset interrupts: + minItems: 2 items: - description: PCIe Global interrupt - description: PCIe Doorbell interrupt + - description: DMA interrupt interrupt-names: + minItems: 2 items: - const: global - const: doorbell + - const: dma reset-gpios: description: GPIO used as PERST# input signal @@ -125,6 +134,10 @@ allOf: - qcom,sdx55-pcie-ep then: properties: + reg: + maxItems: 6 + reg-names: + maxItems: 6 clocks: items: - description: PCIe Auxiliary clock @@ -143,6 +156,10 @@ allOf: - const: slave_q2a - const: sleep - const: ref + interrupts: + maxItems: 2 + interrupt-names: + maxItems: 2 - if: properties: @@ -152,6 +169,10 @@ allOf: - qcom,sm8450-pcie-ep then: properties: + reg: + maxItems: 6 + reg-names: + maxItems: 6 clocks: items: - description: PCIe Auxiliary clock @@ -172,6 +193,45 @@ allOf: - const: ref - const: ddrss_sf_tbu - const: aggre_noc_axi + interrupts: + maxItems: 2 + interrupt-names: + maxItems: 2 + + - if: + properties: + compatible: + contains: + enum: + - qcom,sa8775p-pcie-ep + then: + properties: + reg: + minItems: 7 + maxItems: 7 + reg-names: + minItems: 7 + maxItems: 7 + clocks: + items: + - description: PCIe Auxiliary clock + - description: PCIe CFG AHB clock + - description: PCIe Master AXI clock + - description: PCIe Slave AXI clock + - description: PCIe Slave Q2A AXI clock + clock-names: + items: + - const: aux + - const: cfg + - const: bus_master + - const: bus_slave + - const: slave_q2a + interrupts: + minItems: 3 + maxItems: 3 + interrupt-names: + minItems: 3 + maxItems: 3 unevaluatedProperties: false From patchwork Fri Dec 1 12:06:13 2023 Content-Type: text/plain; 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Fri, 01 Dec 2023 12:06:27 +0000 Received: from pps.filterd (APBLRPPMTA01.qualcomm.com [127.0.0.1]) by APBLRPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTP id 3B1C6OP8020139; Fri, 1 Dec 2023 12:06:24 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA01.qualcomm.com (PPS) with ESMTP id 3unmf08sjb-1; Fri, 01 Dec 2023 12:06:24 +0000 Received: from APBLRPPMTA01.qualcomm.com (APBLRPPMTA01.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 3B1C6OiE020133; Fri, 1 Dec 2023 12:06:24 GMT Received: from hu-sgudaval-hyd.qualcomm.com (hu-msarkar-hyd.qualcomm.com [10.213.111.194]) by APBLRPPMTA01.qualcomm.com (PPS) with ESMTP id 3B1C6N1Y020132; Fri, 01 Dec 2023 12:06:24 +0000 Received: by hu-sgudaval-hyd.qualcomm.com (Postfix, from userid 3891782) id 226C33064; Fri, 1 Dec 2023 17:36:23 +0530 (+0530) From: Mrinmay Sarkar To: agross@kernel.org, andersson@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, konrad.dybcio@linaro.org, mani@kernel.org, robh+dt@kernel.org Cc: quic_shazhuss@quicinc.com, quic_nitegupt@quicinc.com, quic_ramkri@quicinc.com, quic_nayiluri@quicinc.com, dmitry.baryshkov@linaro.org, robh@kernel.org, quic_krichai@quicinc.com, quic_vbadigan@quicinc.com, quic_parass@quicinc.com, quic_schintav@quicinc.com, quic_shijjose@quicinc.com, Mrinmay Sarkar , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Kishon Vijay Abraham I , linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, mhi@lists.linux.dev Subject: [PATCH v9 2/5] PCI: qcom-ep: Add support for SA8775P SOC Date: Fri, 1 Dec 2023 17:36:13 +0530 Message-Id: <1701432377-16899-3-git-send-email-quic_msarkar@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1701432377-16899-1-git-send-email-quic_msarkar@quicinc.com> References: <1701432377-16899-1-git-send-email-quic_msarkar@quicinc.com> X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: X5HaZCMB3si4riwBMDvmjTAj08SmzdL0 X-Proofpoint-GUID: X5HaZCMB3si4riwBMDvmjTAj08SmzdL0 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-12-01_09,2023-11-30_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 phishscore=0 spamscore=0 suspectscore=0 impostorscore=0 mlxlogscore=999 clxscore=1015 mlxscore=0 priorityscore=1501 adultscore=0 bulkscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311060000 definitions=main-2312010080 X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on pete.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (pete.vger.email [0.0.0.0]); Fri, 01 Dec 2023 04:07:00 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1784081211528135119 X-GMAIL-MSGID: 1784081211528135119 Add support for SA8775P SoC to the Qualcomm PCIe Endpoint Controller driver. Adding new compatible string as it has different set of clocks compared to other SoCs. Signed-off-by: Mrinmay Sarkar Reviewed-by: Manivannan Sadhasivam --- drivers/pci/controller/dwc/pcie-qcom-ep.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/controller/dwc/pcie-qcom-ep.c index 9e58f05..3a53d97 100644 --- a/drivers/pci/controller/dwc/pcie-qcom-ep.c +++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c @@ -875,6 +875,7 @@ static void qcom_pcie_ep_remove(struct platform_device *pdev) } static const struct of_device_id qcom_pcie_ep_match[] = { + { .compatible = "qcom,sa8775p-pcie-ep", }, { .compatible = "qcom,sdx55-pcie-ep", }, { .compatible = "qcom,sm8450-pcie-ep", }, { } From patchwork Fri Dec 1 12:06:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mrinmay Sarkar X-Patchwork-Id: 172459 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:bcd1:0:b0:403:3b70:6f57 with SMTP id r17csp1068765vqy; Fri, 1 Dec 2023 04:08:20 -0800 (PST) X-Google-Smtp-Source: AGHT+IHycIcPsNLa91k6k1j+I2umASKZsdXwretaJ2osXtj9C9sfMBaEzQwQPJ4PAqua4SC8co8S X-Received: by 2002:a05:6359:c8c:b0:16e:2856:f70b with SMTP id go12-20020a0563590c8c00b0016e2856f70bmr21460903rwb.14.1701432500152; Fri, 01 Dec 2023 04:08:20 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1701432500; cv=none; d=google.com; s=arc-20160816; b=gseCBHuzpgOBi8ZIqwsQe4kX//DdgJ1l1Bg7+nbKL/dqOAXcqsW4Exa5ZloN1zc7iY D5anhZwydwHVkBz4XbZQL5IUgnW/oah1NkiYNmZbEynImmsITp3zixUzL5gwq5H9EKw1 /+it9nhqdrLpoeptLD3300MTGfM6AFbq2EEVpJiQK/CqvoH4kh+2guQ7kUzz0M749BgW 9HxcJn5vyU67TTe5TscQOCF1qBKll78+CnoDsFlpa1LVbkuvxlhvRACxbYWsvQ8oShrz 7NnCT09ABKjM86Ag8QxYzZ4XRyMNCxnh6Fq7c1Z3MgDis0jkkeZu8ARfJUSG0N7TDgIt h2ng== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from:dkim-signature; bh=prNP5FasTEW2PoWfZxjSPeYpxqgOwouJysxEz0u+kH8=; fh=5O60zCA/hhxm4MucUeuuKVUJ8jFWonmiib5uCeZhn2o=; b=dmBdE4bfciFf1vW6nYpLN1V4bGA7DbONjjfOsKmWH6PhZWhNNT84fIwxl75Zko4rJN DSZAgYlTRR1OFWNxXknfG03KtgvxH1kIj8gDFQ0j2KLVACgnhH2esVokG6f+ZzpxlBvX PbgPdwNQmavuFJQ8blFi825BRU1SNt5BMmezgfejvPY46ZmkfcOz2piY91X7s/+TMiyv /2y+okshwKLhhy8p2CMFMOzgXcy+5tHyky9RUvPo66flavGQ8c9gmjTEvx2xiwHk4Vf+ zLzu/1KDBG5RBOaoKQLKizNLjMjDVOaon2y753747i+cnMxDZY6Dew/dvS4CWqaiFj5U 3swA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=Dmt90K3q; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.35 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from groat.vger.email (groat.vger.email. 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Fri, 01 Dec 2023 12:06:28 +0000 Received: from pps.filterd (APBLRPPMTA01.qualcomm.com [127.0.0.1]) by APBLRPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTP id 3B1C6PSb020153; Fri, 1 Dec 2023 12:06:25 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA01.qualcomm.com (PPS) with ESMTP id 3unmf08sjj-1; Fri, 01 Dec 2023 12:06:25 +0000 Received: from APBLRPPMTA01.qualcomm.com (APBLRPPMTA01.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 3B1C6PtO020147; Fri, 1 Dec 2023 12:06:25 GMT Received: from hu-sgudaval-hyd.qualcomm.com (hu-msarkar-hyd.qualcomm.com [10.213.111.194]) by APBLRPPMTA01.qualcomm.com (PPS) with ESMTP id 3B1C6Pnj020146; Fri, 01 Dec 2023 12:06:25 +0000 Received: by hu-sgudaval-hyd.qualcomm.com (Postfix, from userid 3891782) id 6038A3064; Fri, 1 Dec 2023 17:36:24 +0530 (+0530) From: Mrinmay Sarkar To: agross@kernel.org, andersson@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, konrad.dybcio@linaro.org, mani@kernel.org, robh+dt@kernel.org Cc: quic_shazhuss@quicinc.com, quic_nitegupt@quicinc.com, quic_ramkri@quicinc.com, quic_nayiluri@quicinc.com, dmitry.baryshkov@linaro.org, robh@kernel.org, quic_krichai@quicinc.com, quic_vbadigan@quicinc.com, quic_parass@quicinc.com, quic_schintav@quicinc.com, quic_shijjose@quicinc.com, Manivannan Sadhasivam , Mrinmay Sarkar , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Kishon Vijay Abraham I , linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, mhi@lists.linux.dev Subject: [PATCH v9 3/5] PCI: epf-mhi: Add "pci_epf_mhi_" prefix to the function names Date: Fri, 1 Dec 2023 17:36:14 +0530 Message-Id: <1701432377-16899-4-git-send-email-quic_msarkar@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1701432377-16899-1-git-send-email-quic_msarkar@quicinc.com> References: <1701432377-16899-1-git-send-email-quic_msarkar@quicinc.com> X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: LHP9O9vjO-X4w41W2Lk-o4vrlyr1JVYQ X-Proofpoint-GUID: LHP9O9vjO-X4w41W2Lk-o4vrlyr1JVYQ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-12-01_09,2023-11-30_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 bulkscore=0 impostorscore=0 malwarescore=0 lowpriorityscore=0 priorityscore=1501 adultscore=0 mlxscore=0 phishscore=0 suspectscore=0 spamscore=0 mlxlogscore=746 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311060000 definitions=main-2312010080 X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on groat.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (groat.vger.email [0.0.0.0]); Fri, 01 Dec 2023 04:07:19 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1784081284826667476 X-GMAIL-MSGID: 1784081284826667476 From: Manivannan Sadhasivam Without the prefix, the function name would appear as "/sys/kernel/config/functions/{sdx55/sm8450}". This will be a problem if multiple functions are supported for this endpoint device. So let's add the "pci_epf_mhi_" prefix to identify _this_ function uniquely. Even though it is an ABI breakage, this driver is not used anywhere outside Qcom and myself to my knowledge. So it safe to change the function name. Signed-off-by: Manivannan Sadhasivam Signed-off-by: Mrinmay Sarkar --- drivers/pci/endpoint/functions/pci-epf-mhi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/pci/endpoint/functions/pci-epf-mhi.c b/drivers/pci/endpoint/functions/pci-epf-mhi.c index b7b9d3e..5b0515a 100644 --- a/drivers/pci/endpoint/functions/pci-epf-mhi.c +++ b/drivers/pci/endpoint/functions/pci-epf-mhi.c @@ -677,8 +677,8 @@ static int pci_epf_mhi_probe(struct pci_epf *epf, } static const struct pci_epf_device_id pci_epf_mhi_ids[] = { - { .name = "sdx55", .driver_data = (kernel_ulong_t)&sdx55_info }, - { .name = "sm8450", .driver_data = (kernel_ulong_t)&sm8450_info }, + { .name = "pci_epf_mhi_sdx55", .driver_data = (kernel_ulong_t)&sdx55_info }, + { .name = "pci_epf_mhi_sm8450", .driver_data = (kernel_ulong_t)&sm8450_info }, {}, }; From patchwork Fri Dec 1 12:06:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mrinmay Sarkar X-Patchwork-Id: 172456 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:bcd1:0:b0:403:3b70:6f57 with SMTP id r17csp1067898vqy; Fri, 1 Dec 2023 04:07:04 -0800 (PST) X-Google-Smtp-Source: AGHT+IGOJv4vrEottei917z6CniPyxlcdo96nkObPD4mrcU3YSVtnBaPEwkyM49XAuoSUAZCBa4z X-Received: by 2002:a05:6a00:188f:b0:6cd:dfff:19b3 with SMTP id x15-20020a056a00188f00b006cddfff19b3mr8854995pfh.32.1701432424170; Fri, 01 Dec 2023 04:07:04 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1701432424; cv=none; d=google.com; s=arc-20160816; b=GjFW/Lr+rHmxeMfQKrdxoSBDAUL9YQgqOc20xUhCFoaEV5OkHLicdJX+wE1dHAu+ml ZTp04xFgNIAQ5BpnCwtX18SKbivIwxC//G+1fM6ZHBMTnll0BIi0hyeB040cH5q7PYKw sIHDaDtLW1YQRv6wOJdJCt8st4hYfZ/+psrW7YHQmd2bf6BN4H9KWjiJqN1b2Iyuia33 5z1mIs1rBGGTvgNNWNITg/pADzBBosEuh8OZ6GsNNFB5jj6A0ecC9LmwcRJeD40NDmTc BoiJSX8FnXvBGt/W7/U2bk3e0TOR6KfLWvx89YKCDpvpDOcddbP1fHQVp8uWAO1r9rCg gLlw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from:dkim-signature; bh=V99Fmz14JVM/5E/xWPdfO+v2v+AZcFA2pv/tRNAlPh4=; fh=72EESTaQti9jWwEdJgn5hsP2k6nTzn4cvUgqYCpq0+Q=; b=lUZ1hGVcf3nSqr6qjsSYcI5S0AlFud1U12yOHxX2rVtYCBliJ2NPr1PUO2joTvbWkR ASoNxyEDJI/X0LlJPH6YdlFbp1FKXm6VhOOBqkUCOSGwLhlLQUKwNH1lX3IPD2AE+per Vd5eUAQkiMEBlTv+J2Pjj41IIbUvAURYpiyb+7QIs79ayoR4wxLoJVl51iKWCot96yfT cJI+WfzP4RFdU2N/QNiG/JQB5AOW+GFwfUiePVr+SCUJ4uoEcFVSueJ/BrUToVhrg9wr ve/hlbJgpeePh+ymVxnikUcDxjnrtbVsh7GkDRJXZGxgUIGkHFFLj6RGFXatbGI0Wnpw PpDw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=jxlZDxZV; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from snail.vger.email (snail.vger.email. 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Fri, 01 Dec 2023 12:06:30 +0000 Received: from pps.filterd (APBLRPPMTA01.qualcomm.com [127.0.0.1]) by APBLRPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTP id 3B1C6M3O020124; Fri, 1 Dec 2023 12:06:27 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA01.qualcomm.com (PPS) with ESMTP id 3unmf08sjw-1; Fri, 01 Dec 2023 12:06:27 +0000 Received: from APBLRPPMTA01.qualcomm.com (APBLRPPMTA01.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 3B1C6Q54020166; Fri, 1 Dec 2023 12:06:26 GMT Received: from hu-sgudaval-hyd.qualcomm.com (hu-msarkar-hyd.qualcomm.com [10.213.111.194]) by APBLRPPMTA01.qualcomm.com (PPS) with ESMTP id 3B1C6Q17020164; Fri, 01 Dec 2023 12:06:26 +0000 Received: by hu-sgudaval-hyd.qualcomm.com (Postfix, from userid 3891782) id 95F483064; Fri, 1 Dec 2023 17:36:25 +0530 (+0530) From: Mrinmay Sarkar To: agross@kernel.org, andersson@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, konrad.dybcio@linaro.org, mani@kernel.org, robh+dt@kernel.org Cc: quic_shazhuss@quicinc.com, quic_nitegupt@quicinc.com, quic_ramkri@quicinc.com, quic_nayiluri@quicinc.com, dmitry.baryshkov@linaro.org, robh@kernel.org, quic_krichai@quicinc.com, quic_vbadigan@quicinc.com, quic_parass@quicinc.com, quic_schintav@quicinc.com, quic_shijjose@quicinc.com, Mrinmay Sarkar , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Bjorn Helgaas , Kishon Vijay Abraham I , linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, mhi@lists.linux.dev Subject: [PATCH v9 4/5] PCI: epf-mhi: Add support for SA8775P Date: Fri, 1 Dec 2023 17:36:15 +0530 Message-Id: <1701432377-16899-5-git-send-email-quic_msarkar@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1701432377-16899-1-git-send-email-quic_msarkar@quicinc.com> References: <1701432377-16899-1-git-send-email-quic_msarkar@quicinc.com> X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: YEyc7yuii9YXr-AmI_HL_yNBi294Et4C X-Proofpoint-GUID: YEyc7yuii9YXr-AmI_HL_yNBi294Et4C X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-12-01_09,2023-11-30_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 phishscore=0 spamscore=0 suspectscore=0 impostorscore=0 mlxlogscore=821 clxscore=1015 mlxscore=0 priorityscore=1501 adultscore=0 bulkscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311060000 definitions=main-2312010080 X-Spam-Status: No, score=-1.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,SPF_HELO_NONE, SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Fri, 01 Dec 2023 04:07:02 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1784081205615379543 X-GMAIL-MSGID: 1784081205615379543 Add support for Qualcomm Snapdragon SA8775P SoC to the EPF driver. SA8775P is currently reusing the PID 0x0306 (the default one hardcoded in the config space header) as the unique PID is not yet allocated. But the host side stack works fine with the default PID. It will get updated once the PID is finalized. Currently, it has no fixed PCI class, so it is being advertised as "PCI_CLASS_OTHERS". Signed-off-by: Mrinmay Sarkar Reviewed-by: Manivannan Sadhasivam --- drivers/pci/endpoint/functions/pci-epf-mhi.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/pci/endpoint/functions/pci-epf-mhi.c b/drivers/pci/endpoint/functions/pci-epf-mhi.c index 5b0515a..68801c2 100644 --- a/drivers/pci/endpoint/functions/pci-epf-mhi.c +++ b/drivers/pci/endpoint/functions/pci-epf-mhi.c @@ -114,6 +114,22 @@ static const struct pci_epf_mhi_ep_info sm8450_info = { .flags = MHI_EPF_USE_DMA, }; +static struct pci_epf_header sa8775p_header = { + .vendorid = PCI_VENDOR_ID_QCOM, + .deviceid = 0x0306, /* FIXME: Update deviceid for sa8775p EP */ + .baseclass_code = PCI_CLASS_OTHERS, + .interrupt_pin = PCI_INTERRUPT_INTA, +}; + +static const struct pci_epf_mhi_ep_info sa8775p_info = { + .config = &mhi_v1_config, + .epf_header = &sa8775p_header, + .bar_num = BAR_0, + .epf_flags = PCI_BASE_ADDRESS_MEM_TYPE_32, + .msi_count = 32, + .mru = 0x8000, +}; + struct pci_epf_mhi { const struct pci_epc_features *epc_features; const struct pci_epf_mhi_ep_info *info; @@ -677,6 +693,7 @@ static int pci_epf_mhi_probe(struct pci_epf *epf, } static const struct pci_epf_device_id pci_epf_mhi_ids[] = { + { .name = "pci_epf_mhi_sa8775p", .driver_data = (kernel_ulong_t)&sa8775p_info }, { .name = "pci_epf_mhi_sdx55", .driver_data = (kernel_ulong_t)&sdx55_info }, { .name = "pci_epf_mhi_sm8450", .driver_data = (kernel_ulong_t)&sm8450_info }, {}, From patchwork Fri Dec 1 12:06:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mrinmay Sarkar X-Patchwork-Id: 172458 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:bcd1:0:b0:403:3b70:6f57 with SMTP id r17csp1068175vqy; Fri, 1 Dec 2023 04:07:27 -0800 (PST) X-Google-Smtp-Source: AGHT+IGLtfDnkkClewgSq9DCv2aO5wBXVFk7rHinmpa1dwbF8LlWQ2cB6WkLT9jSQu2Zfla2bo2S X-Received: by 2002:a17:90a:d98b:b0:27d:2663:c5f4 with SMTP id d11-20020a17090ad98b00b0027d2663c5f4mr32381688pjv.47.1701432447515; Fri, 01 Dec 2023 04:07:27 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1701432447; cv=none; d=google.com; s=arc-20160816; b=XyfsU6ZJYa0LbkjAnVLpBCpNfYybKEOLynqqIpsTruJw9ofsoSwGrKbTRR38P4sCJ0 dJbzxmD3XlLijh137GjQ4jZT7FE4aHHTDWrEIgId3QHP8mwY5JQ+bX3GhqbSN3lyI4We dmREWxyVqxUdducwsOMtRYj+VauzFMjtMdGYCoBQHSrXoMfOVNie5JrQFCbf2/TyWJdL bmJwha17iQBPf4q4dx62Je3entKxYFvvRNlxGoMq3UC0E0+FBCoch7fRmvpRih96gikg GRsz47r6nd7TUlw/EWz9ph1krrfJQr+Hm/ha980k3o39Of0lAsQ1dNmL9UZBH2fxE4w0 4LQQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from:dkim-signature; bh=3+YMA23o75yDOPLIrv3GEbuYP46t8YxPCwUb1AJ4tA8=; fh=+viStRW9RfADMxlke3U5kSnZUvtp2pM32acnEU+HesA=; b=E4BiEry1av0axW4fUWfDvJZYB2SvyWl2LDTD5PcVtHDjCryYfDREhHn61IK4LtBBrc iWrrkxgl3Vw2WhALvKkwL8gcDwK9UkbU3Sowwx25B8GR7E8TT13P7mGRKsjMj24WucAk vr2wCFK2SipLzRDe2LtNxh8FJRmW4RJo1kZpYBWpKXOKuR/Hq+Z94ZLkwkbRHbI3Tbx7 NCyl/id3NQrbzqiHbEcnAUI7AebjvIdmIstZReLSqrRCOdyuZq9HXAhn0o8nVsRH381c wfjLwUM2vBwUGM+vefX9xPeoHjCy2hsh5fX0h2fiBf2JkKjW/SycXhimXq2WrMCuSIMt op+Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=gqCESdjc; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:6 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from pete.vger.email (pete.vger.email. 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Fri, 01 Dec 2023 12:06:31 +0000 Received: from pps.filterd (APBLRPPMTA01.qualcomm.com [127.0.0.1]) by APBLRPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTP id 3B1C6Mrk020113; Fri, 1 Dec 2023 12:06:28 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA01.qualcomm.com (PPS) with ESMTP id 3unmf08sk2-1; Fri, 01 Dec 2023 12:06:28 +0000 Received: from APBLRPPMTA01.qualcomm.com (APBLRPPMTA01.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 3B1C6OiG020133; Fri, 1 Dec 2023 12:06:28 GMT Received: from hu-sgudaval-hyd.qualcomm.com (hu-msarkar-hyd.qualcomm.com [10.213.111.194]) by APBLRPPMTA01.qualcomm.com (PPS) with ESMTP id 3B1C6R0h020175; Fri, 01 Dec 2023 12:06:28 +0000 Received: by hu-sgudaval-hyd.qualcomm.com (Postfix, from userid 3891782) id EE80A3064; Fri, 1 Dec 2023 17:36:26 +0530 (+0530) From: Mrinmay Sarkar To: agross@kernel.org, andersson@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, konrad.dybcio@linaro.org, mani@kernel.org, robh+dt@kernel.org Cc: quic_shazhuss@quicinc.com, quic_nitegupt@quicinc.com, quic_ramkri@quicinc.com, quic_nayiluri@quicinc.com, dmitry.baryshkov@linaro.org, robh@kernel.org, quic_krichai@quicinc.com, quic_vbadigan@quicinc.com, quic_parass@quicinc.com, quic_schintav@quicinc.com, quic_shijjose@quicinc.com, Mrinmay Sarkar , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Kishon Vijay Abraham I , linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, mhi@lists.linux.dev Subject: [PATCH v9 5/5] arm64: dts: qcom: sa8775p: Add ep pcie0 controller node Date: Fri, 1 Dec 2023 17:36:16 +0530 Message-Id: <1701432377-16899-6-git-send-email-quic_msarkar@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1701432377-16899-1-git-send-email-quic_msarkar@quicinc.com> References: <1701432377-16899-1-git-send-email-quic_msarkar@quicinc.com> X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: 7kQijdouWzrwMq3z1pcwBMKYw1iNIC9u X-Proofpoint-GUID: 7kQijdouWzrwMq3z1pcwBMKYw1iNIC9u X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-12-01_09,2023-11-30_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 adultscore=0 spamscore=0 impostorscore=0 lowpriorityscore=0 phishscore=0 priorityscore=1501 mlxlogscore=999 bulkscore=0 clxscore=1015 mlxscore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311060000 definitions=main-2312010080 X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on pete.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (pete.vger.email [0.0.0.0]); Fri, 01 Dec 2023 04:07:24 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1784081230408889721 X-GMAIL-MSGID: 1784081230408889721 Add ep pcie dtsi node for pcie0 controller found on sa8775p platform. It supports gen4 and x2 link width. Limiting the speed to Gen3 due to stability issues. Signed-off-by: Mrinmay Sarkar Reviewed-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sa8775p.dtsi | 46 +++++++++++++++++++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi index 13dd44d..7eab458 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi @@ -3586,6 +3586,52 @@ status = "disabled"; }; + pcie0_ep: pcie-ep@1c00000 { + compatible = "qcom,sa8775p-pcie-ep"; + reg = <0x0 0x01c00000 0x0 0x3000>, + <0x0 0x40000000 0x0 0xf20>, + <0x0 0x40000f20 0x0 0xa8>, + <0x0 0x40001000 0x0 0x4000>, + <0x0 0x40200000 0x0 0x100000>, + <0x0 0x01c03000 0x0 0x1000>, + <0x0 0x40005000 0x0 0x2000>; + reg-names = "parf", "dbi", "elbi", "atu", "addr_space", + "mmio", "dma"; + + clocks = <&gcc GCC_PCIE_0_AUX_CLK>, + <&gcc GCC_PCIE_0_CFG_AHB_CLK>, + <&gcc GCC_PCIE_0_MSTR_AXI_CLK>, + <&gcc GCC_PCIE_0_SLV_AXI_CLK>, + <&gcc GCC_PCIE_0_SLV_Q2A_AXI_CLK>; + + clock-names = "aux", + "cfg", + "bus_master", + "bus_slave", + "slave_q2a"; + + interrupts = , + , + ; + + interrupt-names = "global", "doorbell", "dma"; + + interconnects = <&pcie_anoc MASTER_PCIE_0 0 &mc_virt SLAVE_EBI1 0>, + <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_PCIE_0 0>; + interconnect-names = "pcie-mem", "cpu-pcie"; + + iommus = <&pcie_smmu 0x0000 0x7f>; + resets = <&gcc GCC_PCIE_0_BCR>; + reset-names = "core"; + power-domains = <&gcc PCIE_0_GDSC>; + phys = <&pcie0_phy>; + phy-names = "pciephy"; + max-link-speed = <3>; /* FIXME: Limiting the Gen speed due to stability issues */ + num-lanes = <2>; + + status = "disabled"; + }; + pcie0_phy: phy@1c04000 { compatible = "qcom,sa8775p-qmp-gen4x2-pcie-phy"; reg = <0x0 0x1c04000 0x0 0x2000>;