From patchwork Thu Nov 10 10:35:50 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 18070 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp68117wru; Thu, 10 Nov 2022 02:43:21 -0800 (PST) X-Google-Smtp-Source: AA0mqf6nmkBKDIb4j5p16nl+2BnZt4DidlwcUUxz3fUhP44PDDN9betshqQn5pC+iAfNikMkMTTT X-Received: by 2002:a17:907:7faa:b0:7ad:e8e4:6ac7 with SMTP id qk42-20020a1709077faa00b007ade8e46ac7mr20489632ejc.21.1668077001226; Thu, 10 Nov 2022 02:43:21 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668077001; cv=none; d=google.com; s=arc-20160816; b=OnDQHIDQmOl1To/P405OwgdnaJjZ2NoARvZlDIgRymSfo+4t3mlIk7H44ixXpMApG6 GkMvckL+v7uIGGkkx8leX8A7J2VTMF1sfWmIU0EzLYAJW1kT7o4ClvaQvp8yF1NitKJA Sn5ypkrHg5JAaHnfwYR6ae2CF75tVkQYP84YT7TjMDYdttPXS1ahns1N3mctZjl9YTyw gx13DXo1B9TbL5QucSg3i1zvIy1Wv3nBVHXa897/bU4PFsjSdNflEnEqhHUNJSIPGYZ4 IWQZhVNZeUNcgZuZ/xenq5ctKlx/FMuk7UgqCQjVkC+fDvmbPsSgc/11tbkCYMwPtU4w J05g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=RwI3mw9NvwDrvQzDMVleCXjf3tpayDxmkfApW9RjFZY=; b=uX5HN02Fpo1SXm7bz6F5hb/5cjempV8ULtrfQTpfVRVZ0SrssI2ItYUIAY7d7SdeMH tfTLEVQqBIuU7bxsuWFZVySQoxvxAiwboe03B76pl2tgumY+Jh+xQcRxlbEYHDjwM6RM j+F1aao1Ltr00JEMTrO3B9qHSKx/IMVMW0ZoreYoPUpJJLgv47ceXRa7GDkj+lEUoZjN 2+tHB7AMvV5EhkzV++9/5qaBMELjvyzn7veqTFTXPxqiXkwvjG+k79r59RKCXUYvaJlq Oj1zTd3mvhDi2ad22s5rzNKhuauCj1xrgomlNIjz3JYdu1QP4n1cuQsJ1fYpKAhyy1WI SB2A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=l5MTpzFU; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id a7-20020a50ff07000000b004615b657cbcsi15645341edu.190.2022.11.10.02.42.56; Thu, 10 Nov 2022 02:43:21 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=l5MTpzFU; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230211AbiKJKiq (ORCPT + 99 others); Thu, 10 Nov 2022 05:38:46 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33946 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230142AbiKJKiY (ORCPT ); Thu, 10 Nov 2022 05:38:24 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AB4DA29D; Thu, 10 Nov 2022 02:38:21 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 39E1EB8216D; Thu, 10 Nov 2022 10:38:20 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 00303C433D7; Thu, 10 Nov 2022 10:38:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668076698; bh=c+ZtY5kOZR6lF5AkKnagE/BaeMES7RThURN3FMOvs6A=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=l5MTpzFUGQzhQ/QtpP+6W9xbxNk0W/Sn22ZZ3kmjoFOVjwfupgVbNEPb6EC3O1Lkh +nJsoiaVHWZUvLeihJPI0DxCMawAmye/LZVzIoVWMKlfHShepdnmPpxfkZlWKumf77 HKEo5YeayIWSyHD9YZMQanM2hw5nsV9kTUxYk3oqBcYsIAbv2camta/3LRrbfg2I+v S5YWVv9tDcAo3su9cTSOqsPQzG+xJMZq6BCVK1f0R9HUOrfN6P/ycRpomv6FV8bGWO f52Tz58PhKcS9ynTSj6El7w4N1o1PfLPlaU3h2JzSz0iXVx35Gtoyw3ewShSNYpT0l 32/EiIkfJ4dDQ== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1ot4wQ-0003LP-PA; Thu, 10 Nov 2022 11:37:50 +0100 From: Johan Hovold To: Bjorn Andersson Cc: Andy Gross , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH 1/9] arm64: dts: qcom: sc8280xp/sa8540p: add PCIe2-4 nodes Date: Thu, 10 Nov 2022 11:35:50 +0100 Message-Id: <20221110103558.12690-2-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221110103558.12690-1-johan+linaro@kernel.org> References: <20221110103558.12690-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749105509265118094?= X-GMAIL-MSGID: =?utf-8?q?1749105509265118094?= The SC8280XP platform has seven PCIe controllers: PCIe0 USB4 PCIe1 USB4 PCIe2A 4-lane PCIe2B 2-lane PCIe3A 4-lane PCIe3B 2-lane PCIe4 1-lane while SA8540P only has five (PCIe2-4). Add devicetree nodes for the PCIe2-4 controllers and their PHYs. Signed-off-by: Johan Hovold Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sa8540p.dtsi | 59 +++ arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 493 ++++++++++++++++++++++++- 2 files changed, 547 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sa8540p.dtsi b/arch/arm64/boot/dts/qcom/sa8540p.dtsi index 8ea2886fbab2..01a24b6a5e6d 100644 --- a/arch/arm64/boot/dts/qcom/sa8540p.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8540p.dtsi @@ -128,6 +128,65 @@ opp-2592000000 { }; }; +&pcie2a { + compatible = "qcom,pcie-sa8540p"; + + linux,pci-domain = <0>; + + interrupts = ; + interrupt-names = "msi"; +}; + +&pcie2b { + compatible = "qcom,pcie-sa8540p"; + + linux,pci-domain = <1>; + + interrupts = ; + interrupt-names = "msi"; +}; + +&pcie3a { + compatible = "qcom,pcie-sa8540p"; + reg = <0x0 0x01c10000 0x0 0x3000>, + <0x0 0x40000000 0x0 0xf1d>, + <0x0 0x40000f20 0x0 0xa8>, + <0x0 0x40001000 0x0 0x1000>, + <0x0 0x40100000 0x0 0x100000>; + reg-names = "parf", "dbi", "elbi", "atu", "config"; + + ranges = <0x01000000 0x0 0x40200000 0x0 0x40200000 0x0 0x100000>, + <0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1d00000>; + + linux,pci-domain = <2>; + + interrupts = ; + interrupt-names = "msi"; + + interrupt-map = <0 0 0 1 &intc 0 0 GIC_SPI 541 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 2 &intc 0 0 GIC_SPI 542 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 3 &intc 0 0 GIC_SPI 543 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 4 &intc 0 0 GIC_SPI 544 IRQ_TYPE_LEVEL_HIGH>; +}; + +&pcie3b { + compatible = "qcom,pcie-sa8540p"; + + linux,pci-domain = <3>; + + interrupts = ; + interrupt-names = "msi"; +}; + +&pcie4 { + compatible = "qcom,pcie-sa8540p"; + + linux,pci-domain = <4>; + + interrupts = ; + interrupt-names = "msi"; +}; + &rpmhpd { compatible = "qcom,sa8540p-rpmhpd"; }; diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index 6bc12e507d21..27f5c2f82338 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -729,11 +729,11 @@ gcc: clock-controller@100000 { <0>, <0>, <0>, - <0>, - <0>, - <0>, - <0>, - <0>, + <&pcie2a_phy>, + <&pcie2b_phy>, + <&pcie3a_phy>, + <&pcie3b_phy>, + <&pcie4_phy>, <0>, <0>; power-domains = <&rpmhpd SC8280XP_CX>; @@ -839,6 +839,489 @@ qup1: geniqup@ac0000 { status = "disabled"; }; + pcie4: pcie@1c00000 { + device_type = "pci"; + compatible = "qcom,pcie-sc8280xp"; + reg = <0x0 0x01c00000 0x0 0x3000>, + <0x0 0x30000000 0x0 0xf1d>, + <0x0 0x30000f20 0x0 0xa8>, + <0x0 0x30001000 0x0 0x1000>, + <0x0 0x30100000 0x0 0x100000>; + reg-names = "parf", "dbi", "elbi", "atu", "config"; + #address-cells = <3>; + #size-cells = <2>; + ranges = <0x01000000 0x0 0x30200000 0x0 0x30200000 0x0 0x100000>, + <0x02000000 0x0 0x30300000 0x0 0x30300000 0x0 0x1d00000>; + bus-range = <0x00 0xff>; + + linux,pci-domain = <6>; + num-lanes = <1>; + + interrupts = , + , + , + ; + interrupt-names = "msi0", "msi1", "msi2", "msi3"; + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0x7>; + interrupt-map = <0 0 0 1 &intc 0 0 GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 2 &intc 0 0 GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 3 &intc 0 0 GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 4 &intc 0 0 GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; + + clocks = <&gcc GCC_PCIE_4_AUX_CLK>, + <&gcc GCC_PCIE_4_CFG_AHB_CLK>, + <&gcc GCC_PCIE_4_MSTR_AXI_CLK>, + <&gcc GCC_PCIE_4_SLV_AXI_CLK>, + <&gcc GCC_PCIE_4_SLV_Q2A_AXI_CLK>, + <&gcc GCC_DDRSS_PCIE_SF_TBU_CLK>, + <&gcc GCC_AGGRE_NOC_PCIE_4_AXI_CLK>, + <&gcc GCC_AGGRE_NOC_PCIE_SOUTH_SF_AXI_CLK>, + <&gcc GCC_CNOC_PCIE4_QX_CLK>; + clock-names = "aux", + "cfg", + "bus_master", + "bus_slave", + "slave_q2a", + "ddrss_sf_tbu", + "noc_aggr_4", + "noc_aggr_south_sf", + "cnoc_qx"; + + assigned-clocks = <&gcc GCC_PCIE_4_AUX_CLK>; + assigned-clock-rates = <19200000>; + + interconnects = <&aggre2_noc MASTER_PCIE_4 0 &mc_virt SLAVE_EBI1 0>, + <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_PCIE_4 0>; + interconnect-names = "pcie-mem", "cpu-pcie"; + + resets = <&gcc GCC_PCIE_4_BCR>; + reset-names = "pci"; + + power-domains = <&gcc PCIE_4_GDSC>; + + phys = <&pcie4_phy>; + phy-names = "pciephy"; + + status = "disabled"; + }; + + pcie4_phy: phy@1c06000 { + compatible = "qcom,sc8280xp-qmp-gen3x1-pcie-phy"; + reg = <0x0 0x01c06000 0x0 0x2000>; + + clocks = <&gcc GCC_PCIE_4_AUX_CLK>, + <&gcc GCC_PCIE_4_CFG_AHB_CLK>, + <&gcc GCC_PCIE_4_CLKREF_CLK>, + <&gcc GCC_PCIE4_PHY_RCHNG_CLK>, + <&gcc GCC_PCIE_4_PIPE_CLK>, + <&gcc GCC_PCIE_4_PIPEDIV2_CLK>; + clock-names = "aux", "cfg_ahb", "ref", "rchng", + "pipe", "pipediv2"; + + assigned-clocks = <&gcc GCC_PCIE4_PHY_RCHNG_CLK>; + assigned-clock-rates = <100000000>; + + power-domains = <&gcc PCIE_4_GDSC>; + + resets = <&gcc GCC_PCIE_4_PHY_BCR>; + reset-names = "phy"; + + #clock-cells = <0>; + clock-output-names = "pcie_4_pipe_clk"; + + #phy-cells = <0>; + + status = "disabled"; + }; + + pcie3b: pcie@1c08000 { + device_type = "pci"; + compatible = "qcom,pcie-sc8280xp"; + reg = <0x0 0x01c08000 0x0 0x3000>, + <0x0 0x32000000 0x0 0xf1d>, + <0x0 0x32000f20 0x0 0xa8>, + <0x0 0x32001000 0x0 0x1000>, + <0x0 0x32100000 0x0 0x100000>; + reg-names = "parf", "dbi", "elbi", "atu", "config"; + #address-cells = <3>; + #size-cells = <2>; + ranges = <0x01000000 0x0 0x32200000 0x0 0x32200000 0x0 0x100000>, + <0x02000000 0x0 0x32300000 0x0 0x32300000 0x0 0x1d00000>; + bus-range = <0x00 0xff>; + + linux,pci-domain = <5>; + num-lanes = <2>; + + interrupts = , + , + , + ; + interrupt-names = "msi0", "msi1", "msi2", "msi3"; + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0x7>; + interrupt-map = <0 0 0 1 &intc 0 0 GIC_SPI 526 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 2 &intc 0 0 GIC_SPI 527 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 3 &intc 0 0 GIC_SPI 528 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 4 &intc 0 0 GIC_SPI 529 IRQ_TYPE_LEVEL_HIGH>; + + clocks = <&gcc GCC_PCIE_3B_AUX_CLK>, + <&gcc GCC_PCIE_3B_CFG_AHB_CLK>, + <&gcc GCC_PCIE_3B_MSTR_AXI_CLK>, + <&gcc GCC_PCIE_3B_SLV_AXI_CLK>, + <&gcc GCC_PCIE_3B_SLV_Q2A_AXI_CLK>, + <&gcc GCC_DDRSS_PCIE_SF_TBU_CLK>, + <&gcc GCC_AGGRE_NOC_PCIE_4_AXI_CLK>, + <&gcc GCC_AGGRE_NOC_PCIE_SOUTH_SF_AXI_CLK>; + clock-names = "aux", + "cfg", + "bus_master", + "bus_slave", + "slave_q2a", + "ddrss_sf_tbu", + "noc_aggr_4", + "noc_aggr_south_sf"; + + assigned-clocks = <&gcc GCC_PCIE_3B_AUX_CLK>; + assigned-clock-rates = <19200000>; + + interconnects = <&aggre2_noc MASTER_PCIE_3B 0 &mc_virt SLAVE_EBI1 0>, + <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_PCIE_3B 0>; + interconnect-names = "pcie-mem", "cpu-pcie"; + + resets = <&gcc GCC_PCIE_3B_BCR>; + reset-names = "pci"; + + power-domains = <&gcc PCIE_3B_GDSC>; + + phys = <&pcie3b_phy>; + phy-names = "pciephy"; + + status = "disabled"; + }; + + pcie3b_phy: phy@1c0e000 { + compatible = "qcom,sc8280xp-qmp-gen3x2-pcie-phy"; + reg = <0x0 0x01c0e000 0x0 0x2000>; + + clocks = <&gcc GCC_PCIE_3B_AUX_CLK>, + <&gcc GCC_PCIE_3B_CFG_AHB_CLK>, + <&gcc GCC_PCIE_3A3B_CLKREF_CLK>, + <&gcc GCC_PCIE3B_PHY_RCHNG_CLK>, + <&gcc GCC_PCIE_3B_PIPE_CLK>, + <&gcc GCC_PCIE_3B_PIPEDIV2_CLK>; + clock-names = "aux", "cfg_ahb", "ref", "rchng", + "pipe", "pipediv2"; + + assigned-clocks = <&gcc GCC_PCIE3B_PHY_RCHNG_CLK>; + assigned-clock-rates = <100000000>; + + power-domains = <&gcc PCIE_3B_GDSC>; + + resets = <&gcc GCC_PCIE_3B_PHY_BCR>; + reset-names = "phy"; + + #clock-cells = <0>; + clock-output-names = "pcie_3b_pipe_clk"; + + #phy-cells = <0>; + + status = "disabled"; + }; + + pcie3a: pcie@1c10000 { + device_type = "pci"; + compatible = "qcom,pcie-sc8280xp"; + reg = <0x0 0x01c10000 0x0 0x3000>, + <0x0 0x34000000 0x0 0xf1d>, + <0x0 0x34000f20 0x0 0xa8>, + <0x0 0x34001000 0x0 0x1000>, + <0x0 0x34100000 0x0 0x100000>; + reg-names = "parf", "dbi", "elbi", "atu", "config"; + #address-cells = <3>; + #size-cells = <2>; + ranges = <0x01000000 0x0 0x34200000 0x0 0x34200000 0x0 0x100000>, + <0x02000000 0x0 0x34300000 0x0 0x34300000 0x0 0x1d00000>; + bus-range = <0x00 0xff>; + + linux,pci-domain = <4>; + num-lanes = <4>; + + interrupts = , + , + , + ; + interrupt-names = "msi0", "msi1", "msi2", "msi3"; + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0x7>; + interrupt-map = <0 0 0 1 &intc 0 0 GIC_SPI 499 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 2 &intc 0 0 GIC_SPI 542 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 3 &intc 0 0 GIC_SPI 543 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 4 &intc 0 0 GIC_SPI 544 IRQ_TYPE_LEVEL_HIGH>; + + clocks = <&gcc GCC_PCIE_3A_AUX_CLK>, + <&gcc GCC_PCIE_3A_CFG_AHB_CLK>, + <&gcc GCC_PCIE_3A_MSTR_AXI_CLK>, + <&gcc GCC_PCIE_3A_SLV_AXI_CLK>, + <&gcc GCC_PCIE_3A_SLV_Q2A_AXI_CLK>, + <&gcc GCC_DDRSS_PCIE_SF_TBU_CLK>, + <&gcc GCC_AGGRE_NOC_PCIE_4_AXI_CLK>, + <&gcc GCC_AGGRE_NOC_PCIE_SOUTH_SF_AXI_CLK>; + clock-names = "aux", + "cfg", + "bus_master", + "bus_slave", + "slave_q2a", + "ddrss_sf_tbu", + "noc_aggr_4", + "noc_aggr_south_sf"; + + assigned-clocks = <&gcc GCC_PCIE_3A_AUX_CLK>; + assigned-clock-rates = <19200000>; + + interconnects = <&aggre2_noc MASTER_PCIE_3A 0 &mc_virt SLAVE_EBI1 0>, + <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_PCIE_3A 0>; + interconnect-names = "pcie-mem", "cpu-pcie"; + + resets = <&gcc GCC_PCIE_3A_BCR>; + reset-names = "pci"; + + power-domains = <&gcc PCIE_3A_GDSC>; + + phys = <&pcie3a_phy>; + phy-names = "pciephy"; + + status = "disabled"; + }; + + pcie3a_phy: phy@1c14000 { + compatible = "qcom,sc8280xp-qmp-gen3x4-pcie-phy"; + reg = <0x0 0x01c14000 0x0 0x2000>, + <0x0 0x01c16000 0x0 0x2000>; + + clocks = <&gcc GCC_PCIE_3A_AUX_CLK>, + <&gcc GCC_PCIE_3A_CFG_AHB_CLK>, + <&gcc GCC_PCIE_3A3B_CLKREF_CLK>, + <&gcc GCC_PCIE3A_PHY_RCHNG_CLK>, + <&gcc GCC_PCIE_3A_PIPE_CLK>, + <&gcc GCC_PCIE_3A_PIPEDIV2_CLK>; + clock-names = "aux", "cfg_ahb", "ref", "rchng", + "pipe", "pipediv2"; + + assigned-clocks = <&gcc GCC_PCIE3A_PHY_RCHNG_CLK>; + assigned-clock-rates = <100000000>; + + power-domains = <&gcc PCIE_3A_GDSC>; + + resets = <&gcc GCC_PCIE_3A_PHY_BCR>; + reset-names = "phy"; + + qcom,4ln-config-sel = <&tcsr 0xa044 1>; + + #clock-cells = <0>; + clock-output-names = "pcie_3a_pipe_clk"; + + #phy-cells = <0>; + + status = "disabled"; + }; + + pcie2b: pcie@1c18000 { + device_type = "pci"; + compatible = "qcom,pcie-sc8280xp"; + reg = <0x0 0x01c18000 0x0 0x3000>, + <0x0 0x38000000 0x0 0xf1d>, + <0x0 0x38000f20 0x0 0xa8>, + <0x0 0x38001000 0x0 0x1000>, + <0x0 0x38100000 0x0 0x100000>; + reg-names = "parf", "dbi", "elbi", "atu", "config"; + #address-cells = <3>; + #size-cells = <2>; + ranges = <0x01000000 0x0 0x38200000 0x0 0x38200000 0x0 0x100000>, + <0x02000000 0x0 0x38300000 0x0 0x38300000 0x0 0x1d00000>; + bus-range = <0x00 0xff>; + + linux,pci-domain = <3>; + num-lanes = <2>; + + interrupts = , + , + , + ; + interrupt-names = "msi0", "msi1", "msi2", "msi3"; + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0x7>; + interrupt-map = <0 0 0 1 &intc 0 0 GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 2 &intc 0 0 GIC_SPI 434 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 3 &intc 0 0 GIC_SPI 435 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 4 &intc 0 0 GIC_SPI 438 IRQ_TYPE_LEVEL_HIGH>; + + clocks = <&gcc GCC_PCIE_2B_AUX_CLK>, + <&gcc GCC_PCIE_2B_CFG_AHB_CLK>, + <&gcc GCC_PCIE_2B_MSTR_AXI_CLK>, + <&gcc GCC_PCIE_2B_SLV_AXI_CLK>, + <&gcc GCC_PCIE_2B_SLV_Q2A_AXI_CLK>, + <&gcc GCC_DDRSS_PCIE_SF_TBU_CLK>, + <&gcc GCC_AGGRE_NOC_PCIE_4_AXI_CLK>, + <&gcc GCC_AGGRE_NOC_PCIE_SOUTH_SF_AXI_CLK>; + clock-names = "aux", + "cfg", + "bus_master", + "bus_slave", + "slave_q2a", + "ddrss_sf_tbu", + "noc_aggr_4", + "noc_aggr_south_sf"; + + assigned-clocks = <&gcc GCC_PCIE_2B_AUX_CLK>; + assigned-clock-rates = <19200000>; + + interconnects = <&aggre2_noc MASTER_PCIE_2B 0 &mc_virt SLAVE_EBI1 0>, + <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_PCIE_2B 0>; + interconnect-names = "pcie-mem", "cpu-pcie"; + + resets = <&gcc GCC_PCIE_2B_BCR>; + reset-names = "pci"; + + power-domains = <&gcc PCIE_2B_GDSC>; + + phys = <&pcie2b_phy>; + phy-names = "pciephy"; + + status = "disabled"; + }; + + pcie2b_phy: phy@1c1e000 { + compatible = "qcom,sc8280xp-qmp-gen3x2-pcie-phy"; + reg = <0x0 0x01c1e000 0x0 0x2000>; + + clocks = <&gcc GCC_PCIE_2B_AUX_CLK>, + <&gcc GCC_PCIE_2B_CFG_AHB_CLK>, + <&gcc GCC_PCIE_2A2B_CLKREF_CLK>, + <&gcc GCC_PCIE2B_PHY_RCHNG_CLK>, + <&gcc GCC_PCIE_2B_PIPE_CLK>, + <&gcc GCC_PCIE_2B_PIPEDIV2_CLK>; + clock-names = "aux", "cfg_ahb", "ref", "rchng", + "pipe", "pipediv2"; + + assigned-clocks = <&gcc GCC_PCIE2B_PHY_RCHNG_CLK>; + assigned-clock-rates = <100000000>; + + power-domains = <&gcc PCIE_2B_GDSC>; + + resets = <&gcc GCC_PCIE_2B_PHY_BCR>; + reset-names = "phy"; + + #clock-cells = <0>; + clock-output-names = "pcie_2b_pipe_clk"; + + #phy-cells = <0>; + + status = "disabled"; + }; + + pcie2a: pcie@1c20000 { + device_type = "pci"; + compatible = "qcom,pcie-sc8280xp"; + reg = <0x0 0x01c20000 0x0 0x3000>, + <0x0 0x3c000000 0x0 0xf1d>, + <0x0 0x3c000f20 0x0 0xa8>, + <0x0 0x3c001000 0x0 0x1000>, + <0x0 0x3c100000 0x0 0x100000>; + reg-names = "parf", "dbi", "elbi", "atu", "config"; + #address-cells = <3>; + #size-cells = <2>; + ranges = <0x01000000 0x0 0x3c200000 0x0 0x3c200000 0x0 0x100000>, + <0x02000000 0x0 0x3c300000 0x0 0x3c300000 0x0 0x1d00000>; + bus-range = <0x00 0xff>; + + linux,pci-domain = <2>; + num-lanes = <4>; + + interrupts = , + , + , + ; + interrupt-names = "msi0", "msi1", "msi2", "msi3"; + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0x7>; + interrupt-map = <0 0 0 1 &intc 0 0 GIC_SPI 530 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 2 &intc 0 0 GIC_SPI 531 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 3 &intc 0 0 GIC_SPI 532 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 4 &intc 0 0 GIC_SPI 533 IRQ_TYPE_LEVEL_HIGH>; + + clocks = <&gcc GCC_PCIE_2A_AUX_CLK>, + <&gcc GCC_PCIE_2A_CFG_AHB_CLK>, + <&gcc GCC_PCIE_2A_MSTR_AXI_CLK>, + <&gcc GCC_PCIE_2A_SLV_AXI_CLK>, + <&gcc GCC_PCIE_2A_SLV_Q2A_AXI_CLK>, + <&gcc GCC_DDRSS_PCIE_SF_TBU_CLK>, + <&gcc GCC_AGGRE_NOC_PCIE_4_AXI_CLK>, + <&gcc GCC_AGGRE_NOC_PCIE_SOUTH_SF_AXI_CLK>; + clock-names = "aux", + "cfg", + "bus_master", + "bus_slave", + "slave_q2a", + "ddrss_sf_tbu", + "noc_aggr_4", + "noc_aggr_south_sf"; + + assigned-clocks = <&gcc GCC_PCIE_2A_AUX_CLK>; + assigned-clock-rates = <19200000>; + + interconnects = <&aggre2_noc MASTER_PCIE_2A 0 &mc_virt SLAVE_EBI1 0>, + <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_PCIE_2A 0>; + interconnect-names = "pcie-mem", "cpu-pcie"; + + resets = <&gcc GCC_PCIE_2A_BCR>; + reset-names = "pci"; + + power-domains = <&gcc PCIE_2A_GDSC>; + + phys = <&pcie2a_phy>; + phy-names = "pciephy"; + + status = "disabled"; + }; + + pcie2a_phy: phy@1c24000 { + compatible = "qcom,sc8280xp-qmp-gen3x4-pcie-phy"; + reg = <0x0 0x01c24000 0x0 0x2000>, + <0x0 0x01c26000 0x0 0x2000>; + + clocks = <&gcc GCC_PCIE_2A_AUX_CLK>, + <&gcc GCC_PCIE_2A_CFG_AHB_CLK>, + <&gcc GCC_PCIE_2A2B_CLKREF_CLK>, + <&gcc GCC_PCIE2A_PHY_RCHNG_CLK>, + <&gcc GCC_PCIE_2A_PIPE_CLK>, + <&gcc GCC_PCIE_2A_PIPEDIV2_CLK>; + clock-names = "aux", "cfg_ahb", "ref", "rchng", + "pipe", "pipediv2"; + + assigned-clocks = <&gcc GCC_PCIE2A_PHY_RCHNG_CLK>; + assigned-clock-rates = <100000000>; + + power-domains = <&gcc PCIE_2A_GDSC>; + + resets = <&gcc GCC_PCIE_2A_PHY_BCR>; + reset-names = "phy"; + + qcom,4ln-config-sel = <&tcsr 0xa044 0>; + + #clock-cells = <0>; + clock-output-names = "pcie_2a_pipe_clk"; + + #phy-cells = <0>; + + status = "disabled"; + }; + ufs_mem_hc: ufs@1d84000 { compatible = "qcom,sc8280xp-ufshc", "qcom,ufshc", "jedec,ufs-2.0"; From patchwork Thu Nov 10 10:35:51 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 18063 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp67273wru; Thu, 10 Nov 2022 02:41:15 -0800 (PST) X-Google-Smtp-Source: AMsMyM5VAXB4wbOrDlNba09iJqEu2U4mWJkBhkrwtOfEk4GmcI+p2UXqeXeUNoBY/Z2jWFeaIshv X-Received: by 2002:a63:1f5c:0:b0:469:d0e6:dac0 with SMTP id q28-20020a631f5c000000b00469d0e6dac0mr53322273pgm.427.1668076875221; Thu, 10 Nov 2022 02:41:15 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668076875; cv=none; d=google.com; s=arc-20160816; b=argRM++jywrDgM4rvexp3zOd9cKFh587SQkGU+xL0J57jVfW45JXUQm5iutXWqEUrG 4RJM+C0Qp72wRPYuTvlxTwN9+XgK0IQJox6CX9F0QBY2MP7c1jUk2domKgYxVs3x/jWo yoBVd7WcLtXgBxkh+dl3ed0IQCtrybsfhwxbkYaYvUov6EJDghkguTgMQcpzycs8iUN4 xtSVubaGXL3LJhdkjeccVAnN+J5AxJAvLcyM1D6ptz7U6fyYXXFjp8K26fXWFuWKB1eh 5hY/uCprLwFgNSt5tCc4QaOmcZ0cg/FK8IVnQH5g7LVW2+9xVKMCr3NCRec7etIPmkoA u3nQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=brbZM78MLIkdw5SywJmxg6iweEd7JQAbqtd0gWswQn0=; b=OgxQI21YdXX/uP/50WqNBu8BqjTstieofmG/zI1oIpvV/5C+8bpEqC4qfbQVg16fat eAa9f7bA/ehPsRb5z2CEMdjA9Z3w57V4sqHe3eOQw8xxnZ9K4lUeV1rFQ524fSq6hJ99 vHr6wjYGcfjgqROr4QPaHMzFymPAgNClQ3iAyBXmUnTBevQ4Dow0XOgUIlubFrcssPLX y0BUkkqzzm2hAuiXIkNg7raTsltR62LMtkc90n3pr3jfqofyQPsDhB5sbbNyx8q3B/HN 0UZWHoYzs/3EpMSh8ruTEpA7Yvfc6nVB5cvY3XxW0McVn4be6vhm90S1t2DMOCoPfy4T XtuA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b="R+fp/y+T"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id mi14-20020a17090b4b4e00b00205f6ca05d2si4204890pjb.122.2022.11.10.02.41.00; Thu, 10 Nov 2022 02:41:15 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b="R+fp/y+T"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229463AbiKJKia (ORCPT + 99 others); Thu, 10 Nov 2022 05:38:30 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33762 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229769AbiKJKiU (ORCPT ); Thu, 10 Nov 2022 05:38:20 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 47BC96BDF3; Thu, 10 Nov 2022 02:38:19 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id D57A061245; Thu, 10 Nov 2022 10:38:18 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0810AC433C1; Thu, 10 Nov 2022 10:38:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668076698; bh=C6bz8MsErrbu5LEsJFh50cm7/xn/bK8GTPg/1NmRjts=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=R+fp/y+T7/yvc03bT1G0FoDKYQKv+2e3I0urMj7AyulDiz4N22nWHzb5jr8UTVG9T yWkfHCuGIjF9hKuupFf6z6+7A6YHj4C7ymeWw5C/yV7HhPHmZeI8V4I7vd0smFYZJG hnQAaY7tEWx+GDtivCq2ClVB6YEAJXs9XEuElNoi/cDxtlVmoAvH7yrD/t3QEhFhE1 8DEkPnXH+2bvAlBE3LPcrNfCnme6Xq311fJ7OfjCovDWrz+cCno1tNhI3QyregsqTs zpBkX/we97LTq0spgr/Wyvjpsf9MPf9Roa6cRaTst/Cio71ANfjrcK+6kn+qcukY1z FGxX0b9uX71sg== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1ot4wQ-0003LR-SM; Thu, 10 Nov 2022 11:37:50 +0100 From: Johan Hovold To: Bjorn Andersson Cc: Andy Gross , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH 2/9] arm64: dts: qcom: sa8295p-adp: enable PCIe Date: Thu, 10 Nov 2022 11:35:51 +0100 Message-Id: <20221110103558.12690-3-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221110103558.12690-1-johan+linaro@kernel.org> References: <20221110103558.12690-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749105377554177006?= X-GMAIL-MSGID: =?utf-8?q?1749105377554177006?= The SA8295P-ADP has up to four PCIe interfaces implemented by three or four controllers: PCIe2A, PCIe3A/PCIe3B and PCIe4. PCIe2 is used in x4 mode, while PCIe3 can be used in either x2 or x4 mode. Enable both PCIe3A and PCI3B in x2 mode for now. Signed-off-by: Johan Hovold Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sa8295p-adp.dts | 171 +++++++++++++++++++++++ 1 file changed, 171 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts index b608b82dff03..ff1e6a674913 100644 --- a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts +++ b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts @@ -57,6 +57,13 @@ vreg_l13a: ldo13 { regulator-max-microvolt = <3072000>; regulator-initial-mode = ; }; + + vreg_l11a: ldo11 { + regulator-name = "vreg_l11a"; + regulator-min-microvolt = <880000>; + regulator-max-microvolt = <880000>; + regulator-initial-mode = ; + }; }; pmm8540-c-regulators { @@ -151,6 +158,76 @@ vreg_l8g: ldo8 { }; }; +&pcie2a { + perst-gpios = <&tlmm 143 GPIO_ACTIVE_LOW>; + wake-gpios = <&tlmm 145 GPIO_ACTIVE_LOW>; + + pinctrl-names = "default"; + pinctrl-0 = <&pcie2a_default>; + + status = "okay"; +}; + +&pcie2a_phy { + vdda-phy-supply = <&vreg_l11a>; + vdda-pll-supply = <&vreg_l3a>; + + status = "okay"; +}; + +&pcie3a { + num-lanes = <2>; + + perst-gpios = <&tlmm 151 GPIO_ACTIVE_LOW>; + wake-gpios = <&tlmm 56 GPIO_ACTIVE_LOW>; + + pinctrl-names = "default"; + pinctrl-0 = <&pcie3a_default>; + + status = "okay"; +}; + +&pcie3a_phy { + vdda-phy-supply = <&vreg_l11a>; + vdda-pll-supply = <&vreg_l3a>; + + status = "okay"; +}; + +&pcie3b { + perst-gpios = <&tlmm 153 GPIO_ACTIVE_LOW>; + wake-gpios = <&tlmm 130 GPIO_ACTIVE_LOW>; + + pinctrl-names = "default"; + pinctrl-0 = <&pcie3b_default>; + + status = "okay"; +}; + +&pcie3b_phy { + vdda-phy-supply = <&vreg_l11a>; + vdda-pll-supply = <&vreg_l3a>; + + status = "okay"; +}; + +&pcie4 { + perst-gpios = <&tlmm 141 GPIO_ACTIVE_LOW>; + wake-gpios = <&tlmm 139 GPIO_ACTIVE_LOW>; + + pinctrl-names = "default"; + pinctrl-0 = <&pcie4_default>; + + status = "okay"; +}; + +&pcie4_phy { + vdda-phy-supply = <&vreg_l11a>; + vdda-pll-supply = <&vreg_l3a>; + + status = "okay"; +}; + &qup2 { status = "okay"; }; @@ -380,3 +457,97 @@ &xo_board_clk { }; /* PINCTRL */ + +&tlmm { + pcie2a_default: pcie2a-default-state { + clkreq-n-pins { + pins = "gpio142"; + function = "pcie2a_clkreq"; + drive-strength = <2>; + bias-pull-up; + }; + + perst-n-pins { + pins = "gpio143"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; + }; + + wake-n-pins { + pins = "gpio145"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + pcie3a_default: pcie3a-default-state { + clkreq-n-pins { + pins = "gpio150"; + function = "pcie3a_clkreq"; + drive-strength = <2>; + bias-pull-up; + }; + + perst-n-pins { + pins = "gpio151"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; + }; + + wake-n-pins { + pins = "gpio56"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + pcie3b_default: pcie3b-default-state { + clkreq-n-pins { + pins = "gpio152"; + function = "pcie3b_clkreq"; + drive-strength = <2>; + bias-pull-up; + }; + + perst-n-pins { + pins = "gpio153"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; + }; + + wake-n-pins { + pins = "gpio130"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + pcie4_default: pcie4-default-state { + clkreq-n-pins { + pins = "gpio140"; + function = "pcie4_clkreq"; + drive-strength = <2>; + bias-pull-up; + }; + + perst-n-pins { + pins = "gpio141"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; + }; + + wake-n-pins { + pins = "gpio139"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; +}; From patchwork Thu Nov 10 10:35:52 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 18061 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp67016wru; Thu, 10 Nov 2022 02:40:38 -0800 (PST) X-Google-Smtp-Source: AMsMyM50j7ayqc9XQl1e0A5YOdl8uPnwRors48Mua8qCUNQD/3JLLdjzUyhm6DFOSev+HxE819Ud X-Received: by 2002:aa7:da0a:0:b0:461:135e:7298 with SMTP id r10-20020aa7da0a000000b00461135e7298mr61785167eds.242.1668076838689; Thu, 10 Nov 2022 02:40:38 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668076838; cv=none; d=google.com; s=arc-20160816; b=eFmDS6ZQhAuwHKkHQE5dEsXFaOYWOMACcnoghe2vXLnusIUt3Fr3N+ulIGS8ItP2za oNtxxjQjS8vKAf3O9R+2wSv2Nj0gOau8QT1JqC+kuLYUZmLBfGMSgJX8Em4BBFmr1HVD A+Tp+e9cUt64g60HAXVXtNmZ22z/9wJxDF8BQ5Jj0cfy8yT3oKGRvaxdtaHG+Zk2JmRO srwjciJkKEbUbo1UTkVlVv8xa0KmZAfaie5L/0bs/NO9hoRM7N4CRw57LwagtmtP5aI2 P3vIli2FK9OT0E39GddoQhyP8KJfbAWNjeL9XORT9cSgqWMiOUb11WjisnHpo1SX64cz k9Aw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=nM+QGuBk0fUb03ojldmGYHpeuxHCj63k8zPkogDOTf4=; b=KajxZtbUyfS1AOOUupHKBQs7EFdAFfFydDlIExl9hO1Gp0vPa49UgzsUqyS3z+HedM GiY2ZeZ9rLu+wrN2h+uGQOSicYNM2Qkm1FH0NpK500cZNyOpT5m5PaTsc3vAxIl3iuJL 3PpX26K/X+Hg5Q9JHV4JK0NYoY6etGXinwMTtpossRdiJ73LYov7ziKwxHRPTHco5u8V 9a54RzMeUp23dga4q7BUO4MpEHZtBSvts80cWs7Y2jzmurVMLD1WgeFSa1SqwOoVvIKy kQeFe26Ud6UwAmgfpsWbVU3+6pjckqVpURh2bpY+aDfpPndn5xPIBCi/Q58nyPSn/L1I FKgg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=bbajhkuK; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id b16-20020a056402279000b004622c1b8597si21930755ede.407.2022.11.10.02.40.15; Thu, 10 Nov 2022 02:40:38 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=bbajhkuK; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229919AbiKJKiW (ORCPT + 99 others); Thu, 10 Nov 2022 05:38:22 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33756 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229575AbiKJKiU (ORCPT ); Thu, 10 Nov 2022 05:38:20 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 472446BDD8; Thu, 10 Nov 2022 02:38:19 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id C84466124A; Thu, 10 Nov 2022 10:38:18 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 04B89C433B5; Thu, 10 Nov 2022 10:38:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668076698; bh=A+0Hs74iYp1t+FZuZbchlIpqvox9Kc3+0WOmPBRSrvo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bbajhkuKoBCAUnsj1mUrT4+zwRyT+fhArgQQvxEbdyAqN68eUd0Cl8WR3E1uzEcRJ gxP0s8hUZB1O/tUYcW1TpLs+4H7CCn7umm7LW74UERMzm/bWMxA5ao98GdF1zxcqwG uaczdk0/0Kmub0OUen/qojS95Lz/hoMUClU/lg17DEAUmfTD2F8vbv1H7jbfKV13my +I8a436HDmEaTv5xSe7HF/IaU6xhy1atTZfJ44lmVqLgZkWOMe3L8pIAXhKYmN783n oZHrIinxKkCzK3gH1kOm8dOw01b0uEWDCJ5aYae+WqAKlAohQQMKZRaHuOPA8WvOhk IOq1mSQF9C11w== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1ot4wQ-0003LT-Vb; Thu, 10 Nov 2022 11:37:51 +0100 From: Johan Hovold To: Bjorn Andersson Cc: Andy Gross , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH 3/9] arm64: dts: qcom: sc8280xp-crd: rename backlight and misc regulators Date: Thu, 10 Nov 2022 11:35:52 +0100 Message-Id: <20221110103558.12690-4-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221110103558.12690-1-johan+linaro@kernel.org> References: <20221110103558.12690-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749105339294434381?= X-GMAIL-MSGID: =?utf-8?q?1749105339294434381?= Rename the backlight and misc regulators according to the net names. Signed-off-by: Johan Hovold Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sc8280xp-crd.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts index a2027f1d1d04..0801bd8c44fb 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts @@ -37,7 +37,7 @@ chosen { vreg_edp_bl: regulator-edp-bl { compatible = "regulator-fixed"; - regulator-name = "VREG_EDP_BL"; + regulator-name = "VBL9"; regulator-min-microvolt = <3600000>; regulator-max-microvolt = <3600000>; @@ -53,7 +53,7 @@ vreg_edp_bl: regulator-edp-bl { vreg_misc_3p3: regulator-misc-3p3 { compatible = "regulator-fixed"; - regulator-name = "VREG_MISC_3P3"; + regulator-name = "VCC3B"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; From patchwork Thu Nov 10 10:35:53 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 18065 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp67698wru; Thu, 10 Nov 2022 02:42:13 -0800 (PST) X-Google-Smtp-Source: AMsMyM5xFvVNFJKOZO/sI8GZBun6gh4EiNcS2gXBS3CwD9nZJ5H2VNR86FEJmcIWVNeNnNS4B7n0 X-Received: by 2002:a50:cd07:0:b0:464:63b:1017 with SMTP id z7-20020a50cd07000000b00464063b1017mr39810275edi.364.1668076933536; Thu, 10 Nov 2022 02:42:13 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668076933; cv=none; d=google.com; s=arc-20160816; b=RwFHjSjHbd9CvStqe0rPClpPlfssU+TzTCTIyw75J1L1F11zt3tfGPxH53yBpdrEwc Ml1gIk1ZVUfP1yoNwuEA/Vo5LmxUrUQ6dtZ1720ulrmGt2EUnZJOjglam5q9tKPd68jT NJBA+gip1H0bldD0hZQCHe9LP1SAkcbOEEK2vbTMo2vuG7Vg+i3JB/Ccz5/F9DwNVhOJ KyzT/09sqhlJuCjT5D3IW08ss48EMOuWOH0et+QzjSNmUmmObFLmbm+HTR6X9wFq2YXa +CyI+hva2hbYba+8mLLhatpN3Xl5621U2Wo6z6qD4nAbkA0xzKVdGYYxvs8FFoJDFYs8 b+Bw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=GXSmlfC7oarzuMTE44LApiiPpYPB6QJWMYO5tKkf4Zc=; b=YqXGfNdfHaVr+Vp4y1NdXiPWUDXV2qYvDcGygIGLv3CcIeP+Dk98c+5lsox9zdzyyX vSMAj+D7Os/47Pf/fxGkW7FV5HmvQn5p9vudlllazlwXU9mdbV4lhIk5Nh2nBAA0Js8P SiFoALqRUzgt3XI2bDd0pfrIPwoa0VEZ1wgX3jlXHBViXwMEhL5BRxlybMsTzoVyUxzM sjAXTbBNFEy7mudG9tt3xw/OYaP4GC20l/hPFydOB2chqQ+p+68Nckbo2nnWlDCHOxmO dZz2DS3dNi8gZDqYjTqOjOZR5Yt8BO4Ara/KoNDUykkg77acg5BVZwy1018qn/HBa8FL H5kw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=MHKF8CSU; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id s8-20020a170906284800b007894b9de062si13982922ejc.631.2022.11.10.02.41.49; Thu, 10 Nov 2022 02:42:13 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=MHKF8CSU; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230165AbiKJKid (ORCPT + 99 others); Thu, 10 Nov 2022 05:38:33 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33770 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229776AbiKJKiU (ORCPT ); Thu, 10 Nov 2022 05:38:20 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B9CA66C70B; Thu, 10 Nov 2022 02:38:19 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 57BAE60FB2; Thu, 10 Nov 2022 10:38:19 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 1BCDEC43144; Thu, 10 Nov 2022 10:38:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668076698; bh=4cWs27Yj/yVYtIlwKTVgGaBMfe52K43D9R9vlrRWLzo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=MHKF8CSUMhpCmTUnsyytzYgdeOR5BKOlZgRRe6+Q0HAYmuNoYYr/mMov4BxQts1wf KHs3iJvYo1lrAD0ekErCfBaNC8/wjRxnAWhxPAY6B4r+wHCvQroPQaWxvVh2l5lTrg Q6NDt47ZM2UqjbLkiYU0f3VKf5d6SgIUVNsdt/+fgMclW2JwgHFgpMg7ThAcgiMr9f /FHebGu8/ql4eKUDjK4axF8B6/nYRYVw/YEaxvNCp1DSE74D2t4j2LVtNx8cSjsYfv oE5ZtjwGcdG8+2p5x5I8VeEHTkZpNAoWzF08gBET6CjQJ1Nvq2G62SSzYSDLk0uU+M 1Gzi/2hFrLl/A== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1ot4wR-0003LV-1s; Thu, 10 Nov 2022 11:37:51 +0100 From: Johan Hovold To: Bjorn Andersson Cc: Andy Gross , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH 4/9] arm64: dts: qcom: sc8280xp-crd: enable NVMe SSD Date: Thu, 10 Nov 2022 11:35:53 +0100 Message-Id: <20221110103558.12690-5-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221110103558.12690-1-johan+linaro@kernel.org> References: <20221110103558.12690-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749105438384054648?= X-GMAIL-MSGID: =?utf-8?q?1749105438384054648?= Enable the NVMe SSD connected to PCIe2. Signed-off-by: Johan Hovold --- arch/arm64/boot/dts/qcom/sc8280xp-crd.dts | 63 +++++++++++++++++++++++ 1 file changed, 63 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts index 0801bd8c44fb..fd2bdfd1126b 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts @@ -50,6 +50,20 @@ vreg_edp_bl: regulator-edp-bl { regulator-boot-on; }; + vreg_nvme: regulator-nvme { + compatible = "regulator-fixed"; + + regulator-name = "VCC3_SSD"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&tlmm 135 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-names = "default"; + pinctrl-0 = <&nvme_reg_en>; + }; + vreg_misc_3p3: regulator-misc-3p3 { compatible = "regulator-fixed"; @@ -178,6 +192,25 @@ vreg_l9d: ldo9 { }; }; +&pcie2a { + perst-gpios = <&tlmm 143 GPIO_ACTIVE_LOW>; + wake-gpios = <&tlmm 145 GPIO_ACTIVE_LOW>; + + vddpe-3v3-supply = <&vreg_nvme>; + + pinctrl-names = "default"; + pinctrl-0 = <&pcie2a_default>; + + status = "okay"; +}; + +&pcie2a_phy { + vdda-phy-supply = <&vreg_l6d>; + vdda-pll-supply = <&vreg_l4d>; + + status = "okay"; +}; + &pmc8280c_lpg { status = "okay"; }; @@ -393,6 +426,36 @@ reset-pins { }; }; + nvme_reg_en: nvme-reg-en-state { + pins = "gpio135"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + pcie2a_default: pcie2a-default-state { + clkreq-n-pins { + pins = "gpio142"; + function = "pcie2a_clkreq"; + drive-strength = <2>; + bias-pull-up; + }; + + perst-n-pins { + pins = "gpio143"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; + }; + + wake-n-pins { + pins = "gpio145"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + qup0_i2c4_default: qup0-i2c4-default-state { pins = "gpio171", "gpio172"; function = "qup4"; From patchwork Thu Nov 10 10:35:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 18062 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp67264wru; Thu, 10 Nov 2022 02:41:14 -0800 (PST) X-Google-Smtp-Source: AMsMyM5AHzE/VqlPjiT3FW3O5BHmoKUseqZFMxYST5ilm0Jvq7cNjSJMOtTFQbj9cQmYemBdROBN X-Received: by 2002:a17:906:918:b0:7ad:aeda:f81d with SMTP id i24-20020a170906091800b007adaedaf81dmr2662234ejd.588.1668076874584; Thu, 10 Nov 2022 02:41:14 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668076874; cv=none; d=google.com; s=arc-20160816; b=NUqdFecfiUO8PVGRGzGYjWAJuKdd6/ElTKtnfqkKJaddlhTSpSWOdhpz56qFe9+OIR XAjpks455etD9+axFUTsEjsova4W2ZotmE5l+yLjgFDZlpzKQT8WZ9oKtaAbclxT/Ysu J9PrMEUIpyqCdhBE6hmcX9tuqkvmHx7L7LKu9XD7Clrf58c/bzBPwyu8tISj5G2odJWq eaWC54Cb7kl6U/J0SC3xWxL6a3KOcIaGqlr0nR1FSx7XLfYBj4PHagmydPT8BNynhm3p h6NZ8R+oL+BJptr4yuAK1hVE0PcxVDezZMnIQMl3siegcJKsmbzpEWTmKGvIWImEYDsf j9fg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=JuOjYIK0Crw05Q5LI53n6ygWsCBn1SqXEDXSiaJO7Z4=; b=DAWNVY/UCZm5A8EMLRpXgIhCEjRBt0mZZQ+JBLYoy+B/8tvFGGJWTLwrC8um6p7j3h pMBJ5KV71Zh/9CqFpYpKx8ise6E5XM9bZwFoHWVOYJ1EwnrHxGfu5NH/DnXrkiFdxqqD R1EO6duKFhm83fC5mmKBiOSMOP5V8jS9iD1dh5z2k2e86x/D230jjeclBw2is/VDOIUU rq0lhe7F3RbN/BPEY+DEJu5QxJmF1dAM+87m/ETic2e6friQClf7CMEOWodYSZIbS4I8 Rqz5CjbeYn/8kAq4PjSl2qFMKoEhjf2+uVfQH8kXdZ6nzIeBRIcVqxKxHwLyoggRJmeC OjyA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=R3Dag3jp; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id b18-20020a056402351200b00461d60a86casi18737177edd.135.2022.11.10.02.40.50; Thu, 10 Nov 2022 02:41:14 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=R3Dag3jp; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230161AbiKJKi0 (ORCPT + 99 others); Thu, 10 Nov 2022 05:38:26 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33764 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229463AbiKJKiU (ORCPT ); Thu, 10 Nov 2022 05:38:20 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 90A5A6C700; Thu, 10 Nov 2022 02:38:19 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id D9DA06124E; Thu, 10 Nov 2022 10:38:18 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0D365C43470; Thu, 10 Nov 2022 10:38:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668076698; bh=pfUV1J44lGpPw0+uv/i2sIDx3ylSY0hXsbscaznXLnE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=R3Dag3jpoWkQHYgtrAk/4ljhvBTH3ehazPQrKJ+tFjD4oZE0UgdNuJsAO/RqMOwiE qMJlekUJakGSVDxoCjbjc2lZOI8u238Vtqn0euvse4H6b62gcLrvHKwAEqEfI3EUVJ DXHlOgVZxKg8shu4fQkgqQ3RUKGeRZHJCFbLex9kGpoJk+5aYO1bqK4AHgvkjQS9bd amvxrESi1nXNUrJNUv+gAWLHfJU7wNSzjPF5jZbyCZZHC+QMw+Yc6FCAesxq7p62Lc ju8e9EL5HoCF6LWhyxseslSb1VvRf1PyAcjs9ULBORgpBOv+06PRSbDzhWVFH1cQNM bsFih8t7gMQ7w== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1ot4wR-0003LY-5A; Thu, 10 Nov 2022 11:37:51 +0100 From: Johan Hovold To: Bjorn Andersson Cc: Andy Gross , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH 5/9] arm64: dts: qcom: sc8280xp-crd: enable SDX55 modem Date: Thu, 10 Nov 2022 11:35:54 +0100 Message-Id: <20221110103558.12690-6-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221110103558.12690-1-johan+linaro@kernel.org> References: <20221110103558.12690-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749105376787199500?= X-GMAIL-MSGID: =?utf-8?q?1749105376787199500?= Enable the SDX55 modem connected to PCIe3. Signed-off-by: Johan Hovold --- arch/arm64/boot/dts/qcom/sc8280xp-crd.dts | 65 +++++++++++++++++++++++ 1 file changed, 65 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts index fd2bdfd1126b..5b9e37a16f9f 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts @@ -80,6 +80,22 @@ vreg_misc_3p3: regulator-misc-3p3 { regulator-boot-on; regulator-always-on; }; + + vreg_wwan: regulator-wwan { + compatible = "regulator-fixed"; + + regulator-name = "VCC3B_WAN"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&pmc8280_2_gpios 1 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-names = "default"; + pinctrl-0 = <&wwan_sw_en>; + + regulator-boot-on; + }; }; &apps_rsc { @@ -211,6 +227,25 @@ &pcie2a_phy { status = "okay"; }; +&pcie3a { + perst-gpios = <&tlmm 151 GPIO_ACTIVE_LOW>; + wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>; + + vddpe-3v3-supply = <&vreg_wwan>; + + pinctrl-names = "default"; + pinctrl-0 = <&pcie3a_default>; + + status = "okay"; +}; + +&pcie3a_phy { + vdda-phy-supply = <&vreg_l6d>; + vdda-pll-supply = <&vreg_l4d>; + + status = "okay"; +}; + &pmc8280c_lpg { status = "okay"; }; @@ -396,6 +431,13 @@ misc_3p3_reg_en: misc-3p3-reg-en-state { }; }; +&pmc8280_2_gpios { + wwan_sw_en: wwan-sw-en-state { + pins = "gpio1"; + function = "normal"; + }; +}; + &pmc8280c_gpios { edp_bl_pwm: edp-bl-pwm-state { pins = "gpio8"; @@ -456,6 +498,29 @@ wake-n-pins { }; }; + pcie3a_default: pcie3a-default-state { + clkreq-n-pins { + pins = "gpio150"; + function = "pcie3a_clkreq"; + drive-strength = <2>; + bias-pull-up; + }; + + perst-n-pins { + pins = "gpio151"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; + }; + + wake-n-pins { + pins = "gpio148"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + qup0_i2c4_default: qup0-i2c4-default-state { pins = "gpio171", "gpio172"; function = "qup4"; From patchwork Thu Nov 10 10:35:55 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 18069 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp68115wru; Thu, 10 Nov 2022 02:43:21 -0800 (PST) X-Google-Smtp-Source: AA0mqf76u8jmG9gko8jb0jS6gW5OcikIXuOQdTnEukTdr1NglnSZXAPUGMaV/8t26iCNi0suq7qI X-Received: by 2002:a17:906:3486:b0:7ae:5dd6:e62d with SMTP id g6-20020a170906348600b007ae5dd6e62dmr2026315ejb.518.1668077001063; Thu, 10 Nov 2022 02:43:21 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668077001; cv=none; d=google.com; s=arc-20160816; b=GbfZ2/HXh6g/TJWs1YwjxZmCBZh8UGjmmQfhbdCkDAjvnCHQgn6zVxNcf42Lu4JbkC XyFrfcn/WsTI6uKezodaYP1DCyW79Q5De8p+h3VvmuOtVUtSE5DQBpzuLENa8QvqqCKr 5hG2czJuaRT+CBS7pCq6aJHMx66ymJol+111SvcxN42gh9X/6tN3sBOsBOx67PAi2Y5q CMVOUkkrKUYpzEhh9TgnMis6edaXX1K3cxQmdMXitqe9kHm5GXo3CQnA9zIiYVXMullu y49HMWmYHyGyUVW8lxpgJsT2Qpfy8yLlztLKfqNNyBNWBkLm68JoFEUFz/BRZti5UIhj u6iA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=vGdB1HeNCYN3/wLRjwObJhlZccV2x+vny4mTYWGGvZk=; b=e4nIbtrowHqxpBbUda4/NaXREm94g9svg34NFwzgv8uc735eLLRBotDe/JhUPGWG/S GNFvnOOuPHdC0HUCo2ci/sdTtNhkfsncVi9i8JZPsDRgSZo5ay+bZisP33kpDmg/jnRL FcZHO6jIrZuDsdJaPvjV3FU9zSocbEqnUxIvPpB4sf+4ariz+Fk/TOX8WTLlJKyXCDYZ tXGRRxcg+35M+BYVipg6I7Ta3za9KyS3DciIshawpl7FqEic5Rj3qiieRUC8UG1eDWXz qLpDNmPtRox5HfqGeKkJWbV9To22HyUQTW9zs9rnW9fS3m8LVKleaMGhOurDlcZHjgT+ x9nA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=HVLp8+Wa; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id di19-20020a170906731300b007a072b8240csi20036367ejc.927.2022.11.10.02.42.57; Thu, 10 Nov 2022 02:43:21 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=HVLp8+Wa; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230247AbiKJKix (ORCPT + 99 others); Thu, 10 Nov 2022 05:38:53 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33864 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230011AbiKJKiW (ORCPT ); Thu, 10 Nov 2022 05:38:22 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F35EF317D2; Thu, 10 Nov 2022 02:38:20 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 9A45BB82169; Thu, 10 Nov 2022 10:38:19 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 18736C43143; Thu, 10 Nov 2022 10:38:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668076698; bh=sT1WvXvJ7c0JTRgR47Q1J4qASmlZRKoig4IMsKM5CJU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=HVLp8+Wa65CvW5US91+WgIhKs5TS+ejJ4HpbkbuF5YMhW02n7ttlxs6VOhgTAjJvY OLmXv2FZlwyCbJXj/gjNvctlm0z/pJUHHN9V5nDh93LPViIHooSPaWI5XLx2nRj/S9 qKwFAHpq2pyg76PE0ppJYKZDimLTOtplnSmkyTwa5wFlLTcEmiXCcVjoy1r5sYY2K3 xVuYZGYbcToIgOd0EjcIzpOrAfR2af8eq+LqrR56EMF+x7JbEDbMgJpJJWFEHX9eRL iFEel2JF9Pr883tbQSNejj7wrd3vFDiwb+8io0wgtrE/zrioeb6LzQQLh6HPhDiI81 q/vlSQDG9Hjuw== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1ot4wR-0003Lc-82; Thu, 10 Nov 2022 11:37:51 +0100 From: Johan Hovold To: Bjorn Andersson Cc: Andy Gross , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH 6/9] arm64: dts: qcom: sc8280xp-crd: enable WiFi controller Date: Thu, 10 Nov 2022 11:35:55 +0100 Message-Id: <20221110103558.12690-7-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221110103558.12690-1-johan+linaro@kernel.org> References: <20221110103558.12690-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749105509142287957?= X-GMAIL-MSGID: =?utf-8?q?1749105509142287957?= Enable the Qualcomm QCNFA765 Wireless Network Adapter connected to PCIe4. Signed-off-by: Johan Hovold --- arch/arm64/boot/dts/qcom/sc8280xp-crd.dts | 65 +++++++++++++++++++++++ 1 file changed, 65 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts index 5b9e37a16f9f..ab5b0aadeead 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts @@ -81,6 +81,22 @@ vreg_misc_3p3: regulator-misc-3p3 { regulator-always-on; }; + vreg_wlan: regulator-wlan { + compatible = "regulator-fixed"; + + regulator-name = "VCC_WLAN_3R9"; + regulator-min-microvolt = <3900000>; + regulator-max-microvolt = <3900000>; + + gpio = <&pmr735a_gpios 1 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-names = "default"; + pinctrl-0 = <&hastings_reg_en>; + + regulator-boot-on; + }; + vreg_wwan: regulator-wwan { compatible = "regulator-fixed"; @@ -246,6 +262,25 @@ &pcie3a_phy { status = "okay"; }; +&pcie4 { + perst-gpios = <&tlmm 141 GPIO_ACTIVE_LOW>; + wake-gpios = <&tlmm 139 GPIO_ACTIVE_LOW>; + + vddpe-3v3-supply = <&vreg_wlan>; + + pinctrl-names = "default"; + pinctrl-0 = <&pcie4_default>; + + status = "okay"; +}; + +&pcie4_phy { + vdda-phy-supply = <&vreg_l6d>; + vdda-pll-supply = <&vreg_l4d>; + + status = "okay"; +}; + &pmc8280c_lpg { status = "okay"; }; @@ -445,6 +480,13 @@ edp_bl_pwm: edp-bl-pwm-state { }; }; +&pmr735a_gpios { + hastings_reg_en: hastings-reg-en-state { + pins = "gpio1"; + function = "normal"; + }; +}; + &tlmm { gpio-reserved-ranges = <74 6>, <83 4>, <125 2>, <128 2>, <154 7>; @@ -521,6 +563,29 @@ wake-n-pins { }; }; + pcie4_default: pcie4-default-state { + clkreq-n-pins { + pins = "gpio140"; + function = "pcie4_clkreq"; + drive-strength = <2>; + bias-pull-up; + }; + + perst-n-pins { + pins = "gpio141"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; + }; + + wake-n-pins { + pins = "gpio139"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + qup0_i2c4_default: qup0-i2c4-default-state { pins = "gpio171", "gpio172"; function = "qup4"; From patchwork Thu Nov 10 10:35:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 18066 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp67812wru; Thu, 10 Nov 2022 02:42:33 -0800 (PST) X-Google-Smtp-Source: AA0mqf76wHY09FhBvEKslrO/ZEhY0VPm7w6xdk3bOgotkWd/wdMOkxjTVODXQN68qTUu6S5rL+gr X-Received: by 2002:a05:6402:111a:b0:466:849d:eb5c with SMTP id u26-20020a056402111a00b00466849deb5cmr14114933edv.131.1668076953229; Thu, 10 Nov 2022 02:42:33 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668076953; cv=none; d=google.com; s=arc-20160816; b=ZqCt6tChEhaSa2hiZuDD3oHjeVgHV6D6mRbGXKgOsiLyJKUcZRps/3k4cN0J2CK/Ou WFekhvYLr3fOhpEDhaVSCmoYc8SWaXiqrgLxREjneU+K2JmhhqxYLxp3c9jGd6O8nOUU YEYa4iR5yypuBu61nxBqumzRyWryVjphjBoFzD8Euy+qSKW3l348I55dCOJ0KxZJnl8o IQUC4SohAiE5+gvt3DmCX6gZaL+M/51Jq7wOAMvdMqV8tlrYBvBOiV+yOL9NjYvQLyUe 3Jp/ckx/4ayURyF9pe3TOm6tDUtt+D57qWLXsQGdNuFnKVn4FNuAE6nNhKX0owK/wAWd WE8A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=xQ4NUdD5SE2sh/TbS0UqaYfZOJu/2e3L1FgF/H11gtY=; b=gvis/nZQ17WRvt6D5oIHMiWmb5KC/0RTI5cuQMk+mIW2ycRID8e/rYzIyxVlY/+Ihk xVKqp0Uom/eDsy3V4Lm5DsPETl3m/wtXz73qgUDomBrueeJcDNo+tkPgyxl0VbkWZ3ie VZP0wEiVqXzhkOBLXPa2V+13IyUBl7ICWD56X8x+/fNKXnNp1S9One3AqEXX8hU0x/SX 1BZqDOgTkuW9ZQ9bYE6kgMvnUCbV7DyfYz1xD3YODfh3FfNLs1jkSZnYbRogCzZlyMYC pFeMQ+lIz1aGUbhYijfaBThD5S8sE2Fc9nCbsMzdgAnAVa7KtxdNuDgmtu2YY/qpmm96 X17Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=Oe7urS76; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id b3-20020a170906728300b007317ad1f9a4si4536573ejl.310.2022.11.10.02.42.10; Thu, 10 Nov 2022 02:42:33 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=Oe7urS76; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230141AbiKJKik (ORCPT + 99 others); Thu, 10 Nov 2022 05:38:40 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33868 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230028AbiKJKiW (ORCPT ); Thu, 10 Nov 2022 05:38:22 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A763C222; Thu, 10 Nov 2022 02:38:21 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 2AD81B82172; Thu, 10 Nov 2022 10:38:20 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 17CFDC4347C; Thu, 10 Nov 2022 10:38:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668076698; bh=sU8Ib2z7vMUqpr6CF9SwR6jtahoyo00LD54DXdRQXpI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Oe7urS76ahsLFIf6Wko6eR6kN4MD96DSDOLP2DE8BoJ9GgnwdjO/aDLVELL8hQY0A DcYWeMX03nyluNHpXe7Rmmr8QaHKuv2w9N8TGrTmgodH2SF39YAaFqWvfwoY0BksWH C23FA/ipJLyzgRzw7Arl7J7B5wPjzwrU7b6tSK0snD2n3XJgV4Y0y8ubDkXvL9r0dZ uJdqmrfcNBfo30kEuSgvtRZlvBKO0UmHOiGv+d2/CvRuowudGXWGCI4AGoZy5KPKbw gVZHU3AuWxZNqMEGEaYiR7unytvEjW8lAn819eXMXKZUkfWoc5SChpMVnocTKjWil/ nHKKEvGL8YEwA== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1ot4wR-0003Lf-AZ; Thu, 10 Nov 2022 11:37:51 +0100 From: Johan Hovold To: Bjorn Andersson Cc: Andy Gross , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH 7/9] arm64: dts: qcom: sc8280xp-x13s: enable NVMe SSD Date: Thu, 10 Nov 2022 11:35:56 +0100 Message-Id: <20221110103558.12690-8-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221110103558.12690-1-johan+linaro@kernel.org> References: <20221110103558.12690-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749105459449219468?= X-GMAIL-MSGID: =?utf-8?q?1749105459449219468?= Enable the NVMe SSD connected to PCIe2. Signed-off-by: Johan Hovold --- .../qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 72 +++++++++++++++++++ 1 file changed, 72 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts index 4424d5b2c578..8fce60b0d16c 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts @@ -124,6 +124,22 @@ vreg_misc_3p3: regulator-misc-3p3 { regulator-boot-on; regulator-always-on; }; + + vreg_nvme: regulator-nvme { + compatible = "regulator-fixed"; + + regulator-name = "VCC3_SSD"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&tlmm 135 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-names = "default"; + pinctrl-0 = <&nvme_reg_en>; + + regulator-boot-on; + }; }; &apps_rsc { @@ -211,6 +227,13 @@ vreg_l4d: ldo4 { regulator-initial-mode = ; }; + vreg_l6d: ldo6 { + regulator-name = "vreg_l6d"; + regulator-min-microvolt = <880000>; + regulator-max-microvolt = <880000>; + regulator-initial-mode = ; + }; + vreg_l7d: ldo7 { regulator-name = "vreg_l7d"; regulator-min-microvolt = <3072000>; @@ -227,6 +250,25 @@ vreg_l9d: ldo9 { }; }; +&pcie2a { + perst-gpios = <&tlmm 143 GPIO_ACTIVE_LOW>; + wake-gpios = <&tlmm 145 GPIO_ACTIVE_LOW>; + + vddpe-3v3-supply = <&vreg_nvme>; + + pinctrl-names = "default"; + pinctrl-0 = <&pcie2a_default>; + + status = "okay"; +}; + +&pcie2a_phy { + vdda-phy-supply = <&vreg_l6d>; + vdda-pll-supply = <&vreg_l4d>; + + status = "okay"; +}; + &pmc8280c_lpg { status = "okay"; }; @@ -592,6 +634,36 @@ hall_int_state: hall-int-state { bias-disable; }; + nvme_reg_en: nvme-reg-en-state { + pins = "gpio135"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + pcie2a_default: pcie2a-default-state { + clkreq-n-pins { + pins = "gpio142"; + function = "pcie2a_clkreq"; + drive-strength = <2>; + bias-pull-up; + }; + + perst-n-pins { + pins = "gpio143"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; + }; + + wake-n-pins { + pins = "gpio145"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + qup0_i2c4_default: qup0-i2c4-default-state { pins = "gpio171", "gpio172"; function = "qup4"; From patchwork Thu Nov 10 10:35:57 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 18067 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp67819wru; Thu, 10 Nov 2022 02:42:34 -0800 (PST) X-Google-Smtp-Source: AA0mqf7lMnsN70NJYCini9+t7iqSG4KSOr6i6ZA+XMamizsv2XNfdy3n/s7mRS6+2ytxaySITIOW X-Received: by 2002:a17:906:d8d8:b0:7ae:7bef:39ec with SMTP id re24-20020a170906d8d800b007ae7bef39ecmr9524139ejb.662.1668076954058; Thu, 10 Nov 2022 02:42:34 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668076954; cv=none; d=google.com; s=arc-20160816; b=PT9ALD7/tU+JG1sEb3Yk8HQuuTlIpPNBaKSpP9rOG9IITnzJC/5wfo7EwJttnCK99O ObPUnQmvBgWCNmVsmUe76tVe6aaZhY7du2/bRKi2eXPBBkPcey0mg9RRqmbzp2rBq4Cp Ovc0YudjtiTW/L1nUXD7uRCoY9VhX24kGevkI/D/S7/3XRByE0DmxXjpKdig2RCio0Ug lv4NmA2uRimqyk0yIJMFXrIJxSLnHJbWrMDK2bQCHca4+7pdSBM+6PSXOvpwbodf+eR3 fq0qUhV4oDdj+4Kca1mP2RbCzjjX9OcjpnXQMUCuymA08w3Mz265B6QHhBTVQSbfKjO4 qs/Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=BzuJxQcXbhXWg6THWTpoCHYPv/tm02u/srMeEsPv8W4=; b=O9YAqe5YL0mJAuS0sgWmHBH1AVb5jBTmOUq5wB2JWoNeIfJbyeqblC5bbN4dq+Wr25 73EZKSt8xN3L58uoYSL2dClXCpLT75gL9gUvw1+fsT/3xOt4eOTZQazW7YG56WQnBCtB QOsSopHz/J9xrHmsq4aZNNCfSeQFf3j03y8YRhgmQCoqgbzBERVCSOHIIXJb6FZiuycu bQWb6AJ6CJNpFIebrhsrjS3B9DgjTz2kCDsyoEjf5wnI5tKzfgi80I0N8fi6glHlzXzz yAmgyS79D7GtTOij/I1Mo+TcJ7ZgPdhMNgio7DXyB3FXIxzG1VWIdZT5F1B4TWSzR4Zw 2HeA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=ogu939hL; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id wg11-20020a17090705cb00b0078d6418dcb8si19907027ejb.456.2022.11.10.02.42.09; Thu, 10 Nov 2022 02:42:34 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=ogu939hL; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230181AbiKJKih (ORCPT + 99 others); Thu, 10 Nov 2022 05:38:37 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33864 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229867AbiKJKiV (ORCPT ); Thu, 10 Nov 2022 05:38:21 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4BF826C711; Thu, 10 Nov 2022 02:38:20 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 5D92661251; Thu, 10 Nov 2022 10:38:19 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 22973C43145; Thu, 10 Nov 2022 10:38:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668076698; bh=uJ+dZ5BmykReMufm+n2+excaOQ1/CNpihyQydrTwVcY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ogu939hLxJCTGYFD7z9LDF4XY11KeEVx6y8RT3nKym7mEeGLXC3/K1CNchWnan4c0 J+uD0fkyPEDgq4QxxZlr5Cn1g7w+u4IRU1wnVLPrpfDm2JFGw/uySMQYKF1VGoWPzF bMVJx91U237vX8Uf6SrHjvssTS9vhIrhnuM1pozABSDVz8ye99nCAuWqZPOhWP1S3T nDU5Mk9JY4nu/v82ykKQuScm76zHsqealhwGMqvC4FWPblMTdhVBFTeA6y65S7+T9y xRg+zERtUqWVDnzFyUVVhUZ66WQwdYruUZp8QZtKHgtbTIH2sShgP2eeZzoa+iu+Oc B5u2WHbOl0DdA== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1ot4wR-0003Li-D7; Thu, 10 Nov 2022 11:37:51 +0100 From: Johan Hovold To: Bjorn Andersson Cc: Andy Gross , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH 8/9] arm64: dts: qcom: sc8280xp-x13s: enable modem Date: Thu, 10 Nov 2022 11:35:57 +0100 Message-Id: <20221110103558.12690-9-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221110103558.12690-1-johan+linaro@kernel.org> References: <20221110103558.12690-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749105460141524986?= X-GMAIL-MSGID: =?utf-8?q?1749105460141524986?= Enable the modem connected to the PCIe3a M.2 connector. Signed-off-by: Johan Hovold --- .../qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 65 +++++++++++++++++++ 1 file changed, 65 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts index 8fce60b0d16c..2285c8311f0f 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts @@ -140,6 +140,22 @@ vreg_nvme: regulator-nvme { regulator-boot-on; }; + + vreg_wwan: regulator-wwan { + compatible = "regulator-fixed"; + + regulator-name = "VCC3B_WAN"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&pmc8280_2_gpios 1 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-names = "default"; + pinctrl-0 = <&wwan_sw_en>; + + regulator-boot-on; + }; }; &apps_rsc { @@ -269,6 +285,25 @@ &pcie2a_phy { status = "okay"; }; +&pcie3a { + perst-gpios = <&tlmm 151 GPIO_ACTIVE_LOW>; + wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>; + + vddpe-3v3-supply = <&vreg_wwan>; + + pinctrl-names = "default"; + pinctrl-0 = <&pcie3a_default>; + + status = "okay"; +}; + +&pcie3a_phy { + vdda-phy-supply = <&vreg_l6d>; + vdda-pll-supply = <&vreg_l4d>; + + status = "okay"; +}; + &pmc8280c_lpg { status = "okay"; }; @@ -597,6 +632,13 @@ misc_3p3_reg_en: misc-3p3-reg-en-state { }; }; +&pmc8280_2_gpios { + wwan_sw_en: wwan-sw-en-state { + pins = "gpio1"; + function = "normal"; + }; +}; + &pmc8280c_gpios { edp_bl_pwm: edp-bl-pwm-state { pins = "gpio8"; @@ -664,6 +706,29 @@ wake-n-pins { }; }; + pcie3a_default: pcie3a-default-state { + clkreq-n-pins { + pins = "gpio150"; + function = "pcie3a_clkreq"; + drive-strength = <2>; + bias-pull-up; + }; + + perst-n-pins { + pins = "gpio151"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; + }; + + wake-n-pins { + pins = "gpio148"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + qup0_i2c4_default: qup0-i2c4-default-state { pins = "gpio171", "gpio172"; function = "qup4"; From patchwork Thu Nov 10 10:35:58 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 18068 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp67887wru; Thu, 10 Nov 2022 02:42:46 -0800 (PST) X-Google-Smtp-Source: AMsMyM4kHqlq2LeNz6qIjbcVj842vrROpUYc8lDx+PHJamtKIky8gDW3Ddwdu1rqRYYTLJzlTgqy X-Received: by 2002:a17:907:97d6:b0:7ad:b962:33e8 with SMTP id js22-20020a17090797d600b007adb96233e8mr59174550ejc.27.1668076966671; Thu, 10 Nov 2022 02:42:46 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668076966; cv=none; d=google.com; s=arc-20160816; b=n4Qz8OpYqZ5yBClSvbO7KCb7BhOuSTAsFQV3wHwzpCUunNXFAxyZVp+Bz0zZNT3BrZ 4PIkRIpsA+TkZ+uxgf190vULDgL8cN0svzc1b6bk1PK033pSDqEQ6t7+HyHLd+garrx9 XwBhJzeLTwswn53CenFnwIr/jVK1G5tqc6cO1cXcx9MEEac5dmiwKzBPTgJXmthLUT6b qN6y8oR/SN9OddpXk4+CFZOb5loiLBuPkscdYwLx5nn+qmfrcdvyXeGBzUdy3+O/Tdqd wdS8yE9ZoY4MBB1AlmgOBmOmIYiSozYInLnRWFvwB3TCGeWYg6/Sbb9cS969+3xshYsJ 7F5Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=ZPTUWLADb/0nIbf/V9/HYVwSnFCh1SZlguJC62UCGPw=; b=VnYv09nRwU1dY3j4e6b6KYEYMMKQBsatEyGIktGMVQhRhT16rcUFbKl+Fzi29o2Jq/ JzW62MNgT0/D3A27eRgHsMU8P350CpBspUjCy6tX7/Zg70OUYVBpmhSkTiJ3AkSXmm/m 6KMXaDmnQF1sEIszFI6U1pzDL/kEfKc5GdVdvKBVaOTNQfRJRM8rhulsGVNTvLZ0p9My XhhYzkl4++fn5zNNq04y04FWumPOT0IDeMo9nYPpoKph97PB+hbHbRt/WJX+LryVX5wL IhY8vOFPLecpox6V2a95JYKjhV50HSMv25xUU2Cm1bF8qqwiw903PChoL5IpabBDPjfo M3Ig== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=qkF+zuqL; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id dn8-20020a17090794c800b00782627f37d6si18539075ejc.778.2022.11.10.02.42.20; Thu, 10 Nov 2022 02:42:46 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=qkF+zuqL; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230185AbiKJKio (ORCPT + 99 others); Thu, 10 Nov 2022 05:38:44 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33874 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230014AbiKJKiW (ORCPT ); Thu, 10 Nov 2022 05:38:22 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7B4DD1B8; Thu, 10 Nov 2022 02:38:21 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 2DE65B82173; Thu, 10 Nov 2022 10:38:20 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 33626C4314E; Thu, 10 Nov 2022 10:38:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668076698; bh=RaSWI0h8Io8p8YTgnqBH42nqXpVE+mqv11zxBaU/nTg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=qkF+zuqLmh/gzqrbsX+AN5cJ4S9dF0CS0M43h1nPrK9hyEvhkBdW1g5Vy06tBybZj OJcJENb9AokKCd8/WwyKl10Z5VvV/+F29qVZ9YlpsQddd+RxAaFyn9suLLlYN+0wQe R0eBFP5GI0nziHqDMbvIxh2+NVnDL3S50evXVZ9XD54khw68MlHZ/GIiraTPSCp4II J2OF+OWl9N0L9S+P01C/I4AfFEEAZgC4IE0Kcw1S641k+qa+UjT3Z9fCThp6BPqvNb wqylPzctx6MNMgtMhSgbhMzg3MGU5YPL1wGM7V/TzpXDb9Iq1g/qSGPgSRL/2zAtWu uYBHiXPT3WgDA== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1ot4wR-0003Ll-Fe; Thu, 10 Nov 2022 11:37:51 +0100 From: Johan Hovold To: Bjorn Andersson Cc: Andy Gross , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH 9/9] arm64: dts: qcom: sc8280xp-x13s: enable WiFi controller Date: Thu, 10 Nov 2022 11:35:58 +0100 Message-Id: <20221110103558.12690-10-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221110103558.12690-1-johan+linaro@kernel.org> References: <20221110103558.12690-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749105473354788926?= X-GMAIL-MSGID: =?utf-8?q?1749105473354788926?= Enable the Qualcomm QCNFA765 Wireless Network Adapter connected to PCIe4. Signed-off-by: Johan Hovold --- .../qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 65 +++++++++++++++++++ 1 file changed, 65 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts index 2285c8311f0f..e8963a51e189 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts @@ -141,6 +141,22 @@ vreg_nvme: regulator-nvme { regulator-boot-on; }; + vreg_wlan: regulator-wlan { + compatible = "regulator-fixed"; + + regulator-name = "VCC_WLAN_3R9"; + regulator-min-microvolt = <3900000>; + regulator-max-microvolt = <3900000>; + + gpio = <&pmr735a_gpios 1 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-names = "default"; + pinctrl-0 = <&hastings_reg_en>; + + regulator-boot-on; + }; + vreg_wwan: regulator-wwan { compatible = "regulator-fixed"; @@ -304,6 +320,25 @@ &pcie3a_phy { status = "okay"; }; +&pcie4 { + perst-gpios = <&tlmm 141 GPIO_ACTIVE_LOW>; + wake-gpios = <&tlmm 139 GPIO_ACTIVE_LOW>; + + vddpe-3v3-supply = <&vreg_wlan>; + + pinctrl-names = "default"; + pinctrl-0 = <&pcie4_default>; + + status = "okay"; +}; + +&pcie4_phy { + vdda-phy-supply = <&vreg_l6d>; + vdda-pll-supply = <&vreg_l4d>; + + status = "okay"; +}; + &pmc8280c_lpg { status = "okay"; }; @@ -646,6 +681,13 @@ edp_bl_pwm: edp-bl-pwm-state { }; }; +&pmr735a_gpios { + hastings_reg_en: hastings-reg-en-state { + pins = "gpio1"; + function = "normal"; + }; +}; + &tlmm { gpio-reserved-ranges = <70 2>, <74 6>, <83 4>, <125 2>, <128 2>, <154 7>; @@ -729,6 +771,29 @@ wake-n-pins { }; }; + pcie4_default: pcie4-default-state { + clkreq-n-pins { + pins = "gpio140"; + function = "pcie4_clkreq"; + drive-strength = <2>; + bias-pull-up; + }; + + perst-n-pins { + pins = "gpio141"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; + }; + + wake-n-pins { + pins = "gpio139"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + qup0_i2c4_default: qup0-i2c4-default-state { pins = "gpio171", "gpio172"; function = "qup4";