From patchwork Wed Nov 29 08:19:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: tip-bot2 for Thomas Gleixner X-Patchwork-Id: 171165 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:a5a7:0:b0:403:3b70:6f57 with SMTP id d7csp199733vqn; Wed, 29 Nov 2023 00:39:02 -0800 (PST) X-Google-Smtp-Source: AGHT+IHCTOJ4rgS/MKFJJScRqvkCRmZHCZXMmVYTKZlqMhlzgROMA6zbvFf9qQk1j1bgzRo/mdKL X-Received: by 2002:a05:6a00:1ca8:b0:6c3:78a4:223 with SMTP id y40-20020a056a001ca800b006c378a40223mr17708027pfw.18.1701247142060; Wed, 29 Nov 2023 00:39:02 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1701247142; cv=none; d=google.com; s=arc-20160816; b=LPTIddBn7dDk6VnpWrduat3Bocjh08EmC858+DOMG+XRgtpA0HH6mPqhU/52N4r01a fI5ufgn58bpaDyQVaXANLwex2foL7vCgKC9CWmbkKySvkT2q5vpkzlq+IZxQ9BWgXouc 9niCr5aoQreRB6zCmw9TZfvv0JpFOw1kym9oh6qz54/uQTKHrO114O/OO1FS5bLwb2wq ce2p4j5RKL5+xC22goTNc8v96NTdyNt12zzqEeUK4bxWubEtXqCBDCVkkeGTUa/uE9Oa kpFINda/WTGwv7nggp9zNfPxel8InR6Io8ZDyDxqo4NrdBTmd1RME50W6E2cle/y2VMN DFxA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:robot-unsubscribe :robot-id:message-id:mime-version:references:in-reply-to:cc:subject :to:reply-to:sender:from:dkim-signature:dkim-signature:date; bh=613qQrAItfeBdqDlIfIp86mma761JzSXjqdXNEXKyO8=; fh=guNTip1gghJyPTtuudVxgoWLqscAZe1uQmU0RTepgqw=; b=fQKIXk+t/FFPUdupbY8elYmLkMVWRPucQlA74V7X9rSs008ENSCPQg9NEefG6W4lb3 b9IICHgxdJuA+e0o+FpsRC8gsnpMX0cDwTQnGfXv229DIuMTDOaFd0Anxs8+Ur03WHz0 K/a7pJ8ESMFAZ8EF7AamTrZ0PRQKi1+3hKIISm8MdAJ+3dk/nC9xOyQCjyKOwpFWK3qE NAYOtKzJWk+E+M+eDBhM/1pMFtoKolIBQFWsrxraoome9IEMxU2O3vNXZGCi922M50HK slsp0ALX8Ftet0k7LdgiN96jZJroNXiyslmnpvXGdm+XcjzfN0e1RR4iWw8DCC3dx+I+ wsbA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b="C9xVCI8/"; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:4 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from howler.vger.email (howler.vger.email. [2620:137:e000::3:4]) by mx.google.com with ESMTPS id e9-20020a056a001a8900b0069109ee0b59si13749167pfv.231.2023.11.29.00.39.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Nov 2023 00:39:02 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:4 as permitted sender) client-ip=2620:137:e000::3:4; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b="C9xVCI8/"; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:4 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by howler.vger.email (Postfix) with ESMTP id 214CA80A97A3; Wed, 29 Nov 2023 00:38:54 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at howler.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231623AbjK2ITT (ORCPT + 99 others); Wed, 29 Nov 2023 03:19:19 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42358 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229791AbjK2ITM (ORCPT ); Wed, 29 Nov 2023 03:19:12 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 65CD41990; Wed, 29 Nov 2023 00:19:18 -0800 (PST) Date: Wed, 29 Nov 2023 08:19:16 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1701245957; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=613qQrAItfeBdqDlIfIp86mma761JzSXjqdXNEXKyO8=; b=C9xVCI8/zaLgMwcrr/L30dE0oy/MmhL+Hm1WUdnlJgyfSYc5puF2TNJyV3w4n7kSmU2ixi jFTj25539WPScTGRHdaPV7KtJvUwQCSn+PQ9yFn1fsezOXP8UkU4DyovaX9PdnMltCubNA 3S1g838g8AjNTJ5biUYVtP4olG0vGYzuLnZqncA3T2D9+luTnfAMBYZyLN9sxAN8i4NIyD ScGgu5cWSdJ70ENACkuZBA1KLOqKrc4rTk2iTSfNXtiVch3k528QeQQrT1mLPOyyYp8cpU NOntObSM0UHOn6E/YjK//Xn4sG8sq6OajDdEhhOIi3G85Ntj5GmZciTFq6yFLQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1701245957; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=613qQrAItfeBdqDlIfIp86mma761JzSXjqdXNEXKyO8=; b=xC/xIssdd8sCCnMIXWWpxxV4BAwKCZdTg99FdN/JdKxSqs7vq7ytf9N9DQxMwQR8jyhgN7 YrAH8lgJjfZpCOAQ== From: "tip-bot2 for Kan Liang" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: perf/core] perf/x86/uncore: Use u64 to replace unsigned for the uncore offsets array Cc: Kan Liang , "Peter Zijlstra (Intel)" , Ammy Yi , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20231117163939.2468007-2-kan.liang@linux.intel.com> References: <20231117163939.2468007-2-kan.liang@linux.intel.com> MIME-Version: 1.0 Message-ID: <170124595632.398.8666452870830009586.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on howler.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (howler.vger.email [0.0.0.0]); Wed, 29 Nov 2023 00:38:54 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1782830105693174218 X-GMAIL-MSGID: 1783886923518316842 The following commit has been merged into the perf/core branch of tip: Commit-ID: b560e0cd882b11921c84307efe139f1247434c5e Gitweb: https://git.kernel.org/tip/b560e0cd882b11921c84307efe139f1247434c5e Author: Kan Liang AuthorDate: Fri, 17 Nov 2023 08:39:36 -08:00 Committer: Peter Zijlstra CommitterDate: Fri, 24 Nov 2023 20:25:01 +01:00 perf/x86/uncore: Use u64 to replace unsigned for the uncore offsets array The current perf doesn't save the complete address of an uncore unit. The complete address of each unit is calculated by the base address + offset. The type of the base address is u64, while the type of offset is unsigned. In the old platforms (without the discovery table method), the base address and offset are hard coded in the driver. Perf can always use the lowest address as the base address. Everything works well. In the new platforms (starting from SPR), the discovery table provides a complete address for all uncore units. To follow the current framework/codes, when parsing the discovery table, the complete address of the first box is stored as a base address. The offset of the following units is calculated by the complete address of the unit minus the base address (the address of the first unit). On GNR, the latter units may have a lower address compared to the first unit. So the offset is a negative value. The upper 32 bits are lost when casting a negative u64 to an unsigned type. Use u64 to replace unsigned for the uncore offsets array to correct the above case. There is no functional change. Signed-off-by: Kan Liang Signed-off-by: Peter Zijlstra (Intel) Tested-by: Ammy Yi Link: https://lore.kernel.org/r/20231117163939.2468007-2-kan.liang@linux.intel.com --- arch/x86/events/intel/uncore.h | 6 +++--- arch/x86/events/intel/uncore_discovery.c | 5 +++-- arch/x86/events/intel/uncore_discovery.h | 2 +- arch/x86/events/intel/uncore_nhmex.c | 2 +- arch/x86/events/intel/uncore_snbep.c | 6 +++--- 5 files changed, 11 insertions(+), 10 deletions(-) diff --git a/arch/x86/events/intel/uncore.h b/arch/x86/events/intel/uncore.h index c30fb5b..7428eca 100644 --- a/arch/x86/events/intel/uncore.h +++ b/arch/x86/events/intel/uncore.h @@ -72,9 +72,9 @@ struct intel_uncore_type { unsigned single_fixed:1; unsigned pair_ctr_ctl:1; union { - unsigned *msr_offsets; - unsigned *pci_offsets; - unsigned *mmio_offsets; + u64 *msr_offsets; + u64 *pci_offsets; + u64 *mmio_offsets; }; unsigned *box_ids; struct event_constraint unconstrainted; diff --git a/arch/x86/events/intel/uncore_discovery.c b/arch/x86/events/intel/uncore_discovery.c index cb488e4..9a698a9 100644 --- a/arch/x86/events/intel/uncore_discovery.c +++ b/arch/x86/events/intel/uncore_discovery.c @@ -125,7 +125,8 @@ uncore_insert_box_info(struct uncore_unit_discovery *unit, int die, bool parsed) { struct intel_uncore_discovery_type *type; - unsigned int *box_offset, *ids; + unsigned int *ids; + u64 *box_offset; int i; if (!unit->ctl || !unit->ctl_offset || !unit->ctr_offset) { @@ -153,7 +154,7 @@ uncore_insert_box_info(struct uncore_unit_discovery *unit, if (!type) return; - box_offset = kcalloc(type->num_boxes + 1, sizeof(unsigned int), GFP_KERNEL); + box_offset = kcalloc(type->num_boxes + 1, sizeof(u64), GFP_KERNEL); if (!box_offset) return; diff --git a/arch/x86/events/intel/uncore_discovery.h b/arch/x86/events/intel/uncore_discovery.h index 6ee80ad..22e769a 100644 --- a/arch/x86/events/intel/uncore_discovery.h +++ b/arch/x86/events/intel/uncore_discovery.h @@ -125,7 +125,7 @@ struct intel_uncore_discovery_type { u8 ctr_offset; /* Counter 0 offset */ u16 num_boxes; /* number of boxes for the uncore block */ unsigned int *ids; /* Box IDs */ - unsigned int *box_offset; /* Box offset */ + u64 *box_offset; /* Box offset */ }; bool intel_uncore_has_discovery_tables(int *ignore); diff --git a/arch/x86/events/intel/uncore_nhmex.c b/arch/x86/events/intel/uncore_nhmex.c index 173e267..56eea2c 100644 --- a/arch/x86/events/intel/uncore_nhmex.c +++ b/arch/x86/events/intel/uncore_nhmex.c @@ -306,7 +306,7 @@ static const struct attribute_group nhmex_uncore_cbox_format_group = { }; /* msr offset for each instance of cbox */ -static unsigned nhmex_cbox_msr_offsets[] = { +static u64 nhmex_cbox_msr_offsets[] = { 0x0, 0x80, 0x40, 0xc0, 0x20, 0xa0, 0x60, 0xe0, 0x240, 0x2c0, }; diff --git a/arch/x86/events/intel/uncore_snbep.c b/arch/x86/events/intel/uncore_snbep.c index fc65870..344319a 100644 --- a/arch/x86/events/intel/uncore_snbep.c +++ b/arch/x86/events/intel/uncore_snbep.c @@ -5278,7 +5278,7 @@ void snr_uncore_mmio_init(void) /* ICX uncore support */ -static unsigned icx_cha_msr_offsets[] = { +static u64 icx_cha_msr_offsets[] = { 0x2a0, 0x2ae, 0x2bc, 0x2ca, 0x2d8, 0x2e6, 0x2f4, 0x302, 0x310, 0x31e, 0x32c, 0x33a, 0x348, 0x356, 0x364, 0x372, 0x380, 0x38e, 0x3aa, 0x3b8, 0x3c6, 0x3d4, 0x3e2, 0x3f0, 0x3fe, 0x40c, 0x41a, @@ -5326,7 +5326,7 @@ static struct intel_uncore_type icx_uncore_chabox = { .format_group = &snr_uncore_chabox_format_group, }; -static unsigned icx_msr_offsets[] = { +static u64 icx_msr_offsets[] = { 0x0, 0x20, 0x40, 0x90, 0xb0, 0xd0, }; @@ -6184,7 +6184,7 @@ static struct intel_uncore_type *spr_uncores[UNCORE_SPR_NUM_UNCORE_TYPES] = { */ #define SPR_UNCORE_UPI_NUM_BOXES 4 -static unsigned int spr_upi_pci_offsets[SPR_UNCORE_UPI_NUM_BOXES] = { +static u64 spr_upi_pci_offsets[SPR_UNCORE_UPI_NUM_BOXES] = { 0, 0x8000, 0x10000, 0x18000 };