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([172.25.112.68]) by orsmga003.jf.intel.com with ESMTP; 09 Nov 2022 22:39:15 -0800 From: Xin Li To: linux-kernel@vger.kernel.org, x86@kernel.org, kvm@vger.kernel.org Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, hpa@zytor.com, seanjc@google.com, pbonzini@redhat.com, kevin.tian@intel.com Subject: [RESEND PATCH 1/6] x86/traps: let common_interrupt() handle IRQ_MOVE_CLEANUP_VECTOR Date: Wed, 9 Nov 2022 22:15:40 -0800 Message-Id: <20221110061545.1531-2-xin3.li@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221110061545.1531-1-xin3.li@intel.com> References: <20221110061545.1531-1-xin3.li@intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749090215753851889?= X-GMAIL-MSGID: =?utf-8?q?1749090215753851889?= From: "H. Peter Anvin (Intel)" IRQ_MOVE_CLEANUP_VECTOR is the only one of the system IRQ vectors that is *below* FIRST_SYSTEM_VECTOR. It is a slow path, so just push it into common_interrupt() just before the spurios interrupt handling. Signed-off-by: H. Peter Anvin (Intel) Signed-off-by: Xin Li --- arch/x86/kernel/irq.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/x86/kernel/irq.c b/arch/x86/kernel/irq.c index 766ffe3ba313..7e125fff45ab 100644 --- a/arch/x86/kernel/irq.c +++ b/arch/x86/kernel/irq.c @@ -248,6 +248,10 @@ DEFINE_IDTENTRY_IRQ(common_interrupt) desc = __this_cpu_read(vector_irq[vector]); if (likely(!IS_ERR_OR_NULL(desc))) { handle_irq(desc, regs); +#ifdef CONFIG_SMP + } else if (vector == IRQ_MOVE_CLEANUP_VECTOR) { + sysvec_irq_move_cleanup(regs); +#endif } else { ack_APIC_irq(); From patchwork Thu Nov 10 06:15:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Li, Xin3" X-Patchwork-Id: 17971 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp760024wru; Wed, 9 Nov 2022 22:40:19 -0800 (PST) X-Google-Smtp-Source: AMsMyM4CE26rJ1/rDV9C7HKvzi8ZLYOYyyhrCpTsfNHKW0aQiDu+/svC1LFb5jEwp9hNm3+gh5/S X-Received: by 2002:a17:90b:4acd:b0:212:fe7a:a05a with SMTP id mh13-20020a17090b4acd00b00212fe7aa05amr67216475pjb.204.1668062418671; Wed, 09 Nov 2022 22:40:18 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668062418; cv=none; d=google.com; s=arc-20160816; b=ER2wRbuiezm23jY2Cv0MQ/+1bojvQGA5uKFkFmM4PmcxaVw2/nCuSHRigZ8MUaBNyb rI+DRlBk1A8biPAdjka1K44kYVSGv3zCsq5HZhDjw7d7+Mpm8I7NCHYTPCCkwq8Ch2M6 ZoIv+enWUWcgJOd/7Cww2uyjWCGzUIhQxVya1LD1lNiCWA8FPUEhLNqGxLyR44coCwET bAJRX3F3pfnHk9/adA3ql8Ku+n35143Riaorbz5nXOuS93Bil/X8bak2HwcPEDEzueU4 lIgV3cWnPSerLo3WmjESIyfvXY2zkXdbhc60TYJUPGtImBhh9iayydX2fBAJdGJZ1fXj u61Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=o/2Stzuo5cW9nxfC752wiPDpbPPoE04lolhrinIb3pM=; b=YiB/+nO+fZpCQ2E6W5RzbZqDBhqBl5or6vfQWXB9Gzb2NQk8/WbDjgFgBYvnIzG3/U oF1N9rKecfNISIlt0Q2n1JONxu2i0AsqzjPIGqYvdbvGwUTaPjZHzTinxJCMz3Vjz4SE DigjFmQa+D7yypjC+ifTwImF99elI1BqbCxHq0w0ghj5vWmBnJFGh1iwTJjEYnXZ7MPm BRbP4QWquhXyWMiQ5VQngyznY9Avz/0jh5J+TJDZis6/Fe7zba9ZeUhtEN0BsVmnhx6Z sPKFjYwer/XNDVc7pflf40aQLPDNDW7WmAUptyTDaRMAMlBjpETdWarnKbgIrAkMVtix KteA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=idBducjo; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (out1.vger.email. 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([172.25.112.68]) by orsmga003.jf.intel.com with ESMTP; 09 Nov 2022 22:39:17 -0800 From: Xin Li To: linux-kernel@vger.kernel.org, x86@kernel.org, kvm@vger.kernel.org Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, hpa@zytor.com, seanjc@google.com, pbonzini@redhat.com, kevin.tian@intel.com Subject: [RESEND PATCH 2/6] x86/traps: add a system interrupt table for system interrupt dispatch Date: Wed, 9 Nov 2022 22:15:41 -0800 Message-Id: <20221110061545.1531-3-xin3.li@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221110061545.1531-1-xin3.li@intel.com> References: <20221110061545.1531-1-xin3.li@intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749090218920128566?= X-GMAIL-MSGID: =?utf-8?q?1749090218920128566?= Upon receiving an external interrupt, KVM VMX reinjects it through calling the interrupt handler in its IDT descriptor on the current kernel stack, which essentially uses the IDT as an interrupt dispatch table. However the IDT is one of the lowest level critical data structures between a x86 CPU and the Linux kernel, we should avoid using it *directly* whenever possible, espeically in a software defined manner. On x86, external interrupts are divided into the following groups 1) system interrupts 2) external device interrupts With the IDT, system interrupts are dispatched through the IDT directly, while external device interrupts are all routed to the external interrupt dispatch function common_interrupt(), which dispatches external device interrupts through a per-CPU external interrupt dispatch table vector_irq. To eliminate dispatching external interrupts through the IDT, add a system interrupt handler table for dispatching a system interrupt to its corresponding handler directly. Thus a software based dispatch function will be: void external_interrupt(struct pt_regs *regs, u8 vector) { if (is_system_interrupt(vector)) system_interrupt_handler_table[vector_to_sysvec(vector)](regs); else /* external device interrupt */ common_interrupt(regs, vector); } What's more, with the Intel FRED (Flexible Return and Event Delivery) architecture, IDT, the hardware based event dispatch table, is gone, and the Linux kernel needs to dispatch events to their handlers with vector to handler mappings, the dispatch function external_interrupt() is also needed. Signed-off-by: H. Peter Anvin (Intel) Signed-off-by: Xin Li --- arch/x86/include/asm/traps.h | 8 ++++++ arch/x86/kernel/traps.c | 55 ++++++++++++++++++++++++++++++++++++ 2 files changed, 63 insertions(+) diff --git a/arch/x86/include/asm/traps.h b/arch/x86/include/asm/traps.h index 47ecfff2c83d..3dc63d753bda 100644 --- a/arch/x86/include/asm/traps.h +++ b/arch/x86/include/asm/traps.h @@ -47,4 +47,12 @@ void __noreturn handle_stack_overflow(struct pt_regs *regs, struct stack_info *info); #endif +/* + * How system interrupt handlers are called. + */ +#define DECLARE_SYSTEM_INTERRUPT_HANDLER(f) \ + void f (struct pt_regs *regs __maybe_unused, \ + unsigned long vector __maybe_unused) +typedef DECLARE_SYSTEM_INTERRUPT_HANDLER((*system_interrupt_handler)); + #endif /* _ASM_X86_TRAPS_H */ diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c index 178015a820f0..95dd917ef9ad 100644 --- a/arch/x86/kernel/traps.c +++ b/arch/x86/kernel/traps.c @@ -1444,6 +1444,61 @@ DEFINE_IDTENTRY_SW(iret_error) } #endif +#define SYSV(x,y) [(x) - FIRST_SYSTEM_VECTOR] = (system_interrupt_handler)y + +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wcast-function-type" + +/* + * The initializer spurious_interrupt() has two arguments of types struct + * pt_regs * and unsigned long, and the system interrupt handlers with + * prefix sysvec_ are all defined with either DEFINE_IDTENTRY_SYSVEC or + * DEFINE_IDTENTRY_SYSVEC_SIMPLE, both with only one argument of type + * struct pt_regs *. Because all handlers only declare and require a subset + * of the arguments provided by the full system_interrupt_handler prototype, + * the function type cast is safe here. + */ +const system_interrupt_handler system_interrupt_handler_table[NR_SYSTEM_VECTORS] = { + [0 ... NR_SYSTEM_VECTORS-1] = spurious_interrupt, +#ifdef CONFIG_SMP + SYSV(RESCHEDULE_VECTOR, sysvec_reschedule_ipi), + SYSV(CALL_FUNCTION_VECTOR, sysvec_call_function), + SYSV(CALL_FUNCTION_SINGLE_VECTOR, sysvec_call_function_single), + SYSV(REBOOT_VECTOR, sysvec_reboot), +#endif + +#ifdef CONFIG_X86_THERMAL_VECTOR + SYSV(THERMAL_APIC_VECTOR, sysvec_thermal), +#endif + +#ifdef CONFIG_X86_MCE_THRESHOLD + SYSV(THRESHOLD_APIC_VECTOR, sysvec_threshold), +#endif + +#ifdef CONFIG_X86_MCE_AMD + SYSV(DEFERRED_ERROR_VECTOR, sysvec_deferred_error), +#endif + +#ifdef CONFIG_X86_LOCAL_APIC + SYSV(LOCAL_TIMER_VECTOR, sysvec_apic_timer_interrupt), + SYSV(X86_PLATFORM_IPI_VECTOR, sysvec_x86_platform_ipi), +# ifdef CONFIG_HAVE_KVM + SYSV(POSTED_INTR_VECTOR, sysvec_kvm_posted_intr_ipi), + SYSV(POSTED_INTR_WAKEUP_VECTOR, sysvec_kvm_posted_intr_wakeup_ipi), + SYSV(POSTED_INTR_NESTED_VECTOR, sysvec_kvm_posted_intr_nested_ipi), +# endif +# ifdef CONFIG_IRQ_WORK + SYSV(IRQ_WORK_VECTOR, sysvec_irq_work), +# endif + SYSV(SPURIOUS_APIC_VECTOR, sysvec_spurious_apic_interrupt), + SYSV(ERROR_APIC_VECTOR, sysvec_error_interrupt), +#endif +}; + +#pragma GCC diagnostic pop + +#undef SYSV + void __init trap_init(void) { /* Init cpu_entry_area before IST entries are set up */ From patchwork Thu Nov 10 06:15:42 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Li, Xin3" X-Patchwork-Id: 17972 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp760106wru; Wed, 9 Nov 2022 22:40:36 -0800 (PST) X-Google-Smtp-Source: AMsMyM4zqXqGczoDQUznN4q8naJZmWohAYKUNyKJ070Fr8+O4+NyLBAv/kPKj5kvSuRAlS+DXiZB X-Received: by 2002:aa7:d0c5:0:b0:464:39e1:68f8 with SMTP id u5-20020aa7d0c5000000b0046439e168f8mr34820166edo.34.1668062436735; Wed, 09 Nov 2022 22:40:36 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668062436; cv=none; d=google.com; s=arc-20160816; b=N25PC40jcj8k7+1MCHsG5eGrI0UWEuqe3gFTxWEpBfwSostLqjWeyhdjJ1Gnpcz4Nh hu0Yc4zESl8JfE1DTNMVol/QZtVkU4t8HmqHnaMle2XFWX6pncJ2yLQ7Olst9Dw2jZFQ ESp5TdR3nrivfq7Djo4P6cgZjZ4NiJPXlqYe9HFKlfyRBvpF480dw8AJ/2nrrdf99CxX 8u21XJLtmKLRDfIUAGvamtA4J69TwfJ/JRDgg4dUmVbSFnNHx1QEjNStRllxg52JVE9/ zE5Rcl0r0S1EpZsFbOel96gd/9BncWKieXzEI4/XO7ags2ZJ/Ntmp+qtC7w6P/8XzzUl PXuw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=KCb7QxUxOuPbhiVhd5H4GEuyTy8K1yAM3G5WohJMN1o=; b=DWtErabF6iRe3xWaGWgVyJGKyInGLcE8lv+TOXAH8kFQNzF84ZfQHvHwgKeZiV6YGO Mbh/rll0XNhRcosbxhvMjVXpbiU8afsOLUnBmnrRay6oxb9z1qsTMrAfhiExgPGB98bu Qz1AAlKWdFgLtIY2vA5F65dMnVEcii7Gf0KkyAa/z0SIUmiMewy52OEPLu5uJlAtxUdB g4FcxdN+PKA6Z0IXjSghqlGGpRpNrUmk03v6Ns/s0xvF2aMMPJFw6LuJiPBIU+5uxSGY gPKTmCAvmK0DcQqnmb9iDgh6r/w66Xb1PsSOeH+RbCpV/1UUhWq8fDdcFtlF18WUUJ5V T2pg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=AgjBGFIz; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (out1.vger.email. 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([172.25.112.68]) by orsmga003.jf.intel.com with ESMTP; 09 Nov 2022 22:39:19 -0800 From: Xin Li To: linux-kernel@vger.kernel.org, x86@kernel.org, kvm@vger.kernel.org Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, hpa@zytor.com, seanjc@google.com, pbonzini@redhat.com, kevin.tian@intel.com Subject: [RESEND PATCH 3/6] x86/traps: add install_system_interrupt_handler() Date: Wed, 9 Nov 2022 22:15:42 -0800 Message-Id: <20221110061545.1531-4-xin3.li@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221110061545.1531-1-xin3.li@intel.com> References: <20221110061545.1531-1-xin3.li@intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749090237714545222?= X-GMAIL-MSGID: =?utf-8?q?1749090237714545222?= Some kernel components install system interrupt handlers into the IDT, and we need to do the same for system_interrupt_handler_table. A new function install_system_interrupt_handler() is added to install a system interrupt handler into both the IDT and system_interrupt_handler_table. Signed-off-by: H. Peter Anvin (Intel) Signed-off-by: Xin Li --- arch/x86/include/asm/traps.h | 2 ++ arch/x86/kernel/cpu/acrn.c | 7 +++++-- arch/x86/kernel/cpu/mshyperv.c | 22 ++++++++++++++-------- arch/x86/kernel/kvm.c | 4 +++- arch/x86/kernel/traps.c | 10 +++++++++- drivers/xen/events/events_base.c | 5 ++++- 6 files changed, 37 insertions(+), 13 deletions(-) diff --git a/arch/x86/include/asm/traps.h b/arch/x86/include/asm/traps.h index 3dc63d753bda..89c4233e19db 100644 --- a/arch/x86/include/asm/traps.h +++ b/arch/x86/include/asm/traps.h @@ -41,6 +41,8 @@ void math_emulate(struct math_emu_info *); bool fault_in_kernel_space(unsigned long address); +void install_system_interrupt_handler(unsigned int n, const void *asm_addr, const void *addr); + #ifdef CONFIG_VMAP_STACK void __noreturn handle_stack_overflow(struct pt_regs *regs, unsigned long fault_address, diff --git a/arch/x86/kernel/cpu/acrn.c b/arch/x86/kernel/cpu/acrn.c index 485441b7f030..9351bf183a9e 100644 --- a/arch/x86/kernel/cpu/acrn.c +++ b/arch/x86/kernel/cpu/acrn.c @@ -18,6 +18,7 @@ #include #include #include +#include static u32 __init acrn_detect(void) { @@ -26,8 +27,10 @@ static u32 __init acrn_detect(void) static void __init acrn_init_platform(void) { - /* Setup the IDT for ACRN hypervisor callback */ - alloc_intr_gate(HYPERVISOR_CALLBACK_VECTOR, asm_sysvec_acrn_hv_callback); + /* Install system interrupt handler for ACRN hypervisor callback */ + install_system_interrupt_handler(HYPERVISOR_CALLBACK_VECTOR, + asm_sysvec_acrn_hv_callback, + sysvec_acrn_hv_callback); x86_platform.calibrate_tsc = acrn_get_tsc_khz; x86_platform.calibrate_cpu = acrn_get_tsc_khz; diff --git a/arch/x86/kernel/cpu/mshyperv.c b/arch/x86/kernel/cpu/mshyperv.c index 831613959a92..144b4a622188 100644 --- a/arch/x86/kernel/cpu/mshyperv.c +++ b/arch/x86/kernel/cpu/mshyperv.c @@ -29,6 +29,7 @@ #include #include #include +#include #include #include #include @@ -415,19 +416,24 @@ static void __init ms_hyperv_init_platform(void) */ x86_platform.apic_post_init = hyperv_init; hyperv_setup_mmu_ops(); - /* Setup the IDT for hypervisor callback */ - alloc_intr_gate(HYPERVISOR_CALLBACK_VECTOR, asm_sysvec_hyperv_callback); - /* Setup the IDT for reenlightenment notifications */ + /* Install system interrupt handler for hypervisor callback */ + install_system_interrupt_handler(HYPERVISOR_CALLBACK_VECTOR, + asm_sysvec_hyperv_callback, + sysvec_hyperv_callback); + + /* Install system interrupt handler for reenlightenment notifications */ if (ms_hyperv.features & HV_ACCESS_REENLIGHTENMENT) { - alloc_intr_gate(HYPERV_REENLIGHTENMENT_VECTOR, - asm_sysvec_hyperv_reenlightenment); + install_system_interrupt_handler(HYPERV_REENLIGHTENMENT_VECTOR, + asm_sysvec_hyperv_reenlightenment, + sysvec_hyperv_reenlightenment); } - /* Setup the IDT for stimer0 */ + /* Install system interrupt handler for stimer0 */ if (ms_hyperv.misc_features & HV_STIMER_DIRECT_MODE_AVAILABLE) { - alloc_intr_gate(HYPERV_STIMER0_VECTOR, - asm_sysvec_hyperv_stimer0); + install_system_interrupt_handler(HYPERV_STIMER0_VECTOR, + asm_sysvec_hyperv_stimer0, + sysvec_hyperv_stimer0); } # ifdef CONFIG_SMP diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c index d4e48b4a438b..b7388ed2a980 100644 --- a/arch/x86/kernel/kvm.c +++ b/arch/x86/kernel/kvm.c @@ -835,7 +835,9 @@ static void __init kvm_guest_init(void) if (kvm_para_has_feature(KVM_FEATURE_ASYNC_PF_INT) && kvmapf) { static_branch_enable(&kvm_async_pf_enabled); - alloc_intr_gate(HYPERVISOR_CALLBACK_VECTOR, asm_sysvec_kvm_asyncpf_interrupt); + install_system_interrupt_handler(HYPERVISOR_CALLBACK_VECTOR, + asm_sysvec_kvm_asyncpf_interrupt, + sysvec_kvm_asyncpf_interrupt); } #ifdef CONFIG_SMP diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c index 95dd917ef9ad..9c7826e588bc 100644 --- a/arch/x86/kernel/traps.c +++ b/arch/x86/kernel/traps.c @@ -1458,7 +1458,7 @@ DEFINE_IDTENTRY_SW(iret_error) * of the arguments provided by the full system_interrupt_handler prototype, * the function type cast is safe here. */ -const system_interrupt_handler system_interrupt_handler_table[NR_SYSTEM_VECTORS] = { +system_interrupt_handler system_interrupt_handler_table[NR_SYSTEM_VECTORS] = { [0 ... NR_SYSTEM_VECTORS-1] = spurious_interrupt, #ifdef CONFIG_SMP SYSV(RESCHEDULE_VECTOR, sysvec_reschedule_ipi), @@ -1499,6 +1499,14 @@ const system_interrupt_handler system_interrupt_handler_table[NR_SYSTEM_VECTORS] #undef SYSV +void __init install_system_interrupt_handler(unsigned int n, const void *asm_addr, const void *addr) +{ + BUG_ON(n < FIRST_SYSTEM_VECTOR); + + system_interrupt_handler_table[n - FIRST_SYSTEM_VECTOR] = (system_interrupt_handler)addr; + alloc_intr_gate(n, asm_addr); +} + void __init trap_init(void) { /* Init cpu_entry_area before IST entries are set up */ diff --git a/drivers/xen/events/events_base.c b/drivers/xen/events/events_base.c index c443f04aaad7..1a9eaf417acc 100644 --- a/drivers/xen/events/events_base.c +++ b/drivers/xen/events/events_base.c @@ -45,6 +45,7 @@ #include #include #include +#include #include #include #endif @@ -2246,7 +2247,9 @@ static __init void xen_alloc_callback_vector(void) return; pr_info("Xen HVM callback vector for event delivery is enabled\n"); - alloc_intr_gate(HYPERVISOR_CALLBACK_VECTOR, asm_sysvec_xen_hvm_callback); + install_system_interrupt_handler(HYPERVISOR_CALLBACK_VECTOR, + asm_sysvec_xen_hvm_callback, + sysvec_xen_hvm_callback); } #else void xen_setup_callback_vector(void) {} From patchwork Thu Nov 10 06:15:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Li, Xin3" X-Patchwork-Id: 17973 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp760182wru; Wed, 9 Nov 2022 22:40:50 -0800 (PST) X-Google-Smtp-Source: AMsMyM73hM5+tSICDmB6uhE8hCrH//n8j3BB9xyJE0SGpYQm8M8Pnuq06vBLT3/YxkDnHD6nXACm X-Received: by 2002:a50:d71a:0:b0:458:e445:992c with SMTP id t26-20020a50d71a000000b00458e445992cmr1719843edi.417.1668062450785; Wed, 09 Nov 2022 22:40:50 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668062450; cv=none; d=google.com; s=arc-20160816; b=iGEE9pvkVBQ2+Wc4B9GIWpmed7BwJZun3Rj9+Oqc9x0qd87j7UB0b1veDqc4eRRd+X vfRRSMZHj7ycHhTm7u0l2zSoLuIAFZrItlzw1F5hjL/2A4K/AuovwbqqrvtDFJxCri93 e83SrkcOq14Ih0KzjAaC3Y6Kv1rOesjbWvpHp2Kx4xc51QyB8ZhQX2ZnI1l0yPmNqyFX tiZzJEgU4ct9Muy+Jj88v85b578+vi8lD+PA1pxEiVDvOUYDZ6C2bqcwJ8HmGlp4u9zp 2zhnPq4f2yzs2swt+iSK/KDgbPf5D/uSbnZkaDIG2A2NHxPhDGhYRxRZsC5MPNQZSFAe uJ4A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=wUIZ119WF10QK2/6t2FvQiNCsFoXJESZSw9TTr/xs1I=; b=FfnVybldqbUevxMbBOfHqvPxl/JZAoVVW/txsby2Umyej8hxez7LQlmnVzZ6bg/FjO 2S6BfZ50zb2jW7mocF/6o/jTiRm2oEI/vNHnMPwEj6ejUYLNeKoBpiLlTTOpYCU4YBMq GTGf1bxBYNpZItzFLJP6F49TRHy6op54xvPvkf+TlPFFdYMBg99924Lk8zeNjFVaJ6Jo loVOMCi1yePXLafJPGMPSuJKWlzllUURbApKGEanAwgu6c5kXPtz4IBVXPa9iagARB23 ekTzzY+z42XRbSXnoZ9laoH3PuqrtjAnRjvDXt3/oEHOUYuVkw+7leN56IJavEqBxPcT 4uxQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=fuHH37zA; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (out1.vger.email. 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([172.25.112.68]) by orsmga003.jf.intel.com with ESMTP; 09 Nov 2022 22:39:21 -0800 From: Xin Li To: linux-kernel@vger.kernel.org, x86@kernel.org, kvm@vger.kernel.org Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, hpa@zytor.com, seanjc@google.com, pbonzini@redhat.com, kevin.tian@intel.com Subject: [RESEND PATCH 4/6] x86/traps: add external_interrupt() to dispatch external interrupts Date: Wed, 9 Nov 2022 22:15:43 -0800 Message-Id: <20221110061545.1531-5-xin3.li@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221110061545.1531-1-xin3.li@intel.com> References: <20221110061545.1531-1-xin3.li@intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749090252597997579?= X-GMAIL-MSGID: =?utf-8?q?1749090252597997579?= Add external_interrupt() to dispatch external interrupts to their handlers. If an external interrupt is a system interrupt, dipatch it through system_interrupt_handler_table, otherwise call into common_interrupt(). Signed-off-by: H. Peter Anvin (Intel) Signed-off-by: Xin Li --- arch/x86/kernel/traps.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c index 9c7826e588bc..c1eb3bd335ce 100644 --- a/arch/x86/kernel/traps.c +++ b/arch/x86/kernel/traps.c @@ -1507,6 +1507,27 @@ void __init install_system_interrupt_handler(unsigned int n, const void *asm_add alloc_intr_gate(n, asm_addr); } +/* + * External interrupt dispatch function. + * + * Until/unless common_interrupt() can be taught to deal with the + * special system vectors, split the dispatch. + * + * Note: common_interrupt() already deals with IRQ_MOVE_CLEANUP_VECTOR. + */ +__visible noinstr void external_interrupt(struct pt_regs *regs, + unsigned int vector) +{ + unsigned int sysvec = vector - FIRST_SYSTEM_VECTOR; + + BUG_ON(vector < FIRST_EXTERNAL_VECTOR); + + if (sysvec < NR_SYSTEM_VECTORS) + return system_interrupt_handler_table[sysvec](regs, vector); + + common_interrupt(regs, vector); +} + void __init trap_init(void) { /* Init cpu_entry_area before IST entries are set up */ From patchwork Thu Nov 10 06:15:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Li, Xin3" X-Patchwork-Id: 17974 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp760282wru; Wed, 9 Nov 2022 22:41:11 -0800 (PST) X-Google-Smtp-Source: AMsMyM5gbQP0j6TZs19TcSdMReddB14blwznTjlyDjrT9oBNmprxrvUefD7d4iPTGGVFk1IUJy7y X-Received: by 2002:a05:6a00:b41:b0:52f:59dc:75 with SMTP id p1-20020a056a000b4100b0052f59dc0075mr63265632pfo.33.1668062471175; Wed, 09 Nov 2022 22:41:11 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668062471; cv=none; d=google.com; s=arc-20160816; b=FwqZHCP0BWeOSq9IaOuVXu7ujayoZQ2apuvmq1HpUJcgtOIhdL5dz6ozL4U86H2loz iI07hoNgsrbDqy1eFafo4pa7+EMvCxOjLgclK3xIsj4prD1AlKIl1RVIVD6HLv7oV6cp TgcvLKUCfJMAdcHNwjFQb7q944SRXJNDwqt9KK0bHx5uScs0HrUn/pBJMVijmPfdljm0 szChcP2JQdwFxT+BGBeehjWl3iTv3loxerK8eQBc3WwStm2QKyj6bqzdhq+Vvfbd+dMK R+nl5sauCe2uGtSmNPqYZqRAqK0giXGUD1YdmDZU9IzXzMerRhH+14z/wxYdEmiQBDbE aMTw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=DxEVWdjBd0afphf9VtbzXsa3gAfzJkoEoSbjvQ8kRnA=; b=xovYK9Jn0CGFjjPoZ0/mJbYB11qYIgR8IPSva5qJKskXufAjwW6g/ov0/IblxIHO5d wJ8ntWGo3MGAGA6ecMO+UhklkJbgS8mQV2K6FQdrYsiXnUkCoJAtArvbnOyLl1HAl2d/ 6nLVZFuhkwmMkENP6rvAoT8ptYVO4ioE62G/vTMda40Om6PWlKSpo2LFox3l4UVHe8LW q8rJXSgsIcAFDVePrXn2p73yd/S2lIV/Qz0teolqmJn48i3e7M0sp00vN6nGpuAlhkgm dMcOAepy5VVOmK81pxqRzucl2SLFXh8mBsC3RXfvc/L/ajsIWTxJZ1jKq1qsxWs1Rz3D 6RdA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=mvX29KLy; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (out1.vger.email. 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([172.25.112.68]) by orsmga003.jf.intel.com with ESMTP; 09 Nov 2022 22:39:22 -0800 From: Xin Li To: linux-kernel@vger.kernel.org, x86@kernel.org, kvm@vger.kernel.org Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, hpa@zytor.com, seanjc@google.com, pbonzini@redhat.com, kevin.tian@intel.com Subject: [RESEND PATCH 5/6] KVM: x86/VMX: add kvm_vmx_reinject_nmi_irq() for NMI/IRQ reinjection Date: Wed, 9 Nov 2022 22:15:44 -0800 Message-Id: <20221110061545.1531-6-xin3.li@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221110061545.1531-1-xin3.li@intel.com> References: <20221110061545.1531-1-xin3.li@intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749090273363911868?= X-GMAIL-MSGID: =?utf-8?q?1749090273363911868?= To eliminate dispatching NMI/IRQ through the IDT, add kvm_vmx_reinject_nmi_irq(), which calls external_interrupt() for IRQ reinjection. Lastly replace calling a NMI/IRQ handler in an IDT descriptor with calling kvm_vmx_reinject_nmi_irq(). Signed-off-by: H. Peter Anvin (Intel) Signed-off-by: Xin Li --- arch/x86/include/asm/traps.h | 2 ++ arch/x86/kernel/traps.c | 23 +++++++++++++++++++++++ arch/x86/kvm/vmx/vmenter.S | 33 --------------------------------- arch/x86/kvm/vmx/vmx.c | 19 +++++++------------ 4 files changed, 32 insertions(+), 45 deletions(-) diff --git a/arch/x86/include/asm/traps.h b/arch/x86/include/asm/traps.h index 89c4233e19db..4c56a8d31762 100644 --- a/arch/x86/include/asm/traps.h +++ b/arch/x86/include/asm/traps.h @@ -57,4 +57,6 @@ void __noreturn handle_stack_overflow(struct pt_regs *regs, unsigned long vector __maybe_unused) typedef DECLARE_SYSTEM_INTERRUPT_HANDLER((*system_interrupt_handler)); +void kvm_vmx_reinject_nmi_irq(u32 vector); + #endif /* _ASM_X86_TRAPS_H */ diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c index c1eb3bd335ce..9abf91534b13 100644 --- a/arch/x86/kernel/traps.c +++ b/arch/x86/kernel/traps.c @@ -1528,6 +1528,29 @@ __visible noinstr void external_interrupt(struct pt_regs *regs, common_interrupt(regs, vector); } +#if IS_ENABLED(CONFIG_KVM_INTEL) +/* + * KVM VMX reinjects NMI/IRQ on its current stack, it's a sync + * call thus the values in the pt_regs structure are not used in + * executing NMI/IRQ handlers, except cs.RPL and flags.IF, which + * are both always 0 in the VMX NMI/IRQ reinjection context. Thus + * we simply allocate a zeroed pt_regs structure on current stack + * to call external_interrupt(). + */ +void kvm_vmx_reinject_nmi_irq(u32 vector) +{ + struct pt_regs irq_regs; + + memset(&irq_regs, 0, sizeof(irq_regs)); + + if (vector == NMI_VECTOR) + return exc_nmi(&irq_regs); + + external_interrupt(&irq_regs, vector); +} +EXPORT_SYMBOL_GPL(kvm_vmx_reinject_nmi_irq); +#endif + void __init trap_init(void) { /* Init cpu_entry_area before IST entries are set up */ diff --git a/arch/x86/kvm/vmx/vmenter.S b/arch/x86/kvm/vmx/vmenter.S index 8477d8bdd69c..0c1608b329cd 100644 --- a/arch/x86/kvm/vmx/vmenter.S +++ b/arch/x86/kvm/vmx/vmenter.S @@ -317,36 +317,3 @@ SYM_FUNC_START(vmread_error_trampoline) RET SYM_FUNC_END(vmread_error_trampoline) - -SYM_FUNC_START(vmx_do_interrupt_nmi_irqoff) - /* - * Unconditionally create a stack frame, getting the correct RSP on the - * stack (for x86-64) would take two instructions anyways, and RBP can - * be used to restore RSP to make objtool happy (see below). - */ - push %_ASM_BP - mov %_ASM_SP, %_ASM_BP - -#ifdef CONFIG_X86_64 - /* - * Align RSP to a 16-byte boundary (to emulate CPU behavior) before - * creating the synthetic interrupt stack frame for the IRQ/NMI. - */ - and $-16, %rsp - push $__KERNEL_DS - push %rbp -#endif - pushf - push $__KERNEL_CS - CALL_NOSPEC _ASM_ARG1 - - /* - * "Restore" RSP from RBP, even though IRET has already unwound RSP to - * the correct value. objtool doesn't know the callee will IRET and, - * without the explicit restore, thinks the stack is getting walloped. - * Using an unwind hint is problematic due to x86-64's dynamic alignment. - */ - mov %_ASM_BP, %_ASM_SP - pop %_ASM_BP - RET -SYM_FUNC_END(vmx_do_interrupt_nmi_irqoff) diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c index 63247c57c72c..b457e4888468 100644 --- a/arch/x86/kvm/vmx/vmx.c +++ b/arch/x86/kvm/vmx/vmx.c @@ -46,6 +46,7 @@ #include #include #include +#include #include #include @@ -6758,15 +6759,11 @@ static void vmx_apicv_post_state_restore(struct kvm_vcpu *vcpu) memset(vmx->pi_desc.pir, 0, sizeof(vmx->pi_desc.pir)); } -void vmx_do_interrupt_nmi_irqoff(unsigned long entry); - -static void handle_interrupt_nmi_irqoff(struct kvm_vcpu *vcpu, - unsigned long entry) +static void handle_interrupt_nmi_irqoff(struct kvm_vcpu *vcpu, u32 vector) { - bool is_nmi = entry == (unsigned long)asm_exc_nmi_noist; - - kvm_before_interrupt(vcpu, is_nmi ? KVM_HANDLING_NMI : KVM_HANDLING_IRQ); - vmx_do_interrupt_nmi_irqoff(entry); + kvm_before_interrupt(vcpu, vector == NMI_VECTOR ? + KVM_HANDLING_NMI : KVM_HANDLING_IRQ); + kvm_vmx_reinject_nmi_irq(vector); kvm_after_interrupt(vcpu); } @@ -6792,7 +6789,6 @@ static void handle_nm_fault_irqoff(struct kvm_vcpu *vcpu) static void handle_exception_nmi_irqoff(struct vcpu_vmx *vmx) { - const unsigned long nmi_entry = (unsigned long)asm_exc_nmi_noist; u32 intr_info = vmx_get_intr_info(&vmx->vcpu); /* if exit due to PF check for async PF */ @@ -6806,20 +6802,19 @@ static void handle_exception_nmi_irqoff(struct vcpu_vmx *vmx) kvm_machine_check(); /* We need to handle NMIs before interrupts are enabled */ else if (is_nmi(intr_info)) - handle_interrupt_nmi_irqoff(&vmx->vcpu, nmi_entry); + handle_interrupt_nmi_irqoff(&vmx->vcpu, NMI_VECTOR); } static void handle_external_interrupt_irqoff(struct kvm_vcpu *vcpu) { u32 intr_info = vmx_get_intr_info(vcpu); unsigned int vector = intr_info & INTR_INFO_VECTOR_MASK; - gate_desc *desc = (gate_desc *)host_idt_base + vector; if (KVM_BUG(!is_external_intr(intr_info), vcpu->kvm, "KVM: unexpected VM-Exit interrupt info: 0x%x", intr_info)) return; - handle_interrupt_nmi_irqoff(vcpu, gate_offset(desc)); + handle_interrupt_nmi_irqoff(vcpu, vector); vcpu->arch.at_instruction_boundary = true; } From patchwork Thu Nov 10 06:15:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Li, Xin3" X-Patchwork-Id: 17975 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp760501wru; Wed, 9 Nov 2022 22:41:58 -0800 (PST) X-Google-Smtp-Source: AMsMyM7vhcWDXEe/GzPMtQDOJt8Vn6ABD8Lf39M3vRAjYaOFbGnUJRP/uds3PrWcAB7N5wcpUile X-Received: by 2002:a17:902:ea85:b0:187:1851:bb02 with SMTP id x5-20020a170902ea8500b001871851bb02mr57546133plb.57.1668062518224; Wed, 09 Nov 2022 22:41:58 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668062518; cv=none; d=google.com; s=arc-20160816; b=b2908cDRe3FwEc2ny7hh6858zCNbLfC9YBUzPEFezCveLfmYhqQavikr3QOBuA93JT AqTvhP1rrDmxXU9NGQqwQ6NvLKShGcpFPPVqTCpgeY9pBEOW8fKT5t/xrMZkAvbDC1fU +CV+5bjabKGrAE9Lt9bOR1Wf0mZ03YSyT0504JMh6rkEkLugdMycDqC/2s4A6t1eX7lO xSRjb2YVeMR+hGxPIMmL2cc2N3bKTtFCoKFIAuVQ6otq2hJbELSncuzjgTzsPL8mO58T vBv7X02WVNMZBQDbIaPQPFKsuWY28gxbmWZFR2YRdy4GoVHqe7UK3xd5K+eo8eUCa7K2 6qPA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=A0vKKUDJ9EdaGUwQBLUSrqpxDRKwPPSk5gjgfuKe01U=; b=DBdNSfuAIpMMJia098YeZpTBbGrf4f94qItrkbccMMCZVdVKV5fTiKTcHQGryQgEDn z6dXHwt1UXtzgRbkro8YPARFWz5LU2RDFShVkAjhMRfWs8hpMexEWEgh8z/eoGr+C7fM j2ZrPwqvw+SJ17RSUUMxlmgjyRtYAXfeD235jfJQxlEs8VidV6GPcBsLxdVHLJS9ID7a D8Z1xCBAfsyXRwaZQiRgQtpMXaVcQzCoEKYlwUVhV38xSS/vIowSSyAUglovfj2yDPqR r7kYzw3vAnewHMmbEVd+u+sfgCAMqLn/fXcqTnE6YxLadF0fkygCeJ9jtggSr6cP6+W4 JcYA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=GkEmVS1i; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (out1.vger.email. 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([172.25.112.68]) by orsmga003.jf.intel.com with ESMTP; 09 Nov 2022 22:39:25 -0800 From: Xin Li To: linux-kernel@vger.kernel.org, x86@kernel.org, kvm@vger.kernel.org Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, hpa@zytor.com, seanjc@google.com, pbonzini@redhat.com, kevin.tian@intel.com Subject: [RESEND PATCH 6/6] x86/traps: remove unused NMI entry exc_nmi_noist() Date: Wed, 9 Nov 2022 22:15:45 -0800 Message-Id: <20221110061545.1531-7-xin3.li@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221110061545.1531-1-xin3.li@intel.com> References: <20221110061545.1531-1-xin3.li@intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749090323090410541?= X-GMAIL-MSGID: =?utf-8?q?1749090323090410541?= After the introduction of kvm_vmx_reinject_irq(), exc_nmi_noist() is no longer needed, thus remove it. Signed-off-by: Xin Li --- arch/x86/include/asm/idtentry.h | 15 --------------- arch/x86/kernel/nmi.c | 10 ---------- 2 files changed, 25 deletions(-) diff --git a/arch/x86/include/asm/idtentry.h b/arch/x86/include/asm/idtentry.h index 72184b0b2219..da28ac17c57a 100644 --- a/arch/x86/include/asm/idtentry.h +++ b/arch/x86/include/asm/idtentry.h @@ -581,21 +581,6 @@ DECLARE_IDTENTRY_RAW(X86_TRAP_MC, xenpv_exc_machine_check); #endif /* NMI */ - -#if defined(CONFIG_X86_64) && IS_ENABLED(CONFIG_KVM_INTEL) -/* - * Special NOIST entry point for VMX which invokes this on the kernel - * stack. asm_exc_nmi() requires an IST to work correctly vs. the NMI - * 'executing' marker. - * - * On 32bit this just uses the regular NMI entry point because 32-bit does - * not have ISTs. - */ -DECLARE_IDTENTRY(X86_TRAP_NMI, exc_nmi_noist); -#else -#define asm_exc_nmi_noist asm_exc_nmi -#endif - DECLARE_IDTENTRY_NMI(X86_TRAP_NMI, exc_nmi); #ifdef CONFIG_XEN_PV DECLARE_IDTENTRY_RAW(X86_TRAP_NMI, xenpv_exc_nmi); diff --git a/arch/x86/kernel/nmi.c b/arch/x86/kernel/nmi.c index cec0bfa3bc04..816bb59a4ba4 100644 --- a/arch/x86/kernel/nmi.c +++ b/arch/x86/kernel/nmi.c @@ -527,16 +527,6 @@ DEFINE_IDTENTRY_RAW(exc_nmi) mds_user_clear_cpu_buffers(); } -#if defined(CONFIG_X86_64) && IS_ENABLED(CONFIG_KVM_INTEL) -DEFINE_IDTENTRY_RAW(exc_nmi_noist) -{ - exc_nmi(regs); -} -#endif -#if IS_MODULE(CONFIG_KVM_INTEL) -EXPORT_SYMBOL_GPL(asm_exc_nmi_noist); -#endif - void stop_nmi(void) { ignore_nmis++;