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[8.43.85.97]) by mx.google.com with ESMTPS id rh7-20020a17090720e700b0077ef3eece57si14014189ejb.144.2022.11.09.22.04.41 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Nov 2022 22:04:42 -0800 (PST) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=s30Tkx51; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gnu.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 1B3693853567 for ; Thu, 10 Nov 2022 06:04:41 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 1B3693853567 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1668060281; bh=VCM9FPO8U2TZhV18gLitCXwMgNnLm1aztBHHSa0dLP8=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=s30Tkx51z9ZAhh5GoG41C05pjQIyp/ishKsgvPy3+a5jnYQ7Xo5qU606mZxNoVvzV pcZHNZqdmVtq2Trrg17ACWzn2LU41F8HNooQ9AhGzNDVytX8ibRQMxVZ+EpdBKCvzi Ble/9z6ftTrYKxe5fjQ2m3iiz1IlJYTB30b7lIds= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by sourceware.org (Postfix) with ESMTPS id C930E3858D1E for ; Thu, 10 Nov 2022 06:03:54 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org C930E3858D1E X-IronPort-AV: E=McAfee;i="6500,9779,10526"; a="309937241" X-IronPort-AV: E=Sophos;i="5.96,152,1665471600"; d="scan'208";a="309937241" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Nov 2022 22:03:45 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10526"; a="811913922" X-IronPort-AV: E=Sophos;i="5.96,152,1665471600"; d="scan'208";a="811913922" Received: from shvmail03.sh.intel.com ([10.239.245.20]) by orsmga005.jf.intel.com with ESMTP; 09 Nov 2022 22:03:44 -0800 Received: from shliclel320.sh.intel.com (shliclel320.sh.intel.com [10.239.240.127]) by shvmail03.sh.intel.com (Postfix) with ESMTP id B76901005703 for ; Thu, 10 Nov 2022 14:03:43 +0800 (CST) To: gcc-patches@gcc.gnu.org Subject: [wwwdocs] gcc-13: Mention Intel new ISA and march support. Date: Thu, 10 Nov 2022 14:01:43 +0800 Message-Id: <20221110060143.28132-1-haochen.jiang@intel.com> X-Mailer: git-send-email 2.18.1 X-Spam-Status: No, score=-11.1 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Haochen Jiang via Gcc-patches From: "Jiang, Haochen" Reply-To: Haochen Jiang Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749087978336116178?= X-GMAIL-MSGID: =?utf-8?q?1749087978336116178?= Hi all, This patch aims to mention newly added Intel ISA and march support. Ok for trunk? BRs, Haochen --- htdocs/gcc-13/changes.html | 50 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 50 insertions(+) diff --git a/htdocs/gcc-13/changes.html b/htdocs/gcc-13/changes.html index bd11cbec..0daf921b 100644 --- a/htdocs/gcc-13/changes.html +++ b/htdocs/gcc-13/changes.html @@ -240,6 +240,56 @@ a work-in-progress.

__bf16 type to x86 psABI. Users need to adjust their AVX512BF16-related source code when upgrading GCC12 to GCC13. +
  • New ISA extension support for Intel AVX-IFMA was added to GCC. + AVX-IFMA intrinsics are available via the -mavxifma + compiler switch. +
    • +
  • New ISA extension support for Intel AVX-VNNI-INT8 was added to GCC. + AVX-VNNI-INT8 intrinsics are available via the -mavxvnniint8 + compiler switch. +
    • +
  • New ISA extension support for Intel AVX-NE-CONVERT was added to GCC. + AVX-NE-CONVERT intrinsics are available via the + -mavxneconvert compiler switch. +
    • +
  • New ISA extension support for Intel CMPccXADD was added to GCC. + CMPccXADD intrinsics are available via the -mcmpccxadd + compiler switch. +
    • +
  • New ISA extension support for Intel AMX-FP16 was added to GCC. + AMX-FP16 intrinsics are available via the -mamx-fp16 + compiler switch. +
    • +
  • New ISA extension support for Intel PREFETCHI was added to GCC. + PREFETCHI intrinsics are available via the -mprefetchi + compiler switch. +
    • +
  • New ISA extension support for Intel RAO-INT was added to GCC. + RAO-INT intrinsics are available via the -mraoint + compiler switch. +
    • +
  • GCC now supports the Intel CPU named Raptor Lake through + -march=raptorlake. + Raptor Lake is based on Alder Lake. +
    • +
  • GCC now supports the Intel CPU named Meteor Lake through + -march=meteorlake. + Meteor Lake is based on Alder Lake. +
    • +
  • GCC now supports the Intel CPU named Sierra Forest through + -march=sierraforest. + The switch enables the AVX-IFMA, AVX-VNNI-INT8, AVX-NE-CONVERT and + CMPccXADD ISA extensions. +
    • +
  • GCC now supports the Intel CPU named Grand Ridge through + -march=grandridge. + The switch enables the AVX-IFMA, AVX-VNNI-INT8, AVX-NE-CONVERT, CMPccXADD + and RAO-INT ISA extensions. +
    • +
  • GCC now supports the Intel CPU named Granite Rapids through + -march=graniterapids. + The switch enables the AMX-FP16 and PREFETCHI ISA extensions. +