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SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org X-Spam-Status: No, score=-0.8 required=5.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on groat.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (groat.vger.email [0.0.0.0]); Mon, 27 Nov 2023 13:12:39 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1783753146251439908 X-GMAIL-MSGID: 1783753146251439908 From: Philipp Zabel Add compatible for ROHM Semiconductor BR24G04 EEPROMs. Signed-off-by: Philipp Zabel Signed-off-by: Roland Hieber Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/eeprom/at24.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/eeprom/at24.yaml b/Documentation/devicetree/bindings/eeprom/at24.yaml index b6864d0ee81e..1812ef31d5f1 100644 --- a/Documentation/devicetree/bindings/eeprom/at24.yaml +++ b/Documentation/devicetree/bindings/eeprom/at24.yaml @@ -123,6 +123,7 @@ properties: - enum: - onnn,cat24c04 - onnn,cat24c05 + - rohm,br24g04 - const: atmel,24c04 - items: - const: renesas,r1ex24016 From patchwork Mon Nov 27 21:11:03 2023 Content-Type: text/plain; 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"^goldelico,.*": description: Golden Delicious Computers GmbH & Co. KG + "^gome,.*": + description: Gossen Metrawatt GmbH "^goodix,.*": description: Shenzhen Huiding Technology Co., Ltd. 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[23.128.96.36]) by mx.google.com with ESMTPS id y16-20020a056a00191000b006cbeff5ae49si9530705pfi.3.2023.11.27.13.11.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Nov 2023 13:11:52 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.36 as permitted sender) client-ip=23.128.96.36; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.36 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by pete.vger.email (Postfix) with ESMTP id D854F8185947; Mon, 27 Nov 2023 13:11:47 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at pete.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232038AbjK0VLj (ORCPT + 99 others); Mon, 27 Nov 2023 16:11:39 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44182 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229527AbjK0VLi (ORCPT ); Mon, 27 Nov 2023 16:11:38 -0500 Received: from metis.whiteo.stw.pengutronix.de (metis.whiteo.stw.pengutronix.de [IPv6:2a0a:edc0:2:b01:1d::104]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B506ED5B for ; Mon, 27 Nov 2023 13:11:44 -0800 (PST) Received: from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2]) by metis.whiteo.stw.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1r7itI-0004lI-8Q; Mon, 27 Nov 2023 22:11:40 +0100 Received: from [2a0a:edc0:0:1101:1d::ac] (helo=dude04.red.stw.pengutronix.de) by drehscheibe.grey.stw.pengutronix.de with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1r7itH-00C1q0-HB; Mon, 27 Nov 2023 22:11:39 +0100 Received: from rhi by dude04.red.stw.pengutronix.de with local (Exim 4.96) (envelope-from ) id 1r7itH-00FAHm-1M; Mon, 27 Nov 2023 22:11:39 +0100 From: Roland Hieber Date: Mon, 27 Nov 2023 22:11:04 +0100 Subject: [PATCH 3/5] ARM: dts: imx7d-pinfunc: add mux for OSC32K_32K_OUT via GPIO1_IO03 MIME-Version: 1.0 Message-Id: <20231127-b4-imx7-var-som-gome-v1-3-f26f88f2d0bc@pengutronix.de> References: <20231127-b4-imx7-var-som-gome-v1-0-f26f88f2d0bc@pengutronix.de> In-Reply-To: <20231127-b4-imx7-var-som-gome-v1-0-f26f88f2d0bc@pengutronix.de> To: Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Li Yang Cc: linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring , linux-arm-kernel@lists.infradead.org, Roland Hieber , Philipp Zabel X-Mailer: b4 0.12.0 X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: auto@pengutronix.de X-SA-Exim-Scanned: No (on metis.whiteo.stw.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org X-Spam-Status: No, score=-0.8 required=5.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on pete.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (pete.vger.email [0.0.0.0]); Mon, 27 Nov 2023 13:11:48 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1783753093485658597 X-GMAIL-MSGID: 1783753093485658597 From: Philipp Zabel Add the missing pinmux setting for alternate function 4 on the GPIO1_IO03 pin, which muxes the pin as 32 kHz oscillator output. Signed-off-by: Philipp Zabel Signed-off-by: Roland Hieber --- arch/arm/boot/dts/nxp/imx/imx7d-pinfunc.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/nxp/imx/imx7d-pinfunc.h b/arch/arm/boot/dts/nxp/imx/imx7d-pinfunc.h index 69f2c1ec8254..1530631b0d70 100644 --- a/arch/arm/boot/dts/nxp/imx/imx7d-pinfunc.h +++ b/arch/arm/boot/dts/nxp/imx/imx7d-pinfunc.h @@ -33,6 +33,7 @@ #define MX7D_PAD_LPSR_GPIO1_IO03__PWM3_OUT 0x000C 0x003C 0x0000 0x1 0x0 #define MX7D_PAD_LPSR_GPIO1_IO03__CCM_ENET_REF_CLK2 0x000C 0x003C 0x0570 0x2 0x3 #define MX7D_PAD_LPSR_GPIO1_IO03__SAI3_MCLK 0x000C 0x003C 0x0000 0x3 0x0 +#define MX7D_PAD_LPSR_GPIO1_IO03__OSC32K_32K_OUT 0x000C 0x003C 0x0000 0x4 0x0 #define MX7D_PAD_LPSR_GPIO1_IO03__CCM_CLKO2 0x000C 0x003C 0x0000 0x5 0x0 #define MX7D_PAD_LPSR_GPIO1_IO03__OBSERVE2_OUT 0x000C 0x003C 0x0000 0x6 0x0 #define MX7D_PAD_LPSR_GPIO1_IO03__USB_OTG2_ID 0x000C 0x003C 0x0730 0x7 0x3 From patchwork Mon Nov 27 21:11:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roland Hieber X-Patchwork-Id: 170414 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:ce62:0:b0:403:3b70:6f57 with SMTP id o2csp3467267vqx; Mon, 27 Nov 2023 13:12:05 -0800 (PST) X-Google-Smtp-Source: AGHT+IG+M+W40JjOwo2az0yPKZ0NLA5z2zjMWdAjWK538BFRTxvhmiV3wWe+CR3x2AVQ/cnXtHoB X-Received: by 2002:a05:6a20:9390:b0:18c:5178:9649 with SMTP id x16-20020a056a20939000b0018c51789649mr10327341pzh.14.1701119525420; Mon, 27 Nov 2023 13:12:05 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1701119525; cv=none; d=google.com; s=arc-20160816; b=i2m/USQq/3H/4Q9WQTT+PzfSf4Lfs7NSftQbvlKHRaynu8VXE7TT67OKLaxL968cKR 4jNiTSDhqK6Wr9of5M1LBCDIQlRKGyOEdxFqk+5HurrZyrtVjt1GbBtamJ2lyx4NI/0l u5Yjdujng1os3ZzNJZSKEt3fIFiW+qEOTAjUeGrMI2eBB1wjX0+V6VjD5T5i+TuslGPe LrszEhsml7rcOlTv2aU3mQLiFCaufu/fdtfaCkszaedMRBHtyGqbumRimct73nwgD1zW 5ERn55LbTA4dIbFPiHmbz65GQAqlWM4Pj7gT9+EI5jUSeZLQbjGgGgFOMTOTNZGaubVj HMqA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from; bh=GoRaLL3Y9EKNzFdZ62dPk1msaafoeL6BhQ+iBMXNvV8=; fh=eJpMNFSBvCdVsGtbTvG0pHKYSoRWQdYsrLzPY5jB3QU=; b=c7bvQLTj77r+lOBaRrworSB8Is0aeBKSzhxeR80cPJP7zaK6kqNZRLz/7dL197YgcN /4Ojc3Ibyu9sqghurOs0CLBYA59t3jzUDZrVgj/kttPVVuJTUzAYfOGlhuLywKUYJ6Nk aepzlB+XaUhhcdU8NLEo/rzZ1nqLdvPpTEFgO3mueNfPJnNdEnRsXSIELi1k60D4RZ0T kf5yuON3JZBgiSTEGLNHVCVIKRrFwYMpFq6s0PO06Ac4EAdUgz/fDLPx6EEG+IDh0m1R YjSXsJW5LHCul2unu85Q3Q9Jk3g5cqSS9GxVEfh8KxBO2ryFrAmluXGtMjQMJxvuEWL3 ombA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from snail.vger.email (snail.vger.email. [23.128.96.37]) by mx.google.com with ESMTPS id f6-20020a056a00238600b006be26c1be4bsi10760166pfc.73.2023.11.27.13.12.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Nov 2023 13:12:05 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) client-ip=23.128.96.37; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by snail.vger.email (Postfix) with ESMTP id 5496780A5F74; Mon, 27 Nov 2023 13:12:04 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at snail.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233280AbjK0VLw (ORCPT + 99 others); Mon, 27 Nov 2023 16:11:52 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53272 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233167AbjK0VLt (ORCPT ); Mon, 27 Nov 2023 16:11:49 -0500 Received: from metis.whiteo.stw.pengutronix.de (metis.whiteo.stw.pengutronix.de [IPv6:2a0a:edc0:2:b01:1d::104]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E919B10D1 for ; Mon, 27 Nov 2023 13:11:53 -0800 (PST) Received: from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2]) by metis.whiteo.stw.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1r7itI-0004lJ-8S; Mon, 27 Nov 2023 22:11:40 +0100 Received: from [2a0a:edc0:0:1101:1d::ac] (helo=dude04.red.stw.pengutronix.de) by drehscheibe.grey.stw.pengutronix.de with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1r7itH-00C1q1-HP; Mon, 27 Nov 2023 22:11:39 +0100 Received: from rhi by dude04.red.stw.pengutronix.de with local (Exim 4.96) (envelope-from ) id 1r7itH-00FAHq-1N; Mon, 27 Nov 2023 22:11:39 +0100 From: Roland Hieber Date: Mon, 27 Nov 2023 22:11:05 +0100 Subject: [PATCH 4/5] ARM: dts: add Variscite VAR-SOM-MX7 System on Module MIME-Version: 1.0 Message-Id: <20231127-b4-imx7-var-som-gome-v1-4-f26f88f2d0bc@pengutronix.de> References: <20231127-b4-imx7-var-som-gome-v1-0-f26f88f2d0bc@pengutronix.de> In-Reply-To: <20231127-b4-imx7-var-som-gome-v1-0-f26f88f2d0bc@pengutronix.de> To: Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Li Yang Cc: linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring , linux-arm-kernel@lists.infradead.org, Roland Hieber , Marco Felsch , Philipp Zabel X-Mailer: b4 0.12.0 X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: auto@pengutronix.de X-SA-Exim-Scanned: No (on metis.whiteo.stw.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Mon, 27 Nov 2023 13:12:04 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1783753107598342644 X-GMAIL-MSGID: 1783753107598342644 From: Marco Felsch Add DTSI file of Variscite VAR-SOM-MX7 System on Module in a basic version. While we don't have a VAR-MX7 development board at hand, we will use this DTSI as base for a custom board in a later commit. Signed-off-by: Marco Felsch Co-developed-by: Philipp Zabel Signed-off-by: Philipp Zabel Signed-off-by: Roland Hieber --- arch/arm/boot/dts/nxp/imx/imx7d-var-som-mx7.dtsi | 607 +++++++++++++++++++++++ 1 file changed, 607 insertions(+) diff --git a/arch/arm/boot/dts/nxp/imx/imx7d-var-som-mx7.dtsi b/arch/arm/boot/dts/nxp/imx/imx7d-var-som-mx7.dtsi new file mode 100644 index 000000000000..29b9b9305b81 --- /dev/null +++ b/arch/arm/boot/dts/nxp/imx/imx7d-var-som-mx7.dtsi @@ -0,0 +1,607 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2015 Freescale Semiconductor, Inc. + * Copyright (C) 2016-2017 Variscite Ltd. + * Copyright (C) 2022 Philipp Zabel, Pengutronix + * Copyright (C) 2022 Roland Hieber, Pengutronix + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include "imx7d.dtsi" + +/ { + model = "Variscite i.MX7 Dual VAR-SOM-MX7"; + compatible = "variscite,var-som-mx7", "fsl,imx7d"; + + reg_vref_1v8: regulator-vref-1v8 { + compatible = "regulator-fixed"; + regulator-name = "vref-1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + reg_usb_otg1_vbus: regulator-usbotg1-vbus { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbotg1_vbus>; + regulator-name = "usb_otg1_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + reg_usb_otg2_vbus: regulator-usbotg2-vbus { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbotg2_vbus>; + regulator-name = "usb_otg2_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + wlreg_on: regulator-wlreg-on { + compatible = "regulator-fixed"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "wlreg_on"; + }; + + sound { + compatible = "simple-audio-card"; + simple-audio-card,name = "wm8731audio"; + simple-audio-card,widgets = + "Headphone", "Headphone Jack", + "Line", "Line Jack", + "Microphone", "Mic Jack"; + simple-audio-card,routing = + "Headphone Jack", "RHPOUT", + "Headphone Jack", "LHPOUT", + "LLINEIN", "Line Jack", + "RLINEIN", "Line Jack", + "MICIN", "Mic Bias", + "Mic Bias", "Mic Jack"; + simple-audio-card,format = "i2s"; + simple-audio-card,bitclock-master = <&sound_master>; + simple-audio-card,frame-master = <&sound_master>; + + sound_master: simple-audio-card,cpu { + sound-dai = <&sai1>; + }; + + simple-audio-card,codec { + sound-dai = <&wm8731>; + system-clock-frequency = <12288000>; + }; + }; +}; + +&adc1 { + vref-supply = <®_vref_1v8>; +}; + +&adc2 { + vref-supply = <®_vref_1v8>; +}; + +&cpu0 { + cpu-supply = <&sw1a_reg>; +}; + +&cpu1 { + cpu-supply = <&sw1a_reg>; +}; + +&fec1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet1>; + phy-supply = <&vgen3_reg>; + assigned-clocks = <&clks IMX7D_ENET_PHY_REF_ROOT_SRC>, + <&clks IMX7D_ENET_AXI_ROOT_SRC>, + <&clks IMX7D_ENET1_TIME_ROOT_SRC>, + <&clks IMX7D_ENET1_TIME_ROOT_CLK>, + <&clks IMX7D_ENET_AXI_ROOT_CLK>; + assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_25M_CLK>, + <&clks IMX7D_PLL_ENET_MAIN_250M_CLK>, + <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>; + assigned-clock-rates = <0>, <0>, <0>, <100000000>, <250000000>; + phy-mode = "rgmii-id"; + phy-handle = <ðphy0>; + phy-reset-gpios = <&gpio5 11 GPIO_ACTIVE_LOW>; + phy-reset-post-delay = <20>; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethphy0: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0>; + }; + + ethphy1: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + }; + }; +}; + +&fec2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet2>; + phy-supply = <&vgen3_reg>; + assigned-clocks = <&clks IMX7D_ENET_PHY_REF_ROOT_SRC>, + <&clks IMX7D_ENET_AXI_ROOT_SRC>, + <&clks IMX7D_ENET2_TIME_ROOT_SRC>, + <&clks IMX7D_ENET2_TIME_ROOT_CLK>, + <&clks IMX7D_ENET_AXI_ROOT_CLK>; + assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_25M_CLK>, + <&clks IMX7D_PLL_ENET_MAIN_250M_CLK>, + <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>; + assigned-clock-rates = <0>, <0>, <0>, <100000000>, <250000000>; + phy-mode = "rgmii-id"; + phy-handle = <ðphy1>; + phy-reset-gpios = <&gpio4 3 GPIO_ACTIVE_LOW>; + phy-reset-post-delay = <20>; +}; + +&gpio6 { + sd3-pwr-hog { + gpio-hog; + gpios = <11 0>; + output-low; + line-name = "sd3_pwr"; + }; +}; + +&i2c1 { + clock-frequency = <100000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c1>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio4 8 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio4 9 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + status = "okay"; + + pmic@8 { + compatible = "fsl,pfuze3000"; + reg = <0x08>; + + regulators { + sw1a_reg: sw1a { + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <6250>; + }; + + /* use sw1c_reg to align with pfuze100/pfuze200 */ + sw1c_reg: sw1b { + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1475000>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <6250>; + }; + + sw2_reg: sw2 { + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1850000>; + regulator-boot-on; + regulator-always-on; + }; + + sw3a_reg: sw3 { + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1650000>; + regulator-boot-on; + regulator-always-on; + }; + + swbst_reg: swbst { + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5150000>; + }; + + snvs_reg: vsnvs { + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <3000000>; + regulator-boot-on; + regulator-always-on; + }; + + vref_reg: vrefddr { + regulator-boot-on; + regulator-always-on; + }; + + vgen1_reg: vldo1 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + vgen2_reg: vldo2 { + status = "disabled"; + }; + + vgen3_reg: vccsd { + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vgen4_reg: v33 { + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <2850000>; + regulator-always-on; + }; + + vgen5_reg: vldo3 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + vgen6_reg: vldo4 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + }; + }; + + eeprom@50 { + compatible = "rohm,br24g04", "atmel,24c04"; + reg = <0x50>; + pagesize = <16>; + num-addresses = <2>; + address-width = <8>; + read-only; + }; +}; + +&i2c2 { + clock-frequency = <400000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c2>; + pinctrl-1 = <&pinctrl_i2c2_gpio>; + scl-gpios = <&gpio4 10 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio4 11 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + status = "okay"; + + wm8731: wm8731@1a { + #sound-dai-cells = <0>; + AVDD-supply = <&vgen6_reg>; + HPVDD-supply = <&vgen6_reg>; + DBVDD-supply = <&vgen6_reg>; + DCVDD-supply = <&vgen6_reg>; + compatible = "wlf,wm8731"; + reg = <0x1a>; + clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>; + clock-names = "mclk"; + assigned-clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_SRC>, + <&clks IMX7D_PLL_AUDIO_POST_DIV>, + <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>; + assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>; + assigned-clock-rates = <0>, <884736000>, <12288000>; + }; +}; + +&sai1 { + assigned-clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_SRC>, + <&clks IMX7D_PLL_AUDIO_POST_DIV>, + <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>; + assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>; + assigned-clock-rates = <0>, <884736000>, <12288000>; + status = "okay"; +}; + +&snvs_pwrkey { + status = "okay"; +}; + +&snvs_rtc { + status = "disabled"; +}; + +&uart1 { + assigned-clocks = <&clks IMX7D_UART1_ROOT_SRC>; + assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>; +}; + +&uart2 { + assigned-clocks = <&clks IMX7D_UART2_ROOT_SRC>; + assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>; +}; + +&uart3 { + assigned-clocks = <&clks IMX7D_UART3_ROOT_SRC>; + assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3>; + uart-has-rtscts; + status = "okay"; +}; + +&usbotg1 { + vbus-supply = <®_usb_otg1_vbus>; + dr_mode = "host"; +}; + +&usbotg2 { + vbus-supply = <®_usb_otg2_vbus>; + dr_mode = "host"; +}; + +&usdhc2 { + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; + pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_wlan>, <&pinctrl_bt>; + pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_wlan>, <&pinctrl_bt>; + pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_wlan>, <&pinctrl_bt>; + pinctrl-3 = <&pinctrl_usdhc2_sleep>, <&pinctrl_wlan_sleep>, <&pinctrl_bt_sleep>; + keep-power-in-suspend; + non-removable; + vmmc-supply = <&wlreg_on>; + status = "okay"; + + brcmf: wifi@1 { + reg = <1>; + compatible = "brcm,bcm4329-fmac"; + }; +}; + +/* eMMC */ +&usdhc3 { + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc3_ctrl>, <&pinctrl_usdhc3>; + pinctrl-1 = <&pinctrl_usdhc3_ctrl>, <&pinctrl_usdhc3_100mhz>; + pinctrl-2 = <&pinctrl_usdhc3_ctrl>, <&pinctrl_usdhc3_200mhz>; + vmmc-supply = <&vgen3_reg>; + assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>; + assigned-clock-rates = <400000000>; + no-1-8-v; + no-sdio; + no-sd; + bus-width = <8>; + non-removable; + status = "okay"; +}; + +&wdog1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_wdog>; + fsl,ext-reset-output; +}; + +&iomuxc_lpsr { + pinctrl_usbotg1_vbus: usbotg1-vbusgrp { + fsl,pins = < + MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5 0x14 + >; + }; + + pinctrl_usbotg2_vbus: usbotg2-vbusgrp { + fsl,pins = < + MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7 0x14 + >; + }; + + pinctrl_wdog: wdoggrp { + fsl,pins = < + MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B 0x74 + >; + }; + + pinctrl_wlan: wlangrp { + fsl,pins = < + MX7D_PAD_LPSR_GPIO1_IO04__GPIO1_IO4 0x09 /* WL_REG_ON */ + MX7D_PAD_LPSR_GPIO1_IO03__OSC32K_32K_OUT 0xb0 /* WIFI Slow clock */ + >; + }; + + pinctrl_wlan_sleep: wlan-sleepgrp { + fsl,pins = < + MX7D_PAD_LPSR_GPIO1_IO04__GPIO1_IO4 0x10 /* WL_REG_ON */ + MX7D_PAD_LPSR_GPIO1_IO03__OSC32K_32K_OUT 0x10 /* WIFI Slow clock */ + >; + }; +}; + +&iomuxc { + + pinctrl_bt: btgrp { + fsl,pins = < + MX7D_PAD_GPIO1_IO14__GPIO1_IO14 0x80000000 /* bt reg on */ + >; + }; + + pinctrl_bt_sleep: bt-sleepgrp { + fsl,pins = < + MX7D_PAD_GPIO1_IO14__GPIO1_IO14 0x10 /* bt reg on */ + >; + }; + + pinctrl_enet1: enet1grp { + fsl,pins = < + MX7D_PAD_SD2_CD_B__ENET1_MDIO 0x3 + MX7D_PAD_SD2_WP__ENET1_MDC 0x3 + MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC 0x1 + MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 0x1 + MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 0x1 + MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2 0x1 + MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3 0x1 + MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL 0x1 + MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC 0x1 + MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 0x1 + MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 0x1 + MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2 0x1 + MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3 0x1 + MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL 0x1 + MX7D_PAD_SD2_RESET_B__GPIO5_IO11 0x59 /* ethphy0 reset */ + >; + }; + + pinctrl_enet2: enet2grp { + fsl,pins = < + MX7D_PAD_EPDC_GDSP__ENET2_RGMII_TXC 0x1 + MX7D_PAD_EPDC_SDCE2__ENET2_RGMII_TD0 0x1 + MX7D_PAD_EPDC_SDCE3__ENET2_RGMII_TD1 0x1 + MX7D_PAD_EPDC_GDCLK__ENET2_RGMII_TD2 0x1 + MX7D_PAD_EPDC_GDOE__ENET2_RGMII_TD3 0x1 + MX7D_PAD_EPDC_GDRL__ENET2_RGMII_TX_CTL 0x1 + MX7D_PAD_EPDC_SDCE1__ENET2_RGMII_RXC 0x1 + MX7D_PAD_EPDC_SDCLK__ENET2_RGMII_RD0 0x1 + MX7D_PAD_EPDC_SDLE__ENET2_RGMII_RD1 0x1 + MX7D_PAD_EPDC_SDOE__ENET2_RGMII_RD2 0x1 + MX7D_PAD_EPDC_SDSHR__ENET2_RGMII_RD3 0x1 + MX7D_PAD_EPDC_SDCE0__ENET2_RGMII_RX_CTL 0x1 + MX7D_PAD_UART2_TX_DATA__GPIO4_IO3 0x59 /* ethphy1 reset */ + >; + }; + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX7D_PAD_I2C1_SDA__I2C1_SDA 0x4000007f + MX7D_PAD_I2C1_SCL__I2C1_SCL 0x4000007f + >; + }; + + pinctrl_i2c1_gpio: i2c1gpiogrp { + fsl,pins = < + MX7D_PAD_I2C1_SDA__GPIO4_IO9 0x4000007f + MX7D_PAD_I2C1_SCL__GPIO4_IO8 0x4000007f + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX7D_PAD_I2C2_SDA__I2C2_SDA 0x4000007f + MX7D_PAD_I2C2_SCL__I2C2_SCL 0x4000007f + >; + }; + + pinctrl_i2c2_gpio: i2c2gpiogrp { + fsl,pins = < + MX7D_PAD_I2C2_SDA__GPIO4_IO11 0x4000007f + MX7D_PAD_I2C2_SCL__GPIO4_IO10 0x4000007f + >; + }; + + pinctrl_uart3: uart3grp { + fsl,pins = < + MX7D_PAD_UART3_TX_DATA__UART3_DCE_TX 0x79 + MX7D_PAD_UART3_RX_DATA__UART3_DCE_RX 0x79 + MX7D_PAD_UART3_CTS_B__UART3_DCE_CTS 0x79 + MX7D_PAD_UART3_RTS_B__UART3_DCE_RTS 0x79 + >; + }; + + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX7D_PAD_SD2_CMD__SD2_CMD 0x59 + MX7D_PAD_SD2_CLK__SD2_CLK 0x19 + MX7D_PAD_SD2_DATA0__SD2_DATA0 0x59 + MX7D_PAD_SD2_DATA1__SD2_DATA1 0x59 + MX7D_PAD_SD2_DATA2__SD2_DATA2 0x59 + MX7D_PAD_SD2_DATA3__SD2_DATA3 0x59 + >; + }; + + pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { + fsl,pins = < + MX7D_PAD_SD2_CMD__SD2_CMD 0x5a + MX7D_PAD_SD2_CLK__SD2_CLK 0x1a + MX7D_PAD_SD2_DATA0__SD2_DATA0 0x5a + MX7D_PAD_SD2_DATA1__SD2_DATA1 0x5a + MX7D_PAD_SD2_DATA2__SD2_DATA2 0x5a + MX7D_PAD_SD2_DATA3__SD2_DATA3 0x5a + >; + }; + + pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { + fsl,pins = < + MX7D_PAD_SD2_CMD__SD2_CMD 0x5b + MX7D_PAD_SD2_CLK__SD2_CLK 0x1b + MX7D_PAD_SD2_DATA0__SD2_DATA0 0x5b + MX7D_PAD_SD2_DATA1__SD2_DATA1 0x5b + MX7D_PAD_SD2_DATA2__SD2_DATA2 0x5b + MX7D_PAD_SD2_DATA3__SD2_DATA3 0x5b + >; + }; + + pinctrl_usdhc2_sleep: usdhc2-sleepgrp { + fsl,pins = < + MX7D_PAD_SD2_CMD__GPIO5_IO13 0x10 + MX7D_PAD_SD2_CLK__GPIO5_IO12 0x10 + MX7D_PAD_SD2_DATA0__GPIO5_IO14 0x10 + MX7D_PAD_SD2_DATA1__GPIO5_IO15 0x10 + MX7D_PAD_SD2_DATA2__GPIO5_IO16 0x10 + MX7D_PAD_SD2_DATA3__GPIO5_IO17 0x10 + >; + }; + + pinctrl_usdhc3_ctrl: usdhc3-ctrlgrp { + fsl,pins = < + MX7D_PAD_SD3_RESET_B__SD3_RESET_B 0x59 + >; + }; + + pinctrl_usdhc3: usdhc3grp { + fsl,pins = < + MX7D_PAD_SD3_CMD__SD3_CMD 0x59 + MX7D_PAD_SD3_CLK__SD3_CLK 0x19 + MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59 + MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59 + MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59 + MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59 + MX7D_PAD_SD3_DATA4__SD3_DATA4 0x59 + MX7D_PAD_SD3_DATA5__SD3_DATA5 0x59 + MX7D_PAD_SD3_DATA6__SD3_DATA6 0x59 + MX7D_PAD_SD3_DATA7__SD3_DATA7 0x59 + >; + }; + + pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp { + fsl,pins = < + MX7D_PAD_SD3_CMD__SD3_CMD 0x5a + MX7D_PAD_SD3_CLK__SD3_CLK 0x1a + MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5a + MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5a + MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5a + MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5a + MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5a + MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5a + MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5a + MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5a + >; + }; + + pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp { + fsl,pins = < + MX7D_PAD_SD3_CMD__SD3_CMD 0x5b + MX7D_PAD_SD3_CLK__SD3_CLK 0x1b + MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5b + MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5b + MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5b + MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5b + MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5b + MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5b + MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5b + MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5b + >; + }; +}; From patchwork Mon Nov 27 21:11:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roland Hieber X-Patchwork-Id: 170415 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:ce62:0:b0:403:3b70:6f57 with SMTP id o2csp3467341vqx; Mon, 27 Nov 2023 13:12:13 -0800 (PST) X-Google-Smtp-Source: AGHT+IF+uX0Q81eK2I6aDBKzGZnm+0f3W9tDdP4USbt3ReiN4jAy1nue8zTnrmdCY398kUPaSynJ X-Received: by 2002:a17:902:9883:b0:1ca:731a:23e4 with SMTP id s3-20020a170902988300b001ca731a23e4mr14291971plp.40.1701119533101; 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[2620:137:e000::3:4]) by mx.google.com with ESMTPS id i1-20020a170902cf0100b001cf50e0508bsi11326141plg.506.2023.11.27.13.12.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Nov 2023 13:12:13 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:4 as permitted sender) client-ip=2620:137:e000::3:4; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:4 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by howler.vger.email (Postfix) with ESMTP id 3C95482A8546; Mon, 27 Nov 2023 13:12:02 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at howler.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229527AbjK0VLu (ORCPT + 99 others); Mon, 27 Nov 2023 16:11:50 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53258 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233224AbjK0VLs (ORCPT ); Mon, 27 Nov 2023 16:11:48 -0500 Received: from metis.whiteo.stw.pengutronix.de (metis.whiteo.stw.pengutronix.de [IPv6:2a0a:edc0:2:b01:1d::104]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 87DF419D for ; Mon, 27 Nov 2023 13:11:52 -0800 (PST) Received: from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2]) by metis.whiteo.stw.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1r7itI-0004lH-8W; Mon, 27 Nov 2023 22:11:40 +0100 Received: from [2a0a:edc0:0:1101:1d::ac] (helo=dude04.red.stw.pengutronix.de) by drehscheibe.grey.stw.pengutronix.de with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1r7itH-00C1q2-Hb; Mon, 27 Nov 2023 22:11:39 +0100 Received: from rhi by dude04.red.stw.pengutronix.de with local (Exim 4.96) (envelope-from ) id 1r7itH-00FAHs-1P; Mon, 27 Nov 2023 22:11:39 +0100 From: Roland Hieber Date: Mon, 27 Nov 2023 22:11:06 +0100 Subject: [PATCH 5/5] ARM: dts: add support for Gossen Metrawatt Profitest MIME-Version: 1.0 Message-Id: <20231127-b4-imx7-var-som-gome-v1-5-f26f88f2d0bc@pengutronix.de> References: <20231127-b4-imx7-var-som-gome-v1-0-f26f88f2d0bc@pengutronix.de> In-Reply-To: <20231127-b4-imx7-var-som-gome-v1-0-f26f88f2d0bc@pengutronix.de> To: Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Li Yang Cc: linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring , linux-arm-kernel@lists.infradead.org, Roland Hieber , Marco Felsch , Philipp Zabel , Michael Tretter X-Mailer: b4 0.12.0 X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: auto@pengutronix.de X-SA-Exim-Scanned: No (on metis.whiteo.stw.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org X-Spam-Status: No, score=-0.8 required=5.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on howler.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (howler.vger.email [0.0.0.0]); Mon, 27 Nov 2023 13:12:02 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1783753115720511751 X-GMAIL-MSGID: 1783753115720511751 From: Marco Felsch This is the initial support for the Gossen Metrawatt Profitest MF (e143_01) board based on a Variscite VAR-SOM-MX7 SoM. Signed-off-by: Marco Felsch Co-developed-by: Philipp Zabel Signed-off-by: Philipp Zabel Co-developed-by: Michael Tretter Signed-off-by: Michael Tretter Co-developed-by: Roland Hieber Signed-off-by: Roland Hieber --- Documentation/devicetree/bindings/arm/fsl.yaml | 7 + arch/arm/boot/dts/nxp/imx/Makefile | 1 + arch/arm/boot/dts/nxp/imx/imx7d-gome-e143_01.dts | 559 +++++++++++++++++++++++ 3 files changed, 567 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index 32b195852a75..b751d289c712 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -900,6 +900,13 @@ properties: - const: toradex,colibri-imx7d-emmc - const: fsl,imx7d + - description: Variscite VAR-SOM-MX7 based boards + items: + - enum: + - gome,e143_01 # Gossen Metrawatt Profitest MF (e143_01) + - const: variscite,var-som-mx7 + - const: fsl,imx7d + - description: i.MX7ULP based Boards items: - enum: diff --git a/arch/arm/boot/dts/nxp/imx/Makefile b/arch/arm/boot/dts/nxp/imx/Makefile index a724d1a7a9a0..f0a68c715a61 100644 --- a/arch/arm/boot/dts/nxp/imx/Makefile +++ b/arch/arm/boot/dts/nxp/imx/Makefile @@ -363,6 +363,7 @@ dtb-$(CONFIG_SOC_IMX7D) += \ imx7d-colibri-iris-v2.dtb \ imx7d-flex-concentrator.dtb \ imx7d-flex-concentrator-mfg.dtb \ + imx7d-gome-e143_01.dtb \ imx7d-mba7.dtb \ imx7d-meerkat96.dtb \ imx7d-nitrogen7.dtb \ diff --git a/arch/arm/boot/dts/nxp/imx/imx7d-gome-e143_01.dts b/arch/arm/boot/dts/nxp/imx/imx7d-gome-e143_01.dts new file mode 100644 index 000000000000..6e98d34b2e54 --- /dev/null +++ b/arch/arm/boot/dts/nxp/imx/imx7d-gome-e143_01.dts @@ -0,0 +1,559 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2022 Gossen Metrawatt GmbH + * Copyright (C) 2022 Marco Felsch, Pengutronix + * Copyright (C) 2022 Philipp Zabel, Pengutronix + * Copyright (C) 2022 Roland Hieber, Pengutronix + */ +/dts-v1/; + +#include +#include +#include +#include "imx7d-var-som-mx7.dtsi" + +/ { + model = "Gossen Metrawatt Profitest MF (e143_01)"; + compatible = "gome,e143_01", "variscite,var-som-mx7", "fsl,imx7d"; + + aliases { + gpio7 = &gpio8; + rtc0 = &rtc0; + }; + + max98357a: audio-codec { + compatible = "maxim,max98357a"; + #sound-dai-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sdmode>; + sdmode-gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>; // Pin 60 AUDIO_SHDN_B + }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_keys>, <&pinctrl_gpio_keys_2>; + autorepeat; + + button-0 { + label = "S0"; + gpios = <&gpio1 12 GPIO_ACTIVE_LOW>; // Pin 183 BTN_S0_ESC + linux,code = ; + wakeup-source; + }; + + button-1 { + label = "S1"; + gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; // Pin 185 BTN_S1_MEM + linux,code = ; + wakeup-source; + }; + + button-2 { + label = "S2"; + gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; // Pin 181 BTN_S2_HLP + linux,code = ; + wakeup-source; + }; + + button-3 { + label = "S3"; + gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; // Pin 1 BTN_S3_STA + linux,code = ; + wakeup-source; + }; + + button-4 { + label = "S4"; + gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; // Pin 168 BTN_S4_IDN + linux,code = ; + wakeup-source; + }; + + button-5 { + label = "S5"; + gpios = <&gpio3 24 GPIO_ACTIVE_LOW>; // Pin 28 BTN_S5 + linux,code = ; + }; + + button-6 { + label = "S6"; + gpios = <&gpio3 5 GPIO_ACTIVE_LOW>; // Pin 40 BTN_S6 + linux,code = ; + }; + + button-7 { + label = "S7"; + gpios = <&gpio3 22 GPIO_ACTIVE_LOW>; // Pin 38 BTN_S7 + linux,code = ; + }; + + button-8 { + label = "S8"; + gpios = <&gpio3 4 GPIO_ACTIVE_LOW>; // Pin 36 BTN_S8 + linux,code = ; + }; + + button-9 { + label = "S9"; + gpios = <&gpio3 27 GPIO_ACTIVE_LOW>; // Pin 20 BTN_S9 + linux,code = ; + }; + }; + + gpio-poweroff { + compatible = "gpio-poweroff"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_poweroff>; + gpios = <&gpio7 14 GPIO_ACTIVE_LOW>; // Pin 7 POWER_OFF_B + input; + }; + + iio-hwmon { + compatible = "iio-hwmon"; + io-channels = <&adc2 0>, // ARS_VAL + <&adc2 1>, // VBAT_VAL + <&adc2 2>, // LCD_BACKLIGHT_VAL + <&adc2 3>; // VCC_5V0_FB + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_debug_led>; + + test-led-1 { + label = "test-led-1:red"; + gpios = <&gpio3 2 GPIO_ACTIVE_LOW>; // Pin 44 LED_TEST1_B + color = ; + linux,default-trigger = "disk-activity"; + }; + + test-led-2 { + label = "test-led-2:red"; + gpios = <&gpio3 3 GPIO_ACTIVE_LOW>; // Pin 46 LED_TEST2_B + color = ; + linux,default-trigger = "heartbeat"; + }; + }; + + leds2 { + compatible = "gpio-leds"; + + led_netz_gn { + label = "mains:green"; + gpios = <&gpio8 9 GPIO_ACTIVE_LOW>; // LED_NETZ_GN + color = ; + }; + + led_netz_rt { + label = "mains:red"; + gpios = <&gpio8 8 GPIO_ACTIVE_LOW>; // LED_NETZ_RT + color = ; + default-state = "on"; + }; + + led_debug_gn { + label = "debug:green"; + gpios = <&gpio8 0 GPIO_ACTIVE_LOW>; // LED_DEBUG_GN + color = ; + }; + + led_debug_rt { + label = "debug:red"; + gpios = <&gpio8 1 GPIO_ACTIVE_LOW>; // LED_DEBUG_RT + color = ; + }; + + led_ul_gn { + label = "ulrl:green"; + gpios = <&gpio8 2 GPIO_ACTIVE_LOW>; // LED_UL_GN + color = ; + }; + + led_ul_rt { + label = "ulrl:red"; + gpios = <&gpio8 6 GPIO_ACTIVE_LOW>; // LED_UL_RT + color = ; + default-state = "on"; + }; + + led_rcd_gn { + label = "rcd:green"; + gpios = <&gpio8 3 GPIO_ACTIVE_LOW>; // LED_RCD_GN + color = ; + }; + + led_rcd_rt { + label = "rcd:red"; + gpios = <&gpio8 7 GPIO_ACTIVE_LOW>; // LED_RCD_RT + color = ; + default-state = "on"; + }; + }; + + reg_vled_backlight: regulator-vled-backlight { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mipi_backlight>; + regulator-name = "VLED_BACKLIGHT"; + gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>; + regulator-min-microvolt = <20000000>; + regulator-max-microvolt = <20000000>; + enable-active-high; + }; + + reg_vcc_3v3_per: regulator-vcc-3v3-per { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_reg_vcc_3v3_per>; + regulator-name = "VCC_3V3_PER"; + gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>; // Pin 83 VCC_3V3_PER_EN + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <30000>; + enable-active-high; + regulator-always-on; + }; + + reg_vcc_5v0_per: regulator-vcc-5v0-per { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_reg_vcc_5v0_per>; + regulator-name = "VCC_5V0_PER"; + gpio = <&gpio2 29 GPIO_ACTIVE_HIGH>; // Pin 75 VCC_5V0_PER_EN + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + }; + + reg_imt: regulator-imt { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_reg_imt>; + regulator-name = "VCC_IMT"; + gpio = <&gpio3 10 GPIO_ACTIVE_HIGH>; // Pin 66 MT_EN + regulator-min-microvolt = <9000000>; + regulator-max-microvolt = <9000000>; + enable-active-high; + }; + + reg_vcc_1v8_alg: regulator-vcc-1v8-alg { + compatible = "regulator-fixed"; + regulator-name = "VCC_1V8_ALG"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <®_vcc_3v3_per>; + }; + + sound { + compatible = "simple-audio-card"; + simple-audio-card,name = "max98357aaudio"; + /delete-property/ simple-audio-card,widgets; + /delete-property/ simple-audio-card,routing; + simple-audio-card,format = "i2s"; + + simple-audio-card,cpu { + sound-dai = <&sai3>; + }; + + simple-audio-card,codec { + sound-dai = <&max98357a>; + }; + }; + + uc-imt-power { + compatible = "reg-userspace-consumer"; + regulator-name = "reg_imt-consumer"; + regulator-supplies = "vcc"; + vcc-supply = <®_imt>; + }; +}; + +&adc2 { + status = "okay"; +}; + +&fec1 { + status = "okay"; +}; + +&i2c2 { + /delete-node/ wm8731@1a; + + /* DS1339 RTC module */ + rtc0: rtc@68 { + compatible = "dallas,ds1339"; + reg = <0x68>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rtc>; + trickle-resistor-ohms = <250>; + interrupt-parent = <&gpio1>; + interrupts = <13 GPIO_ACTIVE_LOW>; // Pin 120 RTC_INT_B + wakeup-source; + }; +}; + +&i2c4 { + clock-frequency = <400000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c4>; + pinctrl-1 = <&pinctrl_i2c4_gpio>; + scl-gpios = <&gpio4 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; // Pin 175 I2C4_SCL + sda-gpios = <&gpio4 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; // Pin 173 I2C4_SDA + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + gpio8: max7312@23 { + compatible = "maxim,max7312"; + reg = <0x23>; + gpio-controller; + #gpio-cells = <2>; + gpio-line-names = "LED_DEBUG_GN", "LED_DEBUG_RT", "LED_UL_GN", "LED_RCD_GN", + "", "", "LED_UL_RT", "LED_RCD_RT", + "LED_NETZ_RT", "LED_NETZ_GN", "", "", + "DP_HW_CODE_1", "DP_HW_CODE_2", "DP_HW_CODE_3", "DP_HW_CODE_4"; + vcc-supply = <®_vcc_3v3_per>; + }; +}; + +&gpio1 { + gpio-line-names = "GWDOG_RST_B", "BTN_S3_STA", "BTN_S4_IDN", "", + "", "", "", "USB_HOST_PWR_EN", + "", "", "BTN_S2_HLP", "BTN_S1_MEM", + "BTN_S0_ESC", "RTC_INT_B", "SOM: bt reg on"; +}; + +&gpio2 { + gpio-line-names = "", "", "", "", + "DBG_GPIO1", "DBG_GPIO2", "DBG_GPIO3", "DBG_GPIO4", + "", "", "", "", + "MT_RXD", "MT_TXD", "", "", + "", "", "", "", + "", "", "", "", + "", "", "VCC_3V3_PER_EN", "", + "DSI_RESET", "VCC_5V0_PER_EN"; +}; + +&gpio3 { + gpio-line-names = "", "", "LED_TEST1_B", "LED_TEST2_B", + "BTN_S8", "BTN_S6", "MT_RESET", "", + "", "", "MT_EN", "", + "", "", "", "", + "", "", "", "", + "AUDIO_SHDN_B", "", "BTN_S7", "", + "BTN_S5", "", "", "BTN_S9", + "BATT_LOW"; +}; + +&gpio4 { + gpio-line-names = "", "", "", "", + "", "", "", "", + "I2C1_SCL", "I2C1_SDA", "I2C2_SCL", "I2C2_SDA", + "", "", "I2C4_SCL", "I2C4_SDA", + "", "", "", "", + "", "", "", "HIL_SPI_CS0"; +}; + +&gpio5 { + gpio-line-names = "", "", "", "", + "", "", "", "", + "", "", "", "SOM: ethphy0 reset"; +}; + +&gpio6 { + gpio-line-names = "", "", "", "", + "", "", "", "", + "", "", "", "SOM: sd3_pwr (eMMC)"; +}; + +&gpio7 { + gpio-line-names = "", "", "", "", + "", "", "", "", + "", "", "", "", + "LCD_BACKLIGHT_EN", "", "POWER_OFF_B"; +}; + +&lcdif { + assigned-clocks = <&clks IMX7D_LCDIF_PIXEL_ROOT_SRC>, + <&clks IMX7D_PLL_VIDEO_POST_DIV>; + assigned-clock-parents = <&clks IMX7D_PLL_VIDEO_POST_DIV>; + assigned-clock-rates = <0>, <128000000>; + status = "okay"; +}; + +&mipi_dsi { + samsung,burst-clock-frequency = <850000000>; + status = "okay"; + + panel@0 { + compatible = "tianma,tm050jdhg33", "ilitek,ili9881c"; + reg = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mipi_panel>; + reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; // Pin 73 DSI_RESET + power-supply = <®_vcc_3v3_per>; + dsi-lanes = <2>; + + rotation = <90>; + + ilitek,enable-internal-backlight; + default-brightness = <2047>; + ilitek,pwm-frequency = <50000>; + ilitek,backlight-supply = <®_vled_backlight>; + }; +}; + +&sai3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sai3>; + assigned-clocks = <&clks IMX7D_SAI3_ROOT_SRC>, + <&clks IMX7D_SAI3_ROOT_CLK>; + assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>; + assigned-clock-rates = <0>, <36864000>; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + status = "okay"; +}; + +&uart7 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart7>; + status = "okay"; +}; + +&usbotg1 { + dr_mode = "peripheral"; + status = "okay"; +}; + +&usbotg2 { + status = "okay"; +}; + +&iomuxc_lpsr { + pinctrl_gpio_keys_2: pinctrl_gpio_keys_2grp { + fsl,pins = < + MX7D_PAD_LPSR_GPIO1_IO01__GPIO1_IO1 0x0C + MX7D_PAD_LPSR_GPIO1_IO02__GPIO1_IO2 0x0C + >; + }; + + pinctrl_usbotg2_pwr: pinctrl_usbotg2_pwrgrp { + fsl,pins = < + MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7 0x14 + >; + }; +}; + +&iomuxc { + pinctrl_gpio_keys: pinctrl-gpio-keysgrp { + fsl,pins = < + MX7D_PAD_GPIO1_IO10__GPIO1_IO10 0x0000000C + MX7D_PAD_GPIO1_IO11__GPIO1_IO11 0x0000000C + MX7D_PAD_GPIO1_IO12__GPIO1_IO12 0x0000000C + MX7D_PAD_LCD_DATA00__GPIO3_IO5 0x0000000C + MX7D_PAD_LCD_DATA17__GPIO3_IO22 0x0000000C + MX7D_PAD_LCD_DATA19__GPIO3_IO24 0x0000000C + MX7D_PAD_LCD_DATA22__GPIO3_IO27 0x0000000C + MX7D_PAD_LCD_RESET__GPIO3_IO4 0x0000000C + >; + }; + + pinctrl_i2c4: i2c4grp { + fsl,pins = < + MX7D_PAD_I2C4_SCL__I2C4_SCL 0x4000007f + MX7D_PAD_I2C4_SDA__I2C4_SDA 0x4000007f + >; + }; + + pinctrl_i2c4_gpio: i2c4-gpiogrp { + fsl,pins = < + MX7D_PAD_I2C4_SCL__GPIO4_IO14 0x4000007f + MX7D_PAD_I2C4_SDA__GPIO4_IO15 0x4000007f + >; + }; + + pinctrl_mipi_backlight: mipi-backlightgrp { + fsl,pins = < + MX7D_PAD_ENET1_TX_CLK__GPIO7_IO12 0x0000001B + >; + }; + + pinctrl_mipi_panel: mipi-panelgrp { + fsl,pins = < + MX7D_PAD_EPDC_BDR0__GPIO2_IO28 0x0000001B /* DSI_RESET */ + >; + }; + + pinctrl_poweroff: pinctrl_poweroffgrp { + fsl,pins = < + MX7D_PAD_ENET1_CRS__GPIO7_IO14 0x0000001B + >; + }; + + pinctrl_reg_vcc_3v3_per: pinctrl_reg_vcc_3v3_pergrp { + fsl,pins = < + MX7D_PAD_EPDC_GDRL__GPIO2_IO26 0x0000001B + >; + }; + + pinctrl_reg_vcc_5v0_per: pinctrl_reg_vcc_5v0_pergrp { + fsl,pins = < + MX7D_PAD_EPDC_BDR1__GPIO2_IO29 0x0000001B + >; + }; + + pinctrl_reg_imt: pinctrl_reg_imtgrp { + fsl,pins = < + MX7D_PAD_LCD_DATA05__GPIO3_IO10 0x0000001B + >; + }; + + pinctrl_rtc: pinctrl_rtcgrp { + fsl,pins = < + MX7D_PAD_GPIO1_IO13__GPIO1_IO13 0x0000001B + >; + }; + + pinctrl_sai3: pinctrl_sai3grp { + fsl,pins = < + MX7D_PAD_SD1_DATA1__SAI3_TX_BCLK 0x0000001F + MX7D_PAD_SD1_DATA2__SAI3_TX_SYNC 0x0000001F + MX7D_PAD_SD1_DATA3__SAI3_TX_DATA0 0x00000030 + >; + }; + + pinctrl_sdmode: pinctrl_sdmodegrp { + fsl,pins = < + MX7D_PAD_LCD_DATA15__GPIO3_IO20 0x0000001F + >; + }; + + pinctrl_uart1: uart1grp { + fsl,pins = < + MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX 0x79 /* DEBUG_UART1_TXD */ + MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX 0x79 /* DEBUG_UART1_RXD */ + >; + }; + + pinctrl_uart7: uart7grp { + fsl,pins = < + MX7D_PAD_EPDC_DATA12__UART7_DCE_RX 0x79 + MX7D_PAD_EPDC_DATA13__UART7_DCE_TX 0x79 + >; + }; + + pinctrl_debug_led: pinctrl_debug_ledgrp { + fsl,pins = < + MX7D_PAD_LCD_HSYNC__GPIO3_IO2 0x00000003 + MX7D_PAD_LCD_VSYNC__GPIO3_IO3 0x00000003 + >; + }; +};