From patchwork Mon Nov 27 01:35:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: JeeHeng Sia X-Patchwork-Id: 169939 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:ce62:0:b0:403:3b70:6f57 with SMTP id o2csp2788611vqx; Sun, 26 Nov 2023 17:36:36 -0800 (PST) X-Google-Smtp-Source: AGHT+IEINDF720i/glXWdCgsK7avaFwUhmS03PgsxiXBY43GZcKhJX1sdDd8AqQ8h7X3TYN75l74 X-Received: by 2002:a05:6a00:1387:b0:6cb:68d7:b1bc with SMTP id t7-20020a056a00138700b006cb68d7b1bcmr9492527pfg.30.1701048996553; Sun, 26 Nov 2023 17:36:36 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1701048996; cv=none; d=google.com; s=arc-20160816; b=lXOJ3vFdfyktA57JiwoMB7ui4dy1olyHDEQoS7i0hGkeEgrhQ/MQGqKHr4om/+J+rE VjlRV6PzjlOEG2nA7tG+/K+pLI24xtKriH4Dc3LGLTUuvnWEonLw70sEDPXSFEVedBuR HpVqSJ1V6l/ZZGFDNQFY8ofn1aRoEQd4ElYAszycafIqogdQOdGzQTTENgvWLcKE5OOp 9B7Di29kh9JzntaK8k4b4REzyN3tMfRSfP6ha4tilFvULLUqHhe4vlgJmToKP9RAxglk yjV6hJwZ9drtwSDxKoRY5px+Ka3MrPAKZaDUWz6FClYZPw+XcsEmDgmypYfiYROQZsEL XMtA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=weu+vTpLRMJfHgfqJEFYtxQwLd/3RSLiHPFTLdTkp9g=; fh=NwY0g3O8p+TEjJRhPyjQLQ8C7jChqXBBckF6d4Husj0=; b=hDx3LIAYrkLN+Es9a11fKm37dg7rXEDACvtRSsO8vl99odVDJWG3UMwiXA94+yZ31f kO0/EjEZLaoi13OA/UW4gC0mCBH8a8wqXH65C+EvE/UWhzqfKJsHXgJvgimM2iTDkdcn BIlnSgMcVUBDnqnl+Qho0mgrdZRP2xwchczwiF7OotCoiz+vppywBUQnrCoCqMNTLw1p e3b8o7i+A7bUMoEyc6q3E3MeX+kOsFvlKeHYAo2iR2yToZ1sJ/tBZOn5k8zGpF2invIg m7amIqzCn+idjGSIV8JwIt0Ss2JQs4InlpasD4W6EZq4QQXRHtejtQXOfoudUt+Gp2ZJ 0QjQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.33 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from lipwig.vger.email (lipwig.vger.email. [23.128.96.33]) by mx.google.com with ESMTPS id ay26-20020a056a00301a00b006cc95945895si3398626pfb.347.2023.11.26.17.36.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 26 Nov 2023 17:36:36 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.33 as permitted sender) client-ip=23.128.96.33; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.33 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by lipwig.vger.email (Postfix) with ESMTP id 09582806E3CC; Sun, 26 Nov 2023 17:36:33 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at lipwig.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231338AbjK0BgV convert rfc822-to-8bit (ORCPT + 99 others); Sun, 26 Nov 2023 20:36:21 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34990 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231230AbjK0BgS (ORCPT ); Sun, 26 Nov 2023 20:36:18 -0500 Received: from fd01.gateway.ufhost.com (fd01.gateway.ufhost.com [61.152.239.71]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0601811B for ; Sun, 26 Nov 2023 17:36:19 -0800 (PST) Received: from EXMBX166.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX166", Issuer "EXMBX166" (not verified)) by fd01.gateway.ufhost.com (Postfix) with ESMTP id BE7CB24DC0A; Mon, 27 Nov 2023 09:36:15 +0800 (CST) Received: from EXMBX066.cuchost.com (172.16.7.66) by EXMBX166.cuchost.com (172.16.6.76) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Mon, 27 Nov 2023 09:36:16 +0800 Received: from jsia-virtual-machine.localdomain (202.188.176.82) by EXMBX066.cuchost.com (172.16.6.66) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Mon, 27 Nov 2023 09:36:11 +0800 From: Sia Jee Heng To: , , , , , , CC: , , , Subject: [PATCH 1/7] dt-bindings: riscv: Add StarFive Dubhe compatibles Date: Mon, 27 Nov 2023 09:35:56 +0800 Message-ID: <20231127013602.253835-2-jeeheng.sia@starfivetech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231127013602.253835-1-jeeheng.sia@starfivetech.com> References: <20231127013602.253835-1-jeeheng.sia@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [202.188.176.82] X-ClientProxiedBy: EXCAS066.cuchost.com (172.16.6.26) To EXMBX066.cuchost.com (172.16.6.66) X-YovoleRuleAgent: yovoleflag X-Spam-Status: No, score=-0.8 required=5.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lipwig.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (lipwig.vger.email [0.0.0.0]); Sun, 26 Nov 2023 17:36:33 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1783679152887299652 X-GMAIL-MSGID: 1783679152887299652 Dubhe-80 and Dubhe-90 are RISC-V cpu core from StarFive Technology. Signed-off-by: Sia Jee Heng Reviewed-by: Ley Foon Tan --- Documentation/devicetree/bindings/riscv/cpus.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml index f392e367d673..493972b29a22 100644 --- a/Documentation/devicetree/bindings/riscv/cpus.yaml +++ b/Documentation/devicetree/bindings/riscv/cpus.yaml @@ -48,6 +48,8 @@ properties: - thead,c906 - thead,c910 - thead,c920 + - starfive,dubhe-80 + - starfive,dubhe-90 - const: riscv - items: - enum: From patchwork Mon Nov 27 01:35:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: JeeHeng Sia X-Patchwork-Id: 169940 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:ce62:0:b0:403:3b70:6f57 with SMTP id o2csp2788697vqx; Sun, 26 Nov 2023 17:36:48 -0800 (PST) X-Google-Smtp-Source: AGHT+IEBt7IFApg2f3WCWim6a9A8XhfP4HVDe6dwIfK2eU3dy4EQVlWF2YZ6SpQoqoy3W8UZwGiO X-Received: by 2002:a9d:6d88:0:b0:6d7:f602:ab67 with SMTP id x8-20020a9d6d88000000b006d7f602ab67mr9228777otp.9.1701049007877; Sun, 26 Nov 2023 17:36:47 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1701049007; cv=none; d=google.com; s=arc-20160816; b=BqgogA2+EwV365wDRl7DH9tfSrAbBWhQqeNw//MMNqSOLWUSPC2JH8o7HLYfrTPn97 0r+4QGfbVqq6vyYdmEcTZBo+/rYMHGCCWqQ8uISYVXWptmXALBWN5keJy0Y4Dqp7hCOO 7F0QFRn+qGuIuLxhXLuggbe6daaQcIRYYDtezoWX9Srwn5qdRKvjyA10e6k4m2uOYpsA 0RSTHtyEso4a69CN08V3jnLuCiokCHjVzPkh/FOEgXCAVuwkfjlH5Gx1t4th00VQLd34 nzGtJno+hTQ5ofA+VuEqZvcD64m+/gy/wQE1u/Rt2AGDJBtnKxF7bk/MTNuP6PKXOhpB 050g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=/0rRonxwbcNItJNVfhsHdmlatsZortLIUKF3UyuM33c=; fh=NwY0g3O8p+TEjJRhPyjQLQ8C7jChqXBBckF6d4Husj0=; b=XcOj+I+lm/KhwGIxQVOyoYwEjVeFybHPGXkdpD2Ce4amD2rsKI3jYIiIkE+2nKun9N F+oiXV11gYL5FZRUkOyjRI/mMU7odHqvUOEH5Y7Bc0HF+nDiUdFhwWBL8855C+aTOPXL y/+pD5Ch8/XCIoOaoo7Eq2AasN3u4//owiogxfXieMKDVxDvkDP/wn8P/Q+S3zvGhUoi k1ngBmZePa1paZlnpw+QG1ViAFCiECGflgoxP0aH/rshil/1kfemCg7U19Vb3bOKT60S l0h1BEtXWycQQfky8N1zobGRiF8gyM+GBzYYrgxvvBsx/eQG2d6IxGJNrHuRDdybJ3ce yWdg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:5 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from groat.vger.email (groat.vger.email. [2620:137:e000::3:5]) by mx.google.com with ESMTPS id n25-20020a635919000000b005c1ce3c9628si8490574pgb.752.2023.11.26.17.36.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 26 Nov 2023 17:36:47 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:5 as permitted sender) client-ip=2620:137:e000::3:5; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:5 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by groat.vger.email (Postfix) with ESMTP id 223498086513; Sun, 26 Nov 2023 17:36:39 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at groat.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231387AbjK0BgX convert rfc822-to-8bit (ORCPT + 99 others); Sun, 26 Nov 2023 20:36:23 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35022 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231281AbjK0BgS (ORCPT ); Sun, 26 Nov 2023 20:36:18 -0500 Received: from ex01.ufhost.com (ex01.ufhost.com [61.152.239.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 14284119 for ; Sun, 26 Nov 2023 17:36:23 -0800 (PST) Received: from EXMBX166.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX166", Issuer "EXMBX166" (not verified)) by ex01.ufhost.com (Postfix) with ESMTP id 50CEC24E2AC; Mon, 27 Nov 2023 09:36:20 +0800 (CST) Received: from EXMBX066.cuchost.com (172.16.7.66) by EXMBX166.cuchost.com (172.16.6.76) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Mon, 27 Nov 2023 09:36:20 +0800 Received: from jsia-virtual-machine.localdomain (202.188.176.82) by EXMBX066.cuchost.com (172.16.6.66) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Mon, 27 Nov 2023 09:36:16 +0800 From: Sia Jee Heng To: , , , , , , CC: , , , Subject: [PATCH 2/7] dt-bindings: riscv: Add StarFive JH8100 SoC Date: Mon, 27 Nov 2023 09:35:57 +0800 Message-ID: <20231127013602.253835-3-jeeheng.sia@starfivetech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231127013602.253835-1-jeeheng.sia@starfivetech.com> References: <20231127013602.253835-1-jeeheng.sia@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [202.188.176.82] X-ClientProxiedBy: EXCAS066.cuchost.com (172.16.6.26) To EXMBX066.cuchost.com (172.16.6.66) X-YovoleRuleAgent: yovoleflag X-Spam-Status: No, score=-0.8 required=5.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on groat.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (groat.vger.email [0.0.0.0]); Sun, 26 Nov 2023 17:36:39 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1783679164287032769 X-GMAIL-MSGID: 1783679164287032769 Add device tree bindings for the StarFive JH8100 RISC-V SoC Signed-off-by: Sia Jee Heng Reviewed-by: Ley Foon Tan --- Documentation/devicetree/bindings/riscv/starfive.yaml | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/riscv/starfive.yaml b/Documentation/devicetree/bindings/riscv/starfive.yaml index cc4d92f0a1bf..7e2da9eef3db 100644 --- a/Documentation/devicetree/bindings/riscv/starfive.yaml +++ b/Documentation/devicetree/bindings/riscv/starfive.yaml @@ -29,7 +29,10 @@ properties: - starfive,visionfive-2-v1.2a - starfive,visionfive-2-v1.3b - const: starfive,jh7110 - + - items: + - enum: + - starfive,jh8100-evb + - const: starfive,jh8100 additionalProperties: true ... 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Sun, 26 Nov 2023 20:36:19 -0500 Received: from fd01.gateway.ufhost.com (fd01.gateway.ufhost.com [61.152.239.71]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 20A6611D for ; Sun, 26 Nov 2023 17:36:26 -0800 (PST) Received: from EXMBX166.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX166", Issuer "EXMBX166" (not verified)) by fd01.gateway.ufhost.com (Postfix) with ESMTP id C8BE224DC65; Mon, 27 Nov 2023 09:36:24 +0800 (CST) Received: from EXMBX066.cuchost.com (172.16.7.66) by EXMBX166.cuchost.com (172.16.6.76) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Mon, 27 Nov 2023 09:36:25 +0800 Received: from jsia-virtual-machine.localdomain (202.188.176.82) by EXMBX066.cuchost.com (172.16.6.66) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Mon, 27 Nov 2023 09:36:20 +0800 From: Sia Jee Heng To: , , , , , , CC: , , , Subject: [PATCH 3/7] dt-bindings: timer: Add StarFive JH8100 clint Date: Mon, 27 Nov 2023 09:35:58 +0800 Message-ID: <20231127013602.253835-4-jeeheng.sia@starfivetech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231127013602.253835-1-jeeheng.sia@starfivetech.com> References: <20231127013602.253835-1-jeeheng.sia@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [202.188.176.82] X-ClientProxiedBy: EXCAS066.cuchost.com (172.16.6.26) To EXMBX066.cuchost.com (172.16.6.66) X-YovoleRuleAgent: yovoleflag X-Spam-Status: No, score=-0.8 required=5.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lipwig.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (lipwig.vger.email [0.0.0.0]); Sun, 26 Nov 2023 17:37:00 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1783679180167634247 X-GMAIL-MSGID: 1783679180167634247 Add compatible string for the StarFive JH8100 clint Signed-off-by: Sia Jee Heng Reviewed-by: Ley Foon Tan --- Documentation/devicetree/bindings/timer/sifive,clint.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/timer/sifive,clint.yaml b/Documentation/devicetree/bindings/timer/sifive,clint.yaml index e8be6c470364..01254261e156 100644 --- a/Documentation/devicetree/bindings/timer/sifive,clint.yaml +++ b/Documentation/devicetree/bindings/timer/sifive,clint.yaml @@ -33,6 +33,7 @@ properties: - sifive,fu540-c000-clint # SiFive FU540 - starfive,jh7100-clint # StarFive JH7100 - starfive,jh7110-clint # StarFive JH7110 + - starfive,jh8100-clint # StarFive JH8100 - const: sifive,clint0 # SiFive CLINT v0 IP block - items: - enum: From patchwork Mon Nov 27 01:35:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: JeeHeng Sia X-Patchwork-Id: 169943 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:ce62:0:b0:403:3b70:6f57 with SMTP id o2csp2788855vqx; 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Sun, 26 Nov 2023 17:37:04 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1783679184467925305 X-GMAIL-MSGID: 1783679184467925305 Add starfive,jh8100-uart compatible string Signed-off-by: Sia Jee Heng Reviewed-by: Ley Foon Tan --- Documentation/devicetree/bindings/serial/cdns,uart.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/serial/cdns,uart.yaml b/Documentation/devicetree/bindings/serial/cdns,uart.yaml index e35ad1109efc..254373cb1ac7 100644 --- a/Documentation/devicetree/bindings/serial/cdns,uart.yaml +++ b/Documentation/devicetree/bindings/serial/cdns,uart.yaml @@ -20,6 +20,9 @@ properties: items: - const: xlnx,zynqmp-uart - const: cdns,uart-r1p12 + - description: UART controller for StarFive JH8100 SoC + items: + - const: starfive,jh8100-uart reg: maxItems: 1 From patchwork Mon Nov 27 01:36:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: JeeHeng Sia X-Patchwork-Id: 169944 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:ce62:0:b0:403:3b70:6f57 with SMTP id o2csp2788897vqx; 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Sun, 26 Nov 2023 20:36:40 -0500 Received: from fd01.gateway.ufhost.com (fd01.gateway.ufhost.com [61.152.239.71]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CABF610C3 for ; Sun, 26 Nov 2023 17:36:39 -0800 (PST) Received: from EXMBX165.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX165", Issuer "EXMBX165" (not verified)) by fd01.gateway.ufhost.com (Postfix) with ESMTP id 338E27FFB; Mon, 27 Nov 2023 09:36:38 +0800 (CST) Received: from EXMBX066.cuchost.com (172.16.7.66) by EXMBX165.cuchost.com (172.16.6.75) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Mon, 27 Nov 2023 09:36:37 +0800 Received: from jsia-virtual-machine.localdomain (202.188.176.82) by EXMBX066.cuchost.com (172.16.6.66) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Mon, 27 Nov 2023 09:36:34 +0800 From: Sia Jee Heng To: , , , , , , CC: , , , Subject: [PATCH 6/7] serial: xilinx_uartps: Add new compatible string for StarFive Date: Mon, 27 Nov 2023 09:36:01 +0800 Message-ID: <20231127013602.253835-7-jeeheng.sia@starfivetech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231127013602.253835-1-jeeheng.sia@starfivetech.com> References: <20231127013602.253835-1-jeeheng.sia@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [202.188.176.82] X-ClientProxiedBy: EXCAS066.cuchost.com (172.16.6.26) To EXMBX066.cuchost.com (172.16.6.66) X-YovoleRuleAgent: yovoleflag X-Spam-Status: No, score=-0.8 required=5.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lipwig.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (lipwig.vger.email [0.0.0.0]); Sun, 26 Nov 2023 17:37:17 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1783679197616621383 X-GMAIL-MSGID: 1783679197616621383 This patch adds the new compatible string for StarFive JH8100 SoC Signed-off-by: Sia Jee Heng Reviewed-by: Ley Foon Tan --- drivers/tty/serial/xilinx_uartps.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/tty/serial/xilinx_uartps.c b/drivers/tty/serial/xilinx_uartps.c index 66a45a634158..170901c143c2 100644 --- a/drivers/tty/serial/xilinx_uartps.c +++ b/drivers/tty/serial/xilinx_uartps.c @@ -1210,7 +1210,7 @@ OF_EARLYCON_DECLARE(cdns, "xlnx,xuartps", cdns_early_console_setup); OF_EARLYCON_DECLARE(cdns, "cdns,uart-r1p8", cdns_early_console_setup); OF_EARLYCON_DECLARE(cdns, "cdns,uart-r1p12", cdns_early_console_setup); OF_EARLYCON_DECLARE(cdns, "xlnx,zynqmp-uart", cdns_early_console_setup); - +OF_EARLYCON_DECLARE(cdns, "starfive,jh8100-uart", cdns_early_console_setup); /* Static pointer to console port */ static struct uart_port *console_port; @@ -1448,6 +1448,7 @@ static const struct of_device_id cdns_uart_of_match[] = { { .compatible = "cdns,uart-r1p8", }, { .compatible = "cdns,uart-r1p12", .data = &zynqmp_uart_def }, { .compatible = "xlnx,zynqmp-uart", .data = &zynqmp_uart_def }, + { .compatible = "starfive,jh8100-uart", }, {} }; MODULE_DEVICE_TABLE(of, cdns_uart_of_match); From patchwork Mon Nov 27 01:36:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: JeeHeng Sia X-Patchwork-Id: 169945 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:ce62:0:b0:403:3b70:6f57 with SMTP id o2csp2788908vqx; Sun, 26 Nov 2023 17:37:22 -0800 (PST) X-Google-Smtp-Source: AGHT+IEx8Mdk2+i2a43vCgwffKMM1ve0n5ShdG+6Cp4bq7zuf2iqB9fJQ/DCpsY/QgYnb7aQMdj4 X-Received: by 2002:a17:902:c408:b0:1cf:ad33:61b with SMTP id k8-20020a170902c40800b001cfad33061bmr8712454plk.39.1701049042023; Sun, 26 Nov 2023 17:37:22 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1701049042; 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Sun, 26 Nov 2023 20:36:47 -0500 Received: from ex01.ufhost.com (ex01.ufhost.com [61.152.239.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0699A19A8 for ; Sun, 26 Nov 2023 17:36:43 -0800 (PST) Received: from EXMBX166.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX166", Issuer "EXMBX166" (not verified)) by ex01.ufhost.com (Postfix) with ESMTP id B105724E2C0; Mon, 27 Nov 2023 09:36:42 +0800 (CST) Received: from EXMBX066.cuchost.com (172.16.7.66) by EXMBX166.cuchost.com (172.16.6.76) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Mon, 27 Nov 2023 09:36:43 +0800 Received: from jsia-virtual-machine.localdomain (202.188.176.82) by EXMBX066.cuchost.com (172.16.6.66) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Mon, 27 Nov 2023 09:36:38 +0800 From: Sia Jee Heng To: , , , , , , CC: , , , Subject: [PATCH 7/7] riscv: dts: starfive: Add initial StarFive JH8100 device tree Date: Mon, 27 Nov 2023 09:36:02 +0800 Message-ID: <20231127013602.253835-8-jeeheng.sia@starfivetech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231127013602.253835-1-jeeheng.sia@starfivetech.com> References: <20231127013602.253835-1-jeeheng.sia@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [202.188.176.82] X-ClientProxiedBy: EXCAS066.cuchost.com (172.16.6.26) To EXMBX066.cuchost.com (172.16.6.66) X-YovoleRuleAgent: yovoleflag X-Spam-Status: No, score=-0.8 required=5.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lipwig.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (lipwig.vger.email [0.0.0.0]); Sun, 26 Nov 2023 17:37:18 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1783679200241971647 X-GMAIL-MSGID: 1783679200241971647 Add initial device tree for the StarFive JH8100 RISC-V SoC Signed-off-by: Sia Jee Heng Reviewed-by: Ley Foon Tan --- arch/riscv/boot/dts/starfive/Makefile | 1 + arch/riscv/boot/dts/starfive/jh8100-evb.dts | 42 +++ arch/riscv/boot/dts/starfive/jh8100.dtsi | 365 ++++++++++++++++++++ 3 files changed, 408 insertions(+) create mode 100644 arch/riscv/boot/dts/starfive/jh8100-evb.dts create mode 100644 arch/riscv/boot/dts/starfive/jh8100.dtsi diff --git a/arch/riscv/boot/dts/starfive/Makefile b/arch/riscv/boot/dts/starfive/Makefile index 0141504c0f5c..fbb0dc619102 100644 --- a/arch/riscv/boot/dts/starfive/Makefile +++ b/arch/riscv/boot/dts/starfive/Makefile @@ -10,3 +10,4 @@ dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-starfive-visionfive-v1.dtb dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-v1.2a.dtb dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-v1.3b.dtb +dtb-$(CONFIG_ARCH_STARFIVE) += jh8100-evb.dtb diff --git a/arch/riscv/boot/dts/starfive/jh8100-evb.dts b/arch/riscv/boot/dts/starfive/jh8100-evb.dts new file mode 100644 index 000000000000..67c4964a8773 --- /dev/null +++ b/arch/riscv/boot/dts/starfive/jh8100-evb.dts @@ -0,0 +1,42 @@ +// SPDX-License-Identifier: GPL-2.0 OR MIT +/* + * Copyright (c) 2021-2023 StarFive Technology Co., Ltd. + */ + +#include "jh8100.dtsi" + +/ { + model = "StarFive JH8100 EVB"; + compatible = "starfive,jh8100-evb", "starfive,jh8100"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + cpus { + timebase-frequency = <4000000>; + + }; + + memory { + device_type = "memory"; + reg = <0x0 0x40000000 0x2 0x00000000>; /* 8GB */ + }; + + soc { + clk_uart: clk_uart { + compatible = "fixed-clock"; /* Initial clock handler for UART */ + #clock-cells = <0>; + clock-frequency = <24000000>; + }; + }; +}; + +&uart0 { + status = "okay"; + clocks = <&clk_uart>, <&clk_uart>; +}; diff --git a/arch/riscv/boot/dts/starfive/jh8100.dtsi b/arch/riscv/boot/dts/starfive/jh8100.dtsi new file mode 100644 index 000000000000..1b338d4cb985 --- /dev/null +++ b/arch/riscv/boot/dts/starfive/jh8100.dtsi @@ -0,0 +1,365 @@ +// SPDX-License-Identifier: GPL-2.0 OR MIT +/* + * Copyright (c) 2021-2023 StarFive Technology Co., Ltd. + */ + +/dts-v1/; + +/ { + compatible = "starfive,jh8100"; + #address-cells = <2>; + #size-cells = <2>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: cpu@0 { + compatible = "starfive,dubhe-80", "riscv"; + capacity-dmips-mhz = <768>; + d-cache-block-size = <64>; + d-cache-sets = <512>; + d-cache-size = <32768>; + d-tlb-sets = <1>; + d-tlb-size = <48>; + device_type = "cpu"; + i-cache-block-size = <64>; + i-cache-sets = <512>; + i-cache-size = <32768>; + i-tlb-sets = <1>; + i-tlb-size = <48>; + mmu-type = "riscv,sv48"; + next-level-cache = <&l2c0>; + reg = <0x0>; + riscv,isa = "rv64imafdch"; + riscv,isa-base = "rv64i"; + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "h", "zicntr", + "zicsr", "zifencei", "zihintpause", "zihpm", + "zba", "zbb", "zbs", "sscofpmf"; + tlb-split; + + cpu0_intc: interrupt-controller { + compatible = "riscv,cpu-intc"; + interrupt-controller; + #interrupt-cells = <1>; + }; + }; + + cpu1: cpu@1 { + compatible = "starfive,dubhe-80", "riscv"; + capacity-dmips-mhz = <768>; + d-cache-block-size = <64>; + d-cache-sets = <512>; + d-cache-size = <32768>; + d-tlb-sets = <1>; + d-tlb-size = <48>; + device_type = "cpu"; + i-cache-block-size = <64>; + i-cache-sets = <512>; + i-cache-size = <32768>; + i-tlb-sets = <1>; + i-tlb-size = <48>; + mmu-type = "riscv,sv48"; + next-level-cache = <&l2c1>; + reg = <0x1>; + riscv,isa = "rv64imafdch"; + riscv,isa-base = "rv64i"; + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "h", "zicntr", + "zicsr", "zifencei", "zihintpause", "zihpm", + "zba", "zbb", "zbs", "sscofpmf"; + tlb-split; + + cpu1_intc: interrupt-controller { + compatible = "riscv,cpu-intc"; + interrupt-controller; + #interrupt-cells = <1>; + }; + }; + + cpu2: cpu@2 { + compatible = "starfive,dubhe-90", "riscv"; + capacity-dmips-mhz = <1024>; + d-cache-block-size = <64>; + d-cache-sets = <1024>; + d-cache-size = <65536>; + d-tlb-sets = <1>; + d-tlb-size = <48>; + device_type = "cpu"; + i-cache-block-size = <64>; + i-cache-sets = <1024>; + i-cache-size = <65536>; + i-tlb-sets = <1>; + i-tlb-size = <48>; + mmu-type = "riscv,sv48"; + next-level-cache = <&l2c2>; + reg = <0x2>; + riscv,isa = "rv64imafdch"; + riscv,isa-base = "rv64i"; + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "h", "zicntr", + "zicsr", "zifencei", "zihintpause", "zihpm", + "zba", "zbb", "zbs", "sscofpmf"; + tlb-split; + + cpu2_intc: interrupt-controller { + compatible = "riscv,cpu-intc"; + interrupt-controller; + #interrupt-cells = <1>; + }; + }; + + cpu3: cpu@3 { + compatible = "starfive,dubhe-90", "riscv"; + capacity-dmips-mhz = <1024>; + d-cache-block-size = <64>; + d-cache-sets = <1024>; + d-cache-size = <65536>; + d-tlb-sets = <1>; + d-tlb-size = <48>; + device_type = "cpu"; + i-cache-block-size = <64>; + i-cache-sets = <1024>; + i-cache-size = <65536>; + i-tlb-sets = <1>; + i-tlb-size = <48>; + mmu-type = "riscv,sv48"; + next-level-cache = <&l2c2>; + reg = <0x3>; + riscv,isa = "rv64imafdch"; + riscv,isa-base = "rv64i"; + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "h", "zicntr", + "zicsr", "zifencei", "zihintpause", "zihpm", + "zba", "zbb", "zbs", "sscofpmf"; + tlb-split; + + cpu3_intc: interrupt-controller { + compatible = "riscv,cpu-intc"; + interrupt-controller; + #interrupt-cells = <1>; + }; + }; + + cpu4: cpu@4 { + compatible = "starfive,dubhe-90", "riscv"; + capacity-dmips-mhz = <1024>; + d-cache-block-size = <64>; + d-cache-sets = <1024>; + d-cache-size = <65536>; + d-tlb-sets = <1>; + d-tlb-size = <48>; + device_type = "cpu"; + i-cache-block-size = <64>; + i-cache-sets = <1024>; + i-cache-size = <65536>; + i-tlb-sets = <1>; + i-tlb-size = <48>; + mmu-type = "riscv,sv48"; + next-level-cache = <&l2c2>; + reg = <0x4>; + riscv,isa = "rv64imafdch"; + riscv,isa-base = "rv64i"; + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "h", "zicntr", + "zicsr", "zifencei", "zihintpause", "zihpm", + "zba", "zbb", "zbs", "sscofpmf"; + tlb-split; + + cpu4_intc: interrupt-controller { + compatible = "riscv,cpu-intc"; + interrupt-controller; + #interrupt-cells = <1>; + }; + }; + + cpu5: cpu@5 { + compatible = "starfive,dubhe-90", "riscv"; + capacity-dmips-mhz = <1024>; + d-cache-block-size = <64>; + d-cache-sets = <1024>; + d-cache-size = <65536>; + d-tlb-sets = <1>; + d-tlb-size = <48>; + device_type = "cpu"; + i-cache-block-size = <64>; + i-cache-sets = <1024>; + i-cache-size = <65536>; + i-tlb-sets = <1>; + i-tlb-size = <48>; + mmu-type = "riscv,sv48"; + next-level-cache = <&l2c2>; + reg = <0x5>; + riscv,isa = "rv64imafdch"; + riscv,isa-base = "rv64i"; + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "h", "zicntr", + "zicsr", "zifencei", "zihintpause", "zihpm", + "zba", "zbb", "zbs", "sscofpmf"; + tlb-split; + + cpu5_intc: interrupt-controller { + compatible = "riscv,cpu-intc"; + interrupt-controller; + #interrupt-cells = <1>; + }; + }; + + cpu-map { + cluster0 { + core0 { + cpu = <&cpu0>; + }; + }; + + cluster1 { + core0 { + cpu = <&cpu1>; + }; + }; + + cluster2 { + core0 { + cpu = <&cpu2>; + }; + + core1 { + cpu = <&cpu3>; + }; + + core2 { + cpu = <&cpu4>; + }; + + core3 { + cpu = <&cpu5>; + }; + }; + }; + + l2c0: cache-controller-0 { + compatible = "cache"; + cache-block-size = <64>; + cache-level = <2>; + cache-sets = <512>; + cache-size = <0x40000>; + cache-unified; + next-level-cache = <&l3_cache>; + }; + + l2c1: cache-controller-1 { + compatible = "cache"; + cache-block-size = <64>; + cache-level = <2>; + cache-sets = <512>; + cache-size = <0x40000>; + cache-unified; + next-level-cache = <&l3_cache>; + }; + + l2c2: cache-controller-2{ + compatible = "cache"; + cache-block-size = <64>; + cache-level = <2>; + cache-sets = <4096>; + cache-size = <0x200000>; + cache-unified; + next-level-cache = <&l3_cache>; + }; + + l3_cache: cache-controller-3 { + compatible = "cache"; + cache-block-size = <64>; + cache-level = <3>; + cache-sets = <8192>; + cache-size = <0x400000>; + cache-unified; + }; + }; + + soc { + compatible = "simple-bus"; + interrupt-parent = <&plic>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + clint: clint@2000000 { + compatible = "starfive,jh8100-clint", "sifive,clint0"; + reg = <0x0 0x2000000 0x0 0x10000>; + interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>, + <&cpu1_intc 3>, <&cpu1_intc 7>, + <&cpu2_intc 3>, <&cpu2_intc 7>, + <&cpu3_intc 3>, <&cpu3_intc 7>, + <&cpu4_intc 3>, <&cpu4_intc 7>, + <&cpu5_intc 3>, <&cpu5_intc 7>; + }; + + plic: interrupt-controller@c000000 { + #interrupt-cells = <1>; + #address-cells = <0>; + compatible = "starfive,jh8100-plic", "sifive,plic-1.0.0"; + reg = <0x0 0x0c000000 0x0 0x4000000>; + riscv,ndev = <200>; + interrupt-controller; + interrupts-extended = <&cpu0_intc 11>, <&cpu1_intc 11>, + <&cpu0_intc 9>, <&cpu1_intc 9>, + <&cpu2_intc 11>, <&cpu3_intc 11>, + <&cpu4_intc 11>, <&cpu5_intc 11>, + <&cpu2_intc 9>, <&cpu3_intc 9>, + <&cpu4_intc 9>, <&cpu5_intc 9>; + }; + + uart0: serial@12160000 { + compatible = "starfive,jh8100-uart"; + reg = <0x0 0x12160000 0x0 0x10000>; + clock-names = "uart_clk", "pclk"; + interrupts = <67>; + status = "disabled"; + }; + + uart1: serial@12170000 { + compatible = "starfive,jh8100-uart"; + reg = <0x0 0x12170000 0x0 0x10000>; + clock-names = "uart_clk", "pclk"; + interrupts = <68>; + status = "disabled"; + }; + + uart2: serial@12180000 { + compatible = "starfive,jh8100-uart"; + reg = <0x0 0x12180000 0x0 0x10000>; + clock-names = "uart_clk", "pclk"; + interrupts = <69>; + status = "disabled"; + }; + + uart3: serial@12190000 { + compatible = "starfive,jh8100-uart"; + reg = <0x0 0x12190000 0x0 0x10000>; + clock-names = "uart_clk", "pclk"; + interrupts = <70>; + status = "disabled"; + }; + + uart4: serial@121a0000 { + compatible = "starfive,jh8100-uart"; + reg = <0x0 0x121a0000 0x0 0x10000>; + clock-names = "uart_clk", "pclk"; + interrupts = <71>; + status = "disabled"; + }; + + uart5: serial@127d0000 { + compatible = "starfive,jh8100-uart"; + reg = <0x0 0x127d0000 0x0 0x10000>; + clock-names = "uart_clk", "pclk"; + interrupts = <72>; + status = "disabled"; + }; + + uart6: serial@127e0000 { + compatible = "starfive,jh8100-uart"; + reg = <0x0 0x127e0000 0x0 0x10000>; + clock-names = "uart_clk", "pclk"; + interrupts = <73>; + status = "disabled"; + }; + + }; +};