From patchwork Fri Nov 24 10:41:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tony Lindgren X-Patchwork-Id: 169387 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:ce62:0:b0:403:3b70:6f57 with SMTP id o2csp1070576vqx; Fri, 24 Nov 2023 02:43:40 -0800 (PST) X-Google-Smtp-Source: AGHT+IFRUQWcwi2AP/C4gc8ujvm3Ngr38jLDaVsUNLi04p3iZ2xsbbh2NRu0m1NXTqJSZ+aA0zhS X-Received: by 2002:a05:6a21:3610:b0:186:a0d9:4189 with SMTP id yg16-20020a056a21361000b00186a0d94189mr2229692pzb.35.1700822619836; Fri, 24 Nov 2023 02:43:39 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1700822619; cv=none; d=google.com; s=arc-20160816; b=aMRDBxmv9/5lE7bjoII0bwLeKXXTotNaxnJmauXoXdh3zaTN1VocLr2HeWWtmD1vCE dbaQWSHiB34sNuuS67n8WCxyr48ESkczuX0VgoNMqUY3I53N6V7czf4yZgwHr3lfbuLX NvlIjkbt5ySOaf/2DNF13Yu4U7t4ESEmONxBRiirzMt6arXwFb35cEhyFcNk7exFsTf+ tYV53RaKMQ1QzlX0DIadFb+VhSV24T7ySBV4JFEtkbjIs49gSlh16u3IjmxBQfeY+B1c rHhJhOPbGK9Tk1YwoR0AaZAGTuqgODBLhOGZh/UfhDJNfb25zzUXFF8f5zQ3CLaVkhJa r+MA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from:dkim-signature; bh=R13cDH9cIzwiMn7wXGch0kx2M4luqo02CYqNY2hynHA=; fh=T8Qoi+jo2u6JXAAuwOAp22FjQfQ9ISAPb2T+ybmaMiQ=; b=JogHddxOgpwqAxOOrBMUfGcbEv4RoLcu1RVO10Aa4NlZaDyUdjuept/keREhnp2nGx 9zpx4V0olHXDpByKRdxU42in4VgkixlQZzVkVqhFLGSRmqJnNTRbhICcHbLs2Xtn84JU dgIAauRAuixN14pbXv0UwIAo7QGGuS0bOtulbJpbG+Jty1JruJtqKWlmHhDtUAawpRdh geHDchvBKo58q4u8MnA8sP9NMmssLlPmVMTZJNR5sTPTlQSKOq7Pb2qljJCU+MDS8wdM 3u/6LKjGF+KPqC6oQqz+XbBKitXhIrnSbz4XljYFkj2KlT2A40Fm/1nifsS9d9DpANUX pzEQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@atomide.com header.s=25mailst header.b="t/2H36ys"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:8 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from fry.vger.email (fry.vger.email. [2620:137:e000::3:8]) by mx.google.com with ESMTPS id mv9-20020a17090b198900b00285911b4b95si678338pjb.122.2023.11.24.02.43.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 24 Nov 2023 02:43:39 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:8 as permitted sender) client-ip=2620:137:e000::3:8; Authentication-Results: mx.google.com; dkim=fail header.i=@atomide.com header.s=25mailst header.b="t/2H36ys"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:8 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by fry.vger.email (Postfix) with ESMTP id 49A7382F8772; Fri, 24 Nov 2023 02:42:05 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at fry.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345628AbjKXKl4 (ORCPT + 99 others); Fri, 24 Nov 2023 05:41:56 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35908 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345372AbjKXKlz (ORCPT ); Fri, 24 Nov 2023 05:41:55 -0500 Received: from mail5.25mail.st (mail5.25mail.st [74.50.62.9]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C809D1A8; Fri, 24 Nov 2023 02:42:01 -0800 (PST) Received: from localhost (91-158-86-216.elisa-laajakaista.fi [91.158.86.216]) by mail5.25mail.st (Postfix) with ESMTPSA id 053E6604D9; Fri, 24 Nov 2023 10:41:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=atomide.com; s=25mailst; t=1700822520; bh=EvV+8V5WehTEzKe/Wr+A4+PdH+JfHp240DufQNX02/s=; h=From:To:Cc:Subject:Date:From; b=t/2H36ys8+MpW4QyMj941pP0+/2MD7iURoyzXQIy2sgqgAPQdLvr5BYDS6D2BYThA zn4rrMFdlQcnpQcRJktrFss8wGWC13fMECO+xfUVHSRzHbzjUQst0GqKFt6TtwFMNW 4TU6w8kG+1lmerZ/2kjWsDVCtoH7OX1dXxTYkWyh5kCU9iMaRmUerKB0HrS2cadqrX 0lYAlVKwFxxdxOKMAxlWCCpxlgxSVGwKZDk9baG/oz1eU4OSDmm4Ef6JeOkPgrDyOI FWAgSGRhglCCo+30c1Iz6+qJuda3wURrTII3cEMCMNc+5YJmhnKDpjC95ez+rTLlXq fqwYVZM9VvjGA== From: Tony Lindgren To: linux-omap@vger.kernel.org Cc: Dhruva Gole , Greg Kroah-Hartman , Keerthy , Kevin Hilman , Nishanth Menon , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH] bus: ti-sysc: Flush posted write only after srst_udelay Date: Fri, 24 Nov 2023 12:41:33 +0200 Message-ID: <20231124104133.19100-1-tony@atomide.com> X-Mailer: git-send-email 2.42.1 MIME-Version: 1.0 X-Spam-Status: No, score=-0.6 required=5.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on fry.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (fry.vger.email [0.0.0.0]); Fri, 24 Nov 2023 02:42:05 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1783441779308286305 X-GMAIL-MSGID: 1783441779308286305 Commit 34539b442b3b ("bus: ti-sysc: Flush posted write on enable before reset") caused a regression reproducable on omap4 duovero where the ISS target module can produce interconnect errors on boot. Turns out the registers are not accessible until after a delay for devices needing a ti,sysc-delay-us value. Let's fix this by flushing the posted write only after the reset delay. We do flushing also for ti,sysc-delay-us using devices as that should trigger an interconnect error if the delay is not properly configured. Let's also add some comments while at it. Fixes: 34539b442b3b ("bus: ti-sysc: Flush posted write on enable before reset") Signed-off-by: Tony Lindgren --- drivers/bus/ti-sysc.c | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-) diff --git a/drivers/bus/ti-sysc.c b/drivers/bus/ti-sysc.c --- a/drivers/bus/ti-sysc.c +++ b/drivers/bus/ti-sysc.c @@ -2158,13 +2158,23 @@ static int sysc_reset(struct sysc *ddata) sysc_val = sysc_read_sysconfig(ddata); sysc_val |= sysc_mask; sysc_write(ddata, sysc_offset, sysc_val); - /* Flush posted write */ + + /* + * Some devices need a delay before reading registers + * after reset. Presumably a srst_udelay is not needed + * for devices that use a rstctrl register reset. + */ + if (ddata->cfg.srst_udelay) + fsleep(ddata->cfg.srst_udelay); + + /* + * Flush posted write. For devices needing srst_udelay + * this should trigger an interconnect error if the + * srst_udelay value is needed but not configured. + */ sysc_val = sysc_read_sysconfig(ddata); } - if (ddata->cfg.srst_udelay) - fsleep(ddata->cfg.srst_udelay); - if (ddata->post_reset_quirk) ddata->post_reset_quirk(ddata);