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([2a01:4f9:3a:1e26::2]) by smtp.gmail.com with ESMTPSA id v6-20020a05651203a600b004b40c1f1c70sm923621lfp.212.2022.11.09.15.49.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Nov 2022 15:49:50 -0800 (PST) From: Philipp Tomsich To: gcc-patches@gcc.gnu.org Cc: Kito Cheng , Palmer Dabbelt , Christoph Muellner , Jeff Law , Philipp Tomsich Subject: [PATCH] RISC-V: Fix selection of pipeline model for sifive-7-series Date: Thu, 10 Nov 2022 00:49:48 +0100 Message-Id: <20221109234948.3279391-1-philipp.tomsich@vrull.eu> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-Spam-Status: No, score=-12.2 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, JMQ_SPF_NEUTRAL, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749064430398465104?= X-GMAIL-MSGID: =?utf-8?q?1749064430398465104?= A few of the gcc.target/riscv/mcpu-*.c tests have been failing for a while now, due to the pipeline model for sifive-7-series not being selected despite -mtune=sifive-7-series. The root cause is that the respective RISCV_TUNE entry points to generic instead. Fix this. Fixes 97d1ed67fc6 ("RISC-V: Support --target-help for -mcpu/-mtune") gcc/ChangeLog: * config/riscv/riscv-cores.def (RISCV_TUNE): Update sifive-7-series to point to the sifive_7 pipeline description. Signed-off-by: Philipp Tomsich --- gcc/config/riscv/riscv-cores.def | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/config/riscv/riscv-cores.def b/gcc/config/riscv/riscv-cores.def index b84ad999ac1..31ad34682c5 100644 --- a/gcc/config/riscv/riscv-cores.def +++ b/gcc/config/riscv/riscv-cores.def @@ -36,7 +36,7 @@ RISCV_TUNE("rocket", generic, rocket_tune_info) RISCV_TUNE("sifive-3-series", generic, rocket_tune_info) RISCV_TUNE("sifive-5-series", generic, rocket_tune_info) -RISCV_TUNE("sifive-7-series", generic, sifive_7_tune_info) +RISCV_TUNE("sifive-7-series", sifive_7, sifive_7_tune_info) RISCV_TUNE("thead-c906", generic, thead_c906_tune_info) RISCV_TUNE("size", generic, optimize_size_tune_info)