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[2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id f17-20020a05621400d100b00670a24e5651si1088719qvs.382.2023.11.23.04.59.45 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 23 Nov 2023 04:59:45 -0800 (PST) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; arc=pass (i=1); spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org" Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 52385385801F for ; Thu, 23 Nov 2023 12:59:45 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from smtpbgsg1.qq.com (smtpbgsg1.qq.com [54.254.200.92]) by sourceware.org (Postfix) with ESMTPS id 92BA3385843E for ; Thu, 23 Nov 2023 12:59:19 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 92BA3385843E Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivai.ai Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivai.ai ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 92BA3385843E Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=54.254.200.92 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1700744362; cv=none; b=VgUmQBUiZ9jH0uU3BnLYVOja/tnhdW3YZLPfZF22QlbH5IwYoQ1L8+zkIEvdDC1oJGQV0ws/kmOrKYoh1h9mCS9aWaROEL6052N9eCUqM1/RAJZuZQjSZb02UhqkzMwoYafwo8tqYgwdcG9GL0RBQkwwCDbS0S/35PkkSB1FZBY= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1700744362; c=relaxed/simple; bh=bl8SRkOaaWMa91lK5Qit02+Y2E2t4whsEyBeyICaOoI=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=rEmXOFvM0pq9pAxylJY2ZlLkVBYeAxTNk17vXeRuQ+UZ0BpDsvERKb8wiggz04KboP2Gj7lJ3EmSlXfxBwkpBF8WvELVGFAhuRSkRb7DwKJ/LfkYjQTr2dY3L1t8HoSoHe0K71MAhdIGmmsEYmoBEVlHmfHups+Mu1ab7avxbWA= ARC-Authentication-Results: i=1; server2.sourceware.org X-QQ-mid: bizesmtp68t1700744353twv6kwfg Received: from rios-cad122.hadoop.rioslab.org ( [58.60.1.26]) by bizesmtp.qq.com (ESMTP) with id ; Thu, 23 Nov 2023 20:59:11 +0800 (CST) X-QQ-SSF: 01400000000000G0V000000A0000000 X-QQ-FEAT: +ynUkgUhZJmj/l8oBnWF6+mpu1Lge7r94K4z5835bDvXVpTEmZRNOW7NvsNcR vDf8VkwqyEd+77JnIPT0w/B6itdq/EMJKhWl7jAJFq5Q5JPb7Xs8U0yYuL2x7sM1sSDzRkm QCZVmBkjPEYg3875KbW96MrcW/SPkR7LmPdNwhBAZftpvOlFTQt0gEn5Tz88Y9xy1Sap8YM OShSjRiDHQHhJuOB4LWlf6d3cOJeAun3/RGCkkxV5G6ClqbjNjfBZkWSSBO5RRpWSO+3nDP vF8cNhkO1DLxjzp1mDXSLpszstbfUcM+j6UOwSTxt0xcmQfb/Qr9uuNBhxS5W4M9IyAIzxb ETvDxaaimbYlCNSFKcKg+j8Po55QcZ6FBrSCYX+YOc2h20oE4TFSMmTNQZOMhu05ot4F+Tv tDg6SbdVIy8= X-QQ-GoodBg: 2 X-BIZMAIL-ID: 7294408627510413308 From: Juzhe-Zhong To: gcc-patches@gcc.gnu.org Cc: kito.cheng@gmail.com, kito.cheng@sifive.com, jeffreyalaw@gmail.com, rdapp.gcc@gmail.com, Juzhe-Zhong Subject: [PATCH] RISC-V: Optimize a special case of VLA SLP Date: Thu, 23 Nov 2023 20:59:10 +0800 Message-Id: <20231123125910.1889955-1-juzhe.zhong@rivai.ai> X-Mailer: git-send-email 2.36.3 MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:rivai.ai:qybglogicsvrgz:qybglogicsvrgz7a-one-0 X-Spam-Status: No, score=-10.3 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, KAM_SHORT, RCVD_IN_BARRACUDACENTRAL, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, SPF_HELO_PASS, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1783359745205846514 X-GMAIL-MSGID: 1783359745205846514 When working on fixing bugs of zvl1024b. I notice a special VLA SLP case can be better optimized. v = vec_perm (op1, op2, { nunits - 1, nunits, nunits + 1, ... }) Before this patch, we are using genriec approach (vrgather): vid vadd.vx vrgather vmsgeu vrgather With this patch, we use vec_extract + slide1up: scalar = vec_extract (last element of op1) v = slide1up (op2, scalar) I am gonna to run testing zvl128b/zvl256b/zvl512b/zvl1024b of both RV32 and RV64. Ok for trunk if no regression on those testing above ? PR target/112599 gcc/ChangeLog: * config/riscv/riscv-v.cc (shuffle_extract_and_slide1up_patterns): (expand_vec_perm_const_1): gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/pr112599-2.c: New test. --- gcc/config/riscv/riscv-v.cc | 33 ++++++++++++ .../gcc.target/riscv/rvv/autovec/pr112599-2.c | 51 +++++++++++++++++++ 2 files changed, 84 insertions(+) create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/pr112599-2.c diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc index 72b96d8339d..2ee1bf5191b 100644 --- a/gcc/config/riscv/riscv-v.cc +++ b/gcc/config/riscv/riscv-v.cc @@ -3232,6 +3232,37 @@ shuffle_bswap_pattern (struct expand_vec_perm_d *d) return true; } +/* Recognize the pattern that can be shuffled by vec_extract and slide1up + approach. */ + +static bool +shuffle_extract_and_slide1up_patterns (struct expand_vec_perm_d *d) +{ + poly_uint64 nunits = GET_MODE_NUNITS (d->vmode); + + /* Recognize { nunits - 1, nunits, nunits + 1, ... }. */ + if (!d->perm.series_p (0, 2, nunits - 1, 2) + || !d->perm.series_p (1, 2, nunits, 2)) + return false; + + /* Success! */ + if (d->testing_p) + return true; + + /* Extract the last element of the first vector. */ + scalar_mode smode = GET_MODE_INNER (d->vmode); + rtx tmp = gen_reg_rtx (smode); + emit_vec_extract (tmp, d->op0, nunits - 1); + + /* Insert the scalar into element 0. */ + unsigned int unspec + = FLOAT_MODE_P (d->vmode) ? UNSPEC_VFSLIDE1UP : UNSPEC_VSLIDE1UP; + insn_code icode = code_for_pred_slide (unspec, d->vmode); + rtx ops[] = {d->target, d->op1, tmp}; + emit_vlmax_insn (icode, BINARY_OP, ops); + return true; +} + /* Recognize the pattern that can be shuffled by generic approach. */ static bool @@ -3310,6 +3341,8 @@ expand_vec_perm_const_1 (struct expand_vec_perm_d *d) return true; if (shuffle_bswap_pattern (d)) return true; + if (shuffle_extract_and_slide1up_patterns (d)) + return true; if (shuffle_generic_patterns (d)) return true; return false; diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr112599-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr112599-2.c new file mode 100644 index 00000000000..fd87565b054 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr112599-2.c @@ -0,0 +1,51 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv_zvl1024b -mabi=lp64d -O3" } */ + +struct s { struct s *n; } *p; +struct s ss; +#define MAX 10 +struct s sss[MAX]; +int count = 0; + +int look( struct s *p, struct s **pp ) +{ + for ( ; p; p = p->n ) + ; + *pp = p; + count++; + return( 1 ); +} + +void sub( struct s *p, struct s **pp ) +{ + for ( ; look( p, pp ); ) { + if ( p ) + p = p->n; + else + break; + } +} + +int +foo(void) +{ + struct s *pp; + struct s *next; + int i; + + p = &ss; + next = p; + for ( i = 0; i < MAX; i++ ) { + next->n = &sss[i]; + next = next->n; + } + next->n = 0; + + sub( p, &pp ); + if (count != MAX+2) + __builtin_abort (); + return 0; +} + +/* { dg-final { scan-assembler-not {vrgather} } } */ +/* { dg-final { scan-assembler-times {vslide1up\.vx} 1 } } */