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Miller" , Andrew Lunn , Eric Dumazet , Florian Fainelli , Jakub Kicinski , Paolo Abeni , Vladimir Oltean , Woojung Huh , Arun Ramadoss , "Russell King (Oracle)" Cc: Oleksij Rempel , Simon Horman , kernel@pengutronix.de, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, UNGLinuxDriver@microchip.com Subject: [PATCH net-next v5 1/3] net: dsa: microchip: ksz8: Make flow control, speed, and duplex on CPU port configurable Date: Wed, 22 Nov 2023 10:25:43 +0100 Message-Id: <20231122092545.2895635-2-o.rempel@pengutronix.de> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20231122092545.2895635-1-o.rempel@pengutronix.de> References: <20231122092545.2895635-1-o.rempel@pengutronix.de> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: ore@pengutronix.de X-SA-Exim-Scanned: No (on metis.whiteo.stw.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Wed, 22 Nov 2023 01:26:18 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1783255862170682684 X-GMAIL-MSGID: 1783255862170682684 Allow flow control, speed, and duplex settings on the CPU port to be configurable. Previously, the speed and duplex relied on default switch values, which limited flexibility. Additionally, flow control was hardcoded and only functional in duplex mode. This update enhances the configurability of these parameters. Signed-off-by: Oleksij Rempel Reviewed-by: Simon Horman Reviewed-by: Vladimir Oltean --- drivers/net/dsa/microchip/ksz8.h | 4 ++ drivers/net/dsa/microchip/ksz8795.c | 54 +++++++++++++++++++++++++- drivers/net/dsa/microchip/ksz_common.c | 1 + 3 files changed, 57 insertions(+), 2 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz8.h b/drivers/net/dsa/microchip/ksz8.h index ef653bbfde75..571c26ce71e4 100644 --- a/drivers/net/dsa/microchip/ksz8.h +++ b/drivers/net/dsa/microchip/ksz8.h @@ -54,5 +54,9 @@ int ksz8_reset_switch(struct ksz_device *dev); int ksz8_switch_init(struct ksz_device *dev); void ksz8_switch_exit(struct ksz_device *dev); int ksz8_change_mtu(struct ksz_device *dev, int port, int mtu); +void ksz8_phylink_mac_link_up(struct ksz_device *dev, int port, + unsigned int mode, phy_interface_t interface, + struct phy_device *phydev, int speed, int duplex, + bool tx_pause, bool rx_pause); #endif diff --git a/drivers/net/dsa/microchip/ksz8795.c b/drivers/net/dsa/microchip/ksz8795.c index 8deb217638d3..3504e7238eba 100644 --- a/drivers/net/dsa/microchip/ksz8795.c +++ b/drivers/net/dsa/microchip/ksz8795.c @@ -1528,6 +1528,58 @@ void ksz8_config_cpu_port(struct dsa_switch *ds) } } +/** + * ksz8_cpu_port_link_up - Configures the CPU port of the switch. + * @dev: The KSZ device instance. + * @speed: The desired link speed. + * @duplex: The desired duplex mode. + * @tx_pause: If true, enables transmit pause. + * @rx_pause: If true, enables receive pause. + * + * Description: + * The function configures flow control and speed settings for the CPU + * port of the switch based on the desired settings, current duplex mode, and + * speed. + */ +static void ksz8_cpu_port_link_up(struct ksz_device *dev, int speed, int duplex, + bool tx_pause, bool rx_pause) +{ + const u16 *regs = dev->info->regs; + u8 ctrl = 0; + + /* SW_FLOW_CTRL, SW_HALF_DUPLEX, and SW_10_MBIT bits are bootstrappable + * at least on KSZ8873. They can have different values depending on your + * board setup. + */ + if (duplex) { + if (tx_pause || rx_pause) + ctrl |= SW_FLOW_CTRL; + } else { + ctrl |= SW_HALF_DUPLEX; + } + + /* This hardware only supports SPEED_10 and SPEED_100. For SPEED_10 + * we need to set the SW_10_MBIT bit. Otherwise, we can leave it 0. + */ + if (speed == SPEED_10) + ctrl |= SW_10_MBIT; + + ksz_rmw8(dev, regs[S_BROADCAST_CTRL], SW_HALF_DUPLEX | SW_FLOW_CTRL | + SW_10_MBIT, ctrl); +} + +void ksz8_phylink_mac_link_up(struct ksz_device *dev, int port, + unsigned int mode, phy_interface_t interface, + struct phy_device *phydev, int speed, int duplex, + bool tx_pause, bool rx_pause) +{ + /* If the port is the CPU port, apply special handling. Only the CPU + * port is configured via global registers. + */ + if (dev->cpu_port == port) + ksz8_cpu_port_link_up(dev, speed, duplex, tx_pause, rx_pause); +} + static int ksz8_handle_global_errata(struct dsa_switch *ds) { struct ksz_device *dev = ds->priv; @@ -1576,8 +1628,6 @@ int ksz8_setup(struct dsa_switch *ds) */ ds->vlan_filtering_is_global = true; - ksz_cfg(dev, S_REPLACE_VID_CTRL, SW_FLOW_CTRL, true); - /* Enable automatic fast aging when link changed detected. */ ksz_cfg(dev, S_LINK_AGING_CTRL, SW_LINK_AUTO_AGING, true); diff --git a/drivers/net/dsa/microchip/ksz_common.c b/drivers/net/dsa/microchip/ksz_common.c index 3fed406fb46a..0ee7cfb8d4bd 100644 --- a/drivers/net/dsa/microchip/ksz_common.c +++ b/drivers/net/dsa/microchip/ksz_common.c @@ -277,6 +277,7 @@ static const struct ksz_dev_ops ksz8_dev_ops = { .mirror_add = ksz8_port_mirror_add, .mirror_del = ksz8_port_mirror_del, .get_caps = ksz8_get_caps, + .phylink_mac_link_up = ksz8_phylink_mac_link_up, .config_cpu_port = ksz8_config_cpu_port, .enable_stp_addr = ksz8_enable_stp_addr, .reset = ksz8_reset_switch, From patchwork Wed Nov 22 09:25:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oleksij Rempel X-Patchwork-Id: 168217 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2b07:b0:403:3b70:6f57 with SMTP id io7csp1199470vqb; Wed, 22 Nov 2023 01:28:26 -0800 (PST) X-Google-Smtp-Source: AGHT+IFMHjoolDCSauyPcHLsD2tWmy/6blP+LJXmRvXr5dV38/FBKISnBSoIMD2uoJDj10uQwCOH X-Received: by 2002:a17:903:4282:b0:1cf:50a0:565b with SMTP id ju2-20020a170903428200b001cf50a0565bmr1663433plb.59.1700645306292; Wed, 22 Nov 2023 01:28:26 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1700645306; cv=none; d=google.com; s=arc-20160816; b=y2rYuEuZi653Hv6xbgRyn9YyY+8DO99vUc1Xy/sIwA4NyAVM+xGxTS8IOe6BKNrItz q1EKqm+GpXpUt+/bmKVnN2mUTvdh3wH94EJagOM+/1KujAUSfNm5jVMr2YSaoDZq6Yux wC9L/5Db9o1OchGrKpUFQ11wcYhAUnjnFsUOLFFm3b8ZmSh2GkaV1MaNBJ+12yf1H8vl iUIgp73axcfDrl82pGO2iBgFxCx4aqOetQR9gwqrb2AYTNAXU32a8s3WyjdUd0qVvD5q nzwUUreBTYoqADlLwjD4lbr7DxAL6EuIjuw9GPyxhQYuXN+kREa/aps49B9KxFhEV9Un 2KrQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=ZIj33xeBbHjF0Lgq10rnxN0btS5k3ILVfpyo54LHH3M=; fh=RjOIkBesEfnky+yYqMK0B2V0Ff7WfhKJcE3WW6LITZc=; b=T4nctnyyXs0N0rnZVoN3WBN1kiNKaGe/mCXmHdDvhi323U1+T5cnnZn9MNvNilEXeG y7A5hw404oSW9ajvL3cugx/E4o6Tnj+O8BsBAULskVDs5NcPz44BdYZktX3XCD49XnBZ HsVHzpNKXUze5vPvJ7mn7n0SIJKM+KrjyJA+856+uej2xYYzgHQ3QPzcmAgoPDJZRgus +AebRUz4K1oBQftJmDh+XwqFvA+I3rqq75203H0F8Fct2gvaNOJLla5py4+CYGHUzTsz zcgLEAdcaBAsrk5AM+clbRR8tB5adFpaEuBHnLGJzTAzQlT54c54VU8Ex5vN6iiJeDwW xuZw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from snail.vger.email (snail.vger.email. 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Miller" , Andrew Lunn , Eric Dumazet , Florian Fainelli , Jakub Kicinski , Paolo Abeni , Vladimir Oltean , Woojung Huh , Arun Ramadoss , "Russell King (Oracle)" Cc: Oleksij Rempel , Simon Horman , kernel@pengutronix.de, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, UNGLinuxDriver@microchip.com Subject: [PATCH net-next v5 2/3] net: dsa: microchip: ksz8: Add function to configure ports with integrated PHYs Date: Wed, 22 Nov 2023 10:25:44 +0100 Message-Id: <20231122092545.2895635-3-o.rempel@pengutronix.de> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20231122092545.2895635-1-o.rempel@pengutronix.de> References: <20231122092545.2895635-1-o.rempel@pengutronix.de> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: ore@pengutronix.de X-SA-Exim-Scanned: No (on metis.whiteo.stw.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Wed, 22 Nov 2023 01:26:12 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1783255852749062665 X-GMAIL-MSGID: 1783255852749062665 This patch introduces the function 'ksz8_phy_port_link_up' to the Microchip KSZ8xxx driver. This function is responsible for setting up flow control and duplex settings for the ports that are integrated with PHYs. The KSZ8795 switch supports asymmetric pause control, which can't be fully utilized since a single bit controls both RX and TX pause. Despite this, the flow control can be adjusted based on the auto-negotiation process, taking into account the capabilities of both link partners. On the other hand, the KSZ8873's PORT_FORCE_FLOW_CTRL bit can be set by the hardware bootstrap, which ignores the auto-negotiation result. Therefore, even in auto-negotiation mode, we need to ensure that this bit is correctly set. When auto-negotiation isn't in use, we enforce symmetric pause control for the KSZ8795 switch. Please note, forcing flow control disable on a port while still advertising pause support isn't possible. While this scenario might not be practical or desired, it's important to be aware of this limitation when working with the KSZ8873 and similar devices. Signed-off-by: Oleksij Rempel Reviewed-by: Simon Horman --- drivers/net/dsa/microchip/ksz8795.c | 79 +++++++++++++++++++++++++++++ 1 file changed, 79 insertions(+) diff --git a/drivers/net/dsa/microchip/ksz8795.c b/drivers/net/dsa/microchip/ksz8795.c index 3504e7238eba..0b263c42b191 100644 --- a/drivers/net/dsa/microchip/ksz8795.c +++ b/drivers/net/dsa/microchip/ksz8795.c @@ -1528,6 +1528,83 @@ void ksz8_config_cpu_port(struct dsa_switch *ds) } } +/** + * ksz8_phy_port_link_up - Configures ports with integrated PHYs + * @dev: The KSZ device instance. + * @port: The port number to configure. + * @duplex: The desired duplex mode. + * @tx_pause: If true, enables transmit pause. + * @rx_pause: If true, enables receive pause. + * + * Description: + * The function configures flow control settings for a given port based on the + * desired settings and current duplex mode. + * + * According to the KSZ8873 datasheet, the PORT_FORCE_FLOW_CTRL bit in the + * Port Control 2 register (0x1A for Port 1, 0x22 for Port 2, 0x32 for Port 3) + * determines how flow control is handled on the port: + * "1 = will always enable full-duplex flow control on the port, regardless + * of AN result. + * 0 = full-duplex flow control is enabled based on AN result." + * + * This means that the flow control behavior depends on the state of this bit: + * - If PORT_FORCE_FLOW_CTRL is set to 1, the switch will ignore AN results and + * force flow control on the port. + * - If PORT_FORCE_FLOW_CTRL is set to 0, the switch will enable or disable + * flow control based on the AN results. + * + * However, there is a potential limitation in this configuration. It is + * currently not possible to force disable flow control on a port if we still + * advertise pause support. While such a configuration is not currently + * supported by Linux, and may not make practical sense, it's important to be + * aware of this limitation when working with the KSZ8873 and similar devices. + */ +static void ksz8_phy_port_link_up(struct ksz_device *dev, int port, int duplex, + bool tx_pause, bool rx_pause) +{ + const u16 *regs = dev->info->regs; + u8 ctrl = 0; + int ret; + + /* The KSZ8795 switch differs from the KSZ8873 by supporting + * asymmetric pause control. However, since a single bit is used to + * control both RX and TX pause, we can't enforce asymmetric pause + * control - both TX and RX pause will be either enabled or disabled + * together. + * + * If auto-negotiation is enabled, we usually allow the flow control to + * be determined by the auto-negotiation process based on the + * capabilities of both link partners. However, for KSZ8873, the + * PORT_FORCE_FLOW_CTRL bit may be set by the hardware bootstrap, + * ignoring the auto-negotiation result. Thus, even in auto-negotiation + * mode, we need to ensure that the PORT_FORCE_FLOW_CTRL bit is + * properly cleared. + * + * In the absence of auto-negotiation, we will enforce symmetric + * pause control for both variants of switches - KSZ8873 and KSZ8795. + */ + if (duplex) { + bool aneg_en = false; + + ret = ksz_pread8(dev, port, regs[P_FORCE_CTRL], &ctrl); + if (ret) + return; + + if (ksz_is_ksz88x3(dev)) { + if ((ctrl & PORT_AUTO_NEG_ENABLE)) + aneg_en = true; + } else { + if (!(ctrl & PORT_AUTO_NEG_DISABLE)) + aneg_en = true; + } + + if (!aneg_en && (tx_pause || rx_pause)) + ctrl |= PORT_FORCE_FLOW_CTRL; + } + + ksz_prmw8(dev, port, regs[P_STP_CTRL], PORT_FORCE_FLOW_CTRL, ctrl); +} + /** * ksz8_cpu_port_link_up - Configures the CPU port of the switch. * @dev: The KSZ device instance. @@ -1578,6 +1655,8 @@ void ksz8_phylink_mac_link_up(struct ksz_device *dev, int port, */ if (dev->cpu_port == port) ksz8_cpu_port_link_up(dev, speed, duplex, tx_pause, rx_pause); + else if (dev->info->internal_phy[port]) + ksz8_phy_port_link_up(dev, port, duplex, tx_pause, rx_pause); } static int ksz8_handle_global_errata(struct dsa_switch *ds) From patchwork Wed Nov 22 09:25:45 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oleksij Rempel X-Patchwork-Id: 168216 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2b07:b0:403:3b70:6f57 with SMTP id io7csp1199463vqb; Wed, 22 Nov 2023 01:28:24 -0800 (PST) X-Google-Smtp-Source: AGHT+IHQfb4YVFenmzCbm/qqh0ZRrH9ybvRSj/FR6RldLVEkHimuM9f3no+zYglO0juS61rOmx3B X-Received: by 2002:a17:90a:c:b0:283:2612:714a with SMTP id 12-20020a17090a000c00b002832612714amr1740943pja.36.1700645304371; Wed, 22 Nov 2023 01:28:24 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1700645304; cv=none; d=google.com; s=arc-20160816; b=R9DOUjrmmStVMi+pZtxIU46689T3Nr519H4erEmEfKoKErReToVmgn28mMR0aXz2IL vYnNQ1a3ID1Dqwnir+XMm5Swc8yclsiIU6xK7y+ACd9bbTNggZF3OUouksVB4JbIOo43 mfz9ahd85iYreF4AhkEqieuE8G3l5sX4YgtEB0S3DKawaGS9au8zH2to7hs2RTZrbKXX gTTRwwZue4r0H34ijA13K9WxKrOV7TztttLLX8omUbg2zo6BH6FHaI0gmOXTGLfhid5t t7Sc9eJBLASSylUufkNbUp4lHh2sHg7Qa2RDBLIL1mN27osRV9cwqRvKEPPok/llDp5r bJ+g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=iDFKVJ/hnjLdrWMeqpl5S+CXK/i/GB0cm1ioxsAOW6s=; fh=DVCWIz+uSyc0p8MDaz6+OxS/vDIQpy3Qy7/SiN+nuXs=; b=JyX+GmzxP7N2MJ6dpHGgoSaTd7DU5qQDzmXwpoYTQV2H3URcoGz2/tu8dILu0ZaHLM aisQvmI1QNfvsYsfnZFbpozf5GsizoPXSpK+7TkAvQbVoM+wJ/1ez+QzJi8NXz7cPF+H 6qhFURRWryHL+Y22I2oq0F/kyCKqycK2bX8/AhGqQWCKKDxqmrhKfp4M01Fa92hnTSAW H1jnpiFr9ayEoXoxdf7QCqM5iFcP0tXbqiMOI/K4i5rCQM9UavRydgUSr3181gTASJ5Y 0Qbdlh7NZayJk4LruGHqnzSH9Q/EFjypHQ/slqGTxUsNJ5lXsLu8GJooNDr1e8zzHGat LVLA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from snail.vger.email (snail.vger.email. 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Miller" , Andrew Lunn , Eric Dumazet , Florian Fainelli , Jakub Kicinski , Paolo Abeni , Vladimir Oltean , Woojung Huh , Arun Ramadoss , "Russell King (Oracle)" Cc: Oleksij Rempel , kernel@pengutronix.de, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, UNGLinuxDriver@microchip.com Subject: [PATCH net-next v5 3/3] net: dsa: microchip: make phylink_mac_link_up() not optional Date: Wed, 22 Nov 2023 10:25:45 +0100 Message-Id: <20231122092545.2895635-4-o.rempel@pengutronix.de> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20231122092545.2895635-1-o.rempel@pengutronix.de> References: <20231122092545.2895635-1-o.rempel@pengutronix.de> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: ore@pengutronix.de X-SA-Exim-Scanned: No (on metis.whiteo.stw.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Wed, 22 Nov 2023 01:26:01 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1783255850677491107 X-GMAIL-MSGID: 1783255850677491107 Last part of the driver do now support phylink_mac_link_up(). So, make it not optional. Signed-off-by: Oleksij Rempel --- drivers/net/dsa/microchip/ksz_common.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz_common.c b/drivers/net/dsa/microchip/ksz_common.c index 0ee7cfb8d4bd..ab51b091d098 100644 --- a/drivers/net/dsa/microchip/ksz_common.c +++ b/drivers/net/dsa/microchip/ksz_common.c @@ -3111,10 +3111,8 @@ static void ksz_phylink_mac_link_up(struct dsa_switch *ds, int port, { struct ksz_device *dev = ds->priv; - if (dev->dev_ops->phylink_mac_link_up) - dev->dev_ops->phylink_mac_link_up(dev, port, mode, interface, - phydev, speed, duplex, - tx_pause, rx_pause); + dev->dev_ops->phylink_mac_link_up(dev, port, mode, interface, phydev, + speed, duplex, tx_pause, rx_pause); } static int ksz_switch_detect(struct ksz_device *dev)