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[1.34.21.66]) by smtp.gmail.com with ESMTPSA id s4-20020a056a00194400b0069323619f69sm8820110pfk.143.2023.11.21.19.24.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 21 Nov 2023 19:24:40 -0800 (PST) From: Peter Yin To: patrick@stwcx.xyz, Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , Andrew Jeffery , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 1/2] dt-bindings: arm: aspeed: add Meta Minerva Harma board Date: Wed, 22 Nov 2023 11:22:33 +0800 Message-Id: <20231122032234.744144-2-peteryin.openbmc@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231122032234.744144-1-peteryin.openbmc@gmail.com> References: <20231122032234.744144-1-peteryin.openbmc@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Tue, 21 Nov 2023 19:24:59 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1783232988247731047 X-GMAIL-MSGID: 1783232988247731047 Document the new compatibles used on Meta Minerva Harma. Acked-by: Krzysztof Kozlowski Signed-off-by: Peter Yin --- Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml b/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml index e17b3d66d6e5..20e3be8d8c78 100644 --- a/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml +++ b/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml @@ -79,6 +79,7 @@ properties: - facebook,elbert-bmc - facebook,fuji-bmc - facebook,greatlakes-bmc + - facebook,minerva-harma - facebook,yosemite4-bmc - ibm,everest-bmc - ibm,rainier-bmc From patchwork Wed Nov 22 03:22:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Yin X-Patchwork-Id: 168079 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2b07:b0:403:3b70:6f57 with SMTP id io7csp1072360vqb; Tue, 21 Nov 2023 19:25:36 -0800 (PST) X-Google-Smtp-Source: AGHT+IE5uh1GkEzyTrHm02lKdJVrHF16foZShQzI647G1j1z1xTDKE7V0+u0rUvOw8hqkvu0FAgk X-Received: by 2002:a05:6a21:a59f:b0:18a:e3ad:78b4 with SMTP id gd31-20020a056a21a59f00b0018ae3ad78b4mr1346001pzc.8.1700623535998; Tue, 21 Nov 2023 19:25:35 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1700623535; cv=none; d=google.com; s=arc-20160816; b=PyRSTS+L4zYE8IOJUrAgw1rpS+SP0p3HFLfDiREPWMuokoPxtdqMgfl85rYPy32w2P 78t/nnIxCZUyqK8WbZEX6aa34IcfrPYcJSi4VLccYk+/QH8HdWyawNgTj7fEJTirA2mC TN6tQ6rbsYcic98FBny5UFmZEzWVSvdZj5z0hqPoRWR1cYinsRFmVjm/UAKN2sFAM/RE zuMd5Z5TsIoG3WEasvU7i7rYbnY02dhaEvDL3RALE93iTNYdWCv42tcRcCdOLao3T3Ft Jf4h2VGIMSlo26Mysp107uBHo52UAxmfA1cv7N04zhjw9Nqzs1X9ehYqLlb+RFl/iNcU 5tWA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=Dc9qXEhucFk4/ocp4lUbeAsTQwUEcfOib6hwCEsAaXQ=; fh=pd2SmBMs4sTYGHKjgs3e0g+kE+Uh8EE1Y1O/IjGUrNc=; b=U34zl6NPW7dE6hxPFyxgafTxe5aX60hKA2ofKnitAwVHHKHhcXeUem4FXUi++YtuV/ Ke8SgCAwRydb6wsNOQ3MW0QcABc8ZReMwrn/ewCR1IwhMim1B42NVlZ/vz9rlnAdEC4s Fpz8ywH5x8zoDqs4u3Y/I0+6n4swe4ZFBglBOzq5r9VMrRmiemO27EeYTNtmoeBlduR6 GfSVyMNGtfdLm08duWkWTr4FiWu1dgc3CDn0WuMePqyRP77SoFpnXXum31Zm1rSwUBaC /i9Ytu75NOPZYk9EVJb+ZSIPhpyIkOiRqvUwnUwDorWqs7oJR4fxfasesm0A0Sqt3xLE k75A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20230601 header.b=Ma4VQT90; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:2 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: from agentk.vger.email (agentk.vger.email. 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[1.34.21.66]) by smtp.gmail.com with ESMTPSA id s4-20020a056a00194400b0069323619f69sm8820110pfk.143.2023.11.21.19.24.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 21 Nov 2023 19:24:43 -0800 (PST) From: Peter Yin To: patrick@stwcx.xyz, Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , Andrew Jeffery , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 2/2] ARM: dts: aspeed: Minerva Harma: Add Facebook Minerva Harma (AST2600) BMC Date: Wed, 22 Nov 2023 11:22:34 +0800 Message-Id: <20231122032234.744144-3-peteryin.openbmc@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231122032234.744144-1-peteryin.openbmc@gmail.com> References: <20231122032234.744144-1-peteryin.openbmc@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-0.6 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE,WEIRD_QUOTING autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on agentk.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (agentk.vger.email [0.0.0.0]); Tue, 21 Nov 2023 19:25:05 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1783233024793568593 X-GMAIL-MSGID: 1783233024793568593 Add linux device tree entry related to Minerva Harma specific devices connected to BMC SoC. Signed-off-by: Peter Yin --- arch/arm/boot/dts/aspeed/Makefile | 1 + .../aspeed-bmc-facebook-minerva-harma.dts | 533 ++++++++++++++++++ 2 files changed, 534 insertions(+) create mode 100644 arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva-harma.dts diff --git a/arch/arm/boot/dts/aspeed/Makefile b/arch/arm/boot/dts/aspeed/Makefile index 23cbc7203a8e..dfb4905cb14d 100644 --- a/arch/arm/boot/dts/aspeed/Makefile +++ b/arch/arm/boot/dts/aspeed/Makefile @@ -19,6 +19,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \ aspeed-bmc-facebook-fuji.dtb \ aspeed-bmc-facebook-galaxy100.dtb \ aspeed-bmc-facebook-greatlakes.dtb \ + aspeed-bmc-facebook-minerva-harma.dtb \ aspeed-bmc-facebook-minipack.dtb \ aspeed-bmc-facebook-tiogapass.dtb \ aspeed-bmc-facebook-wedge40.dtb \ diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva-harma.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva-harma.dts new file mode 100644 index 000000000000..fe4e5225566f --- /dev/null +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva-harma.dts @@ -0,0 +1,533 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +// Copyright 2023 Facebook Inc. + +/dts-v1/; +#include "aspeed-g6.dtsi" +#include +#include + +/ { + model = "Facebook Minerva Harma"; + compatible = "facebook,minerva-harma", "aspeed,ast2600"; + + aliases { + serial0 = &uart1; + serial1 = &uart6; + serial2 = &uart2; + serial4 = &uart5; + + i2c20 = &imux20; + i2c21 = &imux21; + i2c22 = &imux22; + i2c23 = &imux23; + i2c24 = &imux24; + i2c25 = &imux25; + i2c26 = &imux26; + i2c27 = &imux27; + i2c28 = &imux28; + i2c29 = &imux29; + i2c30 = &imux30; + i2c31 = &imux31; + }; + + chosen { + stdout-path = &uart5; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x80000000 0x80000000>; + }; + + iio-hwmon { + compatible = "iio-hwmon"; + io-channels = <&adc0 0>, <&adc0 1>, <&adc0 2>, <&adc0 3>, + <&adc0 4>, <&adc0 5>, <&adc0 6>, <&adc0 7>, + <&adc1 2>; + }; + + leds { + compatible = "gpio-leds"; + + BMC_HEARTBEAT_N { + label = "bmc_heartbeat_n"; + gpios = <&gpio0 ASPEED_GPIO(P, 7) GPIO_ACTIVE_LOW>; + linux,default-trigger = "heartbeat"; + }; + + FM_ID_LED_N { + label = "fm_id_led_n"; + default-state = "off"; + gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +// HOST BIOS Debug +&uart1 { + status = "okay"; +}; + +// SOL Host Console +&uart2 { + status = "okay"; + pinctrl-0 = <>; +}; + +// SOL BMC Console +&uart4 { + status = "okay"; + pinctrl-0 = <>; +}; + +// BMC Debug Console +&uart5 { + status = "okay"; +}; + +// MTIA +&uart6 { + status = "okay"; +}; + +&uart_routing { + status = "okay"; +}; + +&vuart1 { + status = "okay"; + virtual; + port=<0x3e8>; + sirq = <7>; + sirq-polarity = <0>; + dma-mode; + dma-channel = <12>; +}; + +&wdt1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_wdtrst1_default>; + aspeed,reset-type = "soc"; + aspeed,external-signal; + aspeed,ext-push-pull; + aspeed,ext-active-high; + aspeed,ext-pulse-duration = <256>; +}; + +&mac3 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rmii4_default>; + no-hw-checksum; + use-ncsi; + ncsi-ctrl,start-redo-probe; + ncsi-ctrl,no-channel-monitor; + mlx,multi-host; + ncsi-package = <1>; + ncsi-channel = <1>; + ncsi-rexmit = <1>; + ncsi-timeout = <2>; +}; + +&rtc { + status = "okay"; +}; + +&fmc { + status = "okay"; + + flash@0 { + status = "okay"; + m25p,fast-read; + label = "bmc"; + spi-max-frequency = <50000000>; +#include "openbmc-flash-layout-128.dtsi" + }; + + flash@1 { + status = "okay"; + m25p,fast-read; + label = "alt-bmc"; + spi-max-frequency = <50000000>; + }; +}; + +// BIOS Flash +&spi2 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spi2_default>; + + flash@0 { + status = "okay"; + m25p,fast-read; + label = "pnor"; + spi-max-frequency = <12000000>; + spi-tx-bus-width = <2>; + spi-rx-bus-width = <2>; + }; +}; + +&kcs2 { + status = "okay"; + aspeed,lpc-io-reg = <0xca8>; +}; + +&kcs3 { + status = "okay"; + aspeed,lpc-io-reg = <0xca2>; +}; + +&i2c0 { + status = "okay"; + + pwm@30{ + compatible = "max31790"; + reg = <0x30>; + #address-cells = <1>; + #size-cells = <0>; + }; +}; + +&i2c1 { + status = "okay"; + + tmp75@4b { + compatible = "ti,tmp75"; + reg = <0x4b>; + }; +}; + +&i2c2 { + status = "okay"; + + pwm@30{ + compatible = "max31790"; + reg = <0x30>; + #address-cells = <1>; + #size-cells = <0>; + }; +}; + +&i2c3 { + status = "okay"; + + i2c-switch@70 { + compatible = "nxp,pca9543"; + reg = <0x70>; + #address-cells = <1>; + #size-cells = <0>; + + imux20: i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + }; + imux21: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + }; + }; +}; + +&i2c4 { + status = "okay"; + // PDB FRU + eeprom@52 { + compatible = "atmel,24c64"; + reg = <0x52>; + }; + + delta_brick@69 { + compatible = "pmbus"; + reg = <0x69>; + }; +}; + +&i2c5 { + status = "okay"; +}; + +&i2c6 { + status = "okay"; + + i2c-switch@70 { + compatible = "nxp,pca9543"; + reg = <0x70>; + #address-cells = <1>; + #size-cells = <0>; + + imux22: i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + }; + imux23: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + }; + }; +}; + +&i2c7 { + status = "okay"; +}; + +&i2c8 { + status = "okay"; +}; + +&i2c9 { + status = "okay"; + + gpio@30 { + compatible = "nxp,pca9555"; + reg = <0x30>; + gpio-controller; + #gpio-cells = <2>; + }; + gpio@31 { + compatible = "nxp,pca9555"; + reg = <0x31>; + gpio-controller; + #gpio-cells = <2>; + }; + + i2c-switch@71 { + compatible = "nxp,pca9546"; + reg = <0x71>; + #address-cells = <1>; + #size-cells = <0>; + + imux24: i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + }; + imux25: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + }; + imux26: i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + }; + imux27: i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + }; + }; + // PTTV FRU + eeprom@52 { + compatible = "atmel,24c64"; + reg = <0x52>; + }; +}; + +&i2c11 { + status = "okay"; +}; + +&i2c12 { + status = "okay"; +}; + +&i2c13 { + status = "okay"; + + i2c-switch@70 { + compatible = "nxp,pca9545"; + reg = <0x70>; + #address-cells = <1>; + #size-cells = <0>; + + imux28: i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + }; + imux29: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + //MB FRU + eeprom@54 { + compatible = "atmel,24c64"; + reg = <0x54>; + }; + }; + imux30: i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + }; + imux31: i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + }; + }; +}; + +// To Debug card +&i2c14 { + status = "okay"; + multi-master; + + ipmb@10 { + compatible = "ipmb-dev"; + reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>; + i2c-protocol; + }; +}; + +&i2c15 { + status = "okay"; + + // SCM FRU + eeprom@50 { + compatible = "atmel,24c64"; + reg = <0x50>; + }; + + // BSM FRU + eeprom@56 { + compatible = "atmel,24c64"; + reg = <0x56>; + }; +}; + +&adc0 { + aspeed,int-vref-microvolt = <2500000>; + status = "okay"; + pinctrl-0 = <&pinctrl_adc0_default &pinctrl_adc1_default + &pinctrl_adc2_default &pinctrl_adc3_default + &pinctrl_adc4_default &pinctrl_adc5_default + &pinctrl_adc6_default &pinctrl_adc7_default>; +}; + +&adc1 { + aspeed,int-vref-microvolt = <2500000>; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_adc10_default>; +}; + +&ehci0 { + status = "okay"; +}; + +&gpio0 { + pinctrl-names = "default"; + gpio-line-names = + /*A0-A7*/ "","","","","","","","", + /*B0-B7*/ "","","","", + "FM_BMC_MUX_CS_SPI_SEL_0","FM_ID_LED_N","","", + /*C0-C7*/ "","","","","","","","", + /*D0-D7*/ "","","SOL_UART_SET","","","","","", + /*E0-E7*/ "","","","","","","","", + /*F0-F7*/ "","","","","","","","", + /*G0-G7*/ "","","","","","","","", + /*H0-H7*/ "","","","","","","","", + /*I0-I7*/ "","","","","","","","", + /*J0-J7*/ "","","","","","","","", + /*K0-K7*/ "","","","","","","","", + /*L0-L7*/ "","","","","","","","", + /*M0-M7*/ "","","","","","","","", + /*N0-N7*/ "LED_POSTCODE_0","LED_POSTCODE_1", + "LED_POSTCODE_2","LED_POSTCODE_3", + "LED_POSTCODE_4","LED_POSTCODE_5", + "LED_POSTCODE_6","LED_POSTCODE_7", + /*O0-O7*/ "","","","","","","","", + /*P0-P7*/ "FP_SYS_PWRBTN_IN_N","BMC_SYS_PWRBTN_OUT_N", + "FP_RST_BTN_IN_N","","","","","", + /*Q0-Q7*/ "","","","","","","","", + /*R0-R7*/ "","","","","","","","", + /*S0-S7*/ "","","","","","","","", + /*T0-T7*/ "","","","","","","","", + /*U0-U7*/ "","","","","","","","", + /*V0-V7*/ "","","","","BAT_DETECT","","","", + /*W0-W7*/ "","","","","","","","", + /*X0-X7*/ "","","","","","","","", + /*Y0-Y7*/ "","","","","","","","", + /*Z0-Z7*/ "","","","","","","",""; +}; + +&sgpiom0 { + status = "okay"; + max-ngpios = <128>; + ngpios = <128>; + bus-frequency = <2000000>; + gpio-line-names = + /*in - out - in - out */ + /*A0-A3 line 0-7*/ + "","","","","","","","", + /*A4-A7 line 8-15*/ + "","","","","","","","", + /*B0-B3 line 16-23*/ + "","","","","","FM_ID_LED_N","","", + /*B4-B7 line 24-31*/ + "","","","","","","","", + /*C0-C3 line 32-39*/ + "","","","","","","","", + /*C4-C7 line 40-47*/ + "","","","","","","","", + /*D0-D3 line 48-55*/ + "","","","","","","","", + /*D4-D7 line 56-63*/ + "","","","","PLD_SYS_POWER_GOOD","","","", + /*E0-E3 line 64-71*/ + "","","PLD_BIOS_POST_CMPLT_N","","","","","BMC_RST_BTN_OUT_N", + /*E4-E7 line 72-79*/ + "","RST_CPU_KBRST_N","","","","","","", + /*F0-F3 line 80-87*/ + "","","","","","","","", + /*F4-F7 line 88-95*/ + "","","","","","","","", + /*G0-G3 line 96-103*/ + "","","","","","","","", + /*G4-G7 line 104-111*/ + "","","","","","","","", + /*H0-H3 line 112-119*/ + "","","","","","","","", + /*H4-H7 line 120-127*/ + "","","","","","","","", + /*I0-I3 line 128-135*/ + "","","","","","","","", + /*I4-I7 line 136-143*/ + "","","","","","","","", + /*J0-J3 line 144-151*/ + "","","","","","","","", + /*J4-J7 line 152-159*/ + "","","","","","","","", + /*K0-K3 line 160-167*/ + "","","","","","","","", + /*K4-K7 line 168-175*/ + "","","","","","","","", + /*L0-L3 line 176-183*/ + "","","","","","","","", + /*L4-L7 line 184-191*/ + "","","","","","","","", + /*M0-M3 line 192-199*/ + "","","","","","","","", + /*M4-M7 line 200-207*/ + "","","","","","","","", + /*N0-N3 line 208-215*/ + "","","","","","","","", + /*N4-N7 line 216-223*/ + "","","","","","","","", + /*O0-O3 line 224-231*/ + "","","","","","","","", + /*O4-O7 line 232-239*/ + "","","","","","","","", + /*P0-P3 line 240-247*/ + "","","","","","","","", + /*P4-P7 line 248-255*/ + "","","","","","","",""; +};