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[135.19.110.125]) by smtp.gmail.com with ESMTPSA id bi8-20020a05620a318800b007671cfe8a18sm2833350qkb.13.2023.11.14.09.44.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Nov 2023 09:44:00 -0800 (PST) From: Jonathan Marek To: freedreno@lists.freedesktop.org Cc: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter , Jessica Zhang , Konrad Dybcio , Jiasheng Jiang , Vinod Koul , linux-arm-msm@vger.kernel.org (open list:DRM DRIVER FOR MSM ADRENO GPU), dri-devel@lists.freedesktop.org (open list:DRM DRIVER FOR MSM ADRENO GPU), linux-kernel@vger.kernel.org (open list) Subject: [PATCH 1/4] drm/msm/dsi: set VIDEO_COMPRESSION_MODE_CTRL_WC (fix video mode DSC) Date: Tue, 14 Nov 2023 12:42:13 -0500 Message-Id: <20231114174218.19765-1-jonathan@marek.ca> X-Mailer: git-send-email 2.26.1 MIME-Version: 1.0 X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on groat.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (groat.vger.email [0.0.0.0]); Tue, 14 Nov 2023 09:44:33 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1782562300913295536 X-GMAIL-MSGID: 1782562300913295536 Video mode DSC won't work if this field is not set correctly. Set it to fix video mode DSC (for slice_per_pkt==1 cases at least). Fixes: 08802f515c3 ("drm/msm/dsi: Add support for DSC configuration") Signed-off-by: Jonathan Marek --- drivers/gpu/drm/msm/dsi/dsi_host.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c index 9d355cdc3ec1..bddc57726fb9 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_host.c +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c @@ -847,6 +847,7 @@ static void dsi_update_dsc_timing(struct msm_dsi_host *msm_host, bool is_cmd_mod u32 slice_per_intf, total_bytes_per_intf; u32 pkt_per_line; u32 eol_byte_num; + u32 bytes_per_pkt; /* first calculate dsc parameters and then program * compress mode registers @@ -854,6 +855,7 @@ static void dsi_update_dsc_timing(struct msm_dsi_host *msm_host, bool is_cmd_mod slice_per_intf = msm_dsc_get_slices_per_intf(dsc, hdisplay); total_bytes_per_intf = dsc->slice_chunk_size * slice_per_intf; + bytes_per_pkt = dsc->slice_chunk_size; /* * slice_per_pkt; */ eol_byte_num = total_bytes_per_intf % 3; @@ -891,6 +893,7 @@ static void dsi_update_dsc_timing(struct msm_dsi_host *msm_host, bool is_cmd_mod dsi_write(msm_host, REG_DSI_COMMAND_COMPRESSION_MODE_CTRL, reg_ctrl); dsi_write(msm_host, REG_DSI_COMMAND_COMPRESSION_MODE_CTRL2, reg_ctrl2); } else { + reg |= DSI_VIDEO_COMPRESSION_MODE_CTRL_WC(bytes_per_pkt); dsi_write(msm_host, REG_DSI_VIDEO_COMPRESSION_MODE_CTRL, reg); } } From patchwork Tue Nov 14 17:42:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonathan Marek X-Patchwork-Id: 165029 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:6358:a59:b0:164:83eb:24d7 with SMTP id 25csp2090918rwb; Tue, 14 Nov 2023 09:44:41 -0800 (PST) X-Google-Smtp-Source: AGHT+IGHf340Qzj1DAuBKOC4rJjJyizWoWBJFwrAJeTGq5KAKx7y7PyzAtKlK+76invxEvwLIbgE X-Received: by 2002:a05:6a20:1450:b0:157:e4c6:766a with SMTP id a16-20020a056a20145000b00157e4c6766amr8256233pzi.41.1699983881185; Tue, 14 Nov 2023 09:44:41 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1699983881; cv=none; d=google.com; s=arc-20160816; b=vWC7XD1zIHvcN12cRZm4w1txhxoDEYWJS8Oh8EEOls7jis2rukCSXMv17d/gLvCm6A fR6z3T2HiU35MuLcDPhKPhSxq7MeNxVsxUJYJ7ED0B8+Yy7S5XqHMbjdFvgd/k6MfpR/ rUHErBLKe+Q7ZzElRANSk5Hm9bX0ZUyIGAyk5l20jZVQdXhIGehAygnrNYoTYAydcRii ic8MFaW/dygtes+uhwjItj/aZu67un/03c+uWjVGn/N5Snz41f+YSTB7pdXHEyFFkR2d xHceimWnPzj0ZiAJpl2GVDHVBdTyxDD0hh7VV+nABvBPq+SosDPEMhGhZ97RJmvrayXO OlHg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=X/Se8NuL5JKZV2azJTKlvFmjep69ofpc3jvqTI1b0ug=; fh=LaCKDShnR+ozrrSQ0mRdij6kZAEWj/Wyvmszaw04AvU=; b=nkCUmRtrM37glyh2TrSzwoqzmRsLm9J6U2SUFSCRr9dJrEZqBWFZus6m3PpVf/AT/b bhA9S87DrEVqWUYdtauFb+A5uHdzsupL8+o4PdGRjI+K+bwuNiqp/ANJQMfeJaKdC6xX O4sa1qq2yXa8DuK3kWf9NxTfK6AgiNL0n/54ieUNr6GYU908j3NOgAUD5OmhPLGoX8k/ 1vAtWS4Axp5IMbuE41g94XjV63Fu2/EVnxGq3AbQi2qcI7vzj84bzKptOom+5pUrXoLH LIQOudWzj3taUJRbKTt4CnxkuiZyNQ2Cn3H4YoJAt/ntIEZFA9vxPlzD3YSgdenka0OF gpLQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@marek.ca header.s=google header.b=OC5xPt1k; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.33 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from lipwig.vger.email (lipwig.vger.email. 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[135.19.110.125]) by smtp.gmail.com with ESMTPSA id bi8-20020a05620a318800b007671cfe8a18sm2833350qkb.13.2023.11.14.09.44.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Nov 2023 09:44:03 -0800 (PST) From: Jonathan Marek To: freedreno@lists.freedesktop.org Cc: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter , Jessica Zhang , Konrad Dybcio , Jiasheng Jiang , linux-arm-msm@vger.kernel.org (open list:DRM DRIVER FOR MSM ADRENO GPU), dri-devel@lists.freedesktop.org (open list:DRM DRIVER FOR MSM ADRENO GPU), linux-kernel@vger.kernel.org (open list) Subject: [PATCH 2/4] drm/msm/dsi: add a comment to explain pkt_per_line encoding Date: Tue, 14 Nov 2023 12:42:14 -0500 Message-Id: <20231114174218.19765-2-jonathan@marek.ca> X-Mailer: git-send-email 2.26.1 In-Reply-To: <20231114174218.19765-1-jonathan@marek.ca> References: <20231114174218.19765-1-jonathan@marek.ca> MIME-Version: 1.0 X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lipwig.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (lipwig.vger.email [0.0.0.0]); Tue, 14 Nov 2023 09:44:37 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1782562297819599650 X-GMAIL-MSGID: 1782562297819599650 Make it clear why the pkt_per_line value is being "divided by 2". Signed-off-by: Jonathan Marek --- drivers/gpu/drm/msm/dsi/dsi_host.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c index bddc57726fb9..2ea2fc105fbf 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_host.c +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c @@ -875,6 +875,8 @@ static void dsi_update_dsc_timing(struct msm_dsi_host *msm_host, bool is_cmd_mod /* DSI_VIDEO_COMPRESSION_MODE & DSI_COMMAND_COMPRESSION_MODE * registers have similar offsets, so for below common code use * DSI_VIDEO_COMPRESSION_MODE_XXXX for setting bits + * + * pkt_per_line is log2 encoded, >>1 works for supported values (1,2,4) */ reg |= DSI_VIDEO_COMPRESSION_MODE_CTRL_PKT_PER_LINE(pkt_per_line >> 1); reg |= DSI_VIDEO_COMPRESSION_MODE_CTRL_EOL_BYTE_NUM(eol_byte_num); From patchwork Tue Nov 14 17:42:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonathan Marek X-Patchwork-Id: 165031 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:6358:a59:b0:164:83eb:24d7 with SMTP id 25csp2091111rwb; Tue, 14 Nov 2023 09:44:59 -0800 (PST) X-Google-Smtp-Source: AGHT+IFeQuKJOwRaQR2/21vu9RWCmuOrTwsLoEApwleh2Ci3lfJqeZMlDMjf8fZEOdq1Yz5LDeVD X-Received: by 2002:a05:6a00:2314:b0:68f:dcc1:4bef with SMTP id h20-20020a056a00231400b0068fdcc14befmr12681363pfh.7.1699983898794; Tue, 14 Nov 2023 09:44:58 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1699983898; cv=none; d=google.com; s=arc-20160816; b=zYZ4dc261Ap4n2YLvMeVU0drS35cE2GfSkNskrLxq88oYVffGX8Vg0OLPEJ/5+0nY8 gHRKPsxNP0juQEqbgy4jTNYxcn3Fitm0qY3fluGRKSwCrY+mi10E245i58ETFqkkqn9h odCtRfRYZuQDWenU9Y5+MyuyZlJa+n3ovmk6NE469PrrJ5dmwJ732YiFNW6ai9Ari/9o yseTDlry1KcAxlk5RWxCqVNW7oOzof2TEjtGAe3VAHpMP0cfk0RP0qZdn5rDdkY4lotu HC/Gi01tXClOnd7ELRH0RJXkL4Wixib6rerCJZgQen1RyZ2AdLBySZdPHBgBw3h/FxLB fNEg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=jOopcK9K4HsHFD0FhRzafDXESddDDjm1WV41GtBAoVg=; fh=hNzy279nNrT6vqFZVGbdEj98BPqlmJm87ylu2ANBV4I=; b=PTYQXy6D66TPr3NaIwd4scy7DnHulkert+kmdymXAx6lnMrqljRDzmw9uWUb3UvV6Y 88R7ngEPupFhV83I/Hdax087hvKzVqOpvwRQ9ZnrA7027LGHlztMg71L+7H0jCI9fchK c1DowBmfh4RsP85YUj/jdb5QOFkmjE/pElvLkkTGKzToHfEUm87T2kCf+mqWpUzgUX5z pdB53pKrAIEU0j/zxJ6MJ6pJI+av+2mJm1qDrOv54ChGlbkq4l00VIyLRKkj4LdTsxtd LrO2m+0e60vpMbZKeyVFrtyb0kEvSzB2nTxAXAieR/M4xkgKEKVrW2BNqD1DBdbL/grD 8RHw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@marek.ca header.s=google header.b=NNOlHeT6; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:8 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from fry.vger.email (fry.vger.email. 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[135.19.110.125]) by smtp.gmail.com with ESMTPSA id bi8-20020a05620a318800b007671cfe8a18sm2833350qkb.13.2023.11.14.09.44.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Nov 2023 09:44:07 -0800 (PST) From: Jonathan Marek To: freedreno@lists.freedesktop.org Cc: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Jessica Zhang , Konrad Dybcio , Jiasheng Jiang , linux-arm-msm@vger.kernel.org (open list:DRM DRIVER FOR MSM ADRENO GPU), dri-devel@lists.freedesktop.org (open list:DRM DRIVER FOR MSM ADRENO GPU), linux-kernel@vger.kernel.org (open list) Subject: [PATCH 3/4] drm/msm/dsi: support DSC configurations with slice_per_pkt > 1 Date: Tue, 14 Nov 2023 12:42:15 -0500 Message-Id: <20231114174218.19765-3-jonathan@marek.ca> X-Mailer: git-send-email 2.26.1 In-Reply-To: <20231114174218.19765-1-jonathan@marek.ca> References: <20231114174218.19765-1-jonathan@marek.ca> MIME-Version: 1.0 X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on fry.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (fry.vger.email [0.0.0.0]); Tue, 14 Nov 2023 09:44:52 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1782562316932868385 X-GMAIL-MSGID: 1782562316932868385 Add a dsc_slice_per_pkt field to mipi_dsi_device struct and the necessary changes to msm driver to support this field. Note that the removed "pkt_per_line = slice_per_intf * slice_per_pkt" comment is incorrect. Signed-off-by: Jonathan Marek --- drivers/gpu/drm/msm/dsi/dsi_host.c | 25 ++++++++++--------------- include/drm/drm_mipi_dsi.h | 1 + 2 files changed, 11 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c index 2ea2fc105fbf..7284346ab787 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_host.c +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c @@ -161,6 +161,7 @@ struct msm_dsi_host { struct drm_display_mode *mode; struct drm_dsc_config *dsc; + unsigned int dsc_slice_per_pkt; /* connected device info */ unsigned int channel; @@ -855,17 +856,10 @@ static void dsi_update_dsc_timing(struct msm_dsi_host *msm_host, bool is_cmd_mod slice_per_intf = msm_dsc_get_slices_per_intf(dsc, hdisplay); total_bytes_per_intf = dsc->slice_chunk_size * slice_per_intf; - bytes_per_pkt = dsc->slice_chunk_size; /* * slice_per_pkt; */ + bytes_per_pkt = dsc->slice_chunk_size * msm_host->dsc_slice_per_pkt; eol_byte_num = total_bytes_per_intf % 3; - - /* - * Typically, pkt_per_line = slice_per_intf * slice_per_pkt. - * - * Since the current driver only supports slice_per_pkt = 1, - * pkt_per_line will be equal to slice per intf for now. - */ - pkt_per_line = slice_per_intf; + pkt_per_line = slice_per_intf / msm_host->dsc_slice_per_pkt; if (is_cmd_mode) /* packet data type */ reg = DSI_COMMAND_COMPRESSION_MODE_CTRL_STREAM0_DATATYPE(MIPI_DSI_DCS_LONG_WRITE); @@ -1002,12 +996,8 @@ static void dsi_timing_setup(struct msm_dsi_host *msm_host, bool is_bonded_dsi) else /* * When DSC is enabled, WC = slice_chunk_size * slice_per_pkt + 1. - * Currently, the driver only supports default value of slice_per_pkt = 1 - * - * TODO: Expand mipi_dsi_device struct to hold slice_per_pkt info - * and adjust DSC math to account for slice_per_pkt. */ - wc = msm_host->dsc->slice_chunk_size + 1; + wc = msm_host->dsc->slice_chunk_size * msm_host->dsc_slice_per_pkt + 1; dsi_write(msm_host, REG_DSI_CMD_MDP_STREAM0_CTRL, DSI_CMD_MDP_STREAM0_CTRL_WORD_COUNT(wc) | @@ -1634,8 +1624,13 @@ static int dsi_host_attach(struct mipi_dsi_host *host, msm_host->lanes = dsi->lanes; msm_host->format = dsi->format; msm_host->mode_flags = dsi->mode_flags; - if (dsi->dsc) + if (dsi->dsc) { msm_host->dsc = dsi->dsc; + msm_host->dsc_slice_per_pkt = dsi->dsc_slice_per_pkt; + /* for backwards compatibility, assume 1 if not set */ + if (!msm_host->dsc_slice_per_pkt) + msm_host->dsc_slice_per_pkt = 1; + } /* Some gpios defined in panel DT need to be controlled by host */ ret = dsi_host_init_panel_gpios(msm_host, &dsi->dev); diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h index c9df0407980c..3e32fa52d94b 100644 --- a/include/drm/drm_mipi_dsi.h +++ b/include/drm/drm_mipi_dsi.h @@ -193,6 +193,7 @@ struct mipi_dsi_device { unsigned long hs_rate; unsigned long lp_rate; struct drm_dsc_config *dsc; + unsigned int dsc_slice_per_pkt; }; #define MIPI_DSI_MODULE_PREFIX "mipi-dsi:" From patchwork Tue Nov 14 17:42:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonathan Marek X-Patchwork-Id: 165032 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:6358:a59:b0:164:83eb:24d7 with SMTP id 25csp2091117rwb; Tue, 14 Nov 2023 09:44:59 -0800 (PST) X-Google-Smtp-Source: AGHT+IEgoLkMLN/mUOyTYkIWtvQf7y8ifsUz1VfYuf6grU0XGYb1R/dUPwOS6UsTUWE8hX8uFOsl X-Received: by 2002:a05:6a20:7fa6:b0:159:e4ab:15ce with SMTP id d38-20020a056a207fa600b00159e4ab15cemr5018579pzj.15.1699983899391; Tue, 14 Nov 2023 09:44:59 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1699983899; cv=none; d=google.com; s=arc-20160816; b=VaGcro09NqcEZcc6PMM2WrKBputAK5iZ7yN8H81Ym6qHMsDUZKRX/nq4QOpuTO7jU/ +0Zkdhe9hZuY02rsdyAEAbXY845UlKvbfZ5f5EDVMB85HzmzK/CPsUnoDrE6KMZkTJak gbqYiYlQKxerif+ORf2y43d4R9GpYHHgTcBykLidDUl4gfl/uQJ8NoC4ZCoqi9S/7E4h JZpqz37g4o6m7GpndtviarqJKqzXm8mXOMCaRtbFFl1ns/TLNFMZ2PQVrZtA5RKAKDh6 +LqQvjondW/9yv3qbQbBmw8B6PgphPXVDyLY1Dp8HdHsgcUWRkuF++DvnvIgMuEl8N0j qSfg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=LxJSud2bUpEWb5+zdKhsCdpc+jFCEiyn/rkkbqMyRnU=; fh=fJLioXbYvMLR8h+77QRpLrDtdTQfyALOiDgPhzA9oJM=; b=MieB3hO6IFrGcbg+kblMbCMXSFCQ8FaqfcLK83GUU6IS00NRFeHAnfdbAA+NIbfG9f lLlV+F5FVryK8Uu5J5SW+YVlb5ESQ3GiKqb0J2G4m67RG4BQY7UCMwltpxpBumP1G56c RAg2Dh011ys4Y0k6HOopd1qt3qqBc4bX7clPXqF58ycGjz7IZrF9/EICBwX8dSMVXhno c3SbnsKRXOFtsd6DDP1ij0t4JS99fBMOU3vHsC2332+ujyZCyL+C+mqCDeA4fnrlHZ+P x8/LMD3dXSQqRzSd37W3XLRGzi8/oZ8U6N8Po8lE9Ys1c3GIeqSPyEK2iETQYS+ZlENk 257g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@marek.ca header.s=google header.b=H46kxdtM; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.33 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from lipwig.vger.email (lipwig.vger.email. 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[135.19.110.125]) by smtp.gmail.com with ESMTPSA id bi8-20020a05620a318800b007671cfe8a18sm2833350qkb.13.2023.11.14.09.44.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Nov 2023 09:44:13 -0800 (PST) From: Jonathan Marek To: freedreno@lists.freedesktop.org Cc: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter , Jessica Zhang , Konrad Dybcio , Jiasheng Jiang , Doug Anderson , linux-arm-msm@vger.kernel.org (open list:DRM DRIVER FOR MSM ADRENO GPU), dri-devel@lists.freedesktop.org (open list:DRM DRIVER FOR MSM ADRENO GPU), linux-kernel@vger.kernel.org (open list) Subject: [PATCH 4/4] drm/msm/dsi: fix DSC for the bonded DSI case Date: Tue, 14 Nov 2023 12:42:16 -0500 Message-Id: <20231114174218.19765-4-jonathan@marek.ca> X-Mailer: git-send-email 2.26.1 In-Reply-To: <20231114174218.19765-1-jonathan@marek.ca> References: <20231114174218.19765-1-jonathan@marek.ca> MIME-Version: 1.0 X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lipwig.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (lipwig.vger.email [0.0.0.0]); Tue, 14 Nov 2023 09:44:54 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1782562317102048866 X-GMAIL-MSGID: 1782562317102048866 For the bonded DSI case, DSC pic_width and timing calculations should use the width of a single panel instead of the total combined width. Signed-off-by: Jonathan Marek --- drivers/gpu/drm/msm/dsi/dsi.h | 3 ++- drivers/gpu/drm/msm/dsi/dsi_host.c | 20 +++++++++++--------- drivers/gpu/drm/msm/dsi/dsi_manager.c | 2 +- 3 files changed, 14 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/msm/dsi/dsi.h b/drivers/gpu/drm/msm/dsi/dsi.h index 28379b1af63f..3a641e69447c 100644 --- a/drivers/gpu/drm/msm/dsi/dsi.h +++ b/drivers/gpu/drm/msm/dsi/dsi.h @@ -93,7 +93,8 @@ int msm_dsi_host_power_off(struct mipi_dsi_host *host); int msm_dsi_host_set_display_mode(struct mipi_dsi_host *host, const struct drm_display_mode *mode); enum drm_mode_status msm_dsi_host_check_dsc(struct mipi_dsi_host *host, - const struct drm_display_mode *mode); + const struct drm_display_mode *mode, + bool is_bonded_dsi); unsigned long msm_dsi_host_get_mode_flags(struct mipi_dsi_host *host); int msm_dsi_host_register(struct mipi_dsi_host *host); void msm_dsi_host_unregister(struct mipi_dsi_host *host); diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c index 7284346ab787..a6286eb9d006 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_host.c +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c @@ -938,8 +938,7 @@ static void dsi_timing_setup(struct msm_dsi_host *msm_host, bool is_bonded_dsi) mode->hdisplay, mode->vdisplay); return; } - - dsc->pic_width = mode->hdisplay; + dsc->pic_width = hdisplay; dsc->pic_height = mode->vdisplay; DBG("Mode %dx%d\n", dsc->pic_width, dsc->pic_height); @@ -950,6 +949,11 @@ static void dsi_timing_setup(struct msm_dsi_host *msm_host, bool is_bonded_dsi) if (ret) return; + if (msm_host->mode_flags & MIPI_DSI_MODE_VIDEO) + dsi_update_dsc_timing(msm_host, false, hdisplay); + else + dsi_update_dsc_timing(msm_host, true, hdisplay); + /* Divide the display by 3 but keep back/font porch and * pulse width same */ @@ -966,9 +970,6 @@ static void dsi_timing_setup(struct msm_dsi_host *msm_host, bool is_bonded_dsi) } if (msm_host->mode_flags & MIPI_DSI_MODE_VIDEO) { - if (msm_host->dsc) - dsi_update_dsc_timing(msm_host, false, mode->hdisplay); - dsi_write(msm_host, REG_DSI_ACTIVE_H, DSI_ACTIVE_H_START(ha_start) | DSI_ACTIVE_H_END(ha_end)); @@ -987,9 +988,6 @@ static void dsi_timing_setup(struct msm_dsi_host *msm_host, bool is_bonded_dsi) DSI_ACTIVE_VSYNC_VPOS_START(vs_start) | DSI_ACTIVE_VSYNC_VPOS_END(vs_end)); } else { /* command mode */ - if (msm_host->dsc) - dsi_update_dsc_timing(msm_host, true, mode->hdisplay); - /* image data and 1 byte write_memory_start cmd */ if (!msm_host->dsc) wc = hdisplay * dsi_get_bpp(msm_host->format) / 8 + 1; @@ -2487,7 +2485,8 @@ int msm_dsi_host_set_display_mode(struct mipi_dsi_host *host, } enum drm_mode_status msm_dsi_host_check_dsc(struct mipi_dsi_host *host, - const struct drm_display_mode *mode) + const struct drm_display_mode *mode, + bool is_bonded_dsi) { struct msm_dsi_host *msm_host = to_msm_dsi_host(host); struct drm_dsc_config *dsc = msm_host->dsc; @@ -2497,6 +2496,9 @@ enum drm_mode_status msm_dsi_host_check_dsc(struct mipi_dsi_host *host, if (!msm_host->dsc) return MODE_OK; + if (is_bonded_dsi) + pic_width = mode->hdisplay / 2; + if (pic_width % dsc->slice_width) { pr_err("DSI: pic_width %d has to be multiple of slice %d\n", pic_width, dsc->slice_width); diff --git a/drivers/gpu/drm/msm/dsi/dsi_manager.c b/drivers/gpu/drm/msm/dsi/dsi_manager.c index 896f369fdd53..2ca1a7ca3659 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_manager.c +++ b/drivers/gpu/drm/msm/dsi/dsi_manager.c @@ -455,7 +455,7 @@ static enum drm_mode_status dsi_mgr_bridge_mode_valid(struct drm_bridge *bridge, return MODE_ERROR; } - return msm_dsi_host_check_dsc(host, mode); + return msm_dsi_host_check_dsc(host, mode, IS_BONDED_DSI()); } static const struct drm_bridge_funcs dsi_mgr_bridge_funcs = {