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(unknown [IPv6:240e:358:11b3:9500:dc73:854d:832e:2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (Client did not present a certificate) (Authenticated sender: xry111@xry111.site) by xry111.site (Postfix) with ESMTPSA id 5D34066B06; Mon, 13 Nov 2023 15:08:48 -0500 (EST) From: Xi Ruoyao To: gcc-patches@gcc.gnu.org Cc: chenglulu , i@xen0n.name, xuchenghua@loongson.cn, Xi Ruoyao Subject: [PATCH] LoongArch: Handle vectorized copysign (x, -1) expansion efficiently Date: Tue, 14 Nov 2023 04:07:14 +0800 Message-ID: <20231113200840.339229-1-xry111@xry111.site> X-Mailer: git-send-email 2.42.1 MIME-Version: 1.0 X-Spam-Status: No, score=-9.0 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, LIKELY_SPAM_FROM, SPF_HELO_PASS, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1782480800352589998 X-GMAIL-MSGID: 1782480800352589998 With LSX or LASX, copysign (x[i], -1) (or any negative constant) can be vectorized using [x]vbitseti.{w/d} instructions to directly set the signbits. Inspired by Tamar Christina's "AArch64: Handle copysign (x, -1) expansion efficiently" (r14-5289). gcc/ChangeLog: * config/loongarch/lsx.md (copysign3): Allow operand[2] to be an reg_or_vector_same_val_operand. If it's a const vector with same negative elements, expand the copysign with a bitset instruction. Otherwise, force it into an register. * config/loongarch/lasx.md (copysign3): Likewise. gcc/testsuite/ChangeLog: * g++.target/loongarch/vect-copysign-negconst.C: New test. * g++.target/loongarch/vect-copysign-negconst-run.C: New test. --- Bootstrapped and regtested on loongarch64-linux-gnu. Ok for trunk? gcc/config/loongarch/lasx.md | 22 ++++++++- gcc/config/loongarch/lsx.md | 22 ++++++++- .../loongarch/vect-copysign-negconst-run.C | 47 +++++++++++++++++++ .../loongarch/vect-copysign-negconst.C | 27 +++++++++++ 4 files changed, 116 insertions(+), 2 deletions(-) create mode 100644 gcc/testsuite/g++.target/loongarch/vect-copysign-negconst-run.C create mode 100644 gcc/testsuite/g++.target/loongarch/vect-copysign-negconst.C diff --git a/gcc/config/loongarch/lasx.md b/gcc/config/loongarch/lasx.md index f0f2dd08dd8..2e11f061202 100644 --- a/gcc/config/loongarch/lasx.md +++ b/gcc/config/loongarch/lasx.md @@ -3136,11 +3136,31 @@ (define_expand "copysign3" (match_operand:FLASX 1 "register_operand"))) (set (match_dup 5) (and:FLASX (match_dup 3) - (match_operand:FLASX 2 "register_operand"))) + (match_operand:FLASX 2 "reg_or_vector_same_val_operand"))) (set (match_operand:FLASX 0 "register_operand") (ior:FLASX (match_dup 4) (match_dup 5)))] "ISA_HAS_LASX" { + /* copysign (x, -1) should instead be expanded as setting the sign + bit. */ + if (!REG_P (operands[2])) + { + rtx op2_elt = unwrap_const_vec_duplicate (operands[2]); + if (GET_CODE (op2_elt) == CONST_DOUBLE + && real_isneg (CONST_DOUBLE_REAL_VALUE (op2_elt))) + { + rtx n = GEN_INT (8 * GET_MODE_SIZE (mode) - 1); + operands[0] = lowpart_subreg (mode, operands[0], + mode); + operands[1] = lowpart_subreg (mode, operands[1], + mode); + emit_insn (gen_lasx_xvbitseti_ (operands[0], + operands[1], n)); + DONE; + } + } + + operands[2] = force_reg (mode, operands[2]); operands[3] = loongarch_build_signbit_mask (mode, 1, 0); operands[4] = gen_reg_rtx (mode); diff --git a/gcc/config/loongarch/lsx.md b/gcc/config/loongarch/lsx.md index 55c7d79a030..8ea41c85b01 100644 --- a/gcc/config/loongarch/lsx.md +++ b/gcc/config/loongarch/lsx.md @@ -2873,11 +2873,31 @@ (define_expand "copysign3" (match_operand:FLSX 1 "register_operand"))) (set (match_dup 5) (and:FLSX (match_dup 3) - (match_operand:FLSX 2 "register_operand"))) + (match_operand:FLSX 2 "reg_or_vector_same_val_operand"))) (set (match_operand:FLSX 0 "register_operand") (ior:FLSX (match_dup 4) (match_dup 5)))] "ISA_HAS_LSX" { + /* copysign (x, -1) should instead be expanded as setting the sign + bit. */ + if (!REG_P (operands[2])) + { + rtx op2_elt = unwrap_const_vec_duplicate (operands[2]); + if (GET_CODE (op2_elt) == CONST_DOUBLE + && real_isneg (CONST_DOUBLE_REAL_VALUE (op2_elt))) + { + rtx n = GEN_INT (8 * GET_MODE_SIZE (mode) - 1); + operands[0] = lowpart_subreg (mode, operands[0], + mode); + operands[1] = lowpart_subreg (mode, operands[1], + mode); + emit_insn (gen_lsx_vbitseti_ (operands[0], operands[1], + n)); + DONE; + } + } + + operands[2] = force_reg (mode, operands[2]); operands[3] = loongarch_build_signbit_mask (mode, 1, 0); operands[4] = gen_reg_rtx (mode); diff --git a/gcc/testsuite/g++.target/loongarch/vect-copysign-negconst-run.C b/gcc/testsuite/g++.target/loongarch/vect-copysign-negconst-run.C new file mode 100644 index 00000000000..d2d5d15c933 --- /dev/null +++ b/gcc/testsuite/g++.target/loongarch/vect-copysign-negconst-run.C @@ -0,0 +1,47 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -march=loongarch64 -mlasx -mno-strict-align" } */ +/* { dg-require-effective-target loongarch_asx_hw } */ + +#include "vect-copysign-negconst.C" + +double d[] = {1.2, -3.4, -5.6, 7.8}; +float f[] = {1.2, -3.4, -5.6, 7.8, -9.0, -11.4, 51.4, 1919.810}; + +double _abs(double x) { return __builtin_fabs (x); } +float _abs(float x) { return __builtin_fabsf (x); } + +template +void +check (T *arr, T *orig, int len) +{ + for (int i = 0; i < len; i++) + { + if (arr[i] > 0) + __builtin_trap (); + if (_abs (arr[i]) != _abs (orig[i])) + __builtin_trap (); + } +} + +int +main() +{ + double test_d[4]; + float test_f[8]; + + __builtin_memcpy (test_d, d, sizeof (test_d)); + force_negative<2> (test_d); + check (test_d, d, 2); + + __builtin_memcpy (test_d, d, sizeof (test_d)); + force_negative<4> (test_d); + check (test_d, d, 4); + + __builtin_memcpy (test_f, f, sizeof (test_f)); + force_negative<4> (test_f); + check (test_f, f, 4); + + __builtin_memcpy (test_f, f, sizeof (test_f)); + force_negative<8> (test_f); + check (test_f, f, 8); +} diff --git a/gcc/testsuite/g++.target/loongarch/vect-copysign-negconst.C b/gcc/testsuite/g++.target/loongarch/vect-copysign-negconst.C new file mode 100644 index 00000000000..5e8820d2bca --- /dev/null +++ b/gcc/testsuite/g++.target/loongarch/vect-copysign-negconst.C @@ -0,0 +1,27 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -march=loongarch64 -mlasx -mno-strict-align" } */ +/* { dg-final { scan-assembler "\txvbitseti.*63" } } */ +/* { dg-final { scan-assembler "\txvbitseti.*31" } } */ +/* { dg-final { scan-assembler "\tvbitseti.*63" } } */ +/* { dg-final { scan-assembler "\tvbitseti.*31" } } */ + +template +__attribute__ ((noipa)) void +force_negative (float *arr) +{ + for (int i = 0; i < N; i++) + arr[i] = __builtin_copysignf (arr[i], -2); +} + +template +__attribute__ ((noipa)) void +force_negative (double *arr) +{ + for (int i = 0; i < N; i++) + arr[i] = __builtin_copysign (arr[i], -3); +} + +template void force_negative<4>(float *); +template void force_negative<8>(float *); +template void force_negative<2>(double *); +template void force_negative<4>(double *);