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[23.233.12.249]) by smtp.gmail.com with ESMTPSA id m13-20020a05621402ad00b0065b02eaeee7sm2996910qvv.83.2023.11.10.08.48.25 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 10 Nov 2023 08:48:25 -0800 (PST) Message-ID: <6aeff2d2-55af-2d2c-0542-dd2cd9c2e607@redhat.com> Date: Fri, 10 Nov 2023 11:48:25 -0500 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.13.0 To: "gcc-patches@gcc.gnu.org" From: Vladimir Makarov Subject: [pushed][PR112337][IRA]: Check autoinc and memory address after temporary equivalence substitution X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Language: en-US X-Spam-Status: No, score=-11.8 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1782196410350000775 X-GMAIL-MSGID: 1782196410350000775 The following patch fixes https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112337 The patch was successfully bootstrapped an tested on x86-64, ppc64le, and aarch64. commit b3d1d30eeed67c78e223c146a464d2fdd1dde894 Author: Vladimir N. Makarov Date: Fri Nov 10 11:14:46 2023 -0500 [IRA]: Check autoinc and memory address after temporary equivalence substitution My previous RA patches to take register equivalence into account do temporary register equivalence substitution to find out that the equivalence can be consumed by insns. The insn with the substitution is checked on validity using target-depended code. This code expects that autoinc operations work on register but this register can be substituted by equivalent memory. The patch fixes this problem. The patch also adds checking that the substitution can be consumed in memory address too. gcc/ChangeLog: PR target/112337 * ira-costs.cc: (validate_autoinc_and_mem_addr_p): New function. (equiv_can_be_consumed_p): Use it. gcc/testsuite/ChangeLog: PR target/112337 * gcc.target/arm/pr112337.c: New. diff --git a/gcc/ira-costs.cc b/gcc/ira-costs.cc index 50f80779025..e0528e76a64 100644 --- a/gcc/ira-costs.cc +++ b/gcc/ira-costs.cc @@ -1758,13 +1758,46 @@ process_bb_node_for_costs (ira_loop_tree_node_t loop_tree_node) process_bb_for_costs (bb); } +/* Return true if all autoinc rtx in X change only a register and memory is + valid. */ +static bool +validate_autoinc_and_mem_addr_p (rtx x) +{ + enum rtx_code code = GET_CODE (x); + if (GET_RTX_CLASS (code) == RTX_AUTOINC) + return REG_P (XEXP (x, 0)); + const char *fmt = GET_RTX_FORMAT (code); + for (int i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) + if (fmt[i] == 'e') + { + if (!validate_autoinc_and_mem_addr_p (XEXP (x, i))) + return false; + } + else if (fmt[i] == 'E') + { + for (int j = 0; j < XVECLEN (x, i); j++) + if (!validate_autoinc_and_mem_addr_p (XVECEXP (x, i, j))) + return false; + } + /* Check memory after checking autoinc to guarantee that autoinc is already + valid for machine-dependent code checking memory address. */ + return (!MEM_P (x) + || memory_address_addr_space_p (GET_MODE (x), XEXP (x, 0), + MEM_ADDR_SPACE (x))); +} + /* Check that reg REGNO can be changed by TO in INSN. Return true in case the result insn would be valid one. */ static bool equiv_can_be_consumed_p (int regno, rtx to, rtx_insn *insn) { validate_replace_src_group (regno_reg_rtx[regno], to, insn); - bool res = verify_changes (0); + /* We can change register to equivalent memory in autoinc rtl. Some code + including verify_changes assumes that autoinc contains only a register. + So check this first. */ + bool res = validate_autoinc_and_mem_addr_p (PATTERN (insn)); + if (res) + res = verify_changes (0); cancel_changes (0); return res; } diff --git a/gcc/testsuite/gcc.target/arm/pr112337.c b/gcc/testsuite/gcc.target/arm/pr112337.c new file mode 100644 index 00000000000..5dacf0aa4f8 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/pr112337.c @@ -0,0 +1,14 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -march=armv8.1-m.main+fp.dp+mve.fp -mfloat-abi=hard" } */ + +#pragma GCC arm "arm_mve_types.h" +int32x4_t h(void *p) { return __builtin_mve_vldrwq_sv4si(p); } +void g(int32x4_t); +void f(int, int, int, short, int *p) { + int *bias = p; + for (;;) { + int32x4_t d = h(bias); + bias += 4; + g(d); + } +}