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[23.128.96.37]) by mx.google.com with ESMTPS id o8-20020a656a48000000b005b8fb1e0312si10697916pgu.248.2023.11.09.18.13.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Nov 2023 18:13:25 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) client-ip=23.128.96.37; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=KLNNiMIJ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by snail.vger.email (Postfix) with ESMTP id 983F583B0266; Thu, 9 Nov 2023 18:13:24 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at snail.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345702AbjKJCNT (ORCPT + 30 others); Thu, 9 Nov 2023 21:13:19 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45058 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229682AbjKJCNR (ORCPT ); Thu, 9 Nov 2023 21:13:17 -0500 Received: from mail-yw1-x1149.google.com (mail-yw1-x1149.google.com [IPv6:2607:f8b0:4864:20::1149]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C116F4683 for ; Thu, 9 Nov 2023 18:13:15 -0800 (PST) Received: by mail-yw1-x1149.google.com with SMTP id 00721157ae682-5afe220cadeso22505017b3.3 for ; Thu, 09 Nov 2023 18:13:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1699582395; x=1700187195; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=nHi8MKAu3RoJG1H9OsREjBorzQIuSOD8CbIQ6CUD2qY=; b=KLNNiMIJUsEBuE+fkmyqU1zgGYo0EDskgFm22SyPA/VSW2593cPKpl8w+Bp+9WSJkm zgWENid06cehvL8T+Fcj/dqaZUb8quqsk1ue8GpYUx7SpaNP6HQYr8343fahXSr5Gpor pdHc8GD3TA4aJ8kSHpSScZh4dMBDLyaK0dKYEjNZP0N98xo5wcK98zzifpsjz7Sf07wE UpjXU6KkUIhIVH/cmk2pHufOgvs14n2Ys6py1LFeTc0jJ+ed3HlaGeAZGumZ653cvD38 Fvu1f8DbZhrDbjjrNb7dviLUjhU4mAep7IAtOb9k435t/Out6CTMbzgNXpC84CvPTlKc cfyw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699582395; x=1700187195; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=nHi8MKAu3RoJG1H9OsREjBorzQIuSOD8CbIQ6CUD2qY=; b=atpNTWHSuxocvgXEeeqmUQLmayYzGQsml0DGRtCU5CDQVWs6k9YcbwVKqsuxSQIjKe V3okDx+qivQWIUyTx5BlUajxXf60GMqVxLJyXLGgDKQqdYxjHaZDROmE1Lw2h1ndy8dp fAPqR2D8pjxKHTseMrUvICwBXUsIgeMZpq0h9bS9W9LesltrhSe2ylm5lQsXZggzTVWq Q8Og8ulk6nm3ly98kvXDS1eE6oxsEt9dfmGrxxuB95JByGP+i5ZyxVlPgYPV5N+BSPB6 yXeLRhN8uC/f1Q/4uVwAvzjktfLWwnui688qs1lllIEjV/m6oE2VEc1RNOkFcGrqDdoY FsvA== X-Gm-Message-State: AOJu0YzJHzYeJhx7G/yqld0pebGspAT2lpnS0u4rvnK1sKaLTgxFDqFa An1/fEgx5CpJZRqM6fcPbsdvggjyDX8= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a0d:d591:0:b0:579:f832:74b with SMTP id x139-20020a0dd591000000b00579f832074bmr200264ywd.10.1699582394899; Thu, 09 Nov 2023 18:13:14 -0800 (PST) Reply-To: Sean Christopherson Date: Thu, 9 Nov 2023 18:12:41 -0800 In-Reply-To: <20231110021306.1269082-1-seanjc@google.com> Mime-Version: 1.0 References: <20231110021306.1269082-1-seanjc@google.com> X-Mailer: git-send-email 2.42.0.869.gea05f2083d-goog Message-ID: <20231110021306.1269082-2-seanjc@google.com> Subject: [PATCH v8 01/26] KVM: x86/pmu: Always treat Fixed counters as available when supported From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Kan Liang , Dapeng Mi , Jim Mattson , Jinrong Liang , Aaron Lewis , Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Thu, 09 Nov 2023 18:13:24 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1782141320521779170 X-GMAIL-MSGID: 1782141320521779170 Treat fixed counters as available when they are supported, i.e. don't silently ignore an enabled fixed counter just because guest CPUID says the associated general purpose architectural event is unavailable. KVM originally treated fixed counters as always available, but that got changed as part of a fix to avoid confusing REF_CPU_CYCLES, which does NOT map to an architectural event, with the actual architectural event used associated with bit 7, TOPDOWN_SLOTS. The commit justified the change with: If the event is marked as unavailable in the Intel guest CPUID 0AH.EBX leaf, we need to avoid any perf_event creation, whether it's a gp or fixed counter. but that justification doesn't mesh with reality. The Intel SDM uses "architectural events" to refer to both general purpose events (the ones with the reverse polarity mask in CPUID.0xA.EBX) and the events for fixed counters, e.g. the SDM makes statements like: Each of the fixed-function PMC can count only one architectural performance event. but the fact that fixed counter 2 (TSC reference cycles) doesn't have an associated general purpose architectural makes trying to apply the mask from CPUID.0xA.EBX impossible. Furthermore, the lack of enumeration for an architectural event in CPUID only means the CPU doesn't officially support the architectural encoding, i.e. it doesn't mean using the architectural encoding _won't_ work, it sipmly means there are no guarantees that it will work as expected. E.g. if KVM is running in a VM that advertises a fixed counters but not the corresponding architectural event encoding, and perf decides to use a general purpose counter instead of a fixed counter, odds are very good that the underlying hardware actually does support the architectrual encoding, and that programming the encoding will count the right thing. In other words, asking perf to count the event will probably work, whereas intentionally doing nothing is obviously guaranteed to fail. Note, at the time of the change, KVM didn't enforce hardware support, i.e. didn't prevent userspace from enumerating support in guest CPUID.0xA.EBX for architectural events that aren't supported in hardware. I.e. silently dropping the fixed counter didn't somehow protection against counting the wrong event, it just enforced guest CPUID. And practically speaking, this issue is almost certainly limited to running KVM on a funky virtual CPU model. No known real hardware has an asymmetric PMU where a fixed counter is supported but the associated architectural event is not. Fixes: a21864486f7e ("KVM: x86/pmu: Fix available_event_types check for REF_CPU_CYCLES event") Signed-off-by: Sean Christopherson --- arch/x86/kvm/vmx/pmu_intel.c | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c index 820d3e1f6b4f..c6e227edcf8e 100644 --- a/arch/x86/kvm/vmx/pmu_intel.c +++ b/arch/x86/kvm/vmx/pmu_intel.c @@ -108,11 +108,24 @@ static bool intel_hw_event_available(struct kvm_pmc *pmc) u8 unit_mask = (pmc->eventsel & ARCH_PERFMON_EVENTSEL_UMASK) >> 8; int i; + /* + * Fixed counters are always available if KVM reaches this point. If a + * fixed counter is unsupported in hardware or guest CPUID, KVM doesn't + * allow the counter's corresponding MSR to be written. KVM does use + * architectural events to program fixed counters, as the interface to + * perf doesn't allow requesting a specific fixed counter, e.g. perf + * may (sadly) back a guest fixed PMC with a general purposed counter. + * But if _hardware_ doesn't support the associated event, KVM simply + * doesn't enumerate support for the fixed counter. + */ + if (pmc_is_fixed(pmc)) + return true; + BUILD_BUG_ON(ARRAY_SIZE(intel_arch_events) != NR_INTEL_ARCH_EVENTS); /* * Disallow events reported as unavailable in guest CPUID. Note, this - * doesn't apply to pseudo-architectural events. + * doesn't apply to pseudo-architectural events (see above). */ for (i = 0; i < NR_REAL_INTEL_ARCH_EVENTS; i++) { if (intel_arch_events[i].eventsel != event_select || From patchwork Fri Nov 10 02:12:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Christopherson X-Patchwork-Id: 163726 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b129:0:b0:403:3b70:6f57 with SMTP id q9csp836758vqs; Thu, 9 Nov 2023 18:13:29 -0800 (PST) X-Google-Smtp-Source: AGHT+IGiaQmZ0q/H6QopQlMlE+ScwRRj3UbYDbGtK/N/UBuD+gZjW27+8MweYkTQINzWvBhwwITx X-Received: by 2002:aa7:88c2:0:b0:6bd:d884:df00 with SMTP id k2-20020aa788c2000000b006bdd884df00mr6690369pff.9.1699582409548; Thu, 09 Nov 2023 18:13:29 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1699582409; cv=none; d=google.com; s=arc-20160816; b=AWadj7CuOM/UN1P6peldw8GI5RMtcs+zMizqxxPas6HahcVtzKwFKiT1GxRtj2dZNt 27HPvHEcg1bBrsFNcApcKcvJeV3TldPkoXeS5AFdoG8n/9VuXU4L3+Y2/QMHXSqhoQex DLttTOkQ4x4TDly7rqQ9BtzVgzsyW55b9u97sVwygnSrWD3EaQNQlXMUOy2kvNQ/aMZu wtIQEJYkD7hLjp0iYchG9yunHl8oIidbL+w4FoCEC4zxhiwcU9xWkcWlfTLSnei+2hhe O8HVJyY2uemLYX+iRQaWnJ+vSSUlIuvAnPsSqAzN+XB6OInfwSXFOGfdq0E4ckHRGTTf NNCQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:reply-to:dkim-signature; bh=UDNohIPayeSsIg3RbXALdysNU1ETC+6FI0uUxlFcqR8=; fh=gm96CM+cG0KJxn7vnhn0c1c98ILNP1HHUrKfrGecw3M=; b=Br3AY+ACuUabNMWmT20iohNoGlmxH7CIPEN2KLlue1PYnifJLcRFkMZzH4x/RYydtN mt+sITXCiyvKxpf+yBqNGfZvR4KonMO7Cqsw2HCWgVkw5zGA5ExLgLbo//Yci8oVx7ER QYe3ypPv5TujsCRm6+Yj6KGJBZ9/WCRzNlEkvuhJYwBHzMUAKTzJpCrSx2mdTMLE2rjx 5VRuMMs8w4E1zAyqtzd8l3440hsaXpIYgTRMLHcXYUSrIc6ViRAvDzOlIeAf/oSDHnwV LOs0/tVdmbZ8txBWyDYIWQy+3e+99de6X/Ta96gFHtJVH8RMaT6BB6SSLpWyaD608OeC YjfQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=Pk9qnSog; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from snail.vger.email (snail.vger.email. [23.128.96.37]) by mx.google.com with ESMTPS id 132-20020a63008a000000b00578acf1e8a4si8275241pga.573.2023.11.09.18.13.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Nov 2023 18:13:29 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) client-ip=23.128.96.37; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=Pk9qnSog; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by snail.vger.email (Postfix) with ESMTP id B21F983B0272; Thu, 9 Nov 2023 18:13:28 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at snail.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345713AbjKJCNX (ORCPT + 30 others); Thu, 9 Nov 2023 21:13:23 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45100 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345707AbjKJCNT (ORCPT ); Thu, 9 Nov 2023 21:13:19 -0500 Received: from mail-yb1-xb4a.google.com (mail-yb1-xb4a.google.com [IPv6:2607:f8b0:4864:20::b4a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7787A4680 for ; Thu, 9 Nov 2023 18:13:17 -0800 (PST) Received: by mail-yb1-xb4a.google.com with SMTP id 3f1490d57ef6-da0cb98f66cso1870662276.2 for ; Thu, 09 Nov 2023 18:13:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1699582396; x=1700187196; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=UDNohIPayeSsIg3RbXALdysNU1ETC+6FI0uUxlFcqR8=; b=Pk9qnSog1efqiShj6Y8LIzf3SkO/PJgD6F+1xTmRLbFkR9z0uG77wn0ZomEPOwDwae +9hiwrJtK5Ae7M7HmNgoqAVUFleyTaQJnuR10jj0dllCaN/woROqY7y3DbO6PunMng/C yxj6dsET8W0c7RS8OV/8pnoc8Vu0097EZSUuwEbbBli1ZzHNrxGsFpQmAmNSWVopdxlk w/sjj+LBqiQ7H+9bRVV1LhWPCEI6PpOUDGRZXipkqNSFW5AGo4Nyryr9k8wGvG6GzNFH wB+rnfUvkRSInsMudX/L7LcbNLWmfSu3mXMak9eOhPSDLSS6vmy6hCuj0Kpuzu/L5616 UV0w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699582396; x=1700187196; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=UDNohIPayeSsIg3RbXALdysNU1ETC+6FI0uUxlFcqR8=; b=MYWtiKAL7QE/cw6xC4wCfjY1EXimnXtHaIBvxh4BLiN+P1CVJuJZaDPm2A8IZyQCow E/fzMG6yGjG13sipOEIJWkt4gBhFlyLyhUyDU4opt58OuRA1i+5tXl503yYz+e7DRuoG NRYt9lAzOTVNkyv4y5+ONPQ/JbdNMAO6gRFY5lUC095vYg9B/EvH/+ynUwx/qlVpsevY 97upfOiXl515sJu2REDDQYCmsfsTTwSklgAk4Ah/Xxv1FyBuNS4DW9V5q6J4jVK8PYYN xvCPoksbK8yh1aWLapVvuqDp1SQZsvcyBBQd6D8xdVNRilsF2OF56fUFHQNMHKkzV5+l TecA== X-Gm-Message-State: AOJu0YxlRv3yt9BggiTRdjGTgnIGOOLXIDNa773+AzcYQ/zcQs8t5ZSu 5TBzCnDwmQsC/zK3LFdpuewKoMkPlQk= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a25:df45:0:b0:d9a:5b63:a682 with SMTP id w66-20020a25df45000000b00d9a5b63a682mr183485ybg.13.1699582396756; Thu, 09 Nov 2023 18:13:16 -0800 (PST) Reply-To: Sean Christopherson Date: Thu, 9 Nov 2023 18:12:42 -0800 In-Reply-To: <20231110021306.1269082-1-seanjc@google.com> Mime-Version: 1.0 References: <20231110021306.1269082-1-seanjc@google.com> X-Mailer: git-send-email 2.42.0.869.gea05f2083d-goog Message-ID: <20231110021306.1269082-3-seanjc@google.com> Subject: [PATCH v8 02/26] KVM: x86/pmu: Allow programming events that match unsupported arch events From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Kan Liang , Dapeng Mi , Jim Mattson , Jinrong Liang , Aaron Lewis , Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Thu, 09 Nov 2023 18:13:28 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1782141324541557905 X-GMAIL-MSGID: 1782141324541557905 Remove KVM's bogus restriction that the guest can't program an event whose encoding matches an unsupported architectural event. The enumeration of an architectural event only says that if a CPU supports an architectural event, then the event can be programmed using the architectural encoding. The enumeration does NOT say anything about the encoding when the CPU doesn't report support the architectural event. Preventing the guest from counting events whose encoding happens to match an architectural event breaks existing functionality whenever Intel adds an architectural encoding that was *ever* used for a CPU that doesn't enumerate support for the architectural event, even if the encoding is for the exact same event! E.g. the architectural encoding for Top-Down Slots is 0x01a4. Broadwell CPUs, which do not support the Top-Down Slots architectural event, 0x01a4 is a valid, model-specific event. Denying guest usage of 0x01a4 if/when KVM adds support for Top-Down slots would break any Broadwell-based guest. Reported-by: Kan Liang Closes: https://lore.kernel.org/all/2004baa6-b494-462c-a11f-8104ea152c6a@linux.intel.com Fixes: a21864486f7e ("KVM: x86/pmu: Fix available_event_types check for REF_CPU_CYCLES event") Reviewed-by: Dapeng Mi Reviewed-by: Jim Mattson Reviewed-by: Kan Liang Signed-off-by: Sean Christopherson --- arch/x86/include/asm/kvm-x86-pmu-ops.h | 1 - arch/x86/kvm/pmu.c | 1 - arch/x86/kvm/pmu.h | 1 - arch/x86/kvm/svm/pmu.c | 6 ---- arch/x86/kvm/vmx/pmu_intel.c | 38 -------------------------- 5 files changed, 47 deletions(-) diff --git a/arch/x86/include/asm/kvm-x86-pmu-ops.h b/arch/x86/include/asm/kvm-x86-pmu-ops.h index 6c98f4bb4228..884af8ef7657 100644 --- a/arch/x86/include/asm/kvm-x86-pmu-ops.h +++ b/arch/x86/include/asm/kvm-x86-pmu-ops.h @@ -12,7 +12,6 @@ BUILD_BUG_ON(1) * a NULL definition, for example if "static_call_cond()" will be used * at the call sites. */ -KVM_X86_PMU_OP(hw_event_available) KVM_X86_PMU_OP(pmc_idx_to_pmc) KVM_X86_PMU_OP(rdpmc_ecx_to_pmc) KVM_X86_PMU_OP(msr_idx_to_pmc) diff --git a/arch/x86/kvm/pmu.c b/arch/x86/kvm/pmu.c index 9ae07db6f0f6..99ed72966528 100644 --- a/arch/x86/kvm/pmu.c +++ b/arch/x86/kvm/pmu.c @@ -374,7 +374,6 @@ static bool check_pmu_event_filter(struct kvm_pmc *pmc) static bool pmc_event_is_allowed(struct kvm_pmc *pmc) { return pmc_is_globally_enabled(pmc) && pmc_speculative_in_use(pmc) && - static_call(kvm_x86_pmu_hw_event_available)(pmc) && check_pmu_event_filter(pmc); } diff --git a/arch/x86/kvm/pmu.h b/arch/x86/kvm/pmu.h index 1d64113de488..10fe5bf02705 100644 --- a/arch/x86/kvm/pmu.h +++ b/arch/x86/kvm/pmu.h @@ -19,7 +19,6 @@ #define VMWARE_BACKDOOR_PMC_APPARENT_TIME 0x10002 struct kvm_pmu_ops { - bool (*hw_event_available)(struct kvm_pmc *pmc); struct kvm_pmc *(*pmc_idx_to_pmc)(struct kvm_pmu *pmu, int pmc_idx); struct kvm_pmc *(*rdpmc_ecx_to_pmc)(struct kvm_vcpu *vcpu, unsigned int idx, u64 *mask); diff --git a/arch/x86/kvm/svm/pmu.c b/arch/x86/kvm/svm/pmu.c index 373ff6a6687b..5596fe816ea8 100644 --- a/arch/x86/kvm/svm/pmu.c +++ b/arch/x86/kvm/svm/pmu.c @@ -73,11 +73,6 @@ static inline struct kvm_pmc *get_gp_pmc_amd(struct kvm_pmu *pmu, u32 msr, return amd_pmc_idx_to_pmc(pmu, idx); } -static bool amd_hw_event_available(struct kvm_pmc *pmc) -{ - return true; -} - static bool amd_is_valid_rdpmc_ecx(struct kvm_vcpu *vcpu, unsigned int idx) { struct kvm_pmu *pmu = vcpu_to_pmu(vcpu); @@ -249,7 +244,6 @@ static void amd_pmu_reset(struct kvm_vcpu *vcpu) } struct kvm_pmu_ops amd_pmu_ops __initdata = { - .hw_event_available = amd_hw_event_available, .pmc_idx_to_pmc = amd_pmc_idx_to_pmc, .rdpmc_ecx_to_pmc = amd_rdpmc_ecx_to_pmc, .msr_idx_to_pmc = amd_msr_idx_to_pmc, diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c index c6e227edcf8e..7737ee2fc62f 100644 --- a/arch/x86/kvm/vmx/pmu_intel.c +++ b/arch/x86/kvm/vmx/pmu_intel.c @@ -101,43 +101,6 @@ static struct kvm_pmc *intel_pmc_idx_to_pmc(struct kvm_pmu *pmu, int pmc_idx) } } -static bool intel_hw_event_available(struct kvm_pmc *pmc) -{ - struct kvm_pmu *pmu = pmc_to_pmu(pmc); - u8 event_select = pmc->eventsel & ARCH_PERFMON_EVENTSEL_EVENT; - u8 unit_mask = (pmc->eventsel & ARCH_PERFMON_EVENTSEL_UMASK) >> 8; - int i; - - /* - * Fixed counters are always available if KVM reaches this point. If a - * fixed counter is unsupported in hardware or guest CPUID, KVM doesn't - * allow the counter's corresponding MSR to be written. KVM does use - * architectural events to program fixed counters, as the interface to - * perf doesn't allow requesting a specific fixed counter, e.g. perf - * may (sadly) back a guest fixed PMC with a general purposed counter. - * But if _hardware_ doesn't support the associated event, KVM simply - * doesn't enumerate support for the fixed counter. - */ - if (pmc_is_fixed(pmc)) - return true; - - BUILD_BUG_ON(ARRAY_SIZE(intel_arch_events) != NR_INTEL_ARCH_EVENTS); - - /* - * Disallow events reported as unavailable in guest CPUID. Note, this - * doesn't apply to pseudo-architectural events (see above). - */ - for (i = 0; i < NR_REAL_INTEL_ARCH_EVENTS; i++) { - if (intel_arch_events[i].eventsel != event_select || - intel_arch_events[i].unit_mask != unit_mask) - continue; - - return pmu->available_event_types & BIT(i); - } - - return true; -} - static bool intel_is_valid_rdpmc_ecx(struct kvm_vcpu *vcpu, unsigned int idx) { struct kvm_pmu *pmu = vcpu_to_pmu(vcpu); @@ -802,7 +765,6 @@ void intel_pmu_cross_mapped_check(struct kvm_pmu *pmu) } struct kvm_pmu_ops intel_pmu_ops __initdata = { - .hw_event_available = intel_hw_event_available, .pmc_idx_to_pmc = intel_pmc_idx_to_pmc, .rdpmc_ecx_to_pmc = intel_rdpmc_ecx_to_pmc, .msr_idx_to_pmc = intel_msr_idx_to_pmc, From patchwork Fri Nov 10 02:12:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Christopherson X-Patchwork-Id: 163727 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b129:0:b0:403:3b70:6f57 with SMTP id q9csp836766vqs; Thu, 9 Nov 2023 18:13:30 -0800 (PST) X-Google-Smtp-Source: AGHT+IG6jgcxMJjwAbvbJ0CbWclXmGgZaz7HLYLKydAWY0PIXDRnW/qoWx4tgdnd1LZThBz0bFA3 X-Received: by 2002:a05:6a20:8e10:b0:183:c7ea:bb52 with SMTP id y16-20020a056a208e1000b00183c7eabb52mr7922199pzj.30.1699582410184; Thu, 09 Nov 2023 18:13:30 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1699582410; cv=none; d=google.com; s=arc-20160816; b=E9uTfxaB8WXPTa8hv/emf4QgWsms8ABP1u1Vn6FF0z45kvGRLL5G3zEoDwEVm7rRP+ Adcr5M6cHpe/81QZTHCHvUFT8FK/UWGgynsoaCh8mpLuSIdFJ0ykQfBrJtFqEGZagAXL fvd82WIcMwqqa65Lf5YtoJDlBjGBzRnRAMHGl+I53Oid2vGwPKHTiMTSHCE24K0MNjd+ gna6Nw6jMBHchwSgsDyi5auexI3VxUNWzFsWzMmXRXar1+hgG6caxJdTNkhQnMlIAldP NHRqVG9ZrdvjNOeT9UtCIxme/bvjhTfK4wyORgIJdU0OG7zuCDNmunHCua8CEpRe+gvi lKbA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:reply-to:dkim-signature; bh=rhicNGhqq5fztpWLcEppgCSeLbp+B1utXe2pu96crUY=; fh=gm96CM+cG0KJxn7vnhn0c1c98ILNP1HHUrKfrGecw3M=; b=wFR82XlEC68gsywXmdl6zQ3rOYan0V4d4kpzn/HIt5Ift4ZIMZqCSeg7Mi7jA1iowi 4J/2QL+zvdStnZNnPppNe+Sz/7ZiPGayHiIo7kkOQrz0M2kxICpAaV/EKOatZswJkatE V8JlXqmldcDySPmWyNEyHETkOnpMECmyrNYqNFJ6lf68ZOcQHJzOkWEbHXo+3px5xThA FHJLj1jABpWYTG7ms6TRUh6eJLbx2nZ85ZoeEkMvVzDT4YtgIpDVanJQsTPriwwPH8uV vdQM9XeQgEbfsKUOeYilcZw8KsFQK51XfggoKlZTINBTV+yFN8aQ4C4tDyDAgsXUADqv kqYA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=QShtZQss; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from snail.vger.email (snail.vger.email. [23.128.96.37]) by mx.google.com with ESMTPS id m7-20020a633f07000000b005bde2c3e4dfsi4909301pga.385.2023.11.09.18.13.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Nov 2023 18:13:30 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) client-ip=23.128.96.37; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=QShtZQss; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by snail.vger.email (Postfix) with ESMTP id 804B083B0271; Thu, 9 Nov 2023 18:13:29 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at snail.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234956AbjKJCN0 (ORCPT + 30 others); Thu, 9 Nov 2023 21:13:26 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45172 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229682AbjKJCNY (ORCPT ); Thu, 9 Nov 2023 21:13:24 -0500 Received: from mail-yb1-xb4a.google.com (mail-yb1-xb4a.google.com [IPv6:2607:f8b0:4864:20::b4a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 980E7468A for ; Thu, 9 Nov 2023 18:13:20 -0800 (PST) Received: by mail-yb1-xb4a.google.com with SMTP id 3f1490d57ef6-d9ab79816a9so1958132276.3 for ; Thu, 09 Nov 2023 18:13:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1699582398; x=1700187198; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=rhicNGhqq5fztpWLcEppgCSeLbp+B1utXe2pu96crUY=; b=QShtZQss5ZMQEkFgfxVqnAZ6tK+XqK5FtxOwS+bbHxp7x9039XAD8O2cpGyNLnmwBq fVQWpy6TIW6vvGkAJ85tgCDHkCJ1kRwrHP+mLaLBsI5OVZpD29BL7NaGoTHBdPx12YmR oJ5B2DJMy1TDUxj3FZ+zCUEpV1X3PA/NBKkSKUo4fJUWuR18tcoJlYbdIPYHWeRoJeQG HT/OiUblrV38LOb7u1ik4MqrLrcIhPlwzK9HEQbbWulLhHK1rOdHRYFQZ5K6UIDPRURi rQd6InUeQtKWF2jsgEz4X59/zpXdfm11zQcH+Jn04Y8ZNW9z4Fk/1Ipx5hMYIooWxkth A7ZQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699582398; x=1700187198; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=rhicNGhqq5fztpWLcEppgCSeLbp+B1utXe2pu96crUY=; b=TWdG/gw4DeaIeZuCBsAcWSIcQPDJa6+04iwNtkclstdUGjyys51fTsMJRZ/rGcqPAT y2krDKNQMATjzqTtLv49x/6XuzVqcr1p8UE2eVf1LIkpfarwbU01v+yWD3MFGDHLAd4J Tl/iW5KlIaFgoWbpZN0MOOV8rU4/wdtPgonZMaY7QEfahDn1rovv7Rw+NbLRtbdkYd/V s0brESsKFoZ372QbmTgfaAi1TnXBfQrmD0ywjsSoQshx/I/c6Re2gx5DmSxFmczo97u5 2IGsoWv7hl5H/t5KQDKeCqdoui+V1mzpE9EFh96BPK7+afYrauKjIMa5X8m2jE1s4Ff0 NeKg== X-Gm-Message-State: AOJu0Yynjbxx0Yy6IrtZPaf3EnuOTySIrkGas5pMRGdXLi8svGMxEITB H0E/UEsVTsWW+Yvx3XJ+jfFCWfbjxl8= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a5b:b4d:0:b0:d9a:d272:ee58 with SMTP id b13-20020a5b0b4d000000b00d9ad272ee58mr180101ybr.9.1699582398699; Thu, 09 Nov 2023 18:13:18 -0800 (PST) Reply-To: Sean Christopherson Date: Thu, 9 Nov 2023 18:12:43 -0800 In-Reply-To: <20231110021306.1269082-1-seanjc@google.com> Mime-Version: 1.0 References: <20231110021306.1269082-1-seanjc@google.com> X-Mailer: git-send-email 2.42.0.869.gea05f2083d-goog Message-ID: <20231110021306.1269082-4-seanjc@google.com> Subject: [PATCH v8 03/26] KVM: x86/pmu: Remove KVM's enumeration of Intel's architectural encodings From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Kan Liang , Dapeng Mi , Jim Mattson , Jinrong Liang , Aaron Lewis , Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Thu, 09 Nov 2023 18:13:29 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1782141325315066309 X-GMAIL-MSGID: 1782141325315066309 Drop KVM's enumeration of Intel's architectural event encodings, and instead open code the three encodings (of which only two are real) that KVM uses to emulate fixed counters. Now that KVM doesn't incorrectly enforce the availability of architectural encodings, there is no reason for KVM to ever care about the encodings themselves, at least not in the current format of an array indexed by the encoding's position in CPUID. Opportunistically add a comment to explain why KVM cares about eventsel values for fixed counters. Suggested-by: Jim Mattson Signed-off-by: Sean Christopherson --- arch/x86/kvm/vmx/pmu_intel.c | 72 ++++++++++++------------------------ 1 file changed, 23 insertions(+), 49 deletions(-) diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c index 7737ee2fc62f..c4f2c6a268e7 100644 --- a/arch/x86/kvm/vmx/pmu_intel.c +++ b/arch/x86/kvm/vmx/pmu_intel.c @@ -22,52 +22,6 @@ #define MSR_PMC_FULL_WIDTH_BIT (MSR_IA32_PMC0 - MSR_IA32_PERFCTR0) -enum intel_pmu_architectural_events { - /* - * The order of the architectural events matters as support for each - * event is enumerated via CPUID using the index of the event. - */ - INTEL_ARCH_CPU_CYCLES, - INTEL_ARCH_INSTRUCTIONS_RETIRED, - INTEL_ARCH_REFERENCE_CYCLES, - INTEL_ARCH_LLC_REFERENCES, - INTEL_ARCH_LLC_MISSES, - INTEL_ARCH_BRANCHES_RETIRED, - INTEL_ARCH_BRANCHES_MISPREDICTED, - - NR_REAL_INTEL_ARCH_EVENTS, - - /* - * Pseudo-architectural event used to implement IA32_FIXED_CTR2, a.k.a. - * TSC reference cycles. The architectural reference cycles event may - * or may not actually use the TSC as the reference, e.g. might use the - * core crystal clock or the bus clock (yeah, "architectural"). - */ - PSEUDO_ARCH_REFERENCE_CYCLES = NR_REAL_INTEL_ARCH_EVENTS, - NR_INTEL_ARCH_EVENTS, -}; - -static struct { - u8 eventsel; - u8 unit_mask; -} const intel_arch_events[] = { - [INTEL_ARCH_CPU_CYCLES] = { 0x3c, 0x00 }, - [INTEL_ARCH_INSTRUCTIONS_RETIRED] = { 0xc0, 0x00 }, - [INTEL_ARCH_REFERENCE_CYCLES] = { 0x3c, 0x01 }, - [INTEL_ARCH_LLC_REFERENCES] = { 0x2e, 0x4f }, - [INTEL_ARCH_LLC_MISSES] = { 0x2e, 0x41 }, - [INTEL_ARCH_BRANCHES_RETIRED] = { 0xc4, 0x00 }, - [INTEL_ARCH_BRANCHES_MISPREDICTED] = { 0xc5, 0x00 }, - [PSEUDO_ARCH_REFERENCE_CYCLES] = { 0x00, 0x03 }, -}; - -/* mapping between fixed pmc index and intel_arch_events array */ -static int fixed_pmc_events[] = { - [0] = INTEL_ARCH_INSTRUCTIONS_RETIRED, - [1] = INTEL_ARCH_CPU_CYCLES, - [2] = PSEUDO_ARCH_REFERENCE_CYCLES, -}; - static void reprogram_fixed_counters(struct kvm_pmu *pmu, u64 data) { struct kvm_pmc *pmc; @@ -442,8 +396,29 @@ static int intel_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info) return 0; } +/* + * Map fixed counter events to architectural general purpose event encodings. + * Perf doesn't provide APIs to allow KVM to directly program a fixed counter, + * and so KVM instead programs the architectural event to effectively request + * the fixed counter. Perf isn't guaranteed to use a fixed counter and may + * instead program the encoding into a general purpose counter, e.g. if a + * different perf_event is already utilizing the requested counter, but the end + * result is the same (ignoring the fact that using a general purpose counter + * will likely exacerbate counter contention). + * + * Note, reference cycles is counted using a perf-defined "psuedo-encoding", + * as there is no architectural general purpose encoding for reference cycles. + */ static void setup_fixed_pmc_eventsel(struct kvm_pmu *pmu) { + const struct { + u8 eventsel; + u8 unit_mask; + } fixed_pmc_events[] = { + [0] = { 0xc0, 0x00 }, /* Instruction Retired / PERF_COUNT_HW_INSTRUCTIONS. */ + [1] = { 0x3c, 0x00 }, /* CPU Cycles/ PERF_COUNT_HW_CPU_CYCLES. */ + [2] = { 0x00, 0x03 }, /* Reference Cycles / PERF_COUNT_HW_REF_CPU_CYCLES*/ + }; int i; BUILD_BUG_ON(ARRAY_SIZE(fixed_pmc_events) != KVM_PMC_MAX_FIXED); @@ -451,10 +426,9 @@ static void setup_fixed_pmc_eventsel(struct kvm_pmu *pmu) for (i = 0; i < pmu->nr_arch_fixed_counters; i++) { int index = array_index_nospec(i, KVM_PMC_MAX_FIXED); struct kvm_pmc *pmc = &pmu->fixed_counters[index]; - u32 event = fixed_pmc_events[index]; - pmc->eventsel = (intel_arch_events[event].unit_mask << 8) | - intel_arch_events[event].eventsel; + pmc->eventsel = (fixed_pmc_events[index].unit_mask << 8) | + fixed_pmc_events[index].eventsel; } } From patchwork Fri Nov 10 02:12:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Christopherson X-Patchwork-Id: 163728 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b129:0:b0:403:3b70:6f57 with SMTP id q9csp836800vqs; Thu, 9 Nov 2023 18:13:37 -0800 (PST) X-Google-Smtp-Source: AGHT+IFH6aM3PnjVnwIh7fBqp9AGrIgg8qXK1u0kwW5Ga+gbkzT82Gn8R8B0H5jM3YqO0O2Y/cOb X-Received: by 2002:a17:903:2cf:b0:1cc:6597:f41e with SMTP id s15-20020a17090302cf00b001cc6597f41emr8158554plk.0.1699582417016; Thu, 09 Nov 2023 18:13:37 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1699582417; cv=none; d=google.com; s=arc-20160816; b=bPcu/CBVtiptYmEqSLJzTK4T6Ns/ewBsJDGRJcetLANSGl5PRwoBhBoUC3zjNf8dL1 3RmrOXlDDatwcVi+O0Llt6wX5MQXu9POyCdfF5lE7/HDwLfK2NpxsEmzS6aKPJcj7aT1 0OZV/Wr+jbnRCGrxFo3swLX+M7xzI8ZHKJ0l7GWlCCGTfiKk2ty+/tI8pPuufIoj7mkd l8UI75YMKk7ylz3v1dsGEkH/SXfk9VnqOoVBMN4gLCtPMlCzTVOg/bKs1Y/0KwwTPQct 0ORtcfwTBOJYgACm23tMBaV4nyn9xMgZdvZcSnyPreHEejgdq2g2XqYlCyrM9ai/eJVE t8PA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:reply-to:dkim-signature; bh=uDpdyO5wteS2tCSVyIlZrwaNpirFZhycmLzD5CPKCCU=; fh=gm96CM+cG0KJxn7vnhn0c1c98ILNP1HHUrKfrGecw3M=; b=tDk7Y28GEbaCfk25W8QmChQgFd44Ox2YcgCof2IdgsLeF2D0Y3eH+xOdpS5yt7+TZq XjrKaO1WYb1UKuutijJXUHR9CIWXaUNcwUaXmrLpzqUeTZOzR1PpCLW6IAWBgfhHgoJp llYjdaXBSYSxBvkyLXg8z553IbytOnsCzBqzC+dg9mPnAFL2Jj+3zqH/t76MaKjD7HZy XorMoiIYHG2kLzMFAMtGRhwaJesR0H5O6kNb/L1bc1l3iCSdIVP7/zaCMjvRgtCs/sgC QrxvgzLzVxnYHh83ac1UDLADOROZjy0H1+5DOx2Jt7lst7jI1MYZ5rMQl3wfsNNX58sX 6gZg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=qMXxfJ+l; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from snail.vger.email (snail.vger.email. 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Configuring all KVM-supported fixed counter also eliminates a potential pitfall if/when KVM supports discontiguous fixed counters, in which case configuring only nr_arch_fixed_counters will be insufficient (ignoring the fact that KVM will need many other changes to support discontiguous fixed counters). Signed-off-by: Sean Christopherson --- arch/x86/kvm/vmx/pmu_intel.c | 16 +++++----------- 1 file changed, 5 insertions(+), 11 deletions(-) diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c index c4f2c6a268e7..c9df139efc0c 100644 --- a/arch/x86/kvm/vmx/pmu_intel.c +++ b/arch/x86/kvm/vmx/pmu_intel.c @@ -409,27 +409,21 @@ static int intel_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info) * Note, reference cycles is counted using a perf-defined "psuedo-encoding", * as there is no architectural general purpose encoding for reference cycles. */ -static void setup_fixed_pmc_eventsel(struct kvm_pmu *pmu) +static u64 intel_get_fixed_pmc_eventsel(int index) { const struct { - u8 eventsel; + u8 event; u8 unit_mask; } fixed_pmc_events[] = { [0] = { 0xc0, 0x00 }, /* Instruction Retired / PERF_COUNT_HW_INSTRUCTIONS. */ [1] = { 0x3c, 0x00 }, /* CPU Cycles/ PERF_COUNT_HW_CPU_CYCLES. */ [2] = { 0x00, 0x03 }, /* Reference Cycles / PERF_COUNT_HW_REF_CPU_CYCLES*/ }; - int i; BUILD_BUG_ON(ARRAY_SIZE(fixed_pmc_events) != KVM_PMC_MAX_FIXED); - for (i = 0; i < pmu->nr_arch_fixed_counters; i++) { - int index = array_index_nospec(i, KVM_PMC_MAX_FIXED); - struct kvm_pmc *pmc = &pmu->fixed_counters[index]; - - pmc->eventsel = (fixed_pmc_events[index].unit_mask << 8) | - fixed_pmc_events[index].eventsel; - } + return (fixed_pmc_events[index].unit_mask << 8) | + fixed_pmc_events[index].event; } static void intel_pmu_refresh(struct kvm_vcpu *vcpu) @@ -495,7 +489,6 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu) kvm_pmu_cap.bit_width_fixed); pmu->counter_bitmask[KVM_PMC_FIXED] = ((u64)1 << edx.split.bit_width_fixed) - 1; - setup_fixed_pmc_eventsel(pmu); } for (i = 0; i < pmu->nr_arch_fixed_counters; i++) @@ -573,6 +566,7 @@ static void intel_pmu_init(struct kvm_vcpu *vcpu) pmu->fixed_counters[i].vcpu = vcpu; pmu->fixed_counters[i].idx = i + INTEL_PMC_IDX_FIXED; pmu->fixed_counters[i].current_config = 0; + pmu->fixed_counters[i].eventsel = intel_get_fixed_pmc_eventsel(i); } lbr_desc->records.nr = 0; From patchwork Fri Nov 10 02:12:45 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Christopherson X-Patchwork-Id: 163733 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b129:0:b0:403:3b70:6f57 with SMTP id q9csp837185vqs; Thu, 9 Nov 2023 18:14:33 -0800 (PST) X-Google-Smtp-Source: AGHT+IH2FT6sGwk7Ho6Hxf0k+KjDSf5scfcbM5o7EN5PeGzeZX+ImfU1DyRwwKf3woR07eLlgjym X-Received: by 2002:a05:6358:93a7:b0:168:e845:ec22 with SMTP id h39-20020a05635893a700b00168e845ec22mr6376819rwb.13.1699582473568; Thu, 09 Nov 2023 18:14:33 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1699582473; cv=none; d=google.com; s=arc-20160816; b=j1eEOcuT3sxC1k3NH18yMtCOaFtUoVJGgV0YOyNiT1ODiTIWaI344cbRGCQURSZEYl TWu6Yeel6LjHtyNH7KG5WlYKpFHn/98oMgLmFMOhI4rU3+ZtdOVeY0gYnz4p5gFJHNhS 2kg0SCvCU8qE0RvvPgQmb/lxjU+Z2gzvA43jevdvDfFsF+0/eKlec5W/cdKtD7AjdDjz cxzr/NOd6bDvVkELhHg6K94jCWXnlSVaD/d84tcf+kNC+68FA7NEnuJVHzLZKXJg5GMu K8bdsdFbvARXEVVnZbPBrp/qqxqIH4WVX7eDxAYQTgKyQcOuu+IknxlUdS66Pxs5AVkg RMyQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:reply-to:dkim-signature; bh=CokfVr+85rJcN61ZUPYqVGKL5YI2MWC/M4+QQUo01DY=; fh=gm96CM+cG0KJxn7vnhn0c1c98ILNP1HHUrKfrGecw3M=; b=DYVfGggS38eQrXFxBtFuwwKDuKwI80GrvOuFdgMazftLZedNcICi7NUgBpe3LhuA9M lY5wliVyfyn2+JeD1P7TUY7l0rAI3VSaR61vY7mejmiLIein45oiwNVo/cBT+YZ3YO/c m7eIcGBJBugGWatf1yAow4aPCd9AiEWlj27sOQkknpTeZr5iX5py97YG5Gb/g7zTtdaw s9I6r6V3rumh/3ibfECJLXNHdaCH0gUKH/MhB4ayndewHUqzNOEYPheYH2YOdzMctLD4 /mfiwEL4TQLNW8hSHRdPJEezqrIFi9inTyeDko+0XlzN15l4PjhUz1O8X/MliR3rsaiP 1qRg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=sG6k1ZRJ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:5 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from groat.vger.email (groat.vger.email. [2620:137:e000::3:5]) by mx.google.com with ESMTPS id g9-20020a656cc9000000b005859b1b34f7si9997394pgw.862.2023.11.09.18.14.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Nov 2023 18:14:33 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:5 as permitted sender) client-ip=2620:137:e000::3:5; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=sG6k1ZRJ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:5 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by groat.vger.email (Postfix) with ESMTP id 8CE598367CD3; Thu, 9 Nov 2023 18:14:20 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at groat.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345730AbjKJCNj (ORCPT + 30 others); Thu, 9 Nov 2023 21:13:39 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45364 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234955AbjKJCN0 (ORCPT ); Thu, 9 Nov 2023 21:13:26 -0500 Received: from mail-yw1-x1149.google.com (mail-yw1-x1149.google.com [IPv6:2607:f8b0:4864:20::1149]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 339A746AA for ; Thu, 9 Nov 2023 18:13:23 -0800 (PST) Received: by mail-yw1-x1149.google.com with SMTP id 00721157ae682-5af9b0850fdso22650067b3.1 for ; Thu, 09 Nov 2023 18:13:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1699582402; x=1700187202; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=CokfVr+85rJcN61ZUPYqVGKL5YI2MWC/M4+QQUo01DY=; b=sG6k1ZRJReNESYiPt6vQbsTzV/osLW2+DeKS1wIba6sclRyr1+elUpvLG/i67oSZU1 rLgzwf00c5x/mnrgPVJM2ID5d9AZau+0+SHSeso507fQZ6QFPIgwMEXiv8VRdDOvuccH wisnYor82zy+AzE82MrLfHxM+kS4PHNk2n0p0NoPYAO3M7jyMYLX9WTJp5lGBNViuMUR W8K2g5Rd4ywxlNPBU7HnoEHbcU570Ez+oi/7pCRKX0LAK4SDaLBGSXYGbtW29OKYMi3/ SEx9VvsYQCb+1JXTOKHJ60+lEgM0epPw1nzAPeUVaVHlqxSODzir6EqSv7rABOAoasg4 3nfw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699582402; x=1700187202; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=CokfVr+85rJcN61ZUPYqVGKL5YI2MWC/M4+QQUo01DY=; b=Rnw7KSAjghjBHxxBiA+Qm4tsv/o3nAoN8Nf41avFF9qefQnjQXXA2dmg62/ZVphq7e OqlWuoKtxJJiZx2lO+/smOMNBFr9jhRJ2iJ43eqQcuiCssDBJf/CGFcqC9uff0sY9QyS inBGt2W+GjNCPFTNVZyw2QwjZRQaSCxwcmjiQxB5SkWujX2po9K3wkoS6I2IIS7q4RoJ P9Cf1q4CKp0poToJE4+R9bg5QJ1Rrk0EuHwNjHTgaWbiqFK6o3g5zIoh9DKkAeXniBBB iAprgnR1F32YzHRnE2qUjdKgvfPp61estbs+QvuDXpKvvxUo1JWZ3nPUkgiZrRisvkzC x2ZQ== X-Gm-Message-State: AOJu0YxMdAL/2v7HE5J/A8uH9IFopbcLc0g8niBKIjvr1aait2LJ3KB2 JQomc719mHNi0+nZCV3OaWrWpS/qCNI= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a25:ac26:0:b0:d9a:6b49:433d with SMTP id w38-20020a25ac26000000b00d9a6b49433dmr172418ybi.6.1699582402503; Thu, 09 Nov 2023 18:13:22 -0800 (PST) Reply-To: Sean Christopherson Date: Thu, 9 Nov 2023 18:12:45 -0800 In-Reply-To: <20231110021306.1269082-1-seanjc@google.com> Mime-Version: 1.0 References: <20231110021306.1269082-1-seanjc@google.com> X-Mailer: git-send-email 2.42.0.869.gea05f2083d-goog Message-ID: <20231110021306.1269082-6-seanjc@google.com> Subject: [PATCH v8 05/26] KVM: x86/pmu: Get eventsel for fixed counters from perf From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Kan Liang , Dapeng Mi , Jim Mattson , Jinrong Liang , Aaron Lewis , Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (groat.vger.email [0.0.0.0]); Thu, 09 Nov 2023 18:14:20 -0800 (PST) X-Spam-Status: No, score=-8.4 required=5.0 tests=DKIMWL_WL_MED,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE, USER_IN_DEF_DKIM_WL autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on groat.vger.email X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1782141391921180920 X-GMAIL-MSGID: 1782141391921180920 Get the event selectors used to effectively request fixed counters for perf events from perf itself instead of hardcoding them in KVM and hoping that they match the underlying hardware. While fixed counters 0 and 1 use architectural events, as of ffbe4ab0beda ("perf/x86/intel: Extend the ref-cycles event to GP counters") fixed counter 2 (reference TSC cycles) may use a software-defined pseudo-encoding or a real hardware-defined encoding. Reported-by: Kan Liang Closes: https://lkml.kernel.org/r/4281eee7-6423-4ec8-bb18-c6aeee1faf2c%40linux.intel.com Signed-off-by: Sean Christopherson Reviewed-by: Kan Liang --- arch/x86/kvm/vmx/pmu_intel.c | 30 +++++++++++++++++------------- 1 file changed, 17 insertions(+), 13 deletions(-) diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c index c9df139efc0c..3bac3b32b485 100644 --- a/arch/x86/kvm/vmx/pmu_intel.c +++ b/arch/x86/kvm/vmx/pmu_intel.c @@ -406,24 +406,28 @@ static int intel_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info) * result is the same (ignoring the fact that using a general purpose counter * will likely exacerbate counter contention). * - * Note, reference cycles is counted using a perf-defined "psuedo-encoding", - * as there is no architectural general purpose encoding for reference cycles. + * Forcibly inlined to allow asserting on @index at build time, and there should + * never be more than one user. */ -static u64 intel_get_fixed_pmc_eventsel(int index) +static __always_inline u64 intel_get_fixed_pmc_eventsel(unsigned int index) { - const struct { - u8 event; - u8 unit_mask; - } fixed_pmc_events[] = { - [0] = { 0xc0, 0x00 }, /* Instruction Retired / PERF_COUNT_HW_INSTRUCTIONS. */ - [1] = { 0x3c, 0x00 }, /* CPU Cycles/ PERF_COUNT_HW_CPU_CYCLES. */ - [2] = { 0x00, 0x03 }, /* Reference Cycles / PERF_COUNT_HW_REF_CPU_CYCLES*/ + const enum perf_hw_id fixed_pmc_perf_ids[] = { + [0] = PERF_COUNT_HW_INSTRUCTIONS, + [1] = PERF_COUNT_HW_CPU_CYCLES, + [2] = PERF_COUNT_HW_REF_CPU_CYCLES, }; + u64 eventsel; - BUILD_BUG_ON(ARRAY_SIZE(fixed_pmc_events) != KVM_PMC_MAX_FIXED); + BUILD_BUG_ON(ARRAY_SIZE(fixed_pmc_perf_ids) != KVM_PMC_MAX_FIXED); + BUILD_BUG_ON(index >= KVM_PMC_MAX_FIXED); - return (fixed_pmc_events[index].unit_mask << 8) | - fixed_pmc_events[index].event; + /* + * Yell if perf reports support for a fixed counter but perf doesn't + * have a known encoding for the associated general purpose event. + */ + eventsel = perf_get_hw_event_config(fixed_pmc_perf_ids[index]); + WARN_ON_ONCE(!eventsel && index < kvm_pmu_cap.num_counters_fixed); + return eventsel; } static void intel_pmu_refresh(struct kvm_vcpu *vcpu) From patchwork Fri Nov 10 02:12:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Christopherson X-Patchwork-Id: 163749 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b129:0:b0:403:3b70:6f57 with SMTP id q9csp838020vqs; Thu, 9 Nov 2023 18:16:51 -0800 (PST) X-Google-Smtp-Source: AGHT+IHyUkxy27P9V8dRom0K25LwPbYVrPoI5MG1HwAmsFCBq5hKXY0TwAVihY0AgeQS9MIXBTIY X-Received: by 2002:a05:6a20:8417:b0:181:16c7:6cd0 with SMTP id c23-20020a056a20841700b0018116c76cd0mr8524068pzd.17.1699582611597; Thu, 09 Nov 2023 18:16:51 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1699582611; cv=none; d=google.com; s=arc-20160816; b=CgKNdG9A0YwHYrG8Vxq2m6+5ZkNPNx5HldL9dhHXgys0BT7GVZU7hYzqeiyVbXZBnG vIOpmOOpD1h43D1iT7TtKCXHfQvG1TNTX2oYyftzZ+A1gRgwT1bXmFkkr2SQ9AGLneQz P7xU1R7nCHnYadi35P9ugf2qd7XtNCgxdXRD+I4/2PiDMcLAqQkXO1EuNy5GDROcS3OU KA/DYiuVQIxy5Fr3T6p8IxQlB6e1A5ZXag4rTvw3tROzGcAMGgBzEhRVjZRuZnECAaVB HatM6xSQ1Qsjjrai1lJzB0zfECplgS0dSmyA0S/w5e3muN77cmwRhq+WWPj4mRk31F0O nmGw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:reply-to:dkim-signature; bh=2PzRa92RKIbv75Ni9RyZiiDqwO+fW7tfrLRiix/ZeFk=; fh=gm96CM+cG0KJxn7vnhn0c1c98ILNP1HHUrKfrGecw3M=; b=MfYqsNpaGajEgAcrBPD8crai36GfWUU5/WzVbwGOAdoOh8b3QZByYJtWZjE2K0hbXq YTYqiCPV6RBecm1iFig6wVkF3/kGlfJv3MAP1Lamafhy6Vw+NQZVFZzm/8EwUNhpzKB4 vwrTQY7zfUmhqOiNf4w0ljWQ+NITYV4SUvctgYJejjFIPDYvtmxXEGIfTKpIhY2l9T5x zRWEoEf5PH7vnskAftLghEJCjPi9Hst0rFaXM6UdVQBYiXO06hdrTVcVnJy5kdOd0F1B zBJVUDcA5tf23S9AoRy8IMSQXjD9zEOerfjIsTkfntKWI/wHdblQIYC5+rEDIR1Po0AK BQHQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=bXDhMts0; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:5 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from groat.vger.email (groat.vger.email. [2620:137:e000::3:5]) by mx.google.com with ESMTPS id mi12-20020a17090b4b4c00b002800b13adb7si3348533pjb.72.2023.11.09.18.16.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Nov 2023 18:16:51 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:5 as permitted sender) client-ip=2620:137:e000::3:5; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=bXDhMts0; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:5 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by groat.vger.email (Postfix) with ESMTP id C889D8088A6A; Thu, 9 Nov 2023 18:16:25 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at groat.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345764AbjKJCNk (ORCPT + 30 others); Thu, 9 Nov 2023 21:13:40 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45228 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345750AbjKJCNa (ORCPT ); Thu, 9 Nov 2023 21:13:30 -0500 Received: from mail-pf1-x449.google.com (mail-pf1-x449.google.com [IPv6:2607:f8b0:4864:20::449]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D910246B0 for ; Thu, 9 Nov 2023 18:13:24 -0800 (PST) Received: by mail-pf1-x449.google.com with SMTP id d2e1a72fcca58-6bd5730bef9so1600784b3a.1 for ; Thu, 09 Nov 2023 18:13:24 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1699582404; x=1700187204; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=2PzRa92RKIbv75Ni9RyZiiDqwO+fW7tfrLRiix/ZeFk=; b=bXDhMts0VFGhCFMxQcwTJVIpNNRQB12quF39HGoUaMnmJmBF0/zLs4fGEaw0vXQwQ8 srxHHbZo1ALBhjPibLVsZYibRdWluMyosvRKnaFTWVAtGd0JCtYNz5ETg+gid6qwuq/W 1fBTkAheO5sp0JakE8iE2utTx5uWe0nTeAj9b/cDAdbKYijTHIsl7bZCuyRN8ghONMXq 89dexPCJVqATkG9NA8QjTvLvBKDgvSvOzCRRJqzPIB8RoRjmYc9fLaAOheKHIcz5Pkro RvW4j08WGNOnaIcJkcshTPxNTJ4c7nxXV/xThqWoQj0Pb68oL3bs14hJ/zVrWpP384PL SMTA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699582404; x=1700187204; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=2PzRa92RKIbv75Ni9RyZiiDqwO+fW7tfrLRiix/ZeFk=; b=hzOgQlFBk/Q3gdloRGHkZDKmmNfwGrLZ5s12lZ7RujyE84LKAAKIbOpIxD/2g5SqHu FV/3GaXbs9UnG3h4QhVDe6cCpj+MHcREXir3FyKxB2Gl1IOrQmQXd9IDWflhNqDQQcOb gyQJgGpWolt8TOipajxVE9GeS1HRH6Cq0Ut8OlZgZa8SPw3IA2v0kndPy/o2+TiRxOLs Y5HXN2kbpZqA+h2dWgqbkuJIfUan4kNtrZZ1CWe07GgjwwwcjMXnHE3pttgP2qxY3wVM U2WoM3E/AVeLUROBh2j+IItBNXjX9EG5HcvvwSEVDKO92LfvWuOyaQKTzALYSwBTozwr MGaA== X-Gm-Message-State: AOJu0YxwzbcdM5PNdfo1TqQzM39M5ATVLYhLYdjtbYrRnfdz1QMPMcqb 28B84Gz1lcp2OKS+sR1CvQ+iOouvp4w= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a05:6a00:a09:b0:6c3:9efc:6747 with SMTP id p9-20020a056a000a0900b006c39efc6747mr428065pfh.3.1699582404364; Thu, 09 Nov 2023 18:13:24 -0800 (PST) Reply-To: Sean Christopherson Date: Thu, 9 Nov 2023 18:12:46 -0800 In-Reply-To: <20231110021306.1269082-1-seanjc@google.com> Mime-Version: 1.0 References: <20231110021306.1269082-1-seanjc@google.com> X-Mailer: git-send-email 2.42.0.869.gea05f2083d-goog Message-ID: <20231110021306.1269082-7-seanjc@google.com> Subject: [PATCH v8 06/26] KVM: x86/pmu: Don't ignore bits 31:30 for RDPMC index on AMD From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Kan Liang , Dapeng Mi , Jim Mattson , Jinrong Liang , Aaron Lewis , Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (groat.vger.email [0.0.0.0]); Thu, 09 Nov 2023 18:16:25 -0800 (PST) X-Spam-Status: No, score=-8.4 required=5.0 tests=DKIMWL_WL_MED,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE, USER_IN_DEF_DKIM_WL autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on groat.vger.email X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1782141536545931508 X-GMAIL-MSGID: 1782141536545931508 Stop stripping bits 31:30 prior to validating/consuming the RDPMC index on AMD. Per the APM's documentation of RDPMC, *values* greater than 27 are reserved. The behavior of upper bits being flags is firmly Intel-only. Fixes: ca724305a2b0 ("KVM: x86/vPMU: Implement AMD vPMU code for KVM") Signed-off-by: Sean Christopherson --- arch/x86/kvm/svm/pmu.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/arch/x86/kvm/svm/pmu.c b/arch/x86/kvm/svm/pmu.c index 5596fe816ea8..427ec055c8bb 100644 --- a/arch/x86/kvm/svm/pmu.c +++ b/arch/x86/kvm/svm/pmu.c @@ -77,8 +77,6 @@ static bool amd_is_valid_rdpmc_ecx(struct kvm_vcpu *vcpu, unsigned int idx) { struct kvm_pmu *pmu = vcpu_to_pmu(vcpu); - idx &= ~(3u << 30); - return idx < pmu->nr_arch_gp_counters; } @@ -86,7 +84,7 @@ static bool amd_is_valid_rdpmc_ecx(struct kvm_vcpu *vcpu, unsigned int idx) static struct kvm_pmc *amd_rdpmc_ecx_to_pmc(struct kvm_vcpu *vcpu, unsigned int idx, u64 *mask) { - return amd_pmc_idx_to_pmc(vcpu_to_pmu(vcpu), idx & ~(3u << 30)); + return amd_pmc_idx_to_pmc(vcpu_to_pmu(vcpu), idx); } static struct kvm_pmc *amd_msr_idx_to_pmc(struct kvm_vcpu *vcpu, u32 msr) From patchwork Fri Nov 10 02:12:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Christopherson X-Patchwork-Id: 163743 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b129:0:b0:403:3b70:6f57 with SMTP id q9csp837933vqs; Thu, 9 Nov 2023 18:16:41 -0800 (PST) X-Google-Smtp-Source: AGHT+IHF1frlUKHAQQRQuIPa8CSSe3yf4xfGfyMvAVYXZjObM7q5t2KcwBAEcrtJ/1KO0Jm+flFQ X-Received: by 2002:a9d:77d6:0:b0:6d6:47c9:36b6 with SMTP id w22-20020a9d77d6000000b006d647c936b6mr17334otl.22.1699582601247; Thu, 09 Nov 2023 18:16:41 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1699582601; cv=none; d=google.com; s=arc-20160816; b=uovbhN/DwhHfT7ZjIhBTv82r7dZX2JTIWfyGlOeBIs0EZJ3M9AFmkhxTDLs9DYnu47 RiSEhrtHpph/Agf4RTiPGs9A4JahNJcadW2FLwab1+WmITk5W//vc1XakiRaNqYEoPxa gUG4YXknCeQzFTH4zwUI9VDyfVF+s3UnEWX4xhydSUhaOYBAsV6A9C1Z0X4Om17YaLA8 vdbt9ys9XfHy9xTl8KTMM4XsMOxPLL/eUqCFnv7QezngXPAVBfjBCRIOcCBGp9ZprrNe TcqKO1chB8uqZAwklnwXZmAWmW5QakifIYCRYUGpnC+awEbdWtepMAmynOFA1dD+wcvT mzdQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:reply-to:dkim-signature; bh=bjFOFq9eCDs5yJ6CYs0wSivMTMFgOXCeKduCrIaUzLY=; fh=gm96CM+cG0KJxn7vnhn0c1c98ILNP1HHUrKfrGecw3M=; b=NCIkkJ1/gUMIeQ6S0wrWNjoMJlo8hzrZb+2Grk4rMMOCrx7NkqalFx3UfEU71Hq8sY CiCeaXr0yBo03/ahZFWz/oUet4QijjDwz+X1T2FvivaHd3a4iujkYKzuJ0VNMcqfCRfK 70nNgKRvEu6L0JDAyI4lgxaTAzpZemCPmgvC7N4eD6Hry+OdLfehmfqB37C6Iy838co7 2BLBWU5j8fB9yWtYEdiYwfn1XCLhPbFtNDVkWAe11LFYa/7h/wNzZw0HQqCrC9Y3/x0p ucAOt/1aSgoJ2NKSsdZqMVPCQYlxJ6kHf1NuSfWCLDGPiw/HJtuC3IxSNlhGDuvBlcsw czpg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=E7nU+OHb; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.32 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from agentk.vger.email (agentk.vger.email. [23.128.96.32]) by mx.google.com with ESMTPS id t71-20020a63814a000000b005b96d038729si8623339pgd.728.2023.11.09.18.16.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Nov 2023 18:16:41 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.32 as permitted sender) client-ip=23.128.96.32; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=E7nU+OHb; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.32 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by agentk.vger.email (Postfix) with ESMTP id 891678073DE0; Thu, 9 Nov 2023 18:15:12 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at agentk.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345774AbjKJCNo (ORCPT + 30 others); Thu, 9 Nov 2023 21:13:44 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59142 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234905AbjKJCNf (ORCPT ); Thu, 9 Nov 2023 21:13:35 -0500 Received: from mail-pl1-x64a.google.com (mail-pl1-x64a.google.com [IPv6:2607:f8b0:4864:20::64a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9BE8E46BA for ; Thu, 9 Nov 2023 18:13:26 -0800 (PST) Received: by mail-pl1-x64a.google.com with SMTP id d9443c01a7336-1cc2be064b8so15945955ad.1 for ; Thu, 09 Nov 2023 18:13:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1699582406; x=1700187206; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=bjFOFq9eCDs5yJ6CYs0wSivMTMFgOXCeKduCrIaUzLY=; b=E7nU+OHbQsup+qWupwz/ufAtMV0UBw60/mPzRLNjdn61F39EnP4KPgOG9QtqR8pN7+ aDoiyEVXIhb2CAb4J4zRii2nCjIWdidr7qA1R1poMRrxms5Mu3ncOKIP36ztnSQTscci 7xrYLTIjdht8Lh9cdw22a2lIGvMIhPKCx+Pa+AIA65bGPGY3AhjqG3oT2N3pFwUC3DsY e9WXf1kYqUAnm1EpGYHqxqDamXTY63pdE3ZMDkz70zOoa0kG3nlCQurTIHjKro9ANc5y FMGJHFh38Bz94Jhv44MMX/EXimjnFNJ/JeTr9TSqBx7SHwyhFMZpBpm27RgcApi6UXxx jIHw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699582406; x=1700187206; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=bjFOFq9eCDs5yJ6CYs0wSivMTMFgOXCeKduCrIaUzLY=; b=aylaObQB63IEo3QSXa9wO1eK4zBanZCk82j4bsVIFitj+rKgGuRXUW+0R4nOm8GGYG cu3ro7bY49VrZb+TZTHyT0ggf54yFyGAcsh/MbvKdjptyUrnE5690FI+HWxbC1xZ18G4 HeoNjG7hkWXeOw4yH43zbTEDY6XRou2+T2oMEz7IiCVJy+mLh/q3r4fUvKX1mtrV/6TL 6W3uioTkGqr4PASIbOCke14S+OryjQijpRylO4TKwCt0lBiKy+LBAj5o1dLmWh2wfqqI S/GiLimBSIpcp/Gg80KhcXyZnkZ1QncrR0FBXomCn+rxOli+IRhG725bY8idO8ooDB3V niEw== X-Gm-Message-State: AOJu0YwViUgDbRB4J03IrsfBU/L0N1CxQFndB8sOuASjaU+k1Twd8muZ kRVxYN9ajqC4M8eIdT3UhymcEc3KM7M= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a17:902:70c8:b0:1c9:f267:1661 with SMTP id l8-20020a17090270c800b001c9f2671661mr296098plt.2.1699582406108; Thu, 09 Nov 2023 18:13:26 -0800 (PST) Reply-To: Sean Christopherson Date: Thu, 9 Nov 2023 18:12:47 -0800 In-Reply-To: <20231110021306.1269082-1-seanjc@google.com> Mime-Version: 1.0 References: <20231110021306.1269082-1-seanjc@google.com> X-Mailer: git-send-email 2.42.0.869.gea05f2083d-goog Message-ID: <20231110021306.1269082-8-seanjc@google.com> Subject: [PATCH v8 07/26] KVM: x86/pmu: Apply "fast" RDPMC only to Intel PMUs From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Kan Liang , Dapeng Mi , Jim Mattson , Jinrong Liang , Aaron Lewis , Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (agentk.vger.email [0.0.0.0]); Thu, 09 Nov 2023 18:15:12 -0800 (PST) X-Spam-Status: No, score=-8.4 required=5.0 tests=DKIMWL_WL_MED,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE, USER_IN_DEF_DKIM_WL autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on agentk.vger.email X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1782141525221334150 X-GMAIL-MSGID: 1782141525221334150 Move the handling of "fast" RDPMC instructions, which drop bits 63:31 of the count, to Intel. The "fast" flag, and all flags for that matter, are Intel-only and aren't supported by AMD. Opportunistically replace open coded bit crud with proper #defines. Fixes: ca724305a2b0 ("KVM: x86/vPMU: Implement AMD vPMU code for KVM") Signed-off-by: Sean Christopherson Reviewed-by: Dapeng Mi --- arch/x86/kvm/pmu.c | 3 +-- arch/x86/kvm/vmx/pmu_intel.c | 20 ++++++++++++++++---- 2 files changed, 17 insertions(+), 6 deletions(-) diff --git a/arch/x86/kvm/pmu.c b/arch/x86/kvm/pmu.c index 99ed72966528..e3ba5e12c2e7 100644 --- a/arch/x86/kvm/pmu.c +++ b/arch/x86/kvm/pmu.c @@ -499,10 +499,9 @@ static int kvm_pmu_rdpmc_vmware(struct kvm_vcpu *vcpu, unsigned idx, u64 *data) int kvm_pmu_rdpmc(struct kvm_vcpu *vcpu, unsigned idx, u64 *data) { - bool fast_mode = idx & (1u << 31); struct kvm_pmu *pmu = vcpu_to_pmu(vcpu); struct kvm_pmc *pmc; - u64 mask = fast_mode ? ~0u : ~0ull; + u64 mask = ~0ull; if (!pmu->version) return 1; diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c index 3bac3b32b485..c6ea128ea7c8 100644 --- a/arch/x86/kvm/vmx/pmu_intel.c +++ b/arch/x86/kvm/vmx/pmu_intel.c @@ -20,6 +20,10 @@ #include "nested.h" #include "pmu.h" +/* Perf's "BASE" is wildly misleading, this is a single-bit flag, not a base. */ +#define INTEL_RDPMC_FIXED INTEL_PMC_FIXED_RDPMC_BASE +#define INTEL_RDPMC_FAST BIT(31) + #define MSR_PMC_FULL_WIDTH_BIT (MSR_IA32_PMC0 - MSR_IA32_PERFCTR0) static void reprogram_fixed_counters(struct kvm_pmu *pmu, u64 data) @@ -55,12 +59,17 @@ static struct kvm_pmc *intel_pmc_idx_to_pmc(struct kvm_pmu *pmu, int pmc_idx) } } +static u32 intel_rdpmc_get_masked_idx(struct kvm_pmu *pmu, u32 idx) +{ + return idx & ~(INTEL_RDPMC_FIXED | INTEL_RDPMC_FAST); +} + static bool intel_is_valid_rdpmc_ecx(struct kvm_vcpu *vcpu, unsigned int idx) { struct kvm_pmu *pmu = vcpu_to_pmu(vcpu); - bool fixed = idx & (1u << 30); + bool fixed = idx & INTEL_RDPMC_FIXED; - idx &= ~(3u << 30); + idx = intel_rdpmc_get_masked_idx(pmu, idx); return fixed ? idx < pmu->nr_arch_fixed_counters : idx < pmu->nr_arch_gp_counters; @@ -70,11 +79,14 @@ static struct kvm_pmc *intel_rdpmc_ecx_to_pmc(struct kvm_vcpu *vcpu, unsigned int idx, u64 *mask) { struct kvm_pmu *pmu = vcpu_to_pmu(vcpu); - bool fixed = idx & (1u << 30); + bool fixed = idx & INTEL_RDPMC_FIXED; struct kvm_pmc *counters; unsigned int num_counters; - idx &= ~(3u << 30); + if (idx & INTEL_RDPMC_FAST) + *mask &= GENMASK_ULL(31, 0); + + idx = intel_rdpmc_get_masked_idx(pmu, idx); if (fixed) { counters = pmu->fixed_counters; num_counters = pmu->nr_arch_fixed_counters; From patchwork Fri Nov 10 02:12:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Sean Christopherson X-Patchwork-Id: 163729 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b129:0:b0:403:3b70:6f57 with SMTP id q9csp837030vqs; Thu, 9 Nov 2023 18:14:10 -0800 (PST) X-Google-Smtp-Source: AGHT+IHF5LbPmsY4k7EhA+wtWUSG0hVAucRvCRMw7uohdvTFoTkFPFZ5ocgXNnRByykWBBlgV6+k X-Received: by 2002:a05:6358:7e56:b0:169:7eaa:cbe7 with SMTP id p22-20020a0563587e5600b001697eaacbe7mr4593094rwm.32.1699582450463; Thu, 09 Nov 2023 18:14:10 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1699582450; cv=none; d=google.com; s=arc-20160816; b=MCmhSzqZ8Z+eLVqOq8UmvDt8KqjU0r5lYW/qBvU3aQTLgOsTdRC1UD3cnwJuvwUk5b vI036XgslRA2eT4iDQqMWBDAgTk5/f/g/g5GJjB4vRB470xVwwcNmSEiJ1gNuPNPRQHi y1xkTEeYfOMIqkLo309/m5SQrTFII8H/YFvgy3nWcO8QTfZAeNh73uCPwtT0lSe3+CqX ILx7LNnyTAQR42j15AruhSVoKKxOfl3bBOcf+jpy3HE3M3xAbDx3a/I1yYMHCjEPCjID 7jmtmEhOGp686Bm55Ag8gRLtQN9VDoYOueibzf00guG2HdscE675bDb3RMiReZz0ukW/ FqjQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:cc:to:from:subject :message-id:references:mime-version:in-reply-to:date:reply-to :dkim-signature; bh=ldSAXTrx3gBNdQtyHk8R9u0SycFGAN1pYwkpn+U3utc=; fh=gm96CM+cG0KJxn7vnhn0c1c98ILNP1HHUrKfrGecw3M=; b=FgI6s5BTI8LneCQKTcpBJpXB0mJt7UBbD9aLtCNSk3Zq4bCZGroTArZtqchKMgcv/L doymhte4Kt0bahin3sxk5+3l2Ygl+IXEIlCvV5YWJ8fPXE/MbwBr986hyEj4y4a0xSBm GudeMD3QIV1OHp6xHEFnmrqHzEe/v8159JFAwUevhkU7rPzTFZKyoPPosYgfwQIjBNXF Xn0kogdt0ogTxcfEPp/qCucce497cuk003tKZ1oCsfP7VXPQtpOWySOi8UQtVEg2muaB CygLzic7mWdEmadxb0Shr132hrP4kmsLkNNwbD+4UmtIUtlhZlY1rHrFRuiuqkslrhnD bUQg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=lBSeli7u; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from snail.vger.email (snail.vger.email. [2620:137:e000::3:7]) by mx.google.com with ESMTPS id g9-20020a656cc9000000b005b9b68add9asi9939136pgw.255.2023.11.09.18.14.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Nov 2023 18:14:10 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) client-ip=2620:137:e000::3:7; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=lBSeli7u; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by snail.vger.email (Postfix) with ESMTP id 8B42383A7FD5; Thu, 9 Nov 2023 18:14:09 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at snail.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345728AbjKJCOC (ORCPT + 30 others); Thu, 9 Nov 2023 21:14:02 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48294 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235081AbjKJCNi (ORCPT ); Thu, 9 Nov 2023 21:13:38 -0500 Received: from mail-yb1-xb49.google.com (mail-yb1-xb49.google.com [IPv6:2607:f8b0:4864:20::b49]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 17B5F4792 for ; Thu, 9 Nov 2023 18:13:29 -0800 (PST) Received: by mail-yb1-xb49.google.com with SMTP id 3f1490d57ef6-da03390793fso1867243276.3 for ; Thu, 09 Nov 2023 18:13:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1699582408; x=1700187208; darn=vger.kernel.org; h=content-transfer-encoding:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:reply-to:from:to:cc:subject:date :message-id:reply-to; bh=ldSAXTrx3gBNdQtyHk8R9u0SycFGAN1pYwkpn+U3utc=; b=lBSeli7urhZy6BiD1UbgqGnxNcERes0jpEb1p9lWjYSiyCSDxqmYNdtP9bswUfVUK8 YwvJ59pjTfbewn9I//eA64nagWokOkg4rsAdSn224zDA5F3k3mmswlrswRy9QP7YkIU6 0jAMWrWcqfxw3gTIML3m56fm/h3klB9Y3LAe9CQU79PcHKgTE8E0cC1VxNIxOjLchrN1 Fv24/JL8/Jegu8pWLJvprsrQnf/zDkAJ1UmyxLck+LyiNrleVE02q9RzUD29+HReUlrd YWo0PyUSP8WDzMTOk8t10G8d87gIo9ExcyPyuwAwjx9fLIHj0SvDXbraPSUeO9G9763q JTCQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699582408; x=1700187208; h=content-transfer-encoding:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:reply-to:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=ldSAXTrx3gBNdQtyHk8R9u0SycFGAN1pYwkpn+U3utc=; b=Y1DxQ/5EYvoTZ90tGCAhmYwZ6zf4tGLSzg+dOpt+T1zC8EBrP+sCOuLfoO95LnG3T9 zD57aoZB9kwnqs0HnJZz3EptQDAhVVYnUBrTzQ3PLhLB4S8JePcx1FLn0umn3hI+vs7i YoE6thyF0MemdORn+Nmev9m+cLBtt8HCDJq0N0IpxmyoNLVHc9raOG27QPGmifUmdXyq p1ei5uogjayvlGVZA887B19HZ3D5pNffpr+a0Onp3v5F3ei7RXHJJ7T2j69ZHBazN6g2 3P0bgqaz0dJKv3KyySb2jCb0e/pLMbOCUQcQ19xz7HLO856UVh5oovvS869EX3YuMWGc a9fA== X-Gm-Message-State: AOJu0YwWd5X/JL03hTw2Q40TO9/XKvDEt00rCc/V920xmevjmIT9pGXr 4koEgIu7BTBrX6eRTGCVQQuqROq+WTI= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a25:df45:0:b0:d9a:5b63:a682 with SMTP id w66-20020a25df45000000b00d9a5b63a682mr183492ybg.13.1699582408349; Thu, 09 Nov 2023 18:13:28 -0800 (PST) Reply-To: Sean Christopherson Date: Thu, 9 Nov 2023 18:12:48 -0800 In-Reply-To: <20231110021306.1269082-1-seanjc@google.com> Mime-Version: 1.0 References: <20231110021306.1269082-1-seanjc@google.com> X-Mailer: git-send-email 2.42.0.869.gea05f2083d-goog Message-ID: <20231110021306.1269082-9-seanjc@google.com> Subject: [PATCH v8 08/26] KVM: x86/pmu: Disallow "fast" RDPMC for architectural Intel PMUs From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Kan Liang , Dapeng Mi , Jim Mattson , Jinrong Liang , Aaron Lewis , Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Thu, 09 Nov 2023 18:14:09 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1782141367764922606 X-GMAIL-MSGID: 1782141367764922606 Inject #GP on RDPMC if the "fast" flag is set for architectural Intel PMUs, i.e. if the PMU version is non-zero. Per Intel's SDM, and confirmed on bare metal, the "fast" flag is supported only for non-architectural PMUs, and is reserved for architectural PMUs. If the processor does not support architectural performance monitoring (CPUID.0AH:EAX[7:0]=0), ECX[30:0] specifies the index of the PMC to be read. Setting ECX[31] selects “fast” read mode if supported. In this mode, RDPMC returns bits 31:0 of the PMC in EAX while clearing EDX to zero. If the processor does support architectural performance monitoring (CPUID.0AH:EAX[7:0] ≠ 0), ECX[31:16] specifies type of PMC while ECX[15:0] specifies the index of the PMC to be read within that type. The following PMC types are currently defined: — General-purpose counters use type 0. The index x (to read IA32_PMCx) must be less than the value enumerated by CPUID.0AH.EAX[15:8] (thus ECX[15:8] must be zero). — Fixed-function counters use type 4000H. The index x (to read IA32_FIXED_CTRx) can be used if either CPUID.0AH.EDX[4:0] > x or CPUID.0AH.ECX[x] = 1 (thus ECX[15:5] must be 0). — Performance metrics use type 2000H. This type can be used only if IA32_PERF_CAPABILITIES.PERF_METRICS_AVAILABLE[bit 15]=1. For this type, the index in ECX[15:0] is implementation specific. WARN if KVM ever actually tries to complete RDPMC for a non-architectural PMU as KVM doesn't support such PMUs, i.e. kvm_pmu_rdpmc() should reject the RDPMC before getting to the Intel code. Fixes: f5132b01386b ("KVM: Expose a version 2 architectural PMU to a guests") Fixes: 67f4d4288c35 ("KVM: x86: rdpmc emulation checks the counter incorrectly") Signed-off-by: Sean Christopherson Reviewed-by: Dapeng Mi --- arch/x86/kvm/vmx/pmu_intel.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c index c6ea128ea7c8..80255f86072e 100644 --- a/arch/x86/kvm/vmx/pmu_intel.c +++ b/arch/x86/kvm/vmx/pmu_intel.c @@ -61,7 +61,19 @@ static struct kvm_pmc *intel_pmc_idx_to_pmc(struct kvm_pmu *pmu, int pmc_idx) static u32 intel_rdpmc_get_masked_idx(struct kvm_pmu *pmu, u32 idx) { - return idx & ~(INTEL_RDPMC_FIXED | INTEL_RDPMC_FAST); + /* + * Fast RDPMC is only supported on non-architectural PMUs, which KVM + * doesn't support. + */ + if (WARN_ON_ONCE(!pmu->version)) + return idx & ~INTEL_RDPMC_FAST; + + /* + * Fixed PMCs are supported on all architectural PMUs. Note, KVM only + * emulates fixed PMCs for PMU v2+, but the flag itself is still valid, + * i.e. let RDPMC fail due to accessing a non-existent counter. + */ + return idx & ~INTEL_RDPMC_FIXED; } static bool intel_is_valid_rdpmc_ecx(struct kvm_vcpu *vcpu, unsigned int idx) From patchwork Fri Nov 10 02:12:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Christopherson X-Patchwork-Id: 163736 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b129:0:b0:403:3b70:6f57 with SMTP id q9csp837255vqs; Thu, 9 Nov 2023 18:14:46 -0800 (PST) X-Google-Smtp-Source: AGHT+IEfLsfYc4v5aJanHfbjQR6UDuP5PYx2UL0SDdkCITG2v1Jseby0h2zZjKeo0rCOE2ufoKvr X-Received: by 2002:a05:6808:1b1f:b0:3b2:d8c8:7bfa with SMTP id bx31-20020a0568081b1f00b003b2d8c87bfamr4418262oib.8.1699582486484; Thu, 09 Nov 2023 18:14:46 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1699582486; cv=none; d=google.com; s=arc-20160816; b=GJFewl7SE0C78XXOKTkPVPY6KcQWZJQ+0axgu2xsj4gLRQL5rYkxxiogyG9i+O0Hji D7663d5XRqNVAdu9bIkcQB16z7oDlWtbHlOML2fnHfCTN7hEu5xZJOSqNTNDmq6Tw2EY tYxrjklrz3kK22o1Dz3N+mU676hDLFfJARGmS2kBYyq8bQ5r56wCkcz/CGjMzC0hrZIs iRTKhn+23L6hId5NwVfaddB4QGHkTF/CX/YwgZY11A6LQz3qP8N1L9TVybN5reGzTgK9 XX+8/a+p4E/3el5L9gCcSdsnW3YKxc8XieMIGqxH9HtPOPPkGV9apwGHkiiga2qCQkQc Nn4w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:reply-to:dkim-signature; bh=bz+cFjmGJykZammOdDVwa1MNebY51dfMTOWn2QBuCm4=; fh=gm96CM+cG0KJxn7vnhn0c1c98ILNP1HHUrKfrGecw3M=; b=sHVQAmixxnPxshjZ2U8udkwj2aaSeaar6kHa9fBEko7Pd9jTMR/YbdgbmDn/E8BtfS 7BvJx4UKBXBkbt6LY++7pgsdDE80FESNdeXThycfi4zP+x95YbmuxEShJ2ihCEniBG2C IP9BENvi6ZVV/Ic69W1cXLl2L3NYkolvo17QsYrgox2MG6zbH1Tp4jzPK/sMSU8Xr4uo ZFsDwHrg0Bz3O1JBI9UmBYXJaur04+ylJpReL0puzYJZDX869C68vm6ccAu0a/5/gG+R Ie9QHGzmz6O5e0OXIIWdh+nAoSGIiL6z3VbnivVTx77mOcYzgqguisPVUCctksf4dvav +tzA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=n6s2P59W; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.38 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from fry.vger.email (fry.vger.email. [23.128.96.38]) by mx.google.com with ESMTPS id v202-20020a6361d3000000b005b9083b81f5si8487434pgb.487.2023.11.09.18.14.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Nov 2023 18:14:46 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.38 as permitted sender) client-ip=23.128.96.38; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=n6s2P59W; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.38 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by fry.vger.email (Postfix) with ESMTP id EFA4F834A756; Thu, 9 Nov 2023 18:14:32 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at fry.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345759AbjKJCOF (ORCPT + 30 others); Thu, 9 Nov 2023 21:14:05 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48426 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345749AbjKJCNj (ORCPT ); Thu, 9 Nov 2023 21:13:39 -0500 Received: from mail-pf1-x449.google.com (mail-pf1-x449.google.com [IPv6:2607:f8b0:4864:20::449]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E892C47B3 for ; Thu, 9 Nov 2023 18:13:30 -0800 (PST) Received: by mail-pf1-x449.google.com with SMTP id d2e1a72fcca58-6b3e4c22dabso1494927b3a.1 for ; Thu, 09 Nov 2023 18:13:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1699582410; x=1700187210; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=bz+cFjmGJykZammOdDVwa1MNebY51dfMTOWn2QBuCm4=; b=n6s2P59WuqBwH5zqjT5/UyGf/jPYWzlQAs4dYBd52sZf4mMdptZihnVvL9DFjNyvbg zEiiCMSX4ZCfJBQcsQmDnh7AXL5GNMgqFRsAm0rE5WpJugC/dqeifBaFX8Lip/5Xl54l PEXqVcroRlZHw/4SxNEcZxeo99iGp1GYyfFHQbFRfr/RRJTzQlaSo9tsbP9e6G5sk1wI 2sw5cV1ZOa7bYkpoi6vSiJlwnaY3BdLNDVZVIX17feXbKfSu/EoAG+Tz4WPbmlyT5L5y xo7OSG375P2ndInIu52GzSlV412HLF6izIMqwzimAaaVjZOe6WBZuOULGnC1+UBdFIKi GTlw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699582410; x=1700187210; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=bz+cFjmGJykZammOdDVwa1MNebY51dfMTOWn2QBuCm4=; b=IQ2z9T4suB71y1e6xFGEOzojfCGpGIP2gGsc5FM/Rvht4bgjuJtta+1Vj3OL0nrvVu 4x7XjGjG3eoHaeC2HIgbaeZF2o8LhwFO/N1BByWZ/qmSKm3Q9FxRiP7A9PdfFkiZwGGQ x6Uw/yIHi3nFRrD44HrNrbFcVcHK3FA1jfidxv+9tlC54Khwxmwx05xxVNARYo3AMq0G RAnrW/bGBxt9ISadh9iRQw5rG+z2FibvO9EYxfE5GO4JTZ7/9PtoOyNLdhcGO3EHIW1k nGdQ61ciOLNfN2jyP1h8R5WakSsd08/N/rnlLJUpQyH+1KwPiwU5EWBL51TIYonESvoo gRVQ== X-Gm-Message-State: AOJu0Ywj5+qQNOtYeBDXpl6sj459nKoB77BzaWLIdRgRVFi5xSWTjPEN uiZtmk0etnNbEfoRu9segY49+s59MUU= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a05:6a00:b20:b0:6be:aed:7ad0 with SMTP id f32-20020a056a000b2000b006be0aed7ad0mr901504pfu.2.1699582410463; Thu, 09 Nov 2023 18:13:30 -0800 (PST) Reply-To: Sean Christopherson Date: Thu, 9 Nov 2023 18:12:49 -0800 In-Reply-To: <20231110021306.1269082-1-seanjc@google.com> Mime-Version: 1.0 References: <20231110021306.1269082-1-seanjc@google.com> X-Mailer: git-send-email 2.42.0.869.gea05f2083d-goog Message-ID: <20231110021306.1269082-10-seanjc@google.com> Subject: [PATCH v8 09/26] KVM: selftests: Add vcpu_set_cpuid_property() to set properties From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Kan Liang , Dapeng Mi , Jim Mattson , Jinrong Liang , Aaron Lewis , Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (fry.vger.email [0.0.0.0]); Thu, 09 Nov 2023 18:14:33 -0800 (PST) X-Spam-Status: No, score=-8.4 required=5.0 tests=DKIMWL_WL_MED,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE, USER_IN_DEF_DKIM_WL autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on fry.vger.email X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1782141405069649458 X-GMAIL-MSGID: 1782141405069649458 From: Jinrong Liang Add vcpu_set_cpuid_property() helper function for setting properties, and use it instead of open coding an equivalent for MAX_PHY_ADDR. Future vPMU testcases will also need to stuff various CPUID properties. Reviewed-by: Jim Mattson Signed-off-by: Jinrong Liang Co-developed-by: Sean Christopherson Signed-off-by: Sean Christopherson --- .../selftests/kvm/include/x86_64/processor.h | 4 +++- .../testing/selftests/kvm/lib/x86_64/processor.c | 15 ++++++++++++--- .../x86_64/smaller_maxphyaddr_emulation_test.c | 2 +- 3 files changed, 16 insertions(+), 5 deletions(-) diff --git a/tools/testing/selftests/kvm/include/x86_64/processor.h b/tools/testing/selftests/kvm/include/x86_64/processor.h index 25bc61dac5fb..a01931f7d954 100644 --- a/tools/testing/selftests/kvm/include/x86_64/processor.h +++ b/tools/testing/selftests/kvm/include/x86_64/processor.h @@ -994,7 +994,9 @@ static inline void vcpu_set_cpuid(struct kvm_vcpu *vcpu) vcpu_ioctl(vcpu, KVM_GET_CPUID2, vcpu->cpuid); } -void vcpu_set_cpuid_maxphyaddr(struct kvm_vcpu *vcpu, uint8_t maxphyaddr); +void vcpu_set_cpuid_property(struct kvm_vcpu *vcpu, + struct kvm_x86_cpu_property property, + uint32_t value); void vcpu_clear_cpuid_entry(struct kvm_vcpu *vcpu, uint32_t function); void vcpu_set_or_clear_cpuid_feature(struct kvm_vcpu *vcpu, diff --git a/tools/testing/selftests/kvm/lib/x86_64/processor.c b/tools/testing/selftests/kvm/lib/x86_64/processor.c index d8288374078e..67eb82a6c754 100644 --- a/tools/testing/selftests/kvm/lib/x86_64/processor.c +++ b/tools/testing/selftests/kvm/lib/x86_64/processor.c @@ -752,12 +752,21 @@ void vcpu_init_cpuid(struct kvm_vcpu *vcpu, const struct kvm_cpuid2 *cpuid) vcpu_set_cpuid(vcpu); } -void vcpu_set_cpuid_maxphyaddr(struct kvm_vcpu *vcpu, uint8_t maxphyaddr) +void vcpu_set_cpuid_property(struct kvm_vcpu *vcpu, + struct kvm_x86_cpu_property property, + uint32_t value) { - struct kvm_cpuid_entry2 *entry = vcpu_get_cpuid_entry(vcpu, 0x80000008); + struct kvm_cpuid_entry2 *entry; + + entry = __vcpu_get_cpuid_entry(vcpu, property.function, property.index); + + (&entry->eax)[property.reg] &= ~GENMASK(property.hi_bit, property.lo_bit); + (&entry->eax)[property.reg] |= value << property.lo_bit; - entry->eax = (entry->eax & ~0xff) | maxphyaddr; vcpu_set_cpuid(vcpu); + + /* Sanity check that @value doesn't exceed the bounds in any way. */ + TEST_ASSERT_EQ(kvm_cpuid_property(vcpu->cpuid, property), value); } void vcpu_clear_cpuid_entry(struct kvm_vcpu *vcpu, uint32_t function) diff --git a/tools/testing/selftests/kvm/x86_64/smaller_maxphyaddr_emulation_test.c b/tools/testing/selftests/kvm/x86_64/smaller_maxphyaddr_emulation_test.c index 06edf00a97d6..9b89440dff19 100644 --- a/tools/testing/selftests/kvm/x86_64/smaller_maxphyaddr_emulation_test.c +++ b/tools/testing/selftests/kvm/x86_64/smaller_maxphyaddr_emulation_test.c @@ -63,7 +63,7 @@ int main(int argc, char *argv[]) vm_init_descriptor_tables(vm); vcpu_init_descriptor_tables(vcpu); - vcpu_set_cpuid_maxphyaddr(vcpu, MAXPHYADDR); + vcpu_set_cpuid_property(vcpu, X86_PROPERTY_MAX_PHY_ADDR, MAXPHYADDR); rc = kvm_check_cap(KVM_CAP_EXIT_ON_EMULATION_FAILURE); TEST_ASSERT(rc, "KVM_CAP_EXIT_ON_EMULATION_FAILURE is unavailable"); From patchwork Fri Nov 10 02:12:50 2023 Content-Type: text/plain; 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[2620:137:e000::3:7]) by mx.google.com with ESMTPS id pq8-20020a17090b3d8800b002803af4c4f8si3295421pjb.74.2023.11.09.18.14.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Nov 2023 18:14:18 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) client-ip=2620:137:e000::3:7; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=4UsDFgy+; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by snail.vger.email (Postfix) with ESMTP id 0C91B83A7FF9; Thu, 9 Nov 2023 18:14:18 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at snail.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345707AbjKJCOI (ORCPT + 30 others); Thu, 9 Nov 2023 21:14:08 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48530 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234633AbjKJCNp (ORCPT ); Thu, 9 Nov 2023 21:13:45 -0500 Received: from mail-pj1-x1049.google.com (mail-pj1-x1049.google.com [IPv6:2607:f8b0:4864:20::1049]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DEF4E49CB for ; Thu, 9 Nov 2023 18:13:32 -0800 (PST) Received: by mail-pj1-x1049.google.com with SMTP id 98e67ed59e1d1-2801b74012bso1710881a91.3 for ; Thu, 09 Nov 2023 18:13:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1699582412; x=1700187212; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=xR4tNxv+g07FJHlmB9dj3yDxoywssp8UIvL+izkb3n8=; b=4UsDFgy+kwsdVXxWBCJ2D9vib0ODCGM75Lhsb373o099RH5BDg1qGOO+FAN0pF+3bM FKK7/MyRXMn+ZDvia2IeBOLpechVYY984TXowFicuivK/SizSWT/Y30aZDftDPSNxjQL opYK41R6Ue982jaJ/H9MCvMT2M1a6etxQKbIdOc/orIpTLEYPNbDvLk4fh46ncWv7pV+ DX36j0ySDUQ6YjoMGsXqzFiY9n+q0v0yw8sfMsMnyxgyZ3mBJHhvBhtXrPzuOxdRFil7 BTLrjXY9vFOIJ5DVIj9MGiIwoWHTpXqnPKlNXIUEju5PUbaXWSo7z+o/UnT7FeBwT9F4 Ztlg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699582412; x=1700187212; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=xR4tNxv+g07FJHlmB9dj3yDxoywssp8UIvL+izkb3n8=; b=iQ/bcM6wjXUzp/agMjFSktyio5bXk0gtFx24Rhks/YZA9yhWn7Y05ZFpSlyt0gDGyi vPR7SfqGeA0FKU60IJuoF09lc9PQ6e9PYXX283tQwwMXTA+f983wO2ToMtFHW7eqQB+L SOCvUEudoDMNcCkEfe6iIxMBk/+IPsMYefiMYCI68aunBry2CBU1fW02lJome5WQgVSP 2z3jrogEAcWEyG0ANEhnNuzJCXvMa/mQ31OO5QwDt7JiqjHcUWXhePwJSpglXvaCKck1 qN5mJQGa40xjdvvjFz5pUt+0MLDUlOGqh2JYKMrlDj/p02ImDZHa+HCb7qJVNYzJ5dOX a80w== X-Gm-Message-State: AOJu0Yzd9A6T3TjUDe3t9hbMniaeFkX/BHUWtCY0Yo0E9wJ9nc/WkcQR 0LC+Y7HLcekH/LYiEy1k6wMmBU3Czmc= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a17:90b:344a:b0:280:cd4e:76d2 with SMTP id lj10-20020a17090b344a00b00280cd4e76d2mr823816pjb.7.1699582412087; Thu, 09 Nov 2023 18:13:32 -0800 (PST) Reply-To: Sean Christopherson Date: Thu, 9 Nov 2023 18:12:50 -0800 In-Reply-To: <20231110021306.1269082-1-seanjc@google.com> Mime-Version: 1.0 References: <20231110021306.1269082-1-seanjc@google.com> X-Mailer: git-send-email 2.42.0.869.gea05f2083d-goog Message-ID: <20231110021306.1269082-11-seanjc@google.com> Subject: [PATCH v8 10/26] KVM: selftests: Drop the "name" param from KVM_X86_PMU_FEATURE() From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Kan Liang , Dapeng Mi , Jim Mattson , Jinrong Liang , Aaron Lewis , Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Thu, 09 Nov 2023 18:14:18 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1782141376101839203 X-GMAIL-MSGID: 1782141376101839203 Drop the "name" parameter from KVM_X86_PMU_FEATURE(), it's unused and the name is redundant with the macro, i.e. it's truly useless. Reviewed-by: Jim Mattson Signed-off-by: Sean Christopherson --- tools/testing/selftests/kvm/include/x86_64/processor.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tools/testing/selftests/kvm/include/x86_64/processor.h b/tools/testing/selftests/kvm/include/x86_64/processor.h index a01931f7d954..2d9771151dd9 100644 --- a/tools/testing/selftests/kvm/include/x86_64/processor.h +++ b/tools/testing/selftests/kvm/include/x86_64/processor.h @@ -289,7 +289,7 @@ struct kvm_x86_cpu_property { struct kvm_x86_pmu_feature { struct kvm_x86_cpu_feature anti_feature; }; -#define KVM_X86_PMU_FEATURE(name, __bit) \ +#define KVM_X86_PMU_FEATURE(__bit) \ ({ \ struct kvm_x86_pmu_feature feature = { \ .anti_feature = KVM_X86_CPU_FEATURE(0xa, 0, EBX, __bit), \ @@ -298,7 +298,7 @@ struct kvm_x86_pmu_feature { feature; \ }) -#define X86_PMU_FEATURE_BRANCH_INSNS_RETIRED KVM_X86_PMU_FEATURE(BRANCH_INSNS_RETIRED, 5) +#define X86_PMU_FEATURE_BRANCH_INSNS_RETIRED KVM_X86_PMU_FEATURE(5) static inline unsigned int x86_family(unsigned int eax) { From patchwork Fri Nov 10 02:12:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Christopherson X-Patchwork-Id: 163731 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b129:0:b0:403:3b70:6f57 with SMTP id q9csp837106vqs; Thu, 9 Nov 2023 18:14:21 -0800 (PST) X-Google-Smtp-Source: AGHT+IF6KSkaL/RDSlr7q60kbwmxMDKsPv+UVtG2tfte3d8mpMph9AQthg0f+mhxpOY6qWLifDaA X-Received: by 2002:a05:6a20:e117:b0:181:8e2:ba3c with SMTP id kr23-20020a056a20e11700b0018108e2ba3cmr7857645pzb.19.1699582461638; Thu, 09 Nov 2023 18:14:21 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1699582461; cv=none; d=google.com; s=arc-20160816; b=xxXIQeZwVS5/k6tggDP2wWgi2mDnNowFNVet75cfBlaIbSaMiFOdNYqiPphCNuZc7W 0ToZJFpkMMV5Ex8gQ/pCXQITOBlNhjLEi7HDB9+6iVmd8sQqQym+wZeFxJwqG/dtFWlE Q5mVDx149ynGx/bfi0WgB1BdEOUQhtmzly9NBmMIOawJKyRLBDGGweqe9L7qiIHJamyV v/7iefZq0H2a2Yh6eIzUjgargFb0qrLjhJR2wz+QIGk0h3q1mUuIfGTj9uXrCOg4q5Wa QM6graXB6yFz02DlH4xNCtIvRUTKSgsEgMIax9hI4pnE+qkTkINqlhWcL1ZZFC7obIn3 2hOA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:reply-to:dkim-signature; bh=M4yIuLWtUhd20HNDbIbdJZg/15m7GuOnQW/l0bWB/Yg=; fh=gm96CM+cG0KJxn7vnhn0c1c98ILNP1HHUrKfrGecw3M=; b=NmPYJaePZIAFy/yA9DZv/SsM3MEtCSkWIUzZ99nyWkE9MjgiLXwV12VvE4w/3VctHz UYZDaVrVp9jyJjv1T3xfc/zl2TrEdRKe9VZQip/qc/zHK3/HZgH59/bJl9zUh4ZqepFP 2691C5c3tUWRC3rOtoeSePHF7HpT6iKdJwz0JeAanY+Y5lf0EsFakqytyLC7Lca1CYZr ZPNiffzwMcxdEmC9RxRcCnNoYpa+X+yl0pT8xLiVTpRoqo/aymeEGxlBLDVCR4O7/gs2 LxVn2aYMGEVnqRmNLUetkoJCw8213OTFmKvZQqTSFCFPvUuPQ5cxWbwQyN2qBL0h9Fdv Ozaw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=zefFNpVl; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from snail.vger.email (snail.vger.email. [2620:137:e000::3:7]) by mx.google.com with ESMTPS id v7-20020a170903238700b001c77e00809csi6011941plh.453.2023.11.09.18.14.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Nov 2023 18:14:21 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) client-ip=2620:137:e000::3:7; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=zefFNpVl; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by snail.vger.email (Postfix) with ESMTP id CCF4483A7FF5; Thu, 9 Nov 2023 18:14:20 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at snail.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345797AbjKJCOK (ORCPT + 30 others); Thu, 9 Nov 2023 21:14:10 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59030 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345789AbjKJCNy (ORCPT ); Thu, 9 Nov 2023 21:13:54 -0500 Received: from mail-yw1-x114a.google.com (mail-yw1-x114a.google.com [IPv6:2607:f8b0:4864:20::114a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B9DB149C1 for ; Thu, 9 Nov 2023 18:13:34 -0800 (PST) Received: by mail-yw1-x114a.google.com with SMTP id 00721157ae682-5a7af53bde4so23379617b3.0 for ; Thu, 09 Nov 2023 18:13:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1699582414; x=1700187214; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=M4yIuLWtUhd20HNDbIbdJZg/15m7GuOnQW/l0bWB/Yg=; b=zefFNpVlxuCkclztqH9JizuJHC/TPjA8/dPN/PIK+fJ4vDFtV0MISBGhLicZ5Rao4e rCixlIZsnfxGe+RBPWmQ1nJ8ytPtCNZt17JNWP+9mqYhGcIG3PxwBMr6vkBqmzHAg1xq NB70TO45IUYF8FubSvl0DlEoLRn2n4z+0mzMBUkZ52i85fZP3HCGw+PMG04jsS6OobR9 nYJEw4XW/P2jHH6jJXRHQpY2Mo4eIfAEcw7SbMKAjxZ+YZlNxZ75rnMeX91YF/z4BWX2 yKnt20AzeCDW604lm57WwBc124/3jrWu78sscZRsmb8ElP3CzSzXp5VeYx8NwisVzk4o mxMQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699582414; x=1700187214; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=M4yIuLWtUhd20HNDbIbdJZg/15m7GuOnQW/l0bWB/Yg=; b=MsRPBOrSsvUAV/+oqavO8MAeJQtROCotDwZ5f+TMoxpqF4l8yc70e5kWclXO/XAd7c v2nA4zY9B2yxL9orI3ld6AkiLj1BdjVpCtc6wMK7j/Ua8Xz5L9A8ULELbJX8wZPYaAqj OEpe1LMkUICz3/cAZb3NYGB3i8wmP3TALpCU2ioTy/lVHMu0KNnTgILdhA6lXNzAxl2Z eJf4bzRR7ypcweh5hks4HRa/wKJpjDh96tmHWb3XBvWsfPNriPZF6flWUBhuBZuy21RL ++OAbf84Wcssq1LlBfs7vgO350kpXSiViNHXnzI2PhZsqmMDgMEFt0Jl97vZWsagCWGX Q1DA== X-Gm-Message-State: AOJu0YxWKDFx42/UBzXAz8TJq6s6wuwFabSYDR9fJ9M3vZFdGtVza8Qg 2d7/ZJ65hwTu15m1AodEFZVgAE7SjYo= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a25:9ac9:0:b0:d90:e580:88e5 with SMTP id t9-20020a259ac9000000b00d90e58088e5mr185777ybo.10.1699582413990; Thu, 09 Nov 2023 18:13:33 -0800 (PST) Reply-To: Sean Christopherson Date: Thu, 9 Nov 2023 18:12:51 -0800 In-Reply-To: <20231110021306.1269082-1-seanjc@google.com> Mime-Version: 1.0 References: <20231110021306.1269082-1-seanjc@google.com> X-Mailer: git-send-email 2.42.0.869.gea05f2083d-goog Message-ID: <20231110021306.1269082-12-seanjc@google.com> Subject: [PATCH v8 11/26] KVM: selftests: Extend {kvm,this}_pmu_has() to support fixed counters From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Kan Liang , Dapeng Mi , Jim Mattson , Jinrong Liang , Aaron Lewis , Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Thu, 09 Nov 2023 18:14:20 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1782141379509793041 X-GMAIL-MSGID: 1782141379509793041 Extend the kvm_x86_pmu_feature framework to allow querying for fixed counters via {kvm,this}_pmu_has(). Like architectural events, checking for a fixed counter annoyingly requires checking multiple CPUID fields, as a fixed counter exists if: FxCtr[i]_is_supported := ECX[i] || (EDX[4:0] > i); Note, KVM currently doesn't actually support exposing fixed counters via the bitmask, but that will hopefully change sooner than later, and Intel's SDM explicitly "recommends" checking both the number of counters and the mask. Rename the intermedate "anti_feature" field to simply 'f' since the fixed counter bitmask (thankfully) doesn't have reversed polarity like the architectural events bitmask. Note, ideally the helpers would use BUILD_BUG_ON() to assert on the incoming register, but the expected usage in PMU tests can't guarantee the inputs are compile-time constants. Opportunistically define macros for all of the known architectural events and fixed counters. Signed-off-by: Sean Christopherson --- .../selftests/kvm/include/x86_64/processor.h | 65 ++++++++++++++----- 1 file changed, 47 insertions(+), 18 deletions(-) diff --git a/tools/testing/selftests/kvm/include/x86_64/processor.h b/tools/testing/selftests/kvm/include/x86_64/processor.h index 2d9771151dd9..64aecb3dcf60 100644 --- a/tools/testing/selftests/kvm/include/x86_64/processor.h +++ b/tools/testing/selftests/kvm/include/x86_64/processor.h @@ -281,24 +281,41 @@ struct kvm_x86_cpu_property { * that indicates the feature is _not_ supported, and a property that states * the length of the bit mask of unsupported features. A feature is supported * if the size of the bit mask is larger than the "unavailable" bit, and said - * bit is not set. + * bit is not set. Fixed counters also bizarre enumeration, but inverted from + * arch events for general purpose counters. Fixed counters are supported if a + * feature flag is set **OR** the total number of fixed counters is greater + * than index of the counter. * - * Wrap the "unavailable" feature to simplify checking whether or not a given - * architectural event is supported. + * Wrap the events for general purpose and fixed counters to simplify checking + * whether or not a given architectural event is supported. */ struct kvm_x86_pmu_feature { - struct kvm_x86_cpu_feature anti_feature; + struct kvm_x86_cpu_feature f; }; -#define KVM_X86_PMU_FEATURE(__bit) \ -({ \ - struct kvm_x86_pmu_feature feature = { \ - .anti_feature = KVM_X86_CPU_FEATURE(0xa, 0, EBX, __bit), \ - }; \ - \ - feature; \ +#define KVM_X86_PMU_FEATURE(__reg, __bit) \ +({ \ + struct kvm_x86_pmu_feature feature = { \ + .f = KVM_X86_CPU_FEATURE(0xa, 0, __reg, __bit), \ + }; \ + \ + kvm_static_assert(KVM_CPUID_##__reg == KVM_CPUID_EBX || \ + KVM_CPUID_##__reg == KVM_CPUID_ECX); \ + feature; \ }) -#define X86_PMU_FEATURE_BRANCH_INSNS_RETIRED KVM_X86_PMU_FEATURE(5) +#define X86_PMU_FEATURE_CPU_CYCLES KVM_X86_PMU_FEATURE(EBX, 0) +#define X86_PMU_FEATURE_INSNS_RETIRED KVM_X86_PMU_FEATURE(EBX, 1) +#define X86_PMU_FEATURE_REFERENCE_CYCLES KVM_X86_PMU_FEATURE(EBX, 2) +#define X86_PMU_FEATURE_LLC_REFERENCES KVM_X86_PMU_FEATURE(EBX, 3) +#define X86_PMU_FEATURE_LLC_MISSES KVM_X86_PMU_FEATURE(EBX, 4) +#define X86_PMU_FEATURE_BRANCH_INSNS_RETIRED KVM_X86_PMU_FEATURE(EBX, 5) +#define X86_PMU_FEATURE_BRANCHES_MISPREDICTED KVM_X86_PMU_FEATURE(EBX, 6) +#define X86_PMU_FEATURE_TOPDOWN_SLOTS KVM_X86_PMU_FEATURE(EBX, 7) + +#define X86_PMU_FEATURE_INSNS_RETIRED_FIXED KVM_X86_PMU_FEATURE(ECX, 0) +#define X86_PMU_FEATURE_CPU_CYCLES_FIXED KVM_X86_PMU_FEATURE(ECX, 1) +#define X86_PMU_FEATURE_REFERENCE_TSC_CYCLES_FIXED KVM_X86_PMU_FEATURE(ECX, 2) +#define X86_PMU_FEATURE_TOPDOWN_SLOTS_FIXED KVM_X86_PMU_FEATURE(ECX, 3) static inline unsigned int x86_family(unsigned int eax) { @@ -697,10 +714,16 @@ static __always_inline bool this_cpu_has_p(struct kvm_x86_cpu_property property) static inline bool this_pmu_has(struct kvm_x86_pmu_feature feature) { - uint32_t nr_bits = this_cpu_property(X86_PROPERTY_PMU_EBX_BIT_VECTOR_LENGTH); + uint32_t nr_bits; - return nr_bits > feature.anti_feature.bit && - !this_cpu_has(feature.anti_feature); + if (feature.f.reg == KVM_CPUID_EBX) { + nr_bits = this_cpu_property(X86_PROPERTY_PMU_EBX_BIT_VECTOR_LENGTH); + return nr_bits > feature.f.bit && !this_cpu_has(feature.f); + } + + GUEST_ASSERT(feature.f.reg == KVM_CPUID_ECX); + nr_bits = this_cpu_property(X86_PROPERTY_PMU_NR_FIXED_COUNTERS); + return nr_bits > feature.f.bit || this_cpu_has(feature.f); } static __always_inline uint64_t this_cpu_supported_xcr0(void) @@ -916,10 +939,16 @@ static __always_inline bool kvm_cpu_has_p(struct kvm_x86_cpu_property property) static inline bool kvm_pmu_has(struct kvm_x86_pmu_feature feature) { - uint32_t nr_bits = kvm_cpu_property(X86_PROPERTY_PMU_EBX_BIT_VECTOR_LENGTH); + uint32_t nr_bits; - return nr_bits > feature.anti_feature.bit && - !kvm_cpu_has(feature.anti_feature); + if (feature.f.reg == KVM_CPUID_EBX) { + nr_bits = kvm_cpu_property(X86_PROPERTY_PMU_EBX_BIT_VECTOR_LENGTH); + return nr_bits > feature.f.bit && !kvm_cpu_has(feature.f); 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Use the new common macro definitions in the existing PMU event filter test. Cc: Aaron Lewis Suggested-by: Sean Christopherson Signed-off-by: Jinrong Liang Co-developed-by: Sean Christopherson Signed-off-by: Sean Christopherson --- tools/testing/selftests/kvm/Makefile | 1 + tools/testing/selftests/kvm/include/pmu.h | 97 ++++++++++++ tools/testing/selftests/kvm/lib/pmu.c | 31 ++++ .../kvm/x86_64/pmu_event_filter_test.c | 141 ++++++------------ 4 files changed, 173 insertions(+), 97 deletions(-) create mode 100644 tools/testing/selftests/kvm/include/pmu.h create mode 100644 tools/testing/selftests/kvm/lib/pmu.c diff --git a/tools/testing/selftests/kvm/Makefile b/tools/testing/selftests/kvm/Makefile index a5963ab9215b..44d8d022b023 100644 --- a/tools/testing/selftests/kvm/Makefile +++ b/tools/testing/selftests/kvm/Makefile @@ -32,6 +32,7 @@ LIBKVM += lib/guest_modes.c LIBKVM += lib/io.c LIBKVM += lib/kvm_util.c LIBKVM += lib/memstress.c +LIBKVM += lib/pmu.c LIBKVM += lib/guest_sprintf.c LIBKVM += lib/rbtree.c LIBKVM += lib/sparsebit.c diff --git a/tools/testing/selftests/kvm/include/pmu.h b/tools/testing/selftests/kvm/include/pmu.h new file mode 100644 index 000000000000..3c10c4dc0ae8 --- /dev/null +++ b/tools/testing/selftests/kvm/include/pmu.h @@ -0,0 +1,97 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (C) 2023, Tencent, Inc. + */ +#ifndef SELFTEST_KVM_PMU_H +#define SELFTEST_KVM_PMU_H + +#include + +#define KVM_PMU_EVENT_FILTER_MAX_EVENTS 300 + +/* + * Encode an eventsel+umask pair into event-select MSR format. Note, this is + * technically AMD's format, as Intel's format only supports 8 bits for the + * event selector, i.e. doesn't use bits 24:16 for the selector. But, OR-ing + * in '0' is a nop and won't clobber the CMASK. + */ +#define RAW_EVENT(eventsel, umask) (((eventsel & 0xf00UL) << 24) | \ + ((eventsel) & 0xff) | \ + ((umask) & 0xff) << 8) + +/* + * These are technically Intel's definitions, but except for CMASK (see above), + * AMD's layout is compatible with Intel's. + */ +#define ARCH_PERFMON_EVENTSEL_EVENT GENMASK_ULL(7, 0) +#define ARCH_PERFMON_EVENTSEL_UMASK GENMASK_ULL(15, 8) +#define ARCH_PERFMON_EVENTSEL_USR BIT_ULL(16) +#define ARCH_PERFMON_EVENTSEL_OS BIT_ULL(17) +#define ARCH_PERFMON_EVENTSEL_EDGE BIT_ULL(18) +#define ARCH_PERFMON_EVENTSEL_PIN_CONTROL BIT_ULL(19) +#define ARCH_PERFMON_EVENTSEL_INT BIT_ULL(20) +#define ARCH_PERFMON_EVENTSEL_ANY BIT_ULL(21) +#define ARCH_PERFMON_EVENTSEL_ENABLE BIT_ULL(22) +#define ARCH_PERFMON_EVENTSEL_INV BIT_ULL(23) +#define ARCH_PERFMON_EVENTSEL_CMASK GENMASK_ULL(31, 24) + +/* RDPMC control flags, Intel only. */ +#define INTEL_RDPMC_METRICS BIT_ULL(29) +#define INTEL_RDPMC_FIXED BIT_ULL(30) +#define INTEL_RDPMC_FAST BIT_ULL(31) + +/* Fixed PMC controls, Intel only. */ +#define FIXED_PMC_GLOBAL_CTRL_ENABLE(_idx) BIT_ULL((32 + (_idx))) + +#define FIXED_PMC_KERNEL BIT_ULL(0) +#define FIXED_PMC_USER BIT_ULL(1) +#define FIXED_PMC_ANYTHREAD BIT_ULL(2) +#define FIXED_PMC_ENABLE_PMI BIT_ULL(3) +#define FIXED_PMC_NR_BITS 4 +#define FIXED_PMC_CTRL(_idx, _val) ((_val) << ((_idx) * FIXED_PMC_NR_BITS)) + +#define PMU_CAP_FW_WRITES BIT_ULL(13) +#define PMU_CAP_LBR_FMT 0x3f + +#define INTEL_ARCH_CPU_CYCLES RAW_EVENT(0x3c, 0x00) +#define INTEL_ARCH_INSTRUCTIONS_RETIRED RAW_EVENT(0xc0, 0x00) +#define INTEL_ARCH_REFERENCE_CYCLES RAW_EVENT(0x3c, 0x01) +#define INTEL_ARCH_LLC_REFERENCES RAW_EVENT(0x2e, 0x4f) +#define INTEL_ARCH_LLC_MISSES RAW_EVENT(0x2e, 0x41) +#define INTEL_ARCH_BRANCHES_RETIRED RAW_EVENT(0xc4, 0x00) +#define INTEL_ARCH_BRANCHES_MISPREDICTED RAW_EVENT(0xc5, 0x00) +#define INTEL_ARCH_TOPDOWN_SLOTS RAW_EVENT(0xa4, 0x01) + +#define AMD_ZEN_CORE_CYCLES RAW_EVENT(0x76, 0x00) +#define AMD_ZEN_INSTRUCTIONS_RETIRED RAW_EVENT(0xc0, 0x00) +#define AMD_ZEN_BRANCHES_RETIRED RAW_EVENT(0xc2, 0x00) +#define AMD_ZEN_BRANCHES_MISPREDICTED RAW_EVENT(0xc3, 0x00) + +/* + * Note! The order and thus the index of the architectural events matters as + * support for each event is enumerated via CPUID using the index of the event. + */ +enum intel_pmu_architectural_events { + INTEL_ARCH_CPU_CYCLES_INDEX, + INTEL_ARCH_INSTRUCTIONS_RETIRED_INDEX, + INTEL_ARCH_REFERENCE_CYCLES_INDEX, + INTEL_ARCH_LLC_REFERENCES_INDEX, + INTEL_ARCH_LLC_MISSES_INDEX, + INTEL_ARCH_BRANCHES_RETIRED_INDEX, + INTEL_ARCH_BRANCHES_MISPREDICTED_INDEX, + INTEL_ARCH_TOPDOWN_SLOTS_INDEX, + NR_INTEL_ARCH_EVENTS, +}; + +enum amd_pmu_zen_events { + AMD_ZEN_CORE_CYCLES_INDEX, + AMD_ZEN_INSTRUCTIONS_INDEX, + AMD_ZEN_BRANCHES_INDEX, + AMD_ZEN_BRANCH_MISSES_INDEX, + NR_AMD_ZEN_EVENTS, +}; + +extern const uint64_t intel_pmu_arch_events[]; +extern const uint64_t amd_pmu_zen_events[]; + +#endif /* SELFTEST_KVM_PMU_H */ diff --git a/tools/testing/selftests/kvm/lib/pmu.c b/tools/testing/selftests/kvm/lib/pmu.c new file mode 100644 index 000000000000..f31f0427c17c --- /dev/null +++ b/tools/testing/selftests/kvm/lib/pmu.c @@ -0,0 +1,31 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2023, Tencent, Inc. + */ + +#include + +#include + +#include "kvm_util.h" +#include "pmu.h" + +const uint64_t intel_pmu_arch_events[] = { + INTEL_ARCH_CPU_CYCLES, + INTEL_ARCH_INSTRUCTIONS_RETIRED, + INTEL_ARCH_REFERENCE_CYCLES, + INTEL_ARCH_LLC_REFERENCES, + INTEL_ARCH_LLC_MISSES, + INTEL_ARCH_BRANCHES_RETIRED, + INTEL_ARCH_BRANCHES_MISPREDICTED, + INTEL_ARCH_TOPDOWN_SLOTS, +}; +kvm_static_assert(ARRAY_SIZE(intel_pmu_arch_events) == NR_INTEL_ARCH_EVENTS); + +const uint64_t amd_pmu_zen_events[] = { + AMD_ZEN_CORE_CYCLES, + AMD_ZEN_INSTRUCTIONS_RETIRED, + AMD_ZEN_BRANCHES_RETIRED, + AMD_ZEN_BRANCHES_MISPREDICTED, +}; +kvm_static_assert(ARRAY_SIZE(amd_pmu_zen_events) == NR_AMD_ZEN_EVENTS); diff --git a/tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c b/tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c index 283cc55597a4..7ec9fbed92e0 100644 --- a/tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c +++ b/tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c @@ -11,72 +11,18 @@ */ #define _GNU_SOURCE /* for program_invocation_short_name */ -#include "test_util.h" + #include "kvm_util.h" +#include "pmu.h" #include "processor.h" - -/* - * In lieu of copying perf_event.h into tools... - */ -#define ARCH_PERFMON_EVENTSEL_OS (1ULL << 17) -#define ARCH_PERFMON_EVENTSEL_ENABLE (1ULL << 22) - -/* End of stuff taken from perf_event.h. */ - -/* Oddly, this isn't in perf_event.h. */ -#define ARCH_PERFMON_BRANCHES_RETIRED 5 +#include "test_util.h" #define NUM_BRANCHES 42 -#define INTEL_PMC_IDX_FIXED 32 - -/* Matches KVM_PMU_EVENT_FILTER_MAX_EVENTS in pmu.c */ -#define MAX_FILTER_EVENTS 300 #define MAX_TEST_EVENTS 10 #define PMU_EVENT_FILTER_INVALID_ACTION (KVM_PMU_EVENT_DENY + 1) #define PMU_EVENT_FILTER_INVALID_FLAGS (KVM_PMU_EVENT_FLAGS_VALID_MASK << 1) -#define PMU_EVENT_FILTER_INVALID_NEVENTS (MAX_FILTER_EVENTS + 1) - -/* - * This is how the event selector and unit mask are stored in an AMD - * core performance event-select register. Intel's format is similar, - * but the event selector is only 8 bits. - */ -#define EVENT(select, umask) ((select & 0xf00UL) << 24 | (select & 0xff) | \ - (umask & 0xff) << 8) - -/* - * "Branch instructions retired", from the Intel SDM, volume 3, - * "Pre-defined Architectural Performance Events." - */ - -#define INTEL_BR_RETIRED EVENT(0xc4, 0) - -/* - * "Retired branch instructions", from Processor Programming Reference - * (PPR) for AMD Family 17h Model 01h, Revision B1 Processors, - * Preliminary Processor Programming Reference (PPR) for AMD Family - * 17h Model 31h, Revision B0 Processors, and Preliminary Processor - * Programming Reference (PPR) for AMD Family 19h Model 01h, Revision - * B1 Processors Volume 1 of 2. - */ - -#define AMD_ZEN_BR_RETIRED EVENT(0xc2, 0) - - -/* - * "Retired instructions", from Processor Programming Reference - * (PPR) for AMD Family 17h Model 01h, Revision B1 Processors, - * Preliminary Processor Programming Reference (PPR) for AMD Family - * 17h Model 31h, Revision B0 Processors, and Preliminary Processor - * Programming Reference (PPR) for AMD Family 19h Model 01h, Revision - * B1 Processors Volume 1 of 2. - * --- and --- - * "Instructions retired", from the Intel SDM, volume 3, - * "Pre-defined Architectural Performance Events." - */ - -#define INST_RETIRED EVENT(0xc0, 0) +#define PMU_EVENT_FILTER_INVALID_NEVENTS (KVM_PMU_EVENT_FILTER_MAX_EVENTS + 1) struct __kvm_pmu_event_filter { __u32 action; @@ -84,26 +30,28 @@ struct __kvm_pmu_event_filter { __u32 fixed_counter_bitmap; __u32 flags; __u32 pad[4]; - __u64 events[MAX_FILTER_EVENTS]; + __u64 events[KVM_PMU_EVENT_FILTER_MAX_EVENTS]; }; /* - * This event list comprises Intel's eight architectural events plus - * AMD's "retired branch instructions" for Zen[123] (and possibly - * other AMD CPUs). + * This event list comprises Intel's known architectural events, plus AMD's + * "retired branch instructions" for Zen1-Zen3 (and* possibly other AMD CPUs). + * Note, AMD and Intel use the same encoding for instructions retired. */ +kvm_static_assert(INTEL_ARCH_INSTRUCTIONS_RETIRED == AMD_ZEN_INSTRUCTIONS_RETIRED); + static const struct __kvm_pmu_event_filter base_event_filter = { .nevents = ARRAY_SIZE(base_event_filter.events), .events = { - EVENT(0x3c, 0), - INST_RETIRED, - EVENT(0x3c, 1), - EVENT(0x2e, 0x4f), - EVENT(0x2e, 0x41), - EVENT(0xc4, 0), - EVENT(0xc5, 0), - EVENT(0xa4, 1), - AMD_ZEN_BR_RETIRED, + INTEL_ARCH_CPU_CYCLES, + INTEL_ARCH_INSTRUCTIONS_RETIRED, + INTEL_ARCH_REFERENCE_CYCLES, + INTEL_ARCH_LLC_REFERENCES, + INTEL_ARCH_LLC_MISSES, + INTEL_ARCH_BRANCHES_RETIRED, + INTEL_ARCH_BRANCHES_MISPREDICTED, + INTEL_ARCH_TOPDOWN_SLOTS, + AMD_ZEN_BRANCHES_RETIRED, }, }; @@ -165,9 +113,9 @@ static void intel_guest_code(void) for (;;) { wrmsr(MSR_CORE_PERF_GLOBAL_CTRL, 0); wrmsr(MSR_P6_EVNTSEL0, ARCH_PERFMON_EVENTSEL_ENABLE | - ARCH_PERFMON_EVENTSEL_OS | INTEL_BR_RETIRED); + ARCH_PERFMON_EVENTSEL_OS | INTEL_ARCH_BRANCHES_RETIRED); wrmsr(MSR_P6_EVNTSEL1, ARCH_PERFMON_EVENTSEL_ENABLE | - ARCH_PERFMON_EVENTSEL_OS | INST_RETIRED); + ARCH_PERFMON_EVENTSEL_OS | INTEL_ARCH_INSTRUCTIONS_RETIRED); wrmsr(MSR_CORE_PERF_GLOBAL_CTRL, 0x3); run_and_measure_loop(MSR_IA32_PMC0); @@ -189,9 +137,9 @@ static void amd_guest_code(void) for (;;) { wrmsr(MSR_K7_EVNTSEL0, 0); wrmsr(MSR_K7_EVNTSEL0, ARCH_PERFMON_EVENTSEL_ENABLE | - ARCH_PERFMON_EVENTSEL_OS | AMD_ZEN_BR_RETIRED); + ARCH_PERFMON_EVENTSEL_OS | AMD_ZEN_BRANCHES_RETIRED); wrmsr(MSR_K7_EVNTSEL1, ARCH_PERFMON_EVENTSEL_ENABLE | - ARCH_PERFMON_EVENTSEL_OS | INST_RETIRED); + ARCH_PERFMON_EVENTSEL_OS | AMD_ZEN_INSTRUCTIONS_RETIRED); run_and_measure_loop(MSR_K7_PERFCTR0); GUEST_SYNC(0); @@ -312,7 +260,7 @@ static void test_amd_deny_list(struct kvm_vcpu *vcpu) .action = KVM_PMU_EVENT_DENY, .nevents = 1, .events = { - EVENT(0x1C2, 0), + RAW_EVENT(0x1C2, 0), }, }; @@ -347,9 +295,9 @@ static void test_not_member_deny_list(struct kvm_vcpu *vcpu) f.action = KVM_PMU_EVENT_DENY; - remove_event(&f, INST_RETIRED); - remove_event(&f, INTEL_BR_RETIRED); - remove_event(&f, AMD_ZEN_BR_RETIRED); + remove_event(&f, INTEL_ARCH_INSTRUCTIONS_RETIRED); + remove_event(&f, INTEL_ARCH_BRANCHES_RETIRED); + remove_event(&f, AMD_ZEN_BRANCHES_RETIRED); test_with_filter(vcpu, &f); ASSERT_PMC_COUNTING_INSTRUCTIONS(); @@ -361,9 +309,9 @@ static void test_not_member_allow_list(struct kvm_vcpu *vcpu) f.action = KVM_PMU_EVENT_ALLOW; - remove_event(&f, INST_RETIRED); - remove_event(&f, INTEL_BR_RETIRED); - remove_event(&f, AMD_ZEN_BR_RETIRED); + remove_event(&f, INTEL_ARCH_INSTRUCTIONS_RETIRED); + remove_event(&f, INTEL_ARCH_BRANCHES_RETIRED); + remove_event(&f, AMD_ZEN_BRANCHES_RETIRED); test_with_filter(vcpu, &f); ASSERT_PMC_NOT_COUNTING_INSTRUCTIONS(); @@ -452,9 +400,9 @@ static bool use_amd_pmu(void) * - Sapphire Rapids, Ice Lake, Cascade Lake, Skylake. */ #define MEM_INST_RETIRED 0xD0 -#define MEM_INST_RETIRED_LOAD EVENT(MEM_INST_RETIRED, 0x81) -#define MEM_INST_RETIRED_STORE EVENT(MEM_INST_RETIRED, 0x82) -#define MEM_INST_RETIRED_LOAD_STORE EVENT(MEM_INST_RETIRED, 0x83) +#define MEM_INST_RETIRED_LOAD RAW_EVENT(MEM_INST_RETIRED, 0x81) +#define MEM_INST_RETIRED_STORE RAW_EVENT(MEM_INST_RETIRED, 0x82) +#define MEM_INST_RETIRED_LOAD_STORE RAW_EVENT(MEM_INST_RETIRED, 0x83) static bool supports_event_mem_inst_retired(void) { @@ -486,9 +434,9 @@ static bool supports_event_mem_inst_retired(void) * B1 Processors Volume 1 of 2. */ #define LS_DISPATCH 0x29 -#define LS_DISPATCH_LOAD EVENT(LS_DISPATCH, BIT(0)) -#define LS_DISPATCH_STORE EVENT(LS_DISPATCH, BIT(1)) -#define LS_DISPATCH_LOAD_STORE EVENT(LS_DISPATCH, BIT(2)) +#define LS_DISPATCH_LOAD RAW_EVENT(LS_DISPATCH, BIT(0)) +#define LS_DISPATCH_STORE RAW_EVENT(LS_DISPATCH, BIT(1)) +#define LS_DISPATCH_LOAD_STORE RAW_EVENT(LS_DISPATCH, BIT(2)) #define INCLUDE_MASKED_ENTRY(event_select, mask, match) \ KVM_PMU_ENCODE_MASKED_ENTRY(event_select, mask, match, false) @@ -729,14 +677,14 @@ static void add_dummy_events(uint64_t *events, int nevents) static void test_masked_events(struct kvm_vcpu *vcpu) { - int nevents = MAX_FILTER_EVENTS - MAX_TEST_EVENTS; - uint64_t events[MAX_FILTER_EVENTS]; + int nevents = KVM_PMU_EVENT_FILTER_MAX_EVENTS - MAX_TEST_EVENTS; + uint64_t events[KVM_PMU_EVENT_FILTER_MAX_EVENTS]; /* Run the test cases against a sparse PMU event filter. */ run_masked_events_tests(vcpu, events, 0); /* Run the test cases against a dense PMU event filter. */ - add_dummy_events(events, MAX_FILTER_EVENTS); + add_dummy_events(events, KVM_PMU_EVENT_FILTER_MAX_EVENTS); run_masked_events_tests(vcpu, events, nevents); } @@ -809,20 +757,19 @@ static void test_filter_ioctl(struct kvm_vcpu *vcpu) TEST_ASSERT(!r, "Masking non-existent fixed counters should be allowed"); } -static void intel_run_fixed_counter_guest_code(uint8_t fixed_ctr_idx) +static void intel_run_fixed_counter_guest_code(uint8_t idx) { for (;;) { wrmsr(MSR_CORE_PERF_GLOBAL_CTRL, 0); - wrmsr(MSR_CORE_PERF_FIXED_CTR0 + fixed_ctr_idx, 0); + wrmsr(MSR_CORE_PERF_FIXED_CTR0 + idx, 0); /* Only OS_EN bit is enabled for fixed counter[idx]. */ - wrmsr(MSR_CORE_PERF_FIXED_CTR_CTRL, BIT_ULL(4 * fixed_ctr_idx)); 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[2620:137:e000::3:7]) by mx.google.com with ESMTPS id d9-20020a170902cec900b001c07bac13d0si6834753plg.383.2023.11.09.18.14.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Nov 2023 18:14:41 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) client-ip=2620:137:e000::3:7; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=iC0n1ahy; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by snail.vger.email (Postfix) with ESMTP id D084883B0271; Thu, 9 Nov 2023 18:14:40 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at snail.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235143AbjKJCO3 (ORCPT + 30 others); Thu, 9 Nov 2023 21:14:29 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48384 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345841AbjKJCN6 (ORCPT ); Thu, 9 Nov 2023 21:13:58 -0500 Received: from mail-yb1-xb4a.google.com (mail-yb1-xb4a.google.com [IPv6:2607:f8b0:4864:20::b4a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9001C49F0 for ; Thu, 9 Nov 2023 18:13:38 -0800 (PST) Received: by mail-yb1-xb4a.google.com with SMTP id 3f1490d57ef6-da13698a6d3so2088322276.0 for ; Thu, 09 Nov 2023 18:13:38 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1699582417; x=1700187217; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=E02d58e7wHiGQR6J5uEsVn1pUUivPCpX2Rm4RndjDlQ=; b=iC0n1ahyHpXTSOSTXviMTodgjnmLAO/olPPMFwhyXjdFZQJ3+GI6t2Hha+d3Fc1jxz Xpbu80rrTIIWuJStz7BDioqX/DXsxtrkjSD2VX2Dm/wFGxIh0QcqKpszzLN1riUXgh0X /MfV/s//d1xZnFuPEhT5tsrgfw61yxoBSr+cbgkIBmholNqxLmf/XuNAqQh8ElP+eiBR FYxvBr3IBMR/R6b62WOzpBgysp7KhEhu+LferQgi/Xtz6xQ+SxrxSGe/tCTbUXix+h4N YDAnljM9QtBIpkj+LfQtRLtj4Z0AYVVHI0cs7GBoM+lowZAlP0oaoQDDpEg95aUsTahW 8gHw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699582417; x=1700187217; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=E02d58e7wHiGQR6J5uEsVn1pUUivPCpX2Rm4RndjDlQ=; b=GsK3kR4uKIRtCUjZC5jMzkDKnigHllIziX9GmpZ9v/b6ATeT4UNDSzcXC2X28s3nXj xVFxcYykrkHkGT9dO2y7LnO+aKI+3tk3IPQkk7VsdLjXqlMXaAKDoU0YRAv76ZxLkTzK ycFBgu1KTMWJ9xHm9yUZnywDv/Z1Ie+58HqsaXX/f8kNkKOp0t0R4L1u7Xi0HAal0QM8 pzAUbDPo0n+BqUmr6DSsn1prIM0h7g8y1cm0Ged7OzUklFbPps9+3ZQphdO9l4mDEPhO g7JotfubYENXuqGd52AA886suL6ns1cAbsJ2ogYoswogB97mkevWM9fS1OlJEBlAwkIg 3P0w== X-Gm-Message-State: AOJu0Yxkvwg7/ss3fkIK4xcejivjTcuBGiUFZ9cxGZMkun4rOaNgzhjm bwYjFtKtUCvd3qdzY00wNK252eJ5o9M= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a25:e7cb:0:b0:d9a:4f4c:961b with SMTP id e194-20020a25e7cb000000b00d9a4f4c961bmr176190ybh.1.1699582417756; Thu, 09 Nov 2023 18:13:37 -0800 (PST) Reply-To: Sean Christopherson Date: Thu, 9 Nov 2023 18:12:53 -0800 In-Reply-To: <20231110021306.1269082-1-seanjc@google.com> Mime-Version: 1.0 References: <20231110021306.1269082-1-seanjc@google.com> X-Mailer: git-send-email 2.42.0.869.gea05f2083d-goog Message-ID: <20231110021306.1269082-14-seanjc@google.com> Subject: [PATCH v8 13/26] KVM: selftests: Test Intel PMU architectural events on gp counters From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Kan Liang , Dapeng Mi , Jim Mattson , Jinrong Liang , Aaron Lewis , Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Thu, 09 Nov 2023 18:14:40 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1782141400211230340 X-GMAIL-MSGID: 1782141400211230340 From: Jinrong Liang Add test cases to verify that Intel's Architectural PMU events work as expected when they are available according to guest CPUID. Iterate over a range of sane PMU versions, with and without full-width writes enabled, and over interesting combinations of lengths/masks for the bit vector that enumerates unavailable events. Test up to vPMU version 5, i.e. the current architectural max. KVM only officially supports up to version 2, but the behavior of the counters is backwards compatible, i.e. KVM shouldn't do something completely different for a higher, architecturally-defined vPMU version. Verify KVM behavior against the effective vPMU version, e.g. advertising vPMU 5 when KVM only supports vPMU 2 shouldn't magically unlock vPMU 5 features. According to Intel SDM, the number of architectural events is reported through CPUID.0AH:EAX[31:24] and the architectural event x is supported if EBX[x]=0 && EAX[31:24]>x. Handcode the entirety of the measured section so that the test can precisely assert on the number of instructions and branches retired. Co-developed-by: Like Xu Signed-off-by: Like Xu Signed-off-by: Jinrong Liang Co-developed-by: Sean Christopherson Signed-off-by: Sean Christopherson --- tools/testing/selftests/kvm/Makefile | 1 + .../selftests/kvm/x86_64/pmu_counters_test.c | 321 ++++++++++++++++++ 2 files changed, 322 insertions(+) create mode 100644 tools/testing/selftests/kvm/x86_64/pmu_counters_test.c diff --git a/tools/testing/selftests/kvm/Makefile b/tools/testing/selftests/kvm/Makefile index 44d8d022b023..09f5d6fe84de 100644 --- a/tools/testing/selftests/kvm/Makefile +++ b/tools/testing/selftests/kvm/Makefile @@ -91,6 +91,7 @@ TEST_GEN_PROGS_x86_64 += x86_64/mmio_warning_test TEST_GEN_PROGS_x86_64 += x86_64/monitor_mwait_test TEST_GEN_PROGS_x86_64 += x86_64/nested_exceptions_test TEST_GEN_PROGS_x86_64 += x86_64/platform_info_test +TEST_GEN_PROGS_x86_64 += x86_64/pmu_counters_test TEST_GEN_PROGS_x86_64 += x86_64/pmu_event_filter_test TEST_GEN_PROGS_x86_64 += x86_64/set_boot_cpu_id TEST_GEN_PROGS_x86_64 += x86_64/set_sregs_test diff --git a/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c b/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c new file mode 100644 index 000000000000..5b8687bb4639 --- /dev/null +++ b/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c @@ -0,0 +1,321 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2023, Tencent, Inc. + */ + +#define _GNU_SOURCE /* for program_invocation_short_name */ +#include + +#include "pmu.h" +#include "processor.h" + +/* Number of LOOP instructions for the guest measurement payload. */ +#define NUM_BRANCHES 10 +/* + * Number of "extra" instructions that will be counted, i.e. the number of + * instructions that are needed to set up the loop and then disabled the + * counter. 2 MOV, 2 XOR, 1 WRMSR. + */ +#define NUM_EXTRA_INSNS 5 +#define NUM_INSNS_RETIRED (NUM_BRANCHES + NUM_EXTRA_INSNS) + +static uint8_t kvm_pmu_version; +static bool kvm_has_perf_caps; + +static struct kvm_vm *pmu_vm_create_with_one_vcpu(struct kvm_vcpu **vcpu, + void *guest_code, + uint8_t pmu_version, + uint64_t perf_capabilities) +{ + struct kvm_vm *vm; + + vm = vm_create_with_one_vcpu(vcpu, guest_code); + vm_init_descriptor_tables(vm); + vcpu_init_descriptor_tables(*vcpu); + + sync_global_to_guest(vm, kvm_pmu_version); + + /* + * Set PERF_CAPABILITIES before PMU version as KVM disallows enabling + * features via PERF_CAPABILITIES if the guest doesn't have a vPMU. + */ + if (kvm_has_perf_caps) + vcpu_set_msr(*vcpu, MSR_IA32_PERF_CAPABILITIES, perf_capabilities); + + vcpu_set_cpuid_property(*vcpu, X86_PROPERTY_PMU_VERSION, pmu_version); + return vm; +} + +static void run_vcpu(struct kvm_vcpu *vcpu) +{ + struct ucall uc; + + do { + vcpu_run(vcpu); + switch (get_ucall(vcpu, &uc)) { + case UCALL_SYNC: + break; + case UCALL_ABORT: + REPORT_GUEST_ASSERT(uc); + break; + case UCALL_PRINTF: + pr_info("%s", uc.buffer); + break; + case UCALL_DONE: + break; + default: + TEST_FAIL("Unexpected ucall: %lu", uc.cmd); + } + } while (uc.cmd != UCALL_DONE); +} + +static uint8_t guest_get_pmu_version(void) +{ + /* + * Return the effective PMU version, i.e. the minimum between what KVM + * supports and what is enumerated to the guest. The host deliberately + * advertises a PMU version to the guest beyond what is actually + * supported by KVM to verify KVM doesn't freak out and do something + * bizarre with an architecturally valid, but unsupported, version. + */ + return min_t(uint8_t, kvm_pmu_version, this_cpu_property(X86_PROPERTY_PMU_VERSION)); +} + +/* + * If an architectural event is supported and guaranteed to generate at least + * one "hit, assert that its count is non-zero. If an event isn't supported or + * the test can't guarantee the associated action will occur, then all bets are + * off regarding the count, i.e. no checks can be done. + * + * Sanity check that in all cases, the event doesn't count when it's disabled, + * and that KVM correctly emulates the write of an arbitrary value. + */ +static void guest_assert_event_count(uint8_t idx, + struct kvm_x86_pmu_feature event, + uint32_t pmc, uint32_t pmc_msr) +{ + uint64_t count; + + count = _rdpmc(pmc); + if (!this_pmu_has(event)) + goto sanity_checks; + + switch (idx) { + case INTEL_ARCH_INSTRUCTIONS_RETIRED_INDEX: + GUEST_ASSERT_EQ(count, NUM_INSNS_RETIRED); + break; + case INTEL_ARCH_BRANCHES_RETIRED_INDEX: + GUEST_ASSERT_EQ(count, NUM_BRANCHES); + break; + case INTEL_ARCH_CPU_CYCLES_INDEX: + case INTEL_ARCH_REFERENCE_CYCLES_INDEX: + GUEST_ASSERT_NE(count, 0); + break; + default: + break; + } + +sanity_checks: + __asm__ __volatile__("loop ." : "+c"((int){NUM_BRANCHES})); + GUEST_ASSERT_EQ(_rdpmc(pmc), count); + + wrmsr(pmc_msr, 0xdead); + GUEST_ASSERT_EQ(_rdpmc(pmc), 0xdead); +} + +static void __guest_test_arch_event(uint8_t idx, struct kvm_x86_pmu_feature event, + uint32_t pmc, uint32_t pmc_msr, + uint32_t ctrl_msr, uint64_t ctrl_msr_value) +{ + wrmsr(pmc_msr, 0); + + /* + * Enable and disable the PMC in a monolithic asm blob to ensure that + * the compiler can't insert _any_ code into the measured sequence. + * Note, ECX doesn't need to be clobbered as the input value, @pmc_msr, + * is restored before the end of the sequence. + */ + __asm__ __volatile__("wrmsr\n\t" + "mov $" __stringify(NUM_BRANCHES) ", %%ecx\n\t" + "loop .\n\t" + "mov %%edi, %%ecx\n\t" + "xor %%eax, %%eax\n\t" + "xor %%edx, %%edx\n\t" + "wrmsr\n\t" + :: "a"((uint32_t)ctrl_msr_value), + "d"(ctrl_msr_value >> 32), + "c"(ctrl_msr), "D"(ctrl_msr) + ); + + guest_assert_event_count(idx, event, pmc, pmc_msr); +} + +static void guest_test_arch_event(uint8_t idx) +{ + const struct { + struct kvm_x86_pmu_feature gp_event; + } intel_event_to_feature[] = { + [INTEL_ARCH_CPU_CYCLES_INDEX] = { X86_PMU_FEATURE_CPU_CYCLES }, + [INTEL_ARCH_INSTRUCTIONS_RETIRED_INDEX] = { X86_PMU_FEATURE_INSNS_RETIRED }, + [INTEL_ARCH_REFERENCE_CYCLES_INDEX] = { X86_PMU_FEATURE_REFERENCE_CYCLES }, + [INTEL_ARCH_LLC_REFERENCES_INDEX] = { X86_PMU_FEATURE_LLC_REFERENCES }, + [INTEL_ARCH_LLC_MISSES_INDEX] = { X86_PMU_FEATURE_LLC_MISSES }, + [INTEL_ARCH_BRANCHES_RETIRED_INDEX] = { X86_PMU_FEATURE_BRANCH_INSNS_RETIRED }, + [INTEL_ARCH_BRANCHES_MISPREDICTED_INDEX] = { X86_PMU_FEATURE_BRANCHES_MISPREDICTED }, + [INTEL_ARCH_TOPDOWN_SLOTS_INDEX] = { X86_PMU_FEATURE_TOPDOWN_SLOTS }, + }; + + uint32_t nr_gp_counters = this_cpu_property(X86_PROPERTY_PMU_NR_GP_COUNTERS); + uint32_t pmu_version = guest_get_pmu_version(); + /* PERF_GLOBAL_CTRL exists only for Architectural PMU Version 2+. */ + bool guest_has_perf_global_ctrl = pmu_version >= 2; + struct kvm_x86_pmu_feature gp_event; + uint32_t base_pmc_msr; + unsigned int i; + + /* The host side shouldn't invoke this without a guest PMU. */ + GUEST_ASSERT(pmu_version); + + if (this_cpu_has(X86_FEATURE_PDCM) && + rdmsr(MSR_IA32_PERF_CAPABILITIES) & PMU_CAP_FW_WRITES) + base_pmc_msr = MSR_IA32_PMC0; + else + base_pmc_msr = MSR_IA32_PERFCTR0; + + gp_event = intel_event_to_feature[idx].gp_event; + GUEST_ASSERT_EQ(idx, gp_event.f.bit); + + GUEST_ASSERT(nr_gp_counters); + + for (i = 0; i < nr_gp_counters; i++) { + uint64_t eventsel = ARCH_PERFMON_EVENTSEL_OS | + ARCH_PERFMON_EVENTSEL_ENABLE | + intel_pmu_arch_events[idx]; + + wrmsr(MSR_P6_EVNTSEL0 + i, 0); + if (guest_has_perf_global_ctrl) + wrmsr(MSR_CORE_PERF_GLOBAL_CTRL, BIT_ULL(i)); + + __guest_test_arch_event(idx, gp_event, i, base_pmc_msr + i, + MSR_P6_EVNTSEL0 + i, eventsel); + } +} + +static void guest_test_arch_events(void) +{ + uint8_t i; + + for (i = 0; i < NR_INTEL_ARCH_EVENTS; i++) + guest_test_arch_event(i); + + GUEST_DONE(); +} + +static void test_arch_events(uint8_t pmu_version, uint64_t perf_capabilities, + uint8_t length, uint8_t unavailable_mask) +{ + struct kvm_vcpu *vcpu; + struct kvm_vm *vm; + + /* Testing arch events requires a vPMU (there are no negative tests). */ + if (!pmu_version) + return; + + vm = pmu_vm_create_with_one_vcpu(&vcpu, guest_test_arch_events, + pmu_version, perf_capabilities); + + vcpu_set_cpuid_property(vcpu, X86_PROPERTY_PMU_EBX_BIT_VECTOR_LENGTH, + length); + vcpu_set_cpuid_property(vcpu, X86_PROPERTY_PMU_EVENTS_MASK, + unavailable_mask); + + run_vcpu(vcpu); + + kvm_vm_free(vm); +} + +static void test_intel_counters(void) +{ + uint8_t nr_arch_events = kvm_cpu_property(X86_PROPERTY_PMU_EBX_BIT_VECTOR_LENGTH); + uint8_t pmu_version = kvm_cpu_property(X86_PROPERTY_PMU_VERSION); + unsigned int i; + uint8_t v, j; + uint32_t k; + + const uint64_t perf_caps[] = { + 0, + PMU_CAP_FW_WRITES, + }; + + /* + * Test up to PMU v5, which is the current maximum version defined by + * Intel, i.e. is the last version that is guaranteed to be backwards + * compatible with KVM's existing behavior. + */ + uint8_t max_pmu_version = max_t(typeof(pmu_version), pmu_version, 5); + + /* + * Detect the existence of events that aren't supported by selftests. + * This will (obviously) fail any time the kernel adds support for a + * new event, but it's worth paying that price to keep the test fresh. + */ + TEST_ASSERT(nr_arch_events <= NR_INTEL_ARCH_EVENTS, + "New architectural event(s) detected; please update this test (length = %u, mask = %x)", + nr_arch_events, kvm_cpu_property(X86_PROPERTY_PMU_EVENTS_MASK)); + + /* + * Force iterating over known arch events regardless of whether or not + * KVM/hardware supports a given event. + */ + nr_arch_events = max_t(typeof(nr_arch_events), nr_arch_events, NR_INTEL_ARCH_EVENTS); + + for (v = 0; v <= max_pmu_version; v++) { + for (i = 0; i < ARRAY_SIZE(perf_caps); i++) { + if (!kvm_has_perf_caps && perf_caps[i]) + continue; + + pr_info("Testing arch events, PMU version %u, perf_caps = %lx\n", + v, perf_caps[i]); + /* + * To keep the total runtime reasonable, test every + * possible non-zero, non-reserved bitmap combination + * only with the native PMU version and the full bit + * vector length. + */ + if (v == pmu_version) { + for (k = 1; k < (BIT(nr_arch_events) - 1); k++) + test_arch_events(v, perf_caps[i], nr_arch_events, k); + } + /* + * Test single bits for all PMU version and lengths up + * the number of events +1 (to verify KVM doesn't do + * weird things if the guest length is greater than the + * host length). Explicitly test a mask of '0' and all + * ones i.e. all events being available and unavailable. + */ + for (j = 0; j <= nr_arch_events + 1; j++) { + test_arch_events(v, perf_caps[i], j, 0); + test_arch_events(v, perf_caps[i], j, 0xff); + + for (k = 0; k < nr_arch_events; k++) + test_arch_events(v, perf_caps[i], j, BIT(k)); + } + } + } +} + +int main(int argc, char *argv[]) +{ + TEST_REQUIRE(get_kvm_param_bool("enable_pmu")); + + TEST_REQUIRE(host_cpu_is_intel); + TEST_REQUIRE(kvm_cpu_has_p(X86_PROPERTY_PMU_VERSION)); + TEST_REQUIRE(kvm_cpu_property(X86_PROPERTY_PMU_VERSION) > 0); + + kvm_pmu_version = kvm_cpu_property(X86_PROPERTY_PMU_VERSION); + kvm_has_perf_caps = kvm_cpu_has(X86_FEATURE_PDCM); + + test_intel_counters(); + + return 0; +} From patchwork Fri Nov 10 02:12:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Christopherson X-Patchwork-Id: 163735 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b129:0:b0:403:3b70:6f57 with SMTP id q9csp837253vqs; Thu, 9 Nov 2023 18:14:46 -0800 (PST) X-Google-Smtp-Source: AGHT+IHU6Snsn4+b/i5JNNubkSHjUPd6HHhO/6J0pY3xhb2fbK5yKebYHRiRD+XDrUri4D24DHQ7 X-Received: by 2002:a17:902:b701:b0:1c0:afda:7707 with SMTP id d1-20020a170902b70100b001c0afda7707mr1271629pls.34.1699582486157; Thu, 09 Nov 2023 18:14:46 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1699582486; cv=none; d=google.com; s=arc-20160816; b=uGxGbgoptHw2HyJ5wr2Jk2Xa73/8LWz5P4b+6m4UVgY/O++xXO16hDtAhCWOF0jMrk gd9d5oEDVazULbN6sy7nhNUwkNZu9bUrYNvJZlYFKl8AZbG+2pqQDZ4QI2HaCJijFuFR 7lq3XxC6Fk+WAJjQakemJtJv0vShGVzCid2qjZvYOPZJ1zzQ2P2xkhTD7DZrSuTn+rPK NKrxOc9M768lSJwWM2x41FEQCNGYROCE3Do6ecjQ5OFMX5TNPcr4xifnJmtasNWwAXqT 5z7Qdoau2pQRPIxeOzwZkfFRQXEF/e5x1d2nwPVtgnELsRqaP2BXdGJKv36+mijdSm8M DRyw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:reply-to:dkim-signature; bh=xdhPs5aVdFI/e9nrcqDiSTbi8B7nmVhj1Q4Gjt3XJ7E=; fh=gm96CM+cG0KJxn7vnhn0c1c98ILNP1HHUrKfrGecw3M=; b=FmUpcCKpTscGlqJ9QZjzSBPa5d1lLbj9ZDg0W4KyOr1TkZDWB3YlJomZ0iux09IZVw MEu9UJ7p/uvcugiNyGmTZHeSumE2Cm86tktXDlsel9zLJI14BJiHaLZ1fjoVn2O8m6f1 FNToLQQDAZMxXLDLXz5tN5II5ViIUyqwcz042exB2ZQrYtvfn45z81b1eGFvCMpyHYZC Om6V7ga8Fox8riBeiayA1ihRj31GiRw9XYFKigK1UpmXZ+d0bAuwh7hC3AOOdWwfCEEp dsQ0zQ90o3PWSLzkcP06lRdmegqO2oKTeJIitujE5sUn5AaPsT23FH4mJbgn70eA4blu pDiQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b="s/iQfsB3"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from snail.vger.email (snail.vger.email. [23.128.96.37]) by mx.google.com with ESMTPS id y15-20020a17090322cf00b001c5f5153e41si7040454plg.535.2023.11.09.18.14.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Nov 2023 18:14:46 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) client-ip=23.128.96.37; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b="s/iQfsB3"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by snail.vger.email (Postfix) with ESMTP id 5E28683A7FD5; Thu, 9 Nov 2023 18:14:45 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at snail.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345732AbjKJCOb (ORCPT + 30 others); Thu, 9 Nov 2023 21:14:31 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59152 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345662AbjKJCOB (ORCPT ); Thu, 9 Nov 2023 21:14:01 -0500 Received: from mail-pf1-x449.google.com (mail-pf1-x449.google.com [IPv6:2607:f8b0:4864:20::449]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3C93F49FC for ; Thu, 9 Nov 2023 18:13:40 -0800 (PST) Received: by mail-pf1-x449.google.com with SMTP id d2e1a72fcca58-6c4d0b51c7fso535422b3a.2 for ; Thu, 09 Nov 2023 18:13:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1699582420; x=1700187220; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=xdhPs5aVdFI/e9nrcqDiSTbi8B7nmVhj1Q4Gjt3XJ7E=; b=s/iQfsB33ffXyN+pUTqQdjuX2i44FUZJqIXqndbU1ZQRO49WPz4JwZBnx09JiW2BNi LC4H9D12SXAmJrwyzloj5crR709o5QjfRhV83zuEd4DPQNAV70OaQ5PH8J1BE5uidufV DaECxLQ7RnM87QVL0bKGRmoqAL882fkxbk6IBXfOFTKoQqHOPY5hkjioqCptOOBqM7lV cketwtmS62JzlHbmagdPN+gkz2CsW7AIYXgn1BaoI5UoVAdaHc89ooNKPkofkEHkuuIX SiLK6UJmJVD2G9kJ8FuuoqexrdwvsL03tP7zA8xMGsjujFkYXzTdwMWBzu3dfu1W7T10 jvgg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699582420; x=1700187220; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=xdhPs5aVdFI/e9nrcqDiSTbi8B7nmVhj1Q4Gjt3XJ7E=; b=hsQw3pUc62dcUniATedhEBla7hAVstKHliAZNn0HBdWNIonFAxHyV1qXk6oDrlPI/K 2GZCxvRMD7FczUZmDtTc6kw9U5ENd8YuVeMUYroh6q83PF8hBTODRnPgpQTeXRt5rKph 4XTT/hF4RdSFvwBYUxP466s+QTiOSRKw+Ui+d162LlqIba+eJe7SqfqXpVAJ31GV0l2z 5Tt3gGal/IOSvlbibmRoqYDOjhw/X6c1CBLLDWEqJK7nRJaG14F4Uu/CyMl6lQAmy+1O mUu8pAm8zgamI4p7OsQ4ygDgtRVzEEAPGzOqiGF5Opx6dziZ/xX0PsI9bAZ3f+CoBiWK bJFQ== X-Gm-Message-State: AOJu0YzCHaRx9Bo5036YJ+1Uqd/Oa0C7P8mdrn5XDZPtF7hFyQ4HMOWv 3mtGd16ySzbrrgjLcquKbG6UyqvYH9Y= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a05:6a00:b34:b0:6c3:3782:6bcd with SMTP id f52-20020a056a000b3400b006c337826bcdmr877544pfu.4.1699582419755; Thu, 09 Nov 2023 18:13:39 -0800 (PST) Reply-To: Sean Christopherson Date: Thu, 9 Nov 2023 18:12:54 -0800 In-Reply-To: <20231110021306.1269082-1-seanjc@google.com> Mime-Version: 1.0 References: <20231110021306.1269082-1-seanjc@google.com> X-Mailer: git-send-email 2.42.0.869.gea05f2083d-goog Message-ID: <20231110021306.1269082-15-seanjc@google.com> Subject: [PATCH v8 14/26] KVM: selftests: Test Intel PMU architectural events on fixed counters From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Kan Liang , Dapeng Mi , Jim Mattson , Jinrong Liang , Aaron Lewis , Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Thu, 09 Nov 2023 18:14:45 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1782141404989527967 X-GMAIL-MSGID: 1782141404989527967 From: Jinrong Liang Extend the PMU counters test to validate architectural events using fixed counters. The core logic is largely the same, the biggest difference being that if a fixed counter exists, its associated event is available (the SDM doesn't explicitly state this to be true, but it's KVM's ABI and letting software program a fixed counter that doesn't actually count would be quite bizarre). Note, fixed counters rely on PERF_GLOBAL_CTRL. Reviewed-by: Jim Mattson Reviewed-by: Dapeng Mi Co-developed-by: Like Xu Signed-off-by: Like Xu Signed-off-by: Jinrong Liang Co-developed-by: Sean Christopherson Signed-off-by: Sean Christopherson --- .../selftests/kvm/x86_64/pmu_counters_test.c | 54 +++++++++++++++---- 1 file changed, 45 insertions(+), 9 deletions(-) diff --git a/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c b/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c index 5b8687bb4639..663e8fbe7ff8 100644 --- a/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c +++ b/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c @@ -150,26 +150,46 @@ static void __guest_test_arch_event(uint8_t idx, struct kvm_x86_pmu_feature even guest_assert_event_count(idx, event, pmc, pmc_msr); } +#define X86_PMU_FEATURE_NULL \ +({ \ + struct kvm_x86_pmu_feature feature = {}; \ + \ + feature; \ +}) + +static bool pmu_is_null_feature(struct kvm_x86_pmu_feature event) +{ + return !(*(u64 *)&event); +} + static void guest_test_arch_event(uint8_t idx) { const struct { struct kvm_x86_pmu_feature gp_event; + struct kvm_x86_pmu_feature fixed_event; } intel_event_to_feature[] = { - [INTEL_ARCH_CPU_CYCLES_INDEX] = { X86_PMU_FEATURE_CPU_CYCLES }, - [INTEL_ARCH_INSTRUCTIONS_RETIRED_INDEX] = { X86_PMU_FEATURE_INSNS_RETIRED }, - [INTEL_ARCH_REFERENCE_CYCLES_INDEX] = { X86_PMU_FEATURE_REFERENCE_CYCLES }, - [INTEL_ARCH_LLC_REFERENCES_INDEX] = { X86_PMU_FEATURE_LLC_REFERENCES }, - [INTEL_ARCH_LLC_MISSES_INDEX] = { X86_PMU_FEATURE_LLC_MISSES }, - [INTEL_ARCH_BRANCHES_RETIRED_INDEX] = { X86_PMU_FEATURE_BRANCH_INSNS_RETIRED }, - [INTEL_ARCH_BRANCHES_MISPREDICTED_INDEX] = { X86_PMU_FEATURE_BRANCHES_MISPREDICTED }, - [INTEL_ARCH_TOPDOWN_SLOTS_INDEX] = { X86_PMU_FEATURE_TOPDOWN_SLOTS }, + [INTEL_ARCH_CPU_CYCLES_INDEX] = { X86_PMU_FEATURE_CPU_CYCLES, X86_PMU_FEATURE_CPU_CYCLES_FIXED }, + [INTEL_ARCH_INSTRUCTIONS_RETIRED_INDEX] = { X86_PMU_FEATURE_INSNS_RETIRED, X86_PMU_FEATURE_INSNS_RETIRED_FIXED }, + /* + * Note, the fixed counter for reference cycles is NOT the same + * as the general purpose architectural event. The fixed counter + * explicitly counts at the same frequency as the TSC, whereas + * the GP event counts at a fixed, but uarch specific, frequency. + * Bundle them here for simplicity. + */ + [INTEL_ARCH_REFERENCE_CYCLES_INDEX] = { X86_PMU_FEATURE_REFERENCE_CYCLES, X86_PMU_FEATURE_REFERENCE_TSC_CYCLES_FIXED }, + [INTEL_ARCH_LLC_REFERENCES_INDEX] = { X86_PMU_FEATURE_LLC_REFERENCES, X86_PMU_FEATURE_NULL }, + [INTEL_ARCH_LLC_MISSES_INDEX] = { X86_PMU_FEATURE_LLC_MISSES, X86_PMU_FEATURE_NULL }, + [INTEL_ARCH_BRANCHES_RETIRED_INDEX] = { X86_PMU_FEATURE_BRANCH_INSNS_RETIRED, X86_PMU_FEATURE_NULL }, + [INTEL_ARCH_BRANCHES_MISPREDICTED_INDEX] = { X86_PMU_FEATURE_BRANCHES_MISPREDICTED, X86_PMU_FEATURE_NULL }, + [INTEL_ARCH_TOPDOWN_SLOTS_INDEX] = { X86_PMU_FEATURE_TOPDOWN_SLOTS, X86_PMU_FEATURE_TOPDOWN_SLOTS_FIXED }, }; uint32_t nr_gp_counters = this_cpu_property(X86_PROPERTY_PMU_NR_GP_COUNTERS); uint32_t pmu_version = guest_get_pmu_version(); /* PERF_GLOBAL_CTRL exists only for Architectural PMU Version 2+. */ bool guest_has_perf_global_ctrl = pmu_version >= 2; - struct kvm_x86_pmu_feature gp_event; + struct kvm_x86_pmu_feature gp_event, fixed_event; uint32_t base_pmc_msr; unsigned int i; @@ -199,6 +219,22 @@ static void guest_test_arch_event(uint8_t idx) __guest_test_arch_event(idx, gp_event, i, base_pmc_msr + i, MSR_P6_EVNTSEL0 + i, eventsel); } + + if (!guest_has_perf_global_ctrl) + return; + + fixed_event = intel_event_to_feature[idx].fixed_event; + if (pmu_is_null_feature(fixed_event) || !this_pmu_has(fixed_event)) + return; + + i = fixed_event.f.bit; + + wrmsr(MSR_CORE_PERF_FIXED_CTR_CTRL, FIXED_PMC_CTRL(i, FIXED_PMC_KERNEL)); + + __guest_test_arch_event(idx, fixed_event, i | INTEL_RDPMC_FIXED, + MSR_CORE_PERF_FIXED_CTR0 + i, + MSR_CORE_PERF_GLOBAL_CTRL, + FIXED_PMC_GLOBAL_CTRL_ENABLE(i)); } static void guest_test_arch_events(void) From patchwork Fri Nov 10 02:12:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Christopherson X-Patchwork-Id: 163739 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b129:0:b0:403:3b70:6f57 with SMTP id q9csp837523vqs; Thu, 9 Nov 2023 18:15:31 -0800 (PST) X-Google-Smtp-Source: AGHT+IFa+zvk2HOVeJTI9M7gPuqIizfTg7zg89Jgf2CWKJDiUwuYyFntzCkvfQuGe+ZUAeS7ZAdY X-Received: by 2002:aa7:8311:0:b0:6b1:5d1a:bd0c with SMTP id bk17-20020aa78311000000b006b15d1abd0cmr1543925pfb.16.1699582531190; Thu, 09 Nov 2023 18:15:31 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1699582531; cv=none; d=google.com; s=arc-20160816; b=xXL2ZH77YsQX1Kclc2Emrl0zXopDV/4oigbolUSiW10h23AOnMzaN6GCi+2KzDzIUa rEqVqnkXE06yocg1Blbi9GSHntPF/5IdzBngFkWXx2qT35oe/LJ0QiVULxK72c8ILqLV DixV0/hFYessrikvQRyUwOMmwQ0nO4G828Dq2CkANz4LDOqeLip1nihmDaKZJogG/xoj FJov1iFKwA8Elu1dxKrB/ehC7Sr3ffckJre300N9KznXI6PKyNSOSXgcVGvuR6VgajeM I/W4u7ig3mo+oPVERN33L26Q5A36DWVEHUdrIFbmBYK1unRgw/eMPzjBfjhs7oGRMbZq g+eg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:reply-to:dkim-signature; bh=yXjd8ycJk5ludACFb6UaTDaVuxV6wDMcAqjphn76qEE=; fh=gm96CM+cG0KJxn7vnhn0c1c98ILNP1HHUrKfrGecw3M=; b=WvLRNnrIVpPDfVtWZ5cIEmvtLcvT0rSSOrgFRvs534zzfUseh2VMwfMEq+4rO6G/g4 0StOUaeh41wwekOVG8S2E0UFBvyWIYtpyKK8lipeUkWkOQPF5Rn2/VrPGqzJMV4HflBD dlywQIYrYIeQJ7x8bMD3ZMQFf70RK2OXDVmEwkPzwI38NzO6bxHFBQ7R/JJg23nM1q4k 1RkMNwfjgudDV8KGKthVDy7fYOnMssIdpAIPAILWaVowJTEcw4jzpUaApBQiobRQ8Fde 6EYYCEEu/bgei98xxbCuQzJsaiUo0fwnXfUfuZ/0Bsjiall0tFkqi4CeFh3ZS8EHgdHJ FQtA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=HKJTskqQ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:8 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from fry.vger.email (fry.vger.email. [2620:137:e000::3:8]) by mx.google.com with ESMTPS id u2-20020a056a00158200b00690bc2ac50asi17590199pfk.246.2023.11.09.18.15.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Nov 2023 18:15:31 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:8 as permitted sender) client-ip=2620:137:e000::3:8; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=HKJTskqQ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:8 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by fry.vger.email (Postfix) with ESMTP id 92CD883459B1; Thu, 9 Nov 2023 18:15:14 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at fry.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345841AbjKJCOh (ORCPT + 30 others); Thu, 9 Nov 2023 21:14:37 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59204 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345750AbjKJCOD (ORCPT ); Thu, 9 Nov 2023 21:14:03 -0500 Received: from mail-pg1-x54a.google.com (mail-pg1-x54a.google.com [IPv6:2607:f8b0:4864:20::54a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0A4E14C0D for ; Thu, 9 Nov 2023 18:13:42 -0800 (PST) Received: by mail-pg1-x54a.google.com with SMTP id 41be03b00d2f7-5b4128814ffso1485499a12.3 for ; Thu, 09 Nov 2023 18:13:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1699582421; x=1700187221; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=yXjd8ycJk5ludACFb6UaTDaVuxV6wDMcAqjphn76qEE=; b=HKJTskqQu6YiGXlMPmrjOKKrhfDNecLKhlmkof+ZLnlSUB3P7NKvgBzdTdKEfkLZNr 5fXWheDN/PffaVUrbawIE5L962N4KawZRjVkAl2lfuwJLeg7WzqAZvVYP/vG9p2d2dw1 YNNrPXDxxnZnl8Oaf1sO6H/dDshMSJIjQeL8tWfdWI1PO9ENof8Te16BawYLLJIbTwAz H7PROpOPNWFbJW4bEiac7DM59tFNr79Ia8rdnnd3/c0XscD25WSOaqPsIOWZbD6Ajc9W E2/PxcuBVLwvd7Zgyotci0qz8E4L31UZTzn/ym2ZtbL1cTaECe/ixDO+hmEXZzZWEAje JkfQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699582421; x=1700187221; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=yXjd8ycJk5ludACFb6UaTDaVuxV6wDMcAqjphn76qEE=; b=d7zhM5WRJkI7LvLnIrv7OADzGqhQ3Y9K93myjHKCkvn4r5jEE74YE9i7BR61w7rbSi MDX7UCavCMjSUJ/KP1f5T6QRMcgiGOPFQxOajJA6o5ren/d9ndExkXl3cZUMsrh87Rot RbLvM/S/k/1MfqYvxUs+0j545ypqSp4v95xBm2wAcK4wN4m9JCq//MyT1DIdvrk64l/B 5xSASGpiZULXWL6P62Jz2VUPk3jWPwgg6BHNLOpDxZZEzop20KIUBTbqI+ZzQraD/Chx JyCdH1p6FuugKuJ39KpX6wr+IZlgwXIbnk+b6jWmzZ+pzLYt/QhnPRZko4T/ZvGfuAy6 S84w== X-Gm-Message-State: AOJu0Yw0LNYvQZEuVyC90FF/a02DuCowrJkXADpjuztxdOdDtFsio3JA NMEQ7TzFES+ZMs8G32ULyFIhr/mEg7o= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a17:902:efc1:b0:1cc:56cc:787e with SMTP id ja1-20020a170902efc100b001cc56cc787emr950117plb.4.1699582421536; Thu, 09 Nov 2023 18:13:41 -0800 (PST) Reply-To: Sean Christopherson Date: Thu, 9 Nov 2023 18:12:55 -0800 In-Reply-To: <20231110021306.1269082-1-seanjc@google.com> Mime-Version: 1.0 References: <20231110021306.1269082-1-seanjc@google.com> X-Mailer: git-send-email 2.42.0.869.gea05f2083d-goog Message-ID: <20231110021306.1269082-16-seanjc@google.com> Subject: [PATCH v8 15/26] KVM: selftests: Test consistency of CPUID with num of gp counters From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Kan Liang , Dapeng Mi , Jim Mattson , Jinrong Liang , Aaron Lewis , Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (fry.vger.email [0.0.0.0]); Thu, 09 Nov 2023 18:15:14 -0800 (PST) X-Spam-Status: No, score=-8.4 required=5.0 tests=DKIMWL_WL_MED,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE, USER_IN_DEF_DKIM_WL autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on fry.vger.email X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1782141452629210245 X-GMAIL-MSGID: 1782141452629210245 From: Jinrong Liang Add a test to verify that KVM correctly emulates MSR-based accesses to general purpose counters based on guest CPUID, e.g. that accesses to non-existent counters #GP and accesses to existent counters succeed. Note, for compatibility reasons, KVM does not emulate #GP when MSR_P6_PERFCTR[0|1] is not present (writes should be dropped). Co-developed-by: Like Xu Signed-off-by: Like Xu Signed-off-by: Jinrong Liang Co-developed-by: Sean Christopherson Signed-off-by: Sean Christopherson --- .../selftests/kvm/x86_64/pmu_counters_test.c | 99 +++++++++++++++++++ 1 file changed, 99 insertions(+) diff --git a/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c b/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c index 663e8fbe7ff8..863418842ef8 100644 --- a/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c +++ b/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c @@ -270,9 +270,103 @@ static void test_arch_events(uint8_t pmu_version, uint64_t perf_capabilities, kvm_vm_free(vm); } +/* + * Limit testing to MSRs that are actually defined by Intel (in the SDM). MSRs + * that aren't defined counter MSRs *probably* don't exist, but there's no + * guarantee that currently undefined MSR indices won't be used for something + * other than PMCs in the future. + */ +#define MAX_NR_GP_COUNTERS 8 +#define MAX_NR_FIXED_COUNTERS 3 + +#define GUEST_ASSERT_PMC_MSR_ACCESS(insn, msr, expect_gp, vector) \ +__GUEST_ASSERT(expect_gp ? vector == GP_VECTOR : !vector, \ + "Expected %s on " #insn "(0x%x), got vector %u", \ + expect_gp ? "#GP" : "no fault", msr, vector) \ + +#define GUEST_ASSERT_PMC_VALUE(insn, msr, val, expected) \ + __GUEST_ASSERT(val == expected_val, \ + "Expected " #insn "(0x%x) to yield 0x%lx, got 0x%lx", \ + msr, expected_val, val); + +static void guest_rd_wr_counters(uint32_t base_msr, uint8_t nr_possible_counters, + uint8_t nr_counters) +{ + uint8_t i; + + for (i = 0; i < nr_possible_counters; i++) { + /* + * TODO: Test a value that validates full-width writes and the + * width of the counters. + */ + const uint64_t test_val = 0xffff; + const uint32_t msr = base_msr + i; + const bool expect_success = i < nr_counters; + + /* + * KVM drops writes to MSR_P6_PERFCTR[0|1] if the counters are + * unsupported, i.e. doesn't #GP and reads back '0'. + */ + const uint64_t expected_val = expect_success ? test_val : 0; + const bool expect_gp = !expect_success && msr != MSR_P6_PERFCTR0 && + msr != MSR_P6_PERFCTR1; + uint8_t vector; + uint64_t val; + + vector = wrmsr_safe(msr, test_val); + GUEST_ASSERT_PMC_MSR_ACCESS(WRMSR, msr, expect_gp, vector); + + vector = rdmsr_safe(msr, &val); + GUEST_ASSERT_PMC_MSR_ACCESS(RDMSR, msr, expect_gp, vector); + + /* On #GP, the result of RDMSR is undefined. */ + if (!expect_gp) + GUEST_ASSERT_PMC_VALUE(RDMSR, msr, val, expected_val); + + vector = wrmsr_safe(msr, 0); + GUEST_ASSERT_PMC_MSR_ACCESS(WRMSR, msr, expect_gp, vector); + } + GUEST_DONE(); +} + +static void guest_test_gp_counters(void) +{ + uint8_t nr_gp_counters = 0; + uint32_t base_msr; + + if (guest_get_pmu_version()) + nr_gp_counters = this_cpu_property(X86_PROPERTY_PMU_NR_GP_COUNTERS); + + if (this_cpu_has(X86_FEATURE_PDCM) && + rdmsr(MSR_IA32_PERF_CAPABILITIES) & PMU_CAP_FW_WRITES) + base_msr = MSR_IA32_PMC0; + else + base_msr = MSR_IA32_PERFCTR0; + + guest_rd_wr_counters(base_msr, MAX_NR_GP_COUNTERS, nr_gp_counters); +} + +static void test_gp_counters(uint8_t pmu_version, uint64_t perf_capabilities, + uint8_t nr_gp_counters) +{ + struct kvm_vcpu *vcpu; + struct kvm_vm *vm; + + vm = pmu_vm_create_with_one_vcpu(&vcpu, guest_test_gp_counters, + pmu_version, perf_capabilities); + + vcpu_set_cpuid_property(vcpu, X86_PROPERTY_PMU_NR_GP_COUNTERS, + nr_gp_counters); + + run_vcpu(vcpu); + + kvm_vm_free(vm); +} + static void test_intel_counters(void) { uint8_t nr_arch_events = kvm_cpu_property(X86_PROPERTY_PMU_EBX_BIT_VECTOR_LENGTH); + uint8_t nr_gp_counters = kvm_cpu_property(X86_PROPERTY_PMU_NR_GP_COUNTERS); uint8_t pmu_version = kvm_cpu_property(X86_PROPERTY_PMU_VERSION); unsigned int i; uint8_t v, j; @@ -336,6 +430,11 @@ static void test_intel_counters(void) for (k = 0; k < nr_arch_events; k++) test_arch_events(v, perf_caps[i], j, BIT(k)); } + + pr_info("Testing GP counters, PMU version %u, perf_caps = %lx\n", + v, perf_caps[i]); + for (j = 0; j <= nr_gp_counters; j++) + test_gp_counters(v, perf_caps[i], j); } } } From patchwork Fri Nov 10 02:12:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Christopherson X-Patchwork-Id: 163737 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b129:0:b0:403:3b70:6f57 with SMTP id q9csp837273vqs; Thu, 9 Nov 2023 18:14:51 -0800 (PST) X-Google-Smtp-Source: AGHT+IFs1BD3njos0m+na/bdEdNqcI/J2AUbdORhBr2Gq//CNGIJXfQoA4UKuCKPqHDwpu/s33hn X-Received: by 2002:a05:6359:5096:b0:16b:a9da:10cb with SMTP id on22-20020a056359509600b0016ba9da10cbmr2496913rwb.19.1699582491029; Thu, 09 Nov 2023 18:14:51 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1699582490; cv=none; d=google.com; s=arc-20160816; b=LRL1O4IFK19I0Wtbc/Dpv3kDWts09/GGLHdQ13pkPq1Q1AXvr4kaM68+0R94cT4GmS WKRnzNgdhRrOgQYp3VI5LP9e8E5x8eYJq4jZJNFszxNnA11Xky24iBYuq30A6Sv9ejoJ f+/AEq/KJnGxWz2X0+gMHvqnhqHfURxQZPE+MFf127J+8tgTl1yn7JyrIbbH1sxJwjeG sD0zNETeOCMlDig+Mtz6DGHJQNo3g+dtJcNqN61z5NXYuTjXNjJck4mPftX5cnxgW71g 3G/5EZTnIBpiUJL+sdCO56JBmhujXFq733VRUROC3nyZuBiZyQaOLYrT32PZ6XKk5VHa UqZw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:reply-to:dkim-signature; bh=XsCEN3l3oF0ZDvkpcqpL7JaNvnVu4RYlqqAiIGk0Efw=; fh=gm96CM+cG0KJxn7vnhn0c1c98ILNP1HHUrKfrGecw3M=; b=HBmaUIBn+W0I/uoxl0Kvp8B0DXv73DZkKAm7BjLVFQz+ooYQ8SP8gYIgYqhYTRJ0V6 2WaT4lfs63b5JTyYdTp6lRfslG9DzGCjZxH7gtEJnmHk637d8v+q3wRmXZFWd9CB0EfB ejPvWt4EWobue3MmIlVxfrwDWzO2rsRtiT0k4LBkZH0Mh8Ou7ccqYWVVh/Nclsn4l3g4 huqREsZYR4meZNYki5QR9+c0AmbNdH5BCSYyj7UIrD9R4ex0FbLM9z29fwVt+9RV0US1 hSYXe0JeBlIx3HUZjNnWVpovOWWbzO9OdxSoByPI5DA0+K1GO168qhkVNVHtKsXB1LSb hpsg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=jqMoXFfS; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from snail.vger.email (snail.vger.email. [23.128.96.37]) by mx.google.com with ESMTPS id t11-20020a6564cb000000b0057776b67494si8120297pgv.887.2023.11.09.18.14.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Nov 2023 18:14:50 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) client-ip=23.128.96.37; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=jqMoXFfS; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by snail.vger.email (Postfix) with ESMTP id 4A28583B2009; Thu, 9 Nov 2023 18:14:50 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at snail.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345779AbjKJCOo (ORCPT + 30 others); Thu, 9 Nov 2023 21:14:44 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42626 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345869AbjKJCOH (ORCPT ); Thu, 9 Nov 2023 21:14:07 -0500 Received: from mail-yw1-x114a.google.com (mail-yw1-x114a.google.com [IPv6:2607:f8b0:4864:20::114a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7B8214C0C for ; Thu, 9 Nov 2023 18:13:44 -0800 (PST) Received: by mail-yw1-x114a.google.com with SMTP id 00721157ae682-5a7aa161b2fso21723217b3.2 for ; Thu, 09 Nov 2023 18:13:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1699582423; x=1700187223; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=XsCEN3l3oF0ZDvkpcqpL7JaNvnVu4RYlqqAiIGk0Efw=; b=jqMoXFfSClQj8X+PDkTyRv8yH1Wki6Ms1znhpfSJhhPEpgsoDrRfnBCW/TZh0Uvh/m N/i+TqrGJ+ucL/75Xh3g0+zpSlsna+nJ3V8guG87epZwHnsKMjbcri3vb5FOEusz6IXh TmAXxm78jD7R0zhq5wC8cG/KtRBGzZ9N8IB/uWeCEPSQfqt2wdW1v8Cf5hc75T6i1QkI 4QWObX3TWQByyXMaPAQNKeVUvtWnWNTPdSPZPzCEvzcVt96qMOHqqipaNhVfh2J+GRp+ y+jR2q1lO8kCkPnlGFfkX5OkjryzLWhE/m6gpcIil+lHVAzlPOqSEABaCEFJMaZ9rh0S /gyQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699582423; x=1700187223; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=XsCEN3l3oF0ZDvkpcqpL7JaNvnVu4RYlqqAiIGk0Efw=; b=iQDogMJxCOBHgOC1uw1d0aun37OpXUe54dqzLRdtt2R0WfY9PkFxvXxTNiwoKCWR9L ESC+dHzDm7ns7yfk0XUJcgpK+vKwYcgjxyypKasSC3AUBRDQYnDzQBkLFPTUYFwqZjJS 4SrIxK0JEe4JcmbxBEgmsU757/e/F63Blb9XkK6/bIAukXncdZuRO45LR065yyr4RG0Y U1hSIucH/CHtbBt83R5XCl+cy3VPpC/wE2FcUz0iiP061d4mmeeon2S+4XrCfbun3cJU nnKYiZGwfsQ8atCX635YyhM0gBReanOImAr6Bsl0CX9vdLb9v+o5ec7aH3xkabdfuEbf Z3Kg== X-Gm-Message-State: AOJu0YwPZ6Hfkgb41VtWUWk/oHB8VD/zKxX9x95EAhkUpqCIiEWHwanq UmAy31ynm799sAIpVreWgx1QiYZkT18= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a81:f80e:0:b0:5bf:5720:4fdc with SMTP id z14-20020a81f80e000000b005bf57204fdcmr117185ywm.6.1699582423770; Thu, 09 Nov 2023 18:13:43 -0800 (PST) Reply-To: Sean Christopherson Date: Thu, 9 Nov 2023 18:12:56 -0800 In-Reply-To: <20231110021306.1269082-1-seanjc@google.com> Mime-Version: 1.0 References: <20231110021306.1269082-1-seanjc@google.com> X-Mailer: git-send-email 2.42.0.869.gea05f2083d-goog Message-ID: <20231110021306.1269082-17-seanjc@google.com> Subject: [PATCH v8 16/26] KVM: selftests: Test consistency of CPUID with num of fixed counters From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Kan Liang , Dapeng Mi , Jim Mattson , Jinrong Liang , Aaron Lewis , Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Thu, 09 Nov 2023 18:14:50 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1782141410080659893 X-GMAIL-MSGID: 1782141410080659893 From: Jinrong Liang Extend the PMU counters test to verify KVM emulation of fixed counters in addition to general purpose counters. Fixed counters add an extra wrinkle in the form of an extra supported bitmask. Thus quoth the SDM: fixed-function performance counter 'i' is supported if ECX[i] || (EDX[4:0] > i) Test that KVM handles a counter being available through either method. Reviewed-by: Dapeng Mi Co-developed-by: Like Xu Signed-off-by: Like Xu Signed-off-by: Jinrong Liang Co-developed-by: Sean Christopherson Signed-off-by: Sean Christopherson --- .../selftests/kvm/x86_64/pmu_counters_test.c | 60 ++++++++++++++++++- 1 file changed, 57 insertions(+), 3 deletions(-) diff --git a/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c b/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c index 863418842ef8..b07294af71a3 100644 --- a/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c +++ b/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c @@ -290,7 +290,7 @@ __GUEST_ASSERT(expect_gp ? vector == GP_VECTOR : !vector, \ msr, expected_val, val); static void guest_rd_wr_counters(uint32_t base_msr, uint8_t nr_possible_counters, - uint8_t nr_counters) + uint8_t nr_counters, uint32_t or_mask) { uint8_t i; @@ -301,7 +301,13 @@ static void guest_rd_wr_counters(uint32_t base_msr, uint8_t nr_possible_counters */ const uint64_t test_val = 0xffff; const uint32_t msr = base_msr + i; - const bool expect_success = i < nr_counters; + + /* + * Fixed counters are supported if the counter is less than the + * number of enumerated contiguous counters *or* the counter is + * explicitly enumerated in the supported counters mask. + */ + const bool expect_success = i < nr_counters || (or_mask & BIT(i)); /* * KVM drops writes to MSR_P6_PERFCTR[0|1] if the counters are @@ -343,7 +349,7 @@ static void guest_test_gp_counters(void) else base_msr = MSR_IA32_PERFCTR0; - guest_rd_wr_counters(base_msr, MAX_NR_GP_COUNTERS, nr_gp_counters); + guest_rd_wr_counters(base_msr, MAX_NR_GP_COUNTERS, nr_gp_counters, 0); } static void test_gp_counters(uint8_t pmu_version, uint64_t perf_capabilities, @@ -363,9 +369,50 @@ static void test_gp_counters(uint8_t pmu_version, uint64_t perf_capabilities, kvm_vm_free(vm); } +static void guest_test_fixed_counters(void) +{ + uint64_t supported_bitmask = 0; + uint8_t nr_fixed_counters = 0; + + /* Fixed counters require Architectural vPMU Version 2+. */ + if (guest_get_pmu_version() >= 2) + nr_fixed_counters = this_cpu_property(X86_PROPERTY_PMU_NR_FIXED_COUNTERS); + + /* + * The supported bitmask for fixed counters was introduced in PMU + * version 5. + */ + if (guest_get_pmu_version() >= 5) + supported_bitmask = this_cpu_property(X86_PROPERTY_PMU_FIXED_COUNTERS_BITMASK); + + guest_rd_wr_counters(MSR_CORE_PERF_FIXED_CTR0, MAX_NR_FIXED_COUNTERS, + nr_fixed_counters, supported_bitmask); +} + +static void test_fixed_counters(uint8_t pmu_version, uint64_t perf_capabilities, + uint8_t nr_fixed_counters, + uint32_t supported_bitmask) +{ + struct kvm_vcpu *vcpu; + struct kvm_vm *vm; + + vm = pmu_vm_create_with_one_vcpu(&vcpu, guest_test_fixed_counters, + pmu_version, perf_capabilities); + + vcpu_set_cpuid_property(vcpu, X86_PROPERTY_PMU_FIXED_COUNTERS_BITMASK, + supported_bitmask); + vcpu_set_cpuid_property(vcpu, X86_PROPERTY_PMU_NR_FIXED_COUNTERS, + nr_fixed_counters); + + run_vcpu(vcpu); + + kvm_vm_free(vm); +} + static void test_intel_counters(void) { uint8_t nr_arch_events = kvm_cpu_property(X86_PROPERTY_PMU_EBX_BIT_VECTOR_LENGTH); + uint8_t nr_fixed_counters = kvm_cpu_property(X86_PROPERTY_PMU_NR_FIXED_COUNTERS); uint8_t nr_gp_counters = kvm_cpu_property(X86_PROPERTY_PMU_NR_GP_COUNTERS); uint8_t pmu_version = kvm_cpu_property(X86_PROPERTY_PMU_VERSION); unsigned int i; @@ -435,6 +482,13 @@ static void test_intel_counters(void) v, perf_caps[i]); for (j = 0; j <= nr_gp_counters; j++) test_gp_counters(v, perf_caps[i], j); + + pr_info("Testing fixed counters, PMU version %u, perf_caps = %lx\n", + v, perf_caps[i]); + for (j = 0; j <= nr_fixed_counters; j++) { + for (k = 0; k <= (BIT(nr_fixed_counters) - 1); k++) + test_fixed_counters(v, perf_caps[i], j, k); + } } } } From patchwork Fri Nov 10 02:12:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Christopherson X-Patchwork-Id: 163744 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b129:0:b0:403:3b70:6f57 with SMTP id q9csp837935vqs; Thu, 9 Nov 2023 18:16:41 -0800 (PST) X-Google-Smtp-Source: AGHT+IHTD9GYhqB0+9PdGrYvH/HurmMsUzh3YUuM/bNNePlT4YPJltdQAfXCQpBDwQeEykgGH4NU X-Received: by 2002:a05:6808:179e:b0:3ad:f536:2f26 with SMTP id bg30-20020a056808179e00b003adf5362f26mr4215656oib.18.1699582601535; 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[23.128.96.32]) by mx.google.com with ESMTPS id k63-20020a633d42000000b005b92b8e70f1si8163401pga.27.2023.11.09.18.16.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Nov 2023 18:16:41 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.32 as permitted sender) client-ip=23.128.96.32; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=U5mwE0HK; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.32 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by agentk.vger.email (Postfix) with ESMTP id 0003C8090EB6; Thu, 9 Nov 2023 18:15:17 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at agentk.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345789AbjKJCOr (ORCPT + 30 others); Thu, 9 Nov 2023 21:14:47 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59070 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234983AbjKJCOT (ORCPT ); Thu, 9 Nov 2023 21:14:19 -0500 Received: from mail-pj1-x1049.google.com (mail-pj1-x1049.google.com [IPv6:2607:f8b0:4864:20::1049]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3BCC04C38 for ; Thu, 9 Nov 2023 18:13:46 -0800 (PST) Received: by mail-pj1-x1049.google.com with SMTP id 98e67ed59e1d1-28047dbd6dcso1733529a91.0 for ; Thu, 09 Nov 2023 18:13:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1699582426; x=1700187226; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=JH9+qpUXl836Ph+awMmTwSGh8Ty89oPMRk1LH3tw8s4=; b=U5mwE0HKUK4wWia7KWOs+sRqcQy6ImyUbbQIakpNYTH45YOdXze0K14XrNHwr8RRG5 bCtVZZUHlMsKtxlsb3Y9SmNPH0knDNFbD1BFyfelTG72vn64mq2C6jOrTwvhJObP/H2a hlUQmYDmq22eigaxFP6otUMQMZoEv10coOxLsd3z6Q+D8O0bDO2YRNAxlL5P0g3q3VVP kGhCvJq3OhBJLuJqNL7MIyvz/EsYKvhEXxqXsl3Rwg5va5uwF82RgSg9jO7FufumDBsF 7cT9i1zfW7Rm2OL3xjqOt73tnLhqlOuo7L4qE7yQfGHTrQaaIhpEauybF5RNi736GdwL lPRw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699582426; x=1700187226; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=JH9+qpUXl836Ph+awMmTwSGh8Ty89oPMRk1LH3tw8s4=; b=EwSYgwUCeU3agafxNpUMzKDwGMDYCF9Aso7M6zVfIE3W3YGFidPCbO36VazTq8gBlO ACi5YoFDfzwlrL6FwjSmykTvFqilc52iYlzRVvcr53GvJYb4G7UKBk+lZ8RCbTzZS93q FJxVxCcr5IZzknStzpVdFgYcOK2UBM77dnTSe8PEEzjU2c/zot8848gDXzjwU8TYnotj EYQQPjq2bg1mfP98T2f1ljvp+1483ePkxrJiZ/2sdNI0K3lRJyBhi/094fPiwh2gty7h jQOndLbIfI68AII8hmWdVGGQqDDaLV9PTqXUHVMyGy38Huxwvv6kHuFCT8v5w8Mg1jFa QCfg== X-Gm-Message-State: AOJu0YyFGNQ5Dt+iftsE9FGrghyOhhfXjNCaV5RjX3sAptlJRd8Ws64w qTGxWx5J0QQeJJzchXK7DVGxpbvvF/w= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a17:90a:69a4:b0:27c:ff2d:418 with SMTP id s33-20020a17090a69a400b0027cff2d0418mr827687pjj.6.1699582425767; Thu, 09 Nov 2023 18:13:45 -0800 (PST) Reply-To: Sean Christopherson Date: Thu, 9 Nov 2023 18:12:57 -0800 In-Reply-To: <20231110021306.1269082-1-seanjc@google.com> Mime-Version: 1.0 References: <20231110021306.1269082-1-seanjc@google.com> X-Mailer: git-send-email 2.42.0.869.gea05f2083d-goog Message-ID: <20231110021306.1269082-18-seanjc@google.com> Subject: [PATCH v8 17/26] KVM: selftests: Add functional test for Intel's fixed PMU counters From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Kan Liang , Dapeng Mi , Jim Mattson , Jinrong Liang , Aaron Lewis , Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (agentk.vger.email [0.0.0.0]); Thu, 09 Nov 2023 18:15:18 -0800 (PST) X-Spam-Status: No, score=-8.4 required=5.0 tests=DKIMWL_WL_MED,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE, USER_IN_DEF_DKIM_WL autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on agentk.vger.email X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1782141525779946017 X-GMAIL-MSGID: 1782141525779946017 From: Jinrong Liang Extend the fixed counters test to verify that supported counters can actually be enabled in the control MSRs, that unsupported counters cannot, and that enabled counters actually count. Co-developed-by: Like Xu Signed-off-by: Like Xu Signed-off-by: Jinrong Liang [sean: fold into the rd/wr access test, massage changelog] Reviewed-by: Dapeng Mi Signed-off-by: Sean Christopherson --- .../selftests/kvm/x86_64/pmu_counters_test.c | 31 ++++++++++++++++++- 1 file changed, 30 insertions(+), 1 deletion(-) diff --git a/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c b/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c index b07294af71a3..f5dedd112471 100644 --- a/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c +++ b/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c @@ -332,7 +332,6 @@ static void guest_rd_wr_counters(uint32_t base_msr, uint8_t nr_possible_counters vector = wrmsr_safe(msr, 0); GUEST_ASSERT_PMC_MSR_ACCESS(WRMSR, msr, expect_gp, vector); } - GUEST_DONE(); } static void guest_test_gp_counters(void) @@ -350,6 +349,7 @@ static void guest_test_gp_counters(void) base_msr = MSR_IA32_PERFCTR0; guest_rd_wr_counters(base_msr, MAX_NR_GP_COUNTERS, nr_gp_counters, 0); + GUEST_DONE(); } static void test_gp_counters(uint8_t pmu_version, uint64_t perf_capabilities, @@ -373,6 +373,7 @@ static void guest_test_fixed_counters(void) { uint64_t supported_bitmask = 0; uint8_t nr_fixed_counters = 0; + uint8_t i; /* Fixed counters require Architectural vPMU Version 2+. */ if (guest_get_pmu_version() >= 2) @@ -387,6 +388,34 @@ static void guest_test_fixed_counters(void) guest_rd_wr_counters(MSR_CORE_PERF_FIXED_CTR0, MAX_NR_FIXED_COUNTERS, nr_fixed_counters, supported_bitmask); + + for (i = 0; i < MAX_NR_FIXED_COUNTERS; i++) { + uint8_t vector; + uint64_t val; + + if (i >= nr_fixed_counters && !(supported_bitmask & BIT_ULL(i))) { + vector = wrmsr_safe(MSR_CORE_PERF_FIXED_CTR_CTRL, + FIXED_PMC_CTRL(i, FIXED_PMC_KERNEL)); + __GUEST_ASSERT(vector == GP_VECTOR, + "Expected #GP for counter %u in FIXED_CTR_CTRL", i); + + vector = wrmsr_safe(MSR_CORE_PERF_GLOBAL_CTRL, + FIXED_PMC_GLOBAL_CTRL_ENABLE(i)); + __GUEST_ASSERT(vector == GP_VECTOR, + "Expected #GP for counter %u in PERF_GLOBAL_CTRL", i); + continue; + } + + wrmsr(MSR_CORE_PERF_FIXED_CTR0 + i, 0); + wrmsr(MSR_CORE_PERF_FIXED_CTR_CTRL, FIXED_PMC_CTRL(i, FIXED_PMC_KERNEL)); + wrmsr(MSR_CORE_PERF_GLOBAL_CTRL, FIXED_PMC_GLOBAL_CTRL_ENABLE(i)); + __asm__ __volatile__("loop ." : "+c"((int){NUM_BRANCHES})); + wrmsr(MSR_CORE_PERF_GLOBAL_CTRL, 0); + val = rdmsr(MSR_CORE_PERF_FIXED_CTR0 + i); + + GUEST_ASSERT_NE(val, 0); + } + GUEST_DONE(); } static void test_fixed_counters(uint8_t pmu_version, uint64_t perf_capabilities, From patchwork Fri Nov 10 02:12:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Christopherson X-Patchwork-Id: 163738 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b129:0:b0:403:3b70:6f57 with SMTP id q9csp837370vqs; Thu, 9 Nov 2023 18:15:06 -0800 (PST) X-Google-Smtp-Source: AGHT+IHAio8zHEMJqYw7MO0MlbpkHTPYyUhm4pLsQAMH5u5GuzPVNNVwV/vq8glbZlT5Y172wahl X-Received: by 2002:a05:6a00:3a0c:b0:6b4:ac0e:2f70 with SMTP id fj12-20020a056a003a0c00b006b4ac0e2f70mr7539414pfb.29.1699582505894; Thu, 09 Nov 2023 18:15:05 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1699582505; cv=none; d=google.com; s=arc-20160816; b=dJ8uK8BJuhf29TGjp0FDJXATu33GceFqZxdhskrJFJrlMOj3uWdMB8J/G7QekVbOPM IpuBOprOujMdNJFojSv9kvv7Yzr4ZmDSNenL1qGXzi6TxpHgVBJNSUKy5wxe3UmaIu5U v5hupbmc/K4ajrcLGwkQbNnRYb6YAaccPnwFKeGxlmhTu/oOjCSqZcD41ymvMPsmffVl Vf2vdyYQGlEGGad1LFxo9zC2/VMl7dsqHkXDh/jckyB63Io21QQQu+Q+vEpqOkQ6TXLU vMVKREhOgPN4rgtEWY8Hj+9Sl5iXFKT+vedLVOo3aiFg/rrBwl6dh9i0UB6c5OQahDSq mgmQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:reply-to:dkim-signature; bh=BVzcnUhnJk6Ozpv5h7yM61YwOo0u+UzthGDzNrYv9nU=; fh=gm96CM+cG0KJxn7vnhn0c1c98ILNP1HHUrKfrGecw3M=; b=OjtN63o01hP/ZCBtKoWA0ni00qf2/kqcAhlPJy0sTJxs7xgLYiEU09VSg92EO8usk3 oTM0a5jfkNL4zEonRPFMYM1nNKbxDbwuDEGbVzm27rdyYwpJ/i7Adxa4eZ3pz0LPby70 sA5zGtGP4BKuuFW3rPoGFIKMCVxYxDqB5uxLpoTifY0dGGNGGokTTD+s7zO40pYL6N/G m3Sl2Ln0jm4rWNuPI4FoYDYswKkTh5b6bQYNuQpPLO4P6cewYfHOuVOG7+kxg45vhYgH e900LvUoENdE6eUDn78B7jsBbZNxI5/Xrien4CrtlgGSYPLOAZWiOKaDyB4bHmHlKSDd Z4Xw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b="AL/hLOwt"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from snail.vger.email (snail.vger.email. [23.128.96.37]) by mx.google.com with ESMTPS id i189-20020a6387c6000000b005be00714949si2970057pge.222.2023.11.09.18.15.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Nov 2023 18:15:05 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) client-ip=23.128.96.37; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b="AL/hLOwt"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by snail.vger.email (Postfix) with ESMTP id 116F383B2028; Thu, 9 Nov 2023 18:15:04 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at snail.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345897AbjKJCOx (ORCPT + 30 others); Thu, 9 Nov 2023 21:14:53 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59114 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235073AbjKJCO1 (ORCPT ); Thu, 9 Nov 2023 21:14:27 -0500 Received: from mail-pl1-x64a.google.com (mail-pl1-x64a.google.com [IPv6:2607:f8b0:4864:20::64a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 691BD4ED1 for ; Thu, 9 Nov 2023 18:13:48 -0800 (PST) Received: by mail-pl1-x64a.google.com with SMTP id d9443c01a7336-1cc23f2226bso14962505ad.2 for ; Thu, 09 Nov 2023 18:13:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1699582427; x=1700187227; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=BVzcnUhnJk6Ozpv5h7yM61YwOo0u+UzthGDzNrYv9nU=; b=AL/hLOwt4IfgMnN1sNbGQLOmsXc8OM0u65/b9fqc3zy8CI82dVtu4QcQ4w5LbG+5bG Z6yDuP1uxa312iyvLOzuoJMcKsx+4IptjlTARbeV7UqHxCyXPgFBFe7Dk5F1w11ZvMW5 YBYFwdo91QRs5rwpQ93UuhexVcty2SM7fQv+O1XExYZVOvhuFtCVEXOLF32cNlWk/lRc gqbBgTd+4tZGr0qLHCXXk4aJp3P+v27bAt+YB02zFNQ8gryF+fw9/L1iG3AMJPFs3+dB 38s4m3biQAsFS5Czf6JK1vx+C/ThiHSGjnfzKV6sZtyni4N+VJ4GzaV0BZhVlmD312Tl X1vQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699582427; x=1700187227; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=BVzcnUhnJk6Ozpv5h7yM61YwOo0u+UzthGDzNrYv9nU=; b=hUSDbWSENccUJdAHPuj9hGYNgRLAvWnVmctjf7oP9cXbjZ21MLYDiqdzX/WWq7xynJ a5BR9ojYmdnBTA7KeQkVcUB6LOMHGAiT+lg1FX77oq7pYkEMke0z4cy4gvUPW3+h3RVf Ceg9GQJiwGhZ08D9qg1Smo+PzDY/a/jrJDJKYNm9ZeQUTXf28ZUIA0sJsl5guy5tJm63 QftUlm3Qb5IunXpTBs7eTXDOON7zw0NE8F++ZDmtL8M6DX1eGhyz96oEkR9Yg6+UcB12 o3uTi1GBduGRN+c016iwcd6pL5W4lsUZh0+sHNAIrZUuxvHmMhtyfMPhv8KhU+6eo/nX FJFw== X-Gm-Message-State: AOJu0Yxf61v9ByHOgZ11P+JcgUk7N29gm0csNPSDCTtp+zRuL9/r7Wi4 Q4EjdhkCo/GJGDEPFBaAUJT7gWuCDt8= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a17:903:2695:b0:1cc:3c0d:6126 with SMTP id jf21-20020a170903269500b001cc3c0d6126mr876759plb.12.1699582427596; Thu, 09 Nov 2023 18:13:47 -0800 (PST) Reply-To: Sean Christopherson Date: Thu, 9 Nov 2023 18:12:58 -0800 In-Reply-To: <20231110021306.1269082-1-seanjc@google.com> Mime-Version: 1.0 References: <20231110021306.1269082-1-seanjc@google.com> X-Mailer: git-send-email 2.42.0.869.gea05f2083d-goog Message-ID: <20231110021306.1269082-19-seanjc@google.com> Subject: [PATCH v8 18/26] KVM: selftests: Expand PMU counters test to verify LLC events From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Kan Liang , Dapeng Mi , Jim Mattson , Jinrong Liang , Aaron Lewis , Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Thu, 09 Nov 2023 18:15:04 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1782141425293918431 X-GMAIL-MSGID: 1782141425293918431 Expand the PMU counters test to verify that LLC references and misses have non-zero counts when the code being executed while the LLC event(s) is active is evicted via CFLUSH{,OPT}. Note, CLFLUSH{,OPT} requires a fence of some kind to ensure the cache lines are flushed before execution continues. Use MFENCE for simplicity (performance is not a concern). Suggested-by: Jim Mattson Reviewed-by: Dapeng Mi Signed-off-by: Sean Christopherson --- .../selftests/kvm/x86_64/pmu_counters_test.c | 59 +++++++++++++------ 1 file changed, 40 insertions(+), 19 deletions(-) diff --git a/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c b/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c index f5dedd112471..4c7133ddcda8 100644 --- a/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c +++ b/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c @@ -14,9 +14,9 @@ /* * Number of "extra" instructions that will be counted, i.e. the number of * instructions that are needed to set up the loop and then disabled the - * counter. 2 MOV, 2 XOR, 1 WRMSR. + * counter. 1 CLFLUSH/CLFLUSHOPT/NOP, 1 MFENCE, 2 MOV, 2 XOR, 1 WRMSR. */ -#define NUM_EXTRA_INSNS 5 +#define NUM_EXTRA_INSNS 7 #define NUM_INSNS_RETIRED (NUM_BRANCHES + NUM_EXTRA_INSNS) static uint8_t kvm_pmu_version; @@ -107,6 +107,12 @@ static void guest_assert_event_count(uint8_t idx, case INTEL_ARCH_BRANCHES_RETIRED_INDEX: GUEST_ASSERT_EQ(count, NUM_BRANCHES); break; + case INTEL_ARCH_LLC_REFERENCES_INDEX: + case INTEL_ARCH_LLC_MISSES_INDEX: + if (!this_cpu_has(X86_FEATURE_CLFLUSHOPT) && + !this_cpu_has(X86_FEATURE_CLFLUSH)) + break; + fallthrough; case INTEL_ARCH_CPU_CYCLES_INDEX: case INTEL_ARCH_REFERENCE_CYCLES_INDEX: GUEST_ASSERT_NE(count, 0); @@ -123,29 +129,44 @@ static void guest_assert_event_count(uint8_t idx, GUEST_ASSERT_EQ(_rdpmc(pmc), 0xdead); } +/* + * Enable and disable the PMC in a monolithic asm blob to ensure that the + * compiler can't insert _any_ code into the measured sequence. Note, ECX + * doesn't need to be clobbered as the input value, @pmc_msr, is restored + * before the end of the sequence. + * + * If CLFUSH{,OPT} is supported, flush the cacheline containing (at least) the + * start of the loop to force LLC references and misses, i.e. to allow testing + * that those events actually count. + */ +#define GUEST_MEASURE_EVENT(_msr, _value, clflush) \ +do { \ + __asm__ __volatile__("wrmsr\n\t" \ + clflush "\n\t" \ + "mfence\n\t" \ + "1: mov $" __stringify(NUM_BRANCHES) ", %%ecx\n\t" \ + "loop .\n\t" \ + "mov %%edi, %%ecx\n\t" \ + "xor %%eax, %%eax\n\t" \ + "xor %%edx, %%edx\n\t" \ + "wrmsr\n\t" \ + :: "a"((uint32_t)_value), "d"(_value >> 32), \ + "c"(_msr), "D"(_msr) \ + ); \ +} while (0) + static void __guest_test_arch_event(uint8_t idx, struct kvm_x86_pmu_feature event, uint32_t pmc, uint32_t pmc_msr, uint32_t ctrl_msr, uint64_t ctrl_msr_value) { wrmsr(pmc_msr, 0); - /* - * Enable and disable the PMC in a monolithic asm blob to ensure that - * the compiler can't insert _any_ code into the measured sequence. - * Note, ECX doesn't need to be clobbered as the input value, @pmc_msr, - * is restored before the end of the sequence. - */ - __asm__ __volatile__("wrmsr\n\t" - "mov $" __stringify(NUM_BRANCHES) ", %%ecx\n\t" - "loop .\n\t" - "mov %%edi, %%ecx\n\t" - "xor %%eax, %%eax\n\t" - "xor %%edx, %%edx\n\t" - "wrmsr\n\t" - :: "a"((uint32_t)ctrl_msr_value), - "d"(ctrl_msr_value >> 32), - "c"(ctrl_msr), "D"(ctrl_msr) - ); + if (this_cpu_has(X86_FEATURE_CLFLUSHOPT)) + GUEST_MEASURE_EVENT(ctrl_msr, ctrl_msr_value, "clflushopt 1f"); + else if (this_cpu_has(X86_FEATURE_CLFLUSH)) + GUEST_MEASURE_EVENT(ctrl_msr, ctrl_msr_value, "clflush 1f"); + else + GUEST_MEASURE_EVENT(ctrl_msr, ctrl_msr_value, "nop"); guest_assert_event_count(idx, event, pmc, pmc_msr); } From patchwork Fri Nov 10 02:12:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Christopherson X-Patchwork-Id: 163750 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b129:0:b0:403:3b70:6f57 with SMTP id q9csp838053vqs; Thu, 9 Nov 2023 18:16:59 -0800 (PST) X-Google-Smtp-Source: AGHT+IH/ezmG5SA/kVqFTjN2OOm1iGLKWNGRRLzeGN0cAQi+AANpK46gTSGVcwjELRULa1bKiUyX X-Received: by 2002:a05:6a21:3b45:b0:180:edee:1530 with SMTP id zy5-20020a056a213b4500b00180edee1530mr7432100pzb.37.1699582619573; Thu, 09 Nov 2023 18:16:59 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1699582619; cv=none; d=google.com; s=arc-20160816; b=CO2wINn3XkP+zLjCi6hkTIpot7DjcN7c/482aHXmfu8m4r8PW8OL6kTp+kvM/djeke cluOVgWai424GHXHdnzY5SRsLEMQZ0PXBMYUZJNxBKcmGAKbKC83+B2CfJ6R3XiwBx5v dzmfhXSfWB57LLtoXmdHZLgYtjqUbSeNqHbgAZLNtkg7M1t0yIUsv1jC1sDQxmqPAZ3s /EAvuzEhf9Pr8crdHt6KZ5padN22ssNptA3R3ZBCrKj5gQnNZjOZzgAbCcq/1n6oGsvN b7XY7dkZ7OtOzaoS9BFG94DKOeuXH9xUTBNnhQvVc0R0r7tGNZhu6sj2yIm5PahUMzmq vdSw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:reply-to:dkim-signature; bh=u1oA1WU+H0wBHafKtshVkBCE9ktzVNyHnD3r1OYhd/M=; fh=gm96CM+cG0KJxn7vnhn0c1c98ILNP1HHUrKfrGecw3M=; b=HGioG3fFWuiU9wCDsl0y/LXTO3uiTwgJ/Mps7PhmHsmRHIIDKkOELs2j/0IZCoMBL8 ky3+z55dZpesRlz1wrMIEsFbW13gwinOiTv4HAUThrjo0zUzIB7j0sWE3Q7gQ1NKGMrW jMjgUZndNRIPCaK3hx7DE5E4W2a6JMCO44czBBvIhiBAWBXkvXB56LgWQN9y2bha1ayF zjaqddSawzyDyoaVPG8WPQwL9VnnNY6qWyIioBwRzKnHqfalqPMrCRLhk7kzTaNnAbJ0 9engZDM7zLEM5vJwiOXTehWceckxB4KQdmg95SgPmhiYX5bHCQVOWYxqiAP6PTz13dPV 9M+w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=YMNKbB+a; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:2 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from agentk.vger.email (agentk.vger.email. [2620:137:e000::3:2]) by mx.google.com with ESMTPS id b13-20020a63d80d000000b005be2508cde6si679749pgh.593.2023.11.09.18.16.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Nov 2023 18:16:59 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:2 as permitted sender) client-ip=2620:137:e000::3:2; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=YMNKbB+a; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:2 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by agentk.vger.email (Postfix) with ESMTP id 9674180944DD; Thu, 9 Nov 2023 18:16:53 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at agentk.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345833AbjKJCPI (ORCPT + 30 others); Thu, 9 Nov 2023 21:15:08 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42464 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345725AbjKJCOa (ORCPT ); Thu, 9 Nov 2023 21:14:30 -0500 Received: from mail-yw1-x114a.google.com (mail-yw1-x114a.google.com [IPv6:2607:f8b0:4864:20::114a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6CDED4EE3 for ; Thu, 9 Nov 2023 18:13:50 -0800 (PST) Received: by mail-yw1-x114a.google.com with SMTP id 00721157ae682-5a7b9e83b70so12014497b3.0 for ; Thu, 09 Nov 2023 18:13:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1699582429; x=1700187229; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=u1oA1WU+H0wBHafKtshVkBCE9ktzVNyHnD3r1OYhd/M=; b=YMNKbB+aduxL5RO9h0qwYDk1RhnweXTBQqQfmrJv3trZGcKf4NVABeKCWWrFCw+41/ kakpYXk8XQderU71w5kw+UuEOSbcMyzWyG5yIb/Uz8ivq/kzS5s4y1i65L8bG4RFrQss DcNlqW2DQ23jYGgiq5qB6tbYtFnN78H1hpP1K7RBIKMeyYNwjiMmFHEAOvLrczxjB+sQ sSnK5ek99h1uQ/TMnDfKwK1JF0voGCptIk43OHwYF0XSgMkpy22t2iDayi1i6aph4RSj 4hra2o7tfvAuMxHQNxVi3tn2rD4PkWvZgrp/gkA9bT8Jgaic73vsL0/cPhropa+wATt/ C9sQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699582429; x=1700187229; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=u1oA1WU+H0wBHafKtshVkBCE9ktzVNyHnD3r1OYhd/M=; b=PcH6/jq9voBRhJ+f+tt2XcUtl+sq6p8ml3y6fUJi5rFBX5fS4bdkpQP3AfasXX/LCa B7op1gCwr9WjOIa90elqVUfVUplv+XittxcGNlV1VvdnuUwyDrdTXWtiCHidu4Zv4s7N IxkejJqphLLLp4Un353qRG8yhOSFJ3DiN0bFTnuBamLiz04pSJcU9WS3qBXvnMFct/cn SvzHavTVQmvQvWNoQlu1FV2AbUd2SdboWgzwTcSM5TCducUfPX3OZv05S9X7CsHNk12w Px5OK6RSHo+0uh7GFuZ7RzQi1LkYNXrhmyKGDR6zEJNlBMTPywVbTr6E9NmjtkdJjv5Z MP1g== X-Gm-Message-State: AOJu0Yx4IMTigzmUqAyGaX9xu+IwpH9WcSBvoiEiS04lsWsLmjV/9WYZ A1eHeINsVaKWJtF/kO0wmpZcNyMj3ZE= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a05:690c:250a:b0:5a8:207a:143a with SMTP id dt10-20020a05690c250a00b005a8207a143amr39667ywb.0.1699582429656; Thu, 09 Nov 2023 18:13:49 -0800 (PST) Reply-To: Sean Christopherson Date: Thu, 9 Nov 2023 18:12:59 -0800 In-Reply-To: <20231110021306.1269082-1-seanjc@google.com> Mime-Version: 1.0 References: <20231110021306.1269082-1-seanjc@google.com> X-Mailer: git-send-email 2.42.0.869.gea05f2083d-goog Message-ID: <20231110021306.1269082-20-seanjc@google.com> Subject: [PATCH v8 19/26] KVM: selftests: Add a helper to query if the PMU module param is enabled From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Kan Liang , Dapeng Mi , Jim Mattson , Jinrong Liang , Aaron Lewis , Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (agentk.vger.email [0.0.0.0]); Thu, 09 Nov 2023 18:16:53 -0800 (PST) X-Spam-Status: No, score=-8.4 required=5.0 tests=DKIMWL_WL_MED,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE, USER_IN_DEF_DKIM_WL autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on agentk.vger.email X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1782141544862665026 X-GMAIL-MSGID: 1782141544862665026 Add a helper to probe KVM's "enable_pmu" param, open coding strings in multiple places is just asking for false negatives and/or runtime errors due to typos. Reviewed-by: Dapeng Mi Signed-off-by: Sean Christopherson --- tools/testing/selftests/kvm/include/x86_64/processor.h | 5 +++++ tools/testing/selftests/kvm/x86_64/pmu_counters_test.c | 2 +- tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c | 2 +- tools/testing/selftests/kvm/x86_64/vmx_pmu_caps_test.c | 2 +- 4 files changed, 8 insertions(+), 3 deletions(-) diff --git a/tools/testing/selftests/kvm/include/x86_64/processor.h b/tools/testing/selftests/kvm/include/x86_64/processor.h index 64aecb3dcf60..c261e0941dfe 100644 --- a/tools/testing/selftests/kvm/include/x86_64/processor.h +++ b/tools/testing/selftests/kvm/include/x86_64/processor.h @@ -1216,6 +1216,11 @@ static inline uint8_t xsetbv_safe(uint32_t index, uint64_t value) bool kvm_is_tdp_enabled(void); +static inline bool kvm_is_pmu_enabled(void) +{ + return get_kvm_param_bool("enable_pmu"); +} + uint64_t *__vm_get_page_table_entry(struct kvm_vm *vm, uint64_t vaddr, int *level); uint64_t *vm_get_page_table_entry(struct kvm_vm *vm, uint64_t vaddr); diff --git a/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c b/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c index 4c7133ddcda8..9e9dc4084c0d 100644 --- a/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c +++ b/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c @@ -545,7 +545,7 @@ static void test_intel_counters(void) int main(int argc, char *argv[]) { - TEST_REQUIRE(get_kvm_param_bool("enable_pmu")); + TEST_REQUIRE(kvm_is_pmu_enabled()); TEST_REQUIRE(host_cpu_is_intel); TEST_REQUIRE(kvm_cpu_has_p(X86_PROPERTY_PMU_VERSION)); diff --git a/tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c b/tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c index 7ec9fbed92e0..fa407e2ccb2f 100644 --- a/tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c +++ b/tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c @@ -867,7 +867,7 @@ int main(int argc, char *argv[]) struct kvm_vcpu *vcpu, *vcpu2 = NULL; struct kvm_vm *vm; - TEST_REQUIRE(get_kvm_param_bool("enable_pmu")); + TEST_REQUIRE(kvm_is_pmu_enabled()); TEST_REQUIRE(kvm_has_cap(KVM_CAP_PMU_EVENT_FILTER)); TEST_REQUIRE(kvm_has_cap(KVM_CAP_PMU_EVENT_MASKED_EVENTS)); diff --git a/tools/testing/selftests/kvm/x86_64/vmx_pmu_caps_test.c b/tools/testing/selftests/kvm/x86_64/vmx_pmu_caps_test.c index ebbcb0a3f743..562b0152a122 100644 --- a/tools/testing/selftests/kvm/x86_64/vmx_pmu_caps_test.c +++ b/tools/testing/selftests/kvm/x86_64/vmx_pmu_caps_test.c @@ -237,7 +237,7 @@ int main(int argc, char *argv[]) { union perf_capabilities host_cap; - TEST_REQUIRE(get_kvm_param_bool("enable_pmu")); + TEST_REQUIRE(kvm_is_pmu_enabled()); TEST_REQUIRE(kvm_cpu_has(X86_FEATURE_PDCM)); TEST_REQUIRE(kvm_cpu_has_p(X86_PROPERTY_PMU_VERSION)); From patchwork Fri Nov 10 02:13:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Christopherson X-Patchwork-Id: 163740 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b129:0:b0:403:3b70:6f57 with SMTP id q9csp837890vqs; Thu, 9 Nov 2023 18:16:30 -0800 (PST) X-Google-Smtp-Source: AGHT+IH3UfntZK2HJvTCZ1T43fFh1C2YZ+J+DtdskwuGHaWS7qDwJZQzTbzx1i8nqP9bsFZaVpQM X-Received: by 2002:a05:6870:9112:b0:1e9:d261:cc84 with SMTP id o18-20020a056870911200b001e9d261cc84mr7214542oae.19.1699582589927; Thu, 09 Nov 2023 18:16:29 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1699582589; cv=none; d=google.com; s=arc-20160816; b=WWP+OGzonPvFhbmH/FD4Dl2bVmN4ehFCBSPAwGCQs+PRzJfbHi9xx6sZlS1GeFDen1 vI7Jxb38GFeXvXf2r2hys8dMkA8zh/GmFKzLYa50el6mber2XJyTsm2SRAh5PSRIt0sc MdrJrJZG+nXybZR9WLR2iYTLkYMwf2ypIxT3kuxB24qxkpO+lXpB6HHei/tZ8z6ZQCL4 OALm/RZw4A2vWLVAsEFISbu0ImlNgxd5W/umP/oBk/F9qIzbn99U8aC4wBOF2tBq4d+R HtKYT0spI70YKr4C6M+MpRYUUfooqXPx7iVIdsDqFHqBOU42NkL2h7cq/z3m2KtRXRCN QbXw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:reply-to:dkim-signature; bh=QsiXyox+rGQhiB/Za0Yz/FRQCQ9gMcg4U4njvPOlEGQ=; fh=gm96CM+cG0KJxn7vnhn0c1c98ILNP1HHUrKfrGecw3M=; b=YTMEZLTILcYCzMCf8UXyi4AcrG038JlVb/V38KLoPS1M0V77/rdSwJ+safGFZ4QAw4 zRcAACI3ALJF+LvFu8L1QqDhSALU8Mlgevx+f3Kl+Ec3x+Lvbv8QEzUJspc+HCXT364f uKexJ5OJhXgKoFt75zmv45cu+R+ZSEJYBd9lQCmFolKiAgRHXh9wsFMfRo+E7NSw8urL OlhVyeipAGEVf9KELuZVwA2h2D55JH74dET724sDhZL0E1rFX9CO3aNCYVF17q2zNjse F3xKqV4ijyBPr2Rt5AMAHfGgpuGU4ZG8ehQKP1ODYFKU/AGkAV56kzCNHC45/4eJZ5Bk n9iA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=OYUNIous; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:3 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from lipwig.vger.email (lipwig.vger.email. [2620:137:e000::3:3]) by mx.google.com with ESMTPS id d15-20020a056a0024cf00b0069023e4bca8si17605808pfv.214.2023.11.09.18.16.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Nov 2023 18:16:29 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:3 as permitted sender) client-ip=2620:137:e000::3:3; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=OYUNIous; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:3 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by lipwig.vger.email (Postfix) with ESMTP id D4E0D82BE511; Thu, 9 Nov 2023 18:16:21 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at lipwig.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345850AbjKJCPM (ORCPT + 30 others); Thu, 9 Nov 2023 21:15:12 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59030 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345853AbjKJCOk (ORCPT ); Thu, 9 Nov 2023 21:14:40 -0500 Received: from mail-yw1-x1149.google.com (mail-yw1-x1149.google.com [IPv6:2607:f8b0:4864:20::1149]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 565B74EFD for ; Thu, 9 Nov 2023 18:13:52 -0800 (PST) Received: by mail-yw1-x1149.google.com with SMTP id 00721157ae682-5a828bdcfbaso22017017b3.2 for ; Thu, 09 Nov 2023 18:13:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1699582431; x=1700187231; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=QsiXyox+rGQhiB/Za0Yz/FRQCQ9gMcg4U4njvPOlEGQ=; b=OYUNIous6w/DVODToQCGzn5Ctp6jhfLxdAakTa+L6eAb4sbQgBDJVLU4joUPCaz57P wtekKSiCAiPYFQTxwAFSRnd37UdUSKXCpFSI2kNs3ktzoeN8UOqOveyuUGM331ZevrZ3 I6Y90/CKz+ACo1O9NbGcH3bR3A0La31yilOTPdb5tPLeRNFGKUHQGTWl2ZHwKvR2Bp9z kQ4phvbVL0z1mzl8FEb+SEPUk0IEDY9IREDoBRc4ourghWBioHl0TvgRPuREDGaSzOEX 14X5vHipWSnxSoOdOLKRt41ycQ4Tm3VROCAqDGqlP0ctky9RE++E7tEG/vktCDo9tVHm v4kg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699582431; x=1700187231; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=QsiXyox+rGQhiB/Za0Yz/FRQCQ9gMcg4U4njvPOlEGQ=; b=pY/VV2nDd6gJ1leT6ZHOOhDi2mUIjljAidJtywdK+Idf0K91rL/iHcrkAGz9pTSPg9 EU6F0cbnev7eEvasXwjQmgYV17pdvVRF75FcNO8QjrygYngahSCnpjTr6DKrNzM3jyhp Uv3MLvSWhuiOXnXppt/hxtjd+EFDWZXD4xfdBtU6QTnmfIASxPbiw1jTgsiObvVSTcBd 2M0aKuyz0OsoqMRidXM1GIutN7nTcJ8rlycq2HjXDryUrcI0fF3vPraOaYB/30L7Ub8a 1Z5Xce52jRH0JUhbLJomHMl3xuDbbkymoSWMHjl9/r0iLMaEpcR/+IsJ79lbq4WKM9ED KefQ== X-Gm-Message-State: AOJu0YwfjxC2rTPtLWa5HEsnoZofK+7wzeUZTwpDBISZUrstGVONxbDu T9o72H4VE1/iz2pg5on9n708CUzaDMc= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a5b:7c5:0:b0:da3:b96c:6c48 with SMTP id t5-20020a5b07c5000000b00da3b96c6c48mr194656ybq.9.1699582431526; Thu, 09 Nov 2023 18:13:51 -0800 (PST) Reply-To: Sean Christopherson Date: Thu, 9 Nov 2023 18:13:00 -0800 In-Reply-To: <20231110021306.1269082-1-seanjc@google.com> Mime-Version: 1.0 References: <20231110021306.1269082-1-seanjc@google.com> X-Mailer: git-send-email 2.42.0.869.gea05f2083d-goog Message-ID: <20231110021306.1269082-21-seanjc@google.com> Subject: [PATCH v8 20/26] KVM: selftests: Add helpers to read integer module params From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Kan Liang , Dapeng Mi , Jim Mattson , Jinrong Liang , Aaron Lewis , Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (lipwig.vger.email [0.0.0.0]); Thu, 09 Nov 2023 18:16:21 -0800 (PST) X-Spam-Status: No, score=-8.4 required=5.0 tests=DKIMWL_WL_MED,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE, USER_IN_DEF_DKIM_WL autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lipwig.vger.email X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1782141513704817453 X-GMAIL-MSGID: 1782141513704817453 Add helpers to read integer module params, which is painfully non-trivial because the pain of dealing with strings in C is exacerbated by the kernel inserting a newline. Don't bother differentiating between int, uint, short, etc. They all fit in an int, and KVM (thankfully) doesn't have any integer params larger than an int. Signed-off-by: Sean Christopherson --- .../selftests/kvm/include/kvm_util_base.h | 4 ++ tools/testing/selftests/kvm/lib/kvm_util.c | 62 +++++++++++++++++-- 2 files changed, 60 insertions(+), 6 deletions(-) diff --git a/tools/testing/selftests/kvm/include/kvm_util_base.h b/tools/testing/selftests/kvm/include/kvm_util_base.h index a18db6a7b3cf..46b71241216e 100644 --- a/tools/testing/selftests/kvm/include/kvm_util_base.h +++ b/tools/testing/selftests/kvm/include/kvm_util_base.h @@ -238,6 +238,10 @@ bool get_kvm_param_bool(const char *param); bool get_kvm_intel_param_bool(const char *param); bool get_kvm_amd_param_bool(const char *param); +int get_kvm_param_integer(const char *param); +int get_kvm_intel_param_integer(const char *param); +int get_kvm_amd_param_integer(const char *param); + unsigned int kvm_check_cap(long cap); static inline bool kvm_has_cap(long cap) diff --git a/tools/testing/selftests/kvm/lib/kvm_util.c b/tools/testing/selftests/kvm/lib/kvm_util.c index 7a8af1821f5d..65101c7d1a1a 100644 --- a/tools/testing/selftests/kvm/lib/kvm_util.c +++ b/tools/testing/selftests/kvm/lib/kvm_util.c @@ -51,13 +51,13 @@ int open_kvm_dev_path_or_exit(void) return _open_kvm_dev_path_or_exit(O_RDONLY); } -static bool get_module_param_bool(const char *module_name, const char *param) +static ssize_t get_module_param(const char *module_name, const char *param, + void *buffer, size_t buffer_size) { const int path_size = 128; char path[path_size]; - char value; - ssize_t r; - int fd; + ssize_t bytes_read; + int fd, r; r = snprintf(path, path_size, "/sys/module/%s/parameters/%s", module_name, param); @@ -66,11 +66,46 @@ static bool get_module_param_bool(const char *module_name, const char *param) fd = open_path_or_exit(path, O_RDONLY); - r = read(fd, &value, 1); - TEST_ASSERT(r == 1, "read(%s) failed", path); + bytes_read = read(fd, buffer, buffer_size); + TEST_ASSERT(bytes_read > 0, "read(%s) returned %ld, wanted %ld bytes", + path, bytes_read, buffer_size); r = close(fd); TEST_ASSERT(!r, "close(%s) failed", path); + return bytes_read; +} + +static int get_module_param_integer(const char *module_name, const char *param) +{ + /* + * 16 bytes to hold a 64-bit value (1 byte per char), 1 byte for the + * NUL char, and 1 byte because the kernel sucks and inserts a newline + * at the end. + */ + char value[16 + 1 + 1]; + ssize_t r; + + memset(value, '\0', sizeof(value)); + + r = get_module_param(module_name, param, value, sizeof(value)); + TEST_ASSERT(value[r - 1] == '\n', + "Expected trailing newline, got char '%c'", value[r - 1]); + + /* + * Squash the newline, otherwise atoi_paranoid() will complain about + * trailing non-NUL characters in the string. + */ + value[r - 1] = '\0'; + return atoi_paranoid(value); +} + +static bool get_module_param_bool(const char *module_name, const char *param) +{ + char value; + ssize_t r; + + r = get_module_param(module_name, param, &value, sizeof(value)); + TEST_ASSERT_EQ(r, 1); if (value == 'Y') return true; @@ -95,6 +130,21 @@ bool get_kvm_amd_param_bool(const char *param) return get_module_param_bool("kvm_amd", param); } +int get_kvm_param_integer(const char *param) +{ + return get_module_param_integer("kvm", param); +} + +int get_kvm_intel_param_integer(const char *param) +{ + return get_module_param_integer("kvm_intel", param); +} + +int get_kvm_amd_param_integer(const char *param) +{ + return get_module_param_integer("kvm_amd", param); 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Cc: Aaron Lewis Signed-off-by: Sean Christopherson --- .../selftests/kvm/include/x86_64/processor.h | 5 ++++ .../kvm/x86_64/userspace_msr_exit_test.c | 27 +++++++------------ 2 files changed, 14 insertions(+), 18 deletions(-) diff --git a/tools/testing/selftests/kvm/include/x86_64/processor.h b/tools/testing/selftests/kvm/include/x86_64/processor.h index c261e0941dfe..8a404faafb21 100644 --- a/tools/testing/selftests/kvm/include/x86_64/processor.h +++ b/tools/testing/selftests/kvm/include/x86_64/processor.h @@ -1221,6 +1221,11 @@ static inline bool kvm_is_pmu_enabled(void) return get_kvm_param_bool("enable_pmu"); } +static inline bool kvm_is_forced_emulation_enabled(void) +{ + return !!get_kvm_param_integer("force_emulation_prefix"); +} + uint64_t *__vm_get_page_table_entry(struct kvm_vm *vm, uint64_t vaddr, int *level); uint64_t *vm_get_page_table_entry(struct kvm_vm *vm, uint64_t vaddr); diff --git a/tools/testing/selftests/kvm/x86_64/userspace_msr_exit_test.c b/tools/testing/selftests/kvm/x86_64/userspace_msr_exit_test.c index 3533dc2fbfee..9e12dbc47a72 100644 --- a/tools/testing/selftests/kvm/x86_64/userspace_msr_exit_test.c +++ b/tools/testing/selftests/kvm/x86_64/userspace_msr_exit_test.c @@ -14,8 +14,7 @@ /* Forced emulation prefix, used to invoke the emulator unconditionally. */ #define KVM_FEP "ud2; .byte 'k', 'v', 'm';" -#define KVM_FEP_LENGTH 5 -static int fep_available = 1; +static bool fep_available; #define MSR_NON_EXISTENT 0x474f4f00 @@ -260,13 +259,6 @@ static void guest_code_filter_allow(void) GUEST_ASSERT(data == 2); GUEST_ASSERT(guest_exception_count == 0); - /* - * Test to see if the instruction emulator is available (ie: the module - * parameter 'kvm.force_emulation_prefix=1' is set). This instruction - * will #UD if it isn't available. - */ - __asm__ __volatile__(KVM_FEP "nop"); - if (fep_available) { /* Let userspace know we aren't done. */ GUEST_SYNC(0); @@ -388,12 +380,6 @@ static void guest_fep_gp_handler(struct ex_regs *regs) &em_wrmsr_start, &em_wrmsr_end); } -static void guest_ud_handler(struct ex_regs *regs) -{ - fep_available = 0; - regs->rip += KVM_FEP_LENGTH; -} - static void check_for_guest_assert(struct kvm_vcpu *vcpu) { struct ucall uc; @@ -531,9 +517,11 @@ static void test_msr_filter_allow(void) { struct kvm_vcpu *vcpu; struct kvm_vm *vm; + uint64_t cmd; int rc; vm = vm_create_with_one_vcpu(&vcpu, guest_code_filter_allow); + sync_global_to_guest(vm, fep_available); rc = kvm_check_cap(KVM_CAP_X86_USER_SPACE_MSR); TEST_ASSERT(rc, "KVM_CAP_X86_USER_SPACE_MSR is available"); @@ -561,11 +549,11 @@ static void test_msr_filter_allow(void) run_guest_then_process_wrmsr(vcpu, MSR_NON_EXISTENT); run_guest_then_process_rdmsr(vcpu, MSR_NON_EXISTENT); - vm_install_exception_handler(vm, UD_VECTOR, guest_ud_handler); vcpu_run(vcpu); - vm_install_exception_handler(vm, UD_VECTOR, NULL); + cmd = process_ucall(vcpu); - if (process_ucall(vcpu) != UCALL_DONE) { + if (fep_available) { + TEST_ASSERT_EQ(cmd, UCALL_SYNC); vm_install_exception_handler(vm, GP_VECTOR, guest_fep_gp_handler); /* Process emulated rdmsr and wrmsr instructions. */ @@ -583,6 +571,7 @@ static void test_msr_filter_allow(void) /* Confirm the guest completed without issues. */ run_guest_then_process_ucall_done(vcpu); } else { + TEST_ASSERT_EQ(cmd, UCALL_DONE); printf("To run the instruction emulated tests set the module parameter 'kvm.force_emulation_prefix=1'\n"); } @@ -804,6 +793,8 @@ static void test_user_exit_msr_flags(void) int main(int argc, char *argv[]) { + fep_available = kvm_is_forced_emulation_enabled(); + test_msr_filter_allow(); test_msr_filter_deny(); From patchwork Fri Nov 10 02:13:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Christopherson X-Patchwork-Id: 163741 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b129:0:b0:403:3b70:6f57 with SMTP id q9csp837922vqs; Thu, 9 Nov 2023 18:16:38 -0800 (PST) X-Google-Smtp-Source: AGHT+IEgLTK+7fUMIbbJRVL3c2dN8fY3LFdPc2mgQZmfoTzzDnbAr6pEq7wDhlypIWsq2rXUm/Ts X-Received: by 2002:a17:902:e80f:b0:1cc:4559:f5 with SMTP id u15-20020a170902e80f00b001cc455900f5mr8456249plg.14.1699582598696; Thu, 09 Nov 2023 18:16:38 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1699582598; cv=none; d=google.com; s=arc-20160816; b=tzGY79Rvj4QMS63RXn6vOb1tewpg4nAcRIZkp57b5pYv+ENnd/1dhmeikJqURb08RO 2OjdhBsljfY3MSR43LDutnF+a+fxPMvuKU4Fu2sfMNOTz0T276CVYs5hL3zYpCbzjJti TWYedLfEY7yqwDEgxT0hk644CZQ3Uql9aviNG75Wj4quCcPE7fPmABXA9Uyrw+Rgtg3R yvvOTz+9Pau9xdDosTCdzfcW9POpe3kRii9vQmvdvYioxvyX7mf6DkQWPjBdPVbozZrL b+P/tBF0jLkst3CQuXVnkIvRBFvWdSdY5h5zJ7Rle/saKWR6ULrwTktFIPcxhqGy9RsD LQew== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:reply-to:dkim-signature; bh=4fLduEULj/w/qTyuS7dxoyFHFX9Y3I4W7nZGJLTTI/Q=; fh=gm96CM+cG0KJxn7vnhn0c1c98ILNP1HHUrKfrGecw3M=; b=zDYr2f9mFVTzbJSzk340VTFgy2KUt7yr5GHLmGII4H2OFlEA+TTkcJqRqdSyUsX2AX dqDQUfs3oWaxFmf+Fz/V53fj+p5oar5P9sNwSE44F92EE12Uf7swP7/h5jpjkBmz6Yx5 9ypZADzd9bDdxmOgjD+X6XOZ7s3iVXXzfttXG0NHba7QBbfoEmbkJFP0XJ4Qfz0SXpft mALUwUMn/nUsDyX34lSb8sODNkHKLUL0Nka+cHZgv9HvkmV7HVpk1LP/kVPwdPdEnv9w jNl156RCMfH2zdNKLV/omyax81r5kOJtMIbq71c5/4uzkW8LdPnCZEKd3QSFWuDtgMen TIZQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b="jgep/4ES"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from snail.vger.email (snail.vger.email. [2620:137:e000::3:7]) by mx.google.com with ESMTPS id o14-20020a17090323ce00b001c7361b71c9si6044857plh.114.2023.11.09.18.16.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Nov 2023 18:16:38 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) client-ip=2620:137:e000::3:7; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b="jgep/4ES"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by snail.vger.email (Postfix) with ESMTP id 5398180A9905; Thu, 9 Nov 2023 18:15:42 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at snail.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345807AbjKJCPY (ORCPT + 30 others); Thu, 9 Nov 2023 21:15:24 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48320 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345884AbjKJCOs (ORCPT ); Thu, 9 Nov 2023 21:14:48 -0500 Received: from mail-yw1-x114a.google.com (mail-yw1-x114a.google.com [IPv6:2607:f8b0:4864:20::114a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 092F34795 for ; Thu, 9 Nov 2023 18:13:56 -0800 (PST) Received: by mail-yw1-x114a.google.com with SMTP id 00721157ae682-5aecf6e30e9so22387827b3.1 for ; Thu, 09 Nov 2023 18:13:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1699582435; x=1700187235; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=4fLduEULj/w/qTyuS7dxoyFHFX9Y3I4W7nZGJLTTI/Q=; b=jgep/4ESbx2q//xdJmZN0gH1c4O22bP02/cTi8dnKfkpKYV8DgjNvSJnJDFNu3j8Qf w/5naJFyjdrLyMXcYWgljl9FFuYDXFQX9LI2ccxn7AZBrf8zg+COLqsvZ2uTO4lpyCse D3+quN+0QtGsHXcT1R4mkwTa4B5nVNv/PX1W5v27bnObsDj66xIQbqe7vxPIVWHzsKVd l2Ewf9qfRoMRuZXJMKS10WQs5JV6nL3a2m5RPb1qpLq4/Vury2TjCKEadpHtNFrq0nhK p96mi6TsL210Z2AoseEfw9vNdXvMJiddN6PsCvVr8M2QqjEkG7Jdvg9YJaQ80icJVKZ6 M3Kg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699582435; x=1700187235; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=4fLduEULj/w/qTyuS7dxoyFHFX9Y3I4W7nZGJLTTI/Q=; b=UYVa6eqgtTDSpjtotODxUZj5V3uE9d/VCfMu07LQVTvqmlQM9fdLehrzwdmzydTDWv 0RkcYDCdub/6lQH+JSn5WY25WM3bU7Oew5+JMkUdHO4VPAjnn7/2d/SvW8czixwCE1VR mqJPE+An3AIwRGYU+ANGzFOgdAuLzWb0UlkeuFUUd1LCRVM2QpMyOKrdwMdKfVvDaOcO ldni621S5pOSTgMHQJWZHUFfwgc/rJrpPRhgS6to/ZUryi0sHsNftSe+7jSnyHQpmjjP 95edmU2EY5wFlsFtomgNK0LFtDPOSrgq5gUkyp0mV0/3f1/Qh1vjT2MmKDz+meX8KMZY 0VQw== X-Gm-Message-State: AOJu0Yx/M/WUETWz0Nehk5/45ehSf75sMZHpsEQaW8ac/jqM7Wk8O03A nO62gdhcWGXH9xD0duwFEWQS3atS/3o= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a25:d689:0:b0:da0:622b:553b with SMTP id n131-20020a25d689000000b00da0622b553bmr185399ybg.12.1699582435282; Thu, 09 Nov 2023 18:13:55 -0800 (PST) Reply-To: Sean Christopherson Date: Thu, 9 Nov 2023 18:13:02 -0800 In-Reply-To: <20231110021306.1269082-1-seanjc@google.com> Mime-Version: 1.0 References: <20231110021306.1269082-1-seanjc@google.com> X-Mailer: git-send-email 2.42.0.869.gea05f2083d-goog Message-ID: <20231110021306.1269082-23-seanjc@google.com> Subject: [PATCH v8 22/26] KVM: selftests: Move KVM_FEP macro into common library header From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Kan Liang , Dapeng Mi , Jim Mattson , Jinrong Liang , Aaron Lewis , Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Thu, 09 Nov 2023 18:15:42 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1782141523005754788 X-GMAIL-MSGID: 1782141523005754788 Move the KVM_FEP definition, a.k.a. the KVM force emulation prefix, into processor.h so that it can be used for other tests besides the MSR filter test. Signed-off-by: Sean Christopherson --- tools/testing/selftests/kvm/include/x86_64/processor.h | 3 +++ tools/testing/selftests/kvm/x86_64/userspace_msr_exit_test.c | 2 -- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/tools/testing/selftests/kvm/include/x86_64/processor.h b/tools/testing/selftests/kvm/include/x86_64/processor.h index 8a404faafb21..e5c383bd313b 100644 --- a/tools/testing/selftests/kvm/include/x86_64/processor.h +++ b/tools/testing/selftests/kvm/include/x86_64/processor.h @@ -22,6 +22,9 @@ extern bool host_cpu_is_intel; extern bool host_cpu_is_amd; +/* Forced emulation prefix, used to invoke the emulator unconditionally. */ +#define KVM_FEP "ud2; .byte 'k', 'v', 'm';" + #define NMI_VECTOR 0x02 #define X86_EFLAGS_FIXED (1u << 1) diff --git a/tools/testing/selftests/kvm/x86_64/userspace_msr_exit_test.c b/tools/testing/selftests/kvm/x86_64/userspace_msr_exit_test.c index 9e12dbc47a72..ab3a8c4f0b86 100644 --- a/tools/testing/selftests/kvm/x86_64/userspace_msr_exit_test.c +++ b/tools/testing/selftests/kvm/x86_64/userspace_msr_exit_test.c @@ -12,8 +12,6 @@ #include "kvm_util.h" #include "vmx.h" -/* Forced emulation prefix, used to invoke the emulator unconditionally. */ -#define KVM_FEP "ud2; .byte 'k', 'v', 'm';" static bool fep_available; #define MSR_NON_EXISTENT 0x474f4f00 From patchwork Fri Nov 10 02:13:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Christopherson X-Patchwork-Id: 163742 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b129:0:b0:403:3b70:6f57 with SMTP id q9csp837931vqs; Thu, 9 Nov 2023 18:16:41 -0800 (PST) X-Google-Smtp-Source: AGHT+IGUvlGoQbSgWmp51rzXuZvtjFFZeD83kZlnaxJqtgrTMj0YJmjfuD4b4kfFZBKITz/5K1Fj X-Received: by 2002:a05:6358:f288:b0:16b:ac8d:feb5 with SMTP id jk8-20020a056358f28800b0016bac8dfeb5mr1508309rwb.2.1699582600860; Thu, 09 Nov 2023 18:16:40 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1699582600; cv=none; d=google.com; s=arc-20160816; b=jRX9ixMN1j6pUs7BiDQl9nB2DshcBbrZySaelCG9bu5tUn5W11Mnweu80gtgpX3a1S kIf/gSZTdy9gRpNDypH/z0DyZXfBIlfaP6nkOaaAx4yehgksLpcHMpA7if9PN8qyUSCO 5PONHpfV7HTO6ml8RDbS5C7qgCnj1GTwKdpKMyN1Aj/UuqToqtfQNuzCaGkvkFUPQ21R HIbHPC6IQ8pu3EBGVt/8qsClklyoE45SIeC8a+NuzwN1CtTNBVxG+9H3KMjMgDZ8vIbo r68e2UmPBZK75Lc9lYyRuyHu/X6V/1QMfN4BNNZ6/NLGYz85mEG8QCOHGYc9YgkqKuSW 7+MQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:reply-to:dkim-signature; bh=ds3MvKH8kVzgSsc7o55jwRMvzgXZJWlQSFfImJG8HBA=; fh=gm96CM+cG0KJxn7vnhn0c1c98ILNP1HHUrKfrGecw3M=; b=wpkH2j+rc1u9YLyxaBuIhQ51J5Pl1kfX0vUDjBV1TdUw8HVyDJ1bVCPaTfpAxihssi vZ1Ih0pWtuCRTwswNAtbOR7hcqBWey8xP3+lzm3x9N1bDGzc81MJs6jfGBXMpj9yjGb9 FzAWGsZe6xkOGF6Xmj0lq7Ig5PcSoYlk6+kOERoumTckvIrj+4zHrGYhNNEWATZ8TSxh cjnnF5iWcyQw4n9tcyBxOLELuGc+k+efqpRNEr4U7a6pHCbV8MvLm6M/kK2LF0R6XZHD mFB9bvIuE8MN7WlymYxMPswgEjxwDq9lriSwkNt/uMIZHFSWQ8PUpRW2nATh7DvttFvp TDbg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=DukZr36X; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from snail.vger.email (snail.vger.email. [23.128.96.37]) by mx.google.com with ESMTPS id l70-20020a639149000000b00577f67a0614si2650977pge.879.2023.11.09.18.16.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Nov 2023 18:16:40 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) client-ip=23.128.96.37; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=DukZr36X; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by snail.vger.email (Postfix) with ESMTP id 0800C812D23E; Thu, 9 Nov 2023 18:15:54 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at snail.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345803AbjKJCPa (ORCPT + 30 others); Thu, 9 Nov 2023 21:15:30 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48400 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234836AbjKJCOw (ORCPT ); Thu, 9 Nov 2023 21:14:52 -0500 Received: from mail-yw1-x1149.google.com (mail-yw1-x1149.google.com [IPv6:2607:f8b0:4864:20::1149]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E723547A7 for ; Thu, 9 Nov 2023 18:13:57 -0800 (PST) Received: by mail-yw1-x1149.google.com with SMTP id 00721157ae682-5a7c97d5d5aso22277367b3.3 for ; Thu, 09 Nov 2023 18:13:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1699582437; x=1700187237; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=ds3MvKH8kVzgSsc7o55jwRMvzgXZJWlQSFfImJG8HBA=; b=DukZr36XKXnoUAft4AlGt1fHSk0S6ypv7QUpB+1MUsGcgm4cK4JjH36BLiOl/dz0jy Nif7c/zpd7/U8q6VxENAnQvtD8LeQYVc4uOyhRmcG8UZCeZBWe0c+J2jfEZ3+29i4k1T 4KSGm97K7LC1uyXCq8huE9HnoBai6p9hpc+TErJ4TCCHLi+d30ZFJ+X69qa8m9Yj+bJJ l0ucRvPCJTPD6IP+qX4zcIVQ6Bm0NaZylYKWdXfxOy11PDbNluLJZCMllWmcWJOShCcu A+cZZrinw2OKXb1Zn2Gg+6vgf9oxea9ywvmtb8ZxYHCdBkjAZlw43LNSWMSlPdy5Ydwc o5EA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699582437; x=1700187237; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=ds3MvKH8kVzgSsc7o55jwRMvzgXZJWlQSFfImJG8HBA=; b=b0jXB9+fn5/eFanvMTTeY8I4ZWwswmH8XCyIaSRGe2sX3PVzN7ohR2Ptl37LBc+Hlo 70sccFKFJgdOJhdNqSraQzTFcgZbq1hGHtEyk328u1p/Bki1HEiJYcLm11W1Hz5EE2+C HTuo0V8y2VCo/JaWEOnJbX4zgt4bfAHIYyrqCKUWt+MkRXCXhTv9f2Rkq9obVDClY4+t cm5rkhhLevNJJfeZ6UxO2qzU3Jz1uOxvo1H4avE0X0sClfgpm9lQGqXrY1UO/8grpLUq 4qPSnLqGe9vu87r5oF5hk7Ybqhq11lfdsojNtgMzWkZk8OA+aDhcD2F8kc0kk3nC6r+8 yx7Q== X-Gm-Message-State: AOJu0YzjPwtZ8SX/RQ3IhY9tjtwd4QY2zYsb1PSlnh6hhxX4+fidsoWW K6cI25flORfFk+e5v07NQbGpXakEhDM= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a81:4849:0:b0:5a7:aa51:c08e with SMTP id v70-20020a814849000000b005a7aa51c08emr180425ywa.1.1699582437106; Thu, 09 Nov 2023 18:13:57 -0800 (PST) Reply-To: Sean Christopherson Date: Thu, 9 Nov 2023 18:13:03 -0800 In-Reply-To: <20231110021306.1269082-1-seanjc@google.com> Mime-Version: 1.0 References: <20231110021306.1269082-1-seanjc@google.com> X-Mailer: git-send-email 2.42.0.869.gea05f2083d-goog Message-ID: <20231110021306.1269082-24-seanjc@google.com> Subject: [PATCH v8 23/26] KVM: selftests: Test PMC virtualization with forced emulation From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Kan Liang , Dapeng Mi , Jim Mattson , Jinrong Liang , Aaron Lewis , Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Thu, 09 Nov 2023 18:15:54 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1782141525360665107 X-GMAIL-MSGID: 1782141525360665107 Extend the PMC counters test to use forced emulation to verify that KVM emulates counter events for instructions retired and branches retired. Force emulation for only a subset of the measured code to test that KVM does the right thing when mixing perf events with emulated events. Reviewed-by: Dapeng Mi Signed-off-by: Sean Christopherson --- .../selftests/kvm/x86_64/pmu_counters_test.c | 44 +++++++++++++------ 1 file changed, 30 insertions(+), 14 deletions(-) diff --git a/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c b/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c index 9e9dc4084c0d..cb808ac827ba 100644 --- a/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c +++ b/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c @@ -21,6 +21,7 @@ static uint8_t kvm_pmu_version; static bool kvm_has_perf_caps; +static bool is_forced_emulation_enabled; static struct kvm_vm *pmu_vm_create_with_one_vcpu(struct kvm_vcpu **vcpu, void *guest_code, @@ -34,6 +35,7 @@ static struct kvm_vm *pmu_vm_create_with_one_vcpu(struct kvm_vcpu **vcpu, vcpu_init_descriptor_tables(*vcpu); sync_global_to_guest(vm, kvm_pmu_version); + sync_global_to_guest(vm, is_forced_emulation_enabled); /* * Set PERF_CAPABILITIES before PMU version as KVM disallows enabling @@ -138,37 +140,50 @@ static void guest_assert_event_count(uint8_t idx, * If CLFUSH{,OPT} is supported, flush the cacheline containing (at least) the * start of the loop to force LLC references and misses, i.e. to allow testing * that those events actually count. + * + * If forced emulation is enabled (and specified), force emulation on a subset + * of the measured code to verify that KVM correctly emulates instructions and + * branches retired events in conjunction with hardware also counting said + * events. */ -#define GUEST_MEASURE_EVENT(_msr, _value, clflush) \ +#define GUEST_MEASURE_EVENT(_msr, _value, clflush, FEP) \ do { \ __asm__ __volatile__("wrmsr\n\t" \ clflush "\n\t" \ "mfence\n\t" \ "1: mov $" __stringify(NUM_BRANCHES) ", %%ecx\n\t" \ - "loop .\n\t" \ - "mov %%edi, %%ecx\n\t" \ - "xor %%eax, %%eax\n\t" \ - "xor %%edx, %%edx\n\t" \ + FEP "loop .\n\t" \ + FEP "mov %%edi, %%ecx\n\t" \ + FEP "xor %%eax, %%eax\n\t" \ + FEP "xor %%edx, %%edx\n\t" \ "wrmsr\n\t" \ :: "a"((uint32_t)_value), "d"(_value >> 32), \ "c"(_msr), "D"(_msr) \ ); \ } while (0) +#define GUEST_TEST_EVENT(_idx, _event, _pmc, _pmc_msr, _ctrl_msr, _value, FEP) \ +do { \ + wrmsr(pmc_msr, 0); \ + \ + if (this_cpu_has(X86_FEATURE_CLFLUSHOPT)) \ + GUEST_MEASURE_EVENT(_ctrl_msr, _value, "clflushopt 1f", FEP); \ + else if (this_cpu_has(X86_FEATURE_CLFLUSH)) \ + GUEST_MEASURE_EVENT(_ctrl_msr, _value, "clflush 1f", FEP); \ + else \ + GUEST_MEASURE_EVENT(_ctrl_msr, _value, "nop", FEP); \ + \ + guest_assert_event_count(_idx, _event, _pmc, _pmc_msr); \ +} while (0) + static void __guest_test_arch_event(uint8_t idx, struct kvm_x86_pmu_feature event, uint32_t pmc, uint32_t pmc_msr, uint32_t ctrl_msr, uint64_t ctrl_msr_value) { - wrmsr(pmc_msr, 0); + GUEST_TEST_EVENT(idx, event, pmc, pmc_msr, ctrl_msr, ctrl_msr_value, ""); - if (this_cpu_has(X86_FEATURE_CLFLUSHOPT)) - GUEST_MEASURE_EVENT(ctrl_msr, ctrl_msr_value, "clflushopt 1f"); - else if (this_cpu_has(X86_FEATURE_CLFLUSH)) - GUEST_MEASURE_EVENT(ctrl_msr, ctrl_msr_value, "clflush 1f"); - else - GUEST_MEASURE_EVENT(ctrl_msr, ctrl_msr_value, "nop"); - - guest_assert_event_count(idx, event, pmc, pmc_msr); + if (is_forced_emulation_enabled) + GUEST_TEST_EVENT(idx, event, pmc, pmc_msr, ctrl_msr, ctrl_msr_value, KVM_FEP); } #define X86_PMU_FEATURE_NULL \ @@ -553,6 +568,7 @@ int main(int argc, char *argv[]) kvm_pmu_version = kvm_cpu_property(X86_PROPERTY_PMU_VERSION); kvm_has_perf_caps = kvm_cpu_has(X86_FEATURE_PDCM); + is_forced_emulation_enabled = kvm_is_forced_emulation_enabled(); test_intel_counters(); From patchwork Fri Nov 10 02:13:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Christopherson X-Patchwork-Id: 163745 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b129:0:b0:403:3b70:6f57 with SMTP id q9csp837938vqs; Thu, 9 Nov 2023 18:16:42 -0800 (PST) X-Google-Smtp-Source: AGHT+IHpyUsvyP9VB1JvGhCJBDMJTVrYFFjShP0ak4Rx7Eb5mNBVCYipuJCT/Kt9vr2mkZTYRUjh X-Received: by 2002:a05:6a00:230d:b0:6c3:871a:7f0f with SMTP id h13-20020a056a00230d00b006c3871a7f0fmr7034408pfh.5.1699582602033; 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[23.128.96.37]) by mx.google.com with ESMTPS id e6-20020a62ee06000000b0068fba6a7375si15387196pfi.321.2023.11.09.18.16.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Nov 2023 18:16:42 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) client-ip=23.128.96.37; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=Zc2J2ZH1; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by snail.vger.email (Postfix) with ESMTP id 926D583B2029; Thu, 9 Nov 2023 18:16:00 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at snail.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345889AbjKJCPd (ORCPT + 30 others); Thu, 9 Nov 2023 21:15:33 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45162 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345899AbjKJCOy (ORCPT ); Thu, 9 Nov 2023 21:14:54 -0500 Received: from mail-pg1-x549.google.com (mail-pg1-x549.google.com [IPv6:2607:f8b0:4864:20::549]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7108F47AD for ; Thu, 9 Nov 2023 18:13:59 -0800 (PST) Received: by mail-pg1-x549.google.com with SMTP id 41be03b00d2f7-5be154fe98bso867802a12.0 for ; Thu, 09 Nov 2023 18:13:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1699582439; x=1700187239; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=vea+L5qfDMmA4c3KSY8Nr6t7qY/kdDKuIJUR/t/IBFw=; b=Zc2J2ZH1qpKtA1YEdrNCiRvIMuwRxfoHgTwcPWn6GdAniCPnEFXZYuT+lylNfxezPY 9s3YSiPHhGcQ4ml89co19KcXHbeAgivCWDg0V42e+8ALaRoB4bLnhtO3tj6Do2wjisCH ekq0B5+KGYHTY46WxDg7Luh6YXjCt/EU9h0mevUGGggziJxy0WbUTjSqy/vxY87TBXJZ vPrSasPQ9RaaoaI9Hq8S8/O3s4OejvdReeCRY6+hiRaxQZvBZo/MtsG0Ba26zyrXyLCe mFqvAHS8OnZfmEfulbl7ETTQpfbd0FFLpkqqkr2IOLf8VstII/0L5+bO5xrXQF/k+V8G RQkA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699582439; x=1700187239; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=vea+L5qfDMmA4c3KSY8Nr6t7qY/kdDKuIJUR/t/IBFw=; b=GTgubo2Phdj5RKJpvbp5lXPqQcbXCV0PeszWsdVyrldRTOzzIIk6CZpk2XtTOgmD0m 6hKaDBQaIl8VFjWy4+s9HuDcIf/ZN7DDxFZLA1Uo+YuCk3QR67XN7s81UFmGHqG092xS 9xfQBnCWnako/tqGRilM/k4iardkhYMQ1icciNIW2wphKIxUnIikI4zKYtK56DVqdP2B klOO7fWivXS4IdWElMHMPqZL4OKM/fOAOy6ZnCk40YhKaRU8U8Bque0L2nF56/0hwTN4 8OIPLS3ESs+96N3jsyaj2BsFAtDLpRxRg/3gzanaAtvk9CIvqvzGfRW8LWIeEgP2VbTm G3Mg== X-Gm-Message-State: AOJu0Yx8GEd7rcBI813D77NYApnOGKNBEd9t6CzH62MOZNwXfYHy/gZp J9WjfYeqHBrbxPQlm+sgrrbXKSBrCbI= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a17:90b:2291:b0:280:47ba:7685 with SMTP id kx17-20020a17090b229100b0028047ba7685mr339413pjb.0.1699582438954; Thu, 09 Nov 2023 18:13:58 -0800 (PST) Reply-To: Sean Christopherson Date: Thu, 9 Nov 2023 18:13:04 -0800 In-Reply-To: <20231110021306.1269082-1-seanjc@google.com> Mime-Version: 1.0 References: <20231110021306.1269082-1-seanjc@google.com> X-Mailer: git-send-email 2.42.0.869.gea05f2083d-goog Message-ID: <20231110021306.1269082-25-seanjc@google.com> Subject: [PATCH v8 24/26] KVM: selftests: Add a forced emulation variation of KVM_ASM_SAFE() From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Kan Liang , Dapeng Mi , Jim Mattson , Jinrong Liang , Aaron Lewis , Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Thu, 09 Nov 2023 18:16:00 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1782141526681668395 X-GMAIL-MSGID: 1782141526681668395 Add KVM_ASM_SAFE_FEP() to allow forcing emulation on an instruction that might fault. Note, KVM skips RIP past the FEP prefix before injecting an exception, i.e. the fixup needs to be on the instruction itself. Do not check for FEP support, that is firmly the responsibility of whatever code wants to use KVM_ASM_SAFE_FEP(). Sadly, chaining variadic arguments that contain commas doesn't work, thus the unfortunate amount of copy+paste. Signed-off-by: Sean Christopherson --- .../selftests/kvm/include/x86_64/processor.h | 30 +++++++++++++++++-- 1 file changed, 28 insertions(+), 2 deletions(-) diff --git a/tools/testing/selftests/kvm/include/x86_64/processor.h b/tools/testing/selftests/kvm/include/x86_64/processor.h index e5c383bd313b..e83b136ca15b 100644 --- a/tools/testing/selftests/kvm/include/x86_64/processor.h +++ b/tools/testing/selftests/kvm/include/x86_64/processor.h @@ -1153,16 +1153,19 @@ void vm_install_exception_handler(struct kvm_vm *vm, int vector, * r9 = exception vector (non-zero) * r10 = error code */ -#define KVM_ASM_SAFE(insn) \ +#define __KVM_ASM_SAFE(insn, fep) \ "mov $" __stringify(KVM_EXCEPTION_MAGIC) ", %%r9\n\t" \ "lea 1f(%%rip), %%r10\n\t" \ "lea 2f(%%rip), %%r11\n\t" \ - "1: " insn "\n\t" \ + fep "1: " insn "\n\t" \ "xor %%r9, %%r9\n\t" \ "2:\n\t" \ "mov %%r9b, %[vector]\n\t" \ "mov %%r10, %[error_code]\n\t" +#define KVM_ASM_SAFE(insn) __KVM_ASM_SAFE(insn, "") +#define KVM_ASM_SAFE_FEP(insn) __KVM_ASM_SAFE(insn, KVM_FEP) + #define KVM_ASM_SAFE_OUTPUTS(v, ec) [vector] "=qm"(v), [error_code] "=rm"(ec) #define KVM_ASM_SAFE_CLOBBERS "r9", "r10", "r11" @@ -1189,6 +1192,29 @@ void vm_install_exception_handler(struct kvm_vm *vm, int vector, vector; \ }) +#define kvm_asm_safe_fep(insn, inputs...) \ +({ \ + uint64_t ign_error_code; \ + uint8_t vector; \ + \ + asm volatile(KVM_ASM_SAFE(insn) \ + : KVM_ASM_SAFE_OUTPUTS(vector, ign_error_code) \ + : inputs \ + : KVM_ASM_SAFE_CLOBBERS); \ + vector; \ +}) + +#define kvm_asm_safe_ec_fep(insn, error_code, inputs...) \ +({ \ + uint8_t vector; \ + \ + asm volatile(KVM_ASM_SAFE_FEP(insn) \ + : KVM_ASM_SAFE_OUTPUTS(vector, error_code) \ + : inputs \ + : KVM_ASM_SAFE_CLOBBERS); \ + vector; \ +}) + static inline uint8_t rdmsr_safe(uint32_t msr, uint64_t *val) { uint64_t error_code; From patchwork Fri Nov 10 02:13:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Christopherson X-Patchwork-Id: 163748 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b129:0:b0:403:3b70:6f57 with SMTP id q9csp837997vqs; Thu, 9 Nov 2023 18:16:49 -0800 (PST) X-Google-Smtp-Source: AGHT+IH3fIu3wWYisLpq1gAB1U0AmhBo7m+P4guK/a+RB88csphYzFz8uS1YCBgk0YU7D6ynLCwU X-Received: by 2002:a17:902:cec9:b0:1cc:7ec0:bc8a with SMTP id d9-20020a170902cec900b001cc7ec0bc8amr8014958plg.66.1699582609454; Thu, 09 Nov 2023 18:16:49 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1699582609; cv=none; d=google.com; s=arc-20160816; b=zFs81mJMGeyqi9EuXU/LKCQJnDrLepMLiTkzUf/Ilp03bCcnlE+DrPqNzD4VhWOP7w hIP0HLrC9/Sjls7INwlaohjwAYfVrw1muKw5kWjMRxhRAM/ST16GLJzIu5XX3xMFd1KN cUDvbQLUG9x2snklrn0QaHtMOVVpUQR1Eg7OnxxpJZL2h0RyLniBeR7BdtXIbVpWmYRj JmzN0N+T92gyr2vT7WTaZDi8tBf6MuFx1Po7R3gemZ85gPNixVw9hu9DOOc2ebiTrraY LmVpqMMtDSTxmx0Qox/gq2XKgFPXAYYp7RA/itsVAQMGPAYc1WnxWgXrpYfi284jMSWy DhJQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:reply-to:dkim-signature; bh=eeEpHUJR4aSIdr4KeWYcEqsui8csxJQ9oememfgsBgo=; fh=gm96CM+cG0KJxn7vnhn0c1c98ILNP1HHUrKfrGecw3M=; b=u0QjV/ss61ACH7G9vpgoZojTk32QOsD/8eZ4CC2sGHLbp/1FKkfX8AupWPLUyrO82x hwqj0lRBV348QmJ9QHrWpb9svJ+O8EFdRZflrJp7G48yILPwqo2ByGxlSiBmPEea9+21 tppxltLmHA99VtLUsZkr2I7Zhl5XK6+mgsgQ7gOr/2p0L1ZdqSNJI704CDVISfOHNOzE FAlMsj2mw5XXaswk7hZptZR1JtF1OyIAdPM7bE3Rh94miGGojEijJKs31HqqZIN2cu8a MEYRwXGb6dBAIkKbpapH9QwsA9r588yneBfc8DcvRJyd3oz2r6+RLk8E1qJZL0RYI+rs K0Bw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=CYAlUniJ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.32 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from agentk.vger.email (agentk.vger.email. [23.128.96.32]) by mx.google.com with ESMTPS id l12-20020a170902d04c00b001c4743e4a60si5727048pll.197.2023.11.09.18.16.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Nov 2023 18:16:49 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.32 as permitted sender) client-ip=23.128.96.32; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=CYAlUniJ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.32 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by agentk.vger.email (Postfix) with ESMTP id 4143082B6AAC; Thu, 9 Nov 2023 18:16:40 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at agentk.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231624AbjKJCPg (ORCPT + 30 others); Thu, 9 Nov 2023 21:15:36 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45172 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234916AbjKJCOy (ORCPT ); Thu, 9 Nov 2023 21:14:54 -0500 Received: from mail-pl1-x64a.google.com (mail-pl1-x64a.google.com [IPv6:2607:f8b0:4864:20::64a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 57AEE47B2 for ; Thu, 9 Nov 2023 18:14:01 -0800 (PST) Received: by mail-pl1-x64a.google.com with SMTP id d9443c01a7336-1cc323b2aa3so15493985ad.3 for ; Thu, 09 Nov 2023 18:14:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1699582441; x=1700187241; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=eeEpHUJR4aSIdr4KeWYcEqsui8csxJQ9oememfgsBgo=; b=CYAlUniJJyd5oS9loxyK2HllttVfhxLg/R+cDtqV2F8Xz7Zjr3V9a1cP3XvlBVpa/y VPbzxG2Zi2heCHKRNSv5S87E6w/txUXRLx1+v0tlFxtCKHACOTAvS0TNbkVlaGtmshqT FSIg5hM6aI+DgPPbF8DuMm3iE+eC/763t0RF+gRA+lbTjAvSVYvBPdu+xiW6BjOaKAsy 8Or5koy7lP7s4YHB5VDriaCoNE7IQsrzv4+XxRI1dZ/u8LuCCleiYmJ84u0T5O5L8yYL +83n2klE8doJwk2r0IixUxnQg/T2XhyJjYfxa2AsDaRuHFhpVH1MFbuktnpHcrfrYbmR dmpw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699582441; x=1700187241; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=eeEpHUJR4aSIdr4KeWYcEqsui8csxJQ9oememfgsBgo=; b=VgLVM84FVraiCQCrbh1YGEznfOH8nNZVOBoa/Y7BQm5XzLHdKDNmYn66fT0OptYGoW PIQ2Axb3Rgw8tGuBZRxpgVeElbZmapGM8pUQoShvY4l00sBHnTNCY1blPQ7W1fSdwH9j t47Yx/N2NzUuETfVNVlRCi2cAG0Vq+It5OMnsK0ybyqMv/3Zsvu/HyEhL/ufas/2HDcv ExTtH62p7L0QiEfG/3Zni1895G0QX63mlWf2Vt0HOgUct7AY95DAWne1mEAFLGUsgmrH hIsCp9fwLaXvNMo3f2VlXd2Ndi/q8WTSLxDT1x2wNrcajO/Srk+mxpXdldHuZGjP7o71 h0QA== X-Gm-Message-State: AOJu0Yy688xB1F+RPBLLrVlAheL5yOXCKrdxCtUsuEnS5SJpKCWUGhBW zo3v7mRaBhEqjhBjFTymbJ9H1V3Uexo= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a17:902:efc1:b0:1cc:2bd6:b54a with SMTP id ja1-20020a170902efc100b001cc2bd6b54amr926859plb.10.1699582440858; Thu, 09 Nov 2023 18:14:00 -0800 (PST) Reply-To: Sean Christopherson Date: Thu, 9 Nov 2023 18:13:05 -0800 In-Reply-To: <20231110021306.1269082-1-seanjc@google.com> Mime-Version: 1.0 References: <20231110021306.1269082-1-seanjc@google.com> X-Mailer: git-send-email 2.42.0.869.gea05f2083d-goog Message-ID: <20231110021306.1269082-26-seanjc@google.com> Subject: [PATCH v8 25/26] KVM: selftests: Add helpers for safe and safe+forced RDMSR, RDPMC, and XGETBV From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Kan Liang , Dapeng Mi , Jim Mattson , Jinrong Liang , Aaron Lewis , Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (agentk.vger.email [0.0.0.0]); Thu, 09 Nov 2023 18:16:40 -0800 (PST) X-Spam-Status: No, score=-8.4 required=5.0 tests=DKIMWL_WL_MED,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE, USER_IN_DEF_DKIM_WL autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on agentk.vger.email X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1782141534390367563 X-GMAIL-MSGID: 1782141534390367563 Add helpers for safe and safe-with-forced-emulations versions of RDMSR, RDPMC, and XGETBV. Use macro shenanigans to eliminate the rather large amount of boilerplate needed to get values in and out of registers. Signed-off-by: Sean Christopherson --- .../selftests/kvm/include/x86_64/processor.h | 40 +++++++++++++------ 1 file changed, 27 insertions(+), 13 deletions(-) diff --git a/tools/testing/selftests/kvm/include/x86_64/processor.h b/tools/testing/selftests/kvm/include/x86_64/processor.h index e83b136ca15b..ba16d714b451 100644 --- a/tools/testing/selftests/kvm/include/x86_64/processor.h +++ b/tools/testing/selftests/kvm/include/x86_64/processor.h @@ -1215,21 +1215,35 @@ void vm_install_exception_handler(struct kvm_vm *vm, int vector, vector; \ }) -static inline uint8_t rdmsr_safe(uint32_t msr, uint64_t *val) -{ - uint64_t error_code; - uint8_t vector; - uint32_t a, d; - - asm volatile(KVM_ASM_SAFE("rdmsr") - : "=a"(a), "=d"(d), KVM_ASM_SAFE_OUTPUTS(vector, error_code) - : "c"(msr) - : KVM_ASM_SAFE_CLOBBERS); - - *val = (uint64_t)a | ((uint64_t)d << 32); - return vector; +#define BUILD_READ_U64_SAFE_HELPER(insn, _fep, _FEP) \ +static inline uint8_t insn##_safe ##_fep(uint32_t idx, uint64_t *val) \ +{ \ + uint64_t error_code; \ + uint8_t vector; \ + uint32_t a, d; \ + \ + asm volatile(KVM_ASM_SAFE##_FEP(#insn) \ + : "=a"(a), "=d"(d), \ + KVM_ASM_SAFE_OUTPUTS(vector, error_code) \ + : "c"(idx) \ + : KVM_ASM_SAFE_CLOBBERS); \ + \ + *val = (uint64_t)a | ((uint64_t)d << 32); \ + return vector; \ } +/* + * Generate {insn}_safe() and {insn}_safe_fep() helpers for instructions that + * use ECX as in input index, and EDX:EAX as a 64-bit output. + */ +#define BUILD_READ_U64_SAFE_HELPERS(insn) \ + BUILD_READ_U64_SAFE_HELPER(insn, , ) \ + BUILD_READ_U64_SAFE_HELPER(insn, _fep, _FEP) \ + +BUILD_READ_U64_SAFE_HELPERS(rdmsr) +BUILD_READ_U64_SAFE_HELPERS(rdpmc) +BUILD_READ_U64_SAFE_HELPERS(xgetbv) + static inline uint8_t wrmsr_safe(uint32_t msr, uint64_t val) { return kvm_asm_safe("wrmsr", "a"(val & -1u), "d"(val >> 32), "c"(msr)); From patchwork Fri Nov 10 02:13:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Christopherson X-Patchwork-Id: 163746 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b129:0:b0:403:3b70:6f57 with SMTP id q9csp837943vqs; Thu, 9 Nov 2023 18:16:43 -0800 (PST) X-Google-Smtp-Source: AGHT+IF0XKocAOq7roPjPPZ53/+nIG8jKpMRfh9hwgU0SPmsOCbf9TGfwawEE+YjKunCnTvZSvl1 X-Received: by 2002:a05:6a20:8419:b0:16b:d3d5:a5c5 with SMTP id c25-20020a056a20841900b0016bd3d5a5c5mr8471122pzd.52.1699582602729; Thu, 09 Nov 2023 18:16:42 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1699582602; cv=none; d=google.com; s=arc-20160816; b=yU32f/5ID7zUtRrTMgR0KbOGq8E5QoNxQawsUR9Ea+wQT9M2x8UNImvo2IjSteHutL Udir50fDTylqTsTiDuOCVLYo7qL7bQmvBca1wq+N+G65NgKp2iurxy9kmZ+wIXTxBPR3 sMGWYDLv9F9GzPM+7EKn7nrjjOsp/cH7zNJZsJVeNw+Xn7sY/QcLDYXs1R/T7rjenmmf UtEBbxmziHCYpQ5OTlDYIfuZI8HCA4HjNjf97baMfmTXPgmlp2Mho9UHrO+HppTlvAhD ExAVUy5+D/Mv7VJPqvEz3oSI8iw0hfA5/Niv0fWv2JU2Xc2KfIbOLFLGg2GFWXlf6bsf wF/A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:reply-to:dkim-signature; bh=HhKpd1SrztABGm/U/aQBO8MgOdSjtPm1/FH+XbVpKsc=; fh=gm96CM+cG0KJxn7vnhn0c1c98ILNP1HHUrKfrGecw3M=; b=ztbrkYTL88bbV/BkCYFScfNcTEBBPI2smm8cOk6yNaBUXtzROIlaKmP4oU9/vo3bKB HCXH5/xfEnOFioWw+zlnrzl7ou9AlLten4kK8G8JztGOk/XULmLie8FYv/wqU5Q6Ee7I +49Zh6L4N9xdCGKCGc2epp9g5/Cml+uSFlMenVLiJKKyJK3fk/jgVnskfGTv/QISLLi1 brcYM4GtRXr0UhadIphqzVSbjUc1D3NlTwkoQOe3z9He8fI5nD6ZENlt9jkCqwz/rJSc BbEO9BS35XmuK4gECNjTfhlcMZnPhmrYLQrm2ypUe4r9zRTV6KWUyf6toYpEQg13okIe Amjg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=m4jnRaPO; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from snail.vger.email (snail.vger.email. [23.128.96.37]) by mx.google.com with ESMTPS id lx5-20020a17090b4b0500b002810ae70420si3469829pjb.121.2023.11.09.18.16.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Nov 2023 18:16:42 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) client-ip=23.128.96.37; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=m4jnRaPO; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by snail.vger.email (Postfix) with ESMTP id B411783B0274; Thu, 9 Nov 2023 18:16:06 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at snail.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345927AbjKJCPl (ORCPT + 30 others); Thu, 9 Nov 2023 21:15:41 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45318 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345817AbjKJCO4 (ORCPT ); Thu, 9 Nov 2023 21:14:56 -0500 Received: from mail-yb1-xb4a.google.com (mail-yb1-xb4a.google.com [IPv6:2607:f8b0:4864:20::b4a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DF99E46A3 for ; Thu, 9 Nov 2023 18:14:03 -0800 (PST) Received: by mail-yb1-xb4a.google.com with SMTP id 3f1490d57ef6-da03390793fso1867984276.3 for ; Thu, 09 Nov 2023 18:14:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1699582443; x=1700187243; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=HhKpd1SrztABGm/U/aQBO8MgOdSjtPm1/FH+XbVpKsc=; b=m4jnRaPOMa1ghC1NR+EN38TtemHSytDQX+0OzCHCThb+07voZlaL/nZ7za+Bd1r/o4 HTDQAIwyrWA119M8RRfkacyCgiChaAPlQvm4D/NCU7ETDv3zjsO8Cqyhb2Tb7D+fLQ8m v3l7ASGhlRagf7Xr3CFNsgs3T0A/bkqf+/oOTu9GHvdUvBga3ldZMzH63ZBHXsJ7NGRs UXtuBPs8QdbteWHMR61ri8fsL6+eQ9r+0v+ndesv5+1nfavXQkVYcCt9GMKloYz/mgOq UdTWpqyDSEcH6a67BqGOxVctB9vBUc46IIu3FAmmapy7nvWrfeGV2oNtfgCFieSPVKVd LeyQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699582443; x=1700187243; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=HhKpd1SrztABGm/U/aQBO8MgOdSjtPm1/FH+XbVpKsc=; b=MGWrJu9HnbjZiFLdcA4k/aaLPdps1ByRjCOGIAQawMGNVU2hzRgdXk7l6Aq68v3jFJ 991MYMXG8BFu6vyQ0vifq1JUCH99e+0theDPKceUmYDJQ6daPfQrLnOIalCX6m/pKd6G ypZpWSGAFvewu5ixAiiMPVONk1POTCmlo1yVATcjJ6jdeCLSYv0tvHVtmq/vMS4VRDco +6E5b5bEkE9ePsUHRledCoxOo2xCAzKCYAVcACx0xVHAS2AhlaHcWNYqaSwd+Z9wVyGG M56hWPB836fXHuoU37vYpFPWbwvU6vF8i6iCVDD3zDpMgUDvaGhGP4sKcAO0blwISfVD gf7g== X-Gm-Message-State: AOJu0YweMf/M0OvM6Xvq/LHQi3QLfleMPLr0b2woDy2LBEwpP+CWNWRb 1jXT+iEMMP80/6hCSI2IdFZ8TlUXhaI= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a05:6902:1366:b0:dae:49a3:ae23 with SMTP id bt6-20020a056902136600b00dae49a3ae23mr179118ybb.7.1699582443106; Thu, 09 Nov 2023 18:14:03 -0800 (PST) Reply-To: Sean Christopherson Date: Thu, 9 Nov 2023 18:13:06 -0800 In-Reply-To: <20231110021306.1269082-1-seanjc@google.com> Mime-Version: 1.0 References: <20231110021306.1269082-1-seanjc@google.com> X-Mailer: git-send-email 2.42.0.869.gea05f2083d-goog Message-ID: <20231110021306.1269082-27-seanjc@google.com> Subject: [PATCH v8 26/26] KVM: selftests: Extend PMU counters test to validate RDPMC after WRMSR From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Kan Liang , Dapeng Mi , Jim Mattson , Jinrong Liang , Aaron Lewis , Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Thu, 09 Nov 2023 18:16:06 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1782141526976838395 X-GMAIL-MSGID: 1782141526976838395 Extend the read/write PMU counters subtest to verify that RDPMC also reads back the written value. Opportunsitically verify that attempting to use the "fast" mode of RDPMC fails, as the "fast" flag is only supported by non-architectural PMUs, which KVM doesn't virtualize. Signed-off-by: Sean Christopherson --- .../selftests/kvm/x86_64/pmu_counters_test.c | 31 +++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c b/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c index cb808ac827ba..248ebe8c0577 100644 --- a/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c +++ b/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c @@ -328,6 +328,7 @@ __GUEST_ASSERT(expect_gp ? vector == GP_VECTOR : !vector, \ static void guest_rd_wr_counters(uint32_t base_msr, uint8_t nr_possible_counters, uint8_t nr_counters, uint32_t or_mask) { + const bool pmu_has_fast_mode = !guest_get_pmu_version(); uint8_t i; for (i = 0; i < nr_possible_counters; i++) { @@ -352,6 +353,7 @@ static void guest_rd_wr_counters(uint32_t base_msr, uint8_t nr_possible_counters const uint64_t expected_val = expect_success ? test_val : 0; const bool expect_gp = !expect_success && msr != MSR_P6_PERFCTR0 && msr != MSR_P6_PERFCTR1; + uint32_t rdpmc_idx; uint8_t vector; uint64_t val; @@ -365,6 +367,35 @@ static void guest_rd_wr_counters(uint32_t base_msr, uint8_t nr_possible_counters if (!expect_gp) GUEST_ASSERT_PMC_VALUE(RDMSR, msr, val, expected_val); + rdpmc_idx = i; + if (base_msr == MSR_CORE_PERF_FIXED_CTR0) + rdpmc_idx |= INTEL_RDPMC_FIXED; + + /* Redo the read tests with RDPMC, and with forced emulation. */ + vector = rdpmc_safe(rdpmc_idx, &val); + GUEST_ASSERT_PMC_MSR_ACCESS(RDPMC, rdpmc_idx, !expect_success, vector); + if (expect_success) + GUEST_ASSERT_PMC_VALUE(RDPMC, rdpmc_idx, val, expected_val); + + vector = rdpmc_safe_fep(rdpmc_idx, &val); + GUEST_ASSERT_PMC_MSR_ACCESS(RDPMC, rdpmc_idx, !expect_success, vector); + if (expect_success) + GUEST_ASSERT_PMC_VALUE(RDPMC, rdpmc_idx, val, expected_val); + + /* + * KVM doesn't support non-architectural PMUs, i.e. it should + * impossible to have fast mode RDPMC. Verify that attempting + * to use fast RDPMC always #GPs. + */ + GUEST_ASSERT(!expect_success || !pmu_has_fast_mode); + rdpmc_idx |= INTEL_RDPMC_FAST; + + vector = rdpmc_safe(rdpmc_idx, &val); + GUEST_ASSERT_PMC_MSR_ACCESS(RDPMC, rdpmc_idx, true, vector); + + vector = rdpmc_safe_fep(rdpmc_idx, &val); + GUEST_ASSERT_PMC_MSR_ACCESS(RDPMC, rdpmc_idx, true, vector); + vector = wrmsr_safe(msr, 0); GUEST_ASSERT_PMC_MSR_ACCESS(WRMSR, msr, expect_gp, vector); }