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[93.42.71.18]) by smtp.googlemail.com with ESMTPSA id z14-20020adff74e000000b0022cdb687bf9sm14130285wrp.0.2022.11.08.16.56.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Nov 2022 16:56:35 -0800 (PST) From: Christian Marangi To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Michael Turquette , Stephen Boyd , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Christian Marangi Subject: [PATCH 1/5] clk: qcom: krait-cc: fix wrong parent order for secondary mux Date: Wed, 9 Nov 2022 01:56:27 +0100 Message-Id: <20221109005631.3189-1-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.37.2 MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748978036895499412?= X-GMAIL-MSGID: =?utf-8?q?1748978036895499412?= The secondary mux parent order is swapped. This currently doesn't cause problems as the secondary mux is used for idle clk and as a safe clk source while reprogramming the hfpll. Each mux have 2 or more output but he always have a safe source to switch while reprogramming the connected pll. We use a clk notifier to switch to the correct parent before clk core can apply the correct rate. The parent to switch is hardcoded in the mux struct. For the secondary mux the safe source to use is the qsb parent as it's the only fixed clk as the acpus_aux is a pll that can source from pxo or from pll8. The hardcoded safe parent for the secondary mux is set to index 0 that in the secondary mux map is set to 2. But the index 0 is actually acpu_aux in the parent list. Fix the swapped parents to correctly handle idle frequency and output a sane clk_summary report. Signed-off-by: Christian Marangi --- drivers/clk/qcom/krait-cc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/qcom/krait-cc.c b/drivers/clk/qcom/krait-cc.c index cfd961d5cc45..c2a261cfeb6a 100644 --- a/drivers/clk/qcom/krait-cc.c +++ b/drivers/clk/qcom/krait-cc.c @@ -116,8 +116,8 @@ krait_add_sec_mux(struct device *dev, int id, const char *s, int ret; struct krait_mux_clk *mux; static const char *sec_mux_list[] = { - "acpu_aux", "qsb", + "acpu_aux", }; struct clk_init_data init = { .parent_names = sec_mux_list, From patchwork Wed Nov 9 00:56:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 17300 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp68328wru; Tue, 8 Nov 2022 17:05:35 -0800 (PST) X-Google-Smtp-Source: AMsMyM5aDHtKJeRXolwP0NoCwRLC7pPnJNqXmw9JxM60BOdamVjbGggAPs9WXhARpGAmAAKrWv/J X-Received: by 2002:a05:6a00:248e:b0:56e:ad31:b976 with SMTP id c14-20020a056a00248e00b0056ead31b976mr23118603pfv.51.1667955934982; Tue, 08 Nov 2022 17:05:34 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1667955934; cv=none; d=google.com; s=arc-20160816; b=y4uLoepBwQZaGsMQtKl6r2nfMXYvYNJit3c0iksMlZCkyLwROPAcWX6ZXRxL7ruUgu D+lXFV8fVDDPQFo0iihKueBWvqU2/ei70dFT0grJKS/GC8MLwePY8xXVK6IPtGqXqB98 ggA9xL1iFZNrUlCKEb7JAjteaQuTrKe09I895hAOVbwuKh/2Y1DM3RRkDj4uQWGRBYzU Rb7OEUG6TwHDOZY9OCkpiWxf5wm4/IO1q88lG1mEYGeLgtmdOk6s0P/EQaFdaOxs7jFZ G5uhfH8yj9FsmmJRtlm9kiDO+77hFvPQuaMrAw2NnfSEpppw4IzWV3QlT6wmk6Mlproq TASA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=vb5gpABVn01LzpmtL4kWa1L/Tu5YX24/NkCX3qOrieg=; b=NCm0eDxT6Q13h46AC8/KMEIfZti3hE31Q7MFzTQKKRsiT2qhm/OuWhM9LoLkejFP0G MURGgPQPTBqnBZRnQaqacFUoq1I90PmBeZKZTh392v2MC4rp7bKArGhmbn4yJJllAvh2 aW1eUizI5HrRcRj7Rai/b2v5QuLK8yLhNNo5+Snk6BRXY1zNEtJIfB15K/pMMM7bJ/Wo 7r2u6ViF6K2/VqbAbwd7yCTF6oJBgFtLWEjpHthwp083DyA+4lWC/47C6CHYV3Eqk+o5 k15rBJkBEphq2fyklNnMbhC6wZ9tkK61GlegI3YU/mlYA+edQNCdVIwaE5n3c/qomrXl 6vHA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20210112 header.b=i9ZhUFUH; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: from out1.vger.email (out1.vger.email. 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[93.42.71.18]) by smtp.googlemail.com with ESMTPSA id z14-20020adff74e000000b0022cdb687bf9sm14130285wrp.0.2022.11.08.16.56.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Nov 2022 16:56:37 -0800 (PST) From: Christian Marangi To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Michael Turquette , Stephen Boyd , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Christian Marangi Subject: [PATCH 2/5] clk: qcom: krait-cc: also enable secondary mux and div clk Date: Wed, 9 Nov 2022 01:56:28 +0100 Message-Id: <20221109005631.3189-2-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20221109005631.3189-1-ansuelsmth@gmail.com> References: <20221109005631.3189-1-ansuelsmth@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748978562307422206?= X-GMAIL-MSGID: =?utf-8?q?1748978562307422206?= clk-krait ignore any rate change if clk is not flagged as enabled. Correctly enable the secondary mux and div clk to correctly change rate instead of silently ignoring the request. Signed-off-by: Christian Marangi --- drivers/clk/qcom/krait-cc.c | 21 ++++++++++++++++++++- 1 file changed, 20 insertions(+), 1 deletion(-) diff --git a/drivers/clk/qcom/krait-cc.c b/drivers/clk/qcom/krait-cc.c index c2a261cfeb6a..0e497e69e3e3 100644 --- a/drivers/clk/qcom/krait-cc.c +++ b/drivers/clk/qcom/krait-cc.c @@ -80,6 +80,7 @@ krait_add_div(struct device *dev, int id, const char *s, unsigned int offset) }; const char *p_names[1]; struct clk *clk; + int cpu; div = devm_kzalloc(dev, sizeof(*div), GFP_KERNEL); if (!div) @@ -103,6 +104,17 @@ krait_add_div(struct device *dev, int id, const char *s, unsigned int offset) } clk = devm_clk_register(dev, &div->hw); + if (IS_ERR(clk)) + goto err; + + /* clk-krait ignore any rate change if mux is not flagged as enabled */ + if (id < 0) + for_each_online_cpu(cpu) + clk_prepare_enable(div->hw.clk); + else + clk_prepare_enable(div->hw.clk); + +err: kfree(p_names[0]); kfree(init.name); @@ -113,7 +125,7 @@ static int krait_add_sec_mux(struct device *dev, int id, const char *s, unsigned int offset, bool unique_aux) { - int ret; + int cpu, ret; struct krait_mux_clk *mux; static const char *sec_mux_list[] = { "qsb", @@ -165,6 +177,13 @@ krait_add_sec_mux(struct device *dev, int id, const char *s, if (ret) goto unique_aux; + /* clk-krait ignore any rate change if mux is not flagged as enabled */ + if (id < 0) + for_each_online_cpu(cpu) + clk_prepare_enable(mux->hw.clk); + else + clk_prepare_enable(mux->hw.clk); + unique_aux: if (unique_aux) kfree(sec_mux_list[0]); From patchwork Wed Nov 9 00:56:29 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 17298 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp65398wru; Tue, 8 Nov 2022 16:59:12 -0800 (PST) X-Google-Smtp-Source: AMsMyM4CIbsHEdQbqA6ASmqYpP2nb8JANoLHUPWHwDBvrDE5MydxmjKYB1WabvOxN8l3pHenWVHi X-Received: by 2002:a63:fd57:0:b0:43c:9a42:74fb with SMTP id m23-20020a63fd57000000b0043c9a4274fbmr49400311pgj.174.1667955551978; Tue, 08 Nov 2022 16:59:11 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1667955551; cv=none; d=google.com; s=arc-20160816; b=G166jbgIzBSm2SYLr+v03i0fOsTEdKwO4aCS6Lxnd53PJzdB4+t6uHi4ZRR/e0b5cA IV6/8/KwKzzIakRI4sQnOew1zSMfmsG2UTsZSPDy94DrAR7BSa6OlQ9/S4xlJ4do5EGh WoTR2Z7vXxCvG922zRdV2L3t0FR9VX5UCKcYoVblJ2VfBuJ6z5mKxDm1Pp0/+U8iE2Rv f2V8seZmyZDjKAOWYVLiZXbto5aorq8nAA5Jhz/AtRovnEd6RxkYhSU/UynEFtHbLBQ9 KTHJiZgis+G0wKj3X8vKH2HkFE2dYFVfDUCcILhLeD/9qyDcUXYN3/7U0kTViUaSyvDW R//Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=nKH2DEqi/WyS0Gp7MHojWp9fGOlGca/3PwJ9fijM8Dk=; b=GvfjMi6s7ZuqblDGc3YG5JdyTqxRLcLci1qTr2h+SIliTXIKNni/P4kioE1vF8Vaf2 8athA8dool8ShOrc8Jaim7vjwdOE6HufEPOFb650l0KRdQGny/VwdUowQ3B6VcqfBDTv /BG0Wkh/AmK8o9jMXN3RG3nIhTpdY7ESnvekR/9/DQDh+aL7vX4Bsgr3W68NAPdeIJEU UpGknR+ohJUQ6fYkXvPp5WNpar/malU/F87cyuKQu2lFgkMamjk7MOeQEfi5GlAyDcfG hDNGn3aGw6PUO/DK1CpAOBy72uXHzEUgUInsk9tSPriatfzTcT7jsDeJ3ICeDylr+dlt bhFw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20210112 header.b=pTtMClNH; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: from out1.vger.email (out1.vger.email. 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[93.42.71.18]) by smtp.googlemail.com with ESMTPSA id z14-20020adff74e000000b0022cdb687bf9sm14130285wrp.0.2022.11.08.16.56.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Nov 2022 16:56:38 -0800 (PST) From: Christian Marangi To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Michael Turquette , Stephen Boyd , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Christian Marangi Subject: [PATCH 3/5] clk: qcom: krait-cc: handle secondary mux sourcing out of acpu_aux Date: Wed, 9 Nov 2022 01:56:29 +0100 Message-Id: <20221109005631.3189-3-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20221109005631.3189-1-ansuelsmth@gmail.com> References: <20221109005631.3189-1-ansuelsmth@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748978160960220168?= X-GMAIL-MSGID: =?utf-8?q?1748978160960220168?= Some bootloader may leave the system in an even more undefined state with the secondary mux of L2 or other cores sourcing out of the acpu_aux parent. This results in the clk set to the PXO rate or a PLL8 rate. The current logic to reset the mux and set them to a defined state only handle if the mux are configured to source out of QSB. Change this and force a new and defined state if the current clk is lower than the aux rate. This way we can handle any wrong configuration where the mux is sourcing out of QSB (rate 225MHz, currently set to a virtual rate of 1), PXO rate (rate 25MHz) or PLL8 (needs to be configured to run at 384Mhz). Signed-off-by: Christian Marangi --- drivers/clk/qcom/krait-cc.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/clk/qcom/krait-cc.c b/drivers/clk/qcom/krait-cc.c index 0e497e69e3e3..17bf39076830 100644 --- a/drivers/clk/qcom/krait-cc.c +++ b/drivers/clk/qcom/krait-cc.c @@ -383,8 +383,8 @@ static int krait_cc_probe(struct platform_device *pdev) */ cur_rate = clk_get_rate(l2_pri_mux_clk); aux_rate = 384000000; - if (cur_rate == 1) { - pr_info("L2 @ QSB rate. Forcing new rate.\n"); + if (cur_rate < aux_rate) { + pr_info("L2 @ Undefined rate. Forcing new rate.\n"); cur_rate = aux_rate; } clk_set_rate(l2_pri_mux_clk, aux_rate); @@ -394,8 +394,8 @@ static int krait_cc_probe(struct platform_device *pdev) for_each_possible_cpu(cpu) { clk = clks[cpu]; cur_rate = clk_get_rate(clk); - if (cur_rate == 1) { - pr_info("CPU%d @ QSB rate. Forcing new rate.\n", cpu); + if (cur_rate < aux_rate) { + pr_info("CPU%d @ Undefined rate. Forcing new rate.\n", cpu); cur_rate = aux_rate; } From patchwork Wed Nov 9 00:56:30 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 17297 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp65034wru; Tue, 8 Nov 2022 16:57:50 -0800 (PST) X-Google-Smtp-Source: AMsMyM6YYU/xgsjvjHqRkb3GabwlXn6vXN9FhNyFxYDj2svV80rAL6ewvzZ5E+aPp7J/wMUJKC1R X-Received: by 2002:a17:903:2442:b0:186:ef89:7b41 with SMTP id l2-20020a170903244200b00186ef897b41mr57524523pls.164.1667955469880; Tue, 08 Nov 2022 16:57:49 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1667955469; cv=none; d=google.com; s=arc-20160816; b=tq7SpCpHuNnGxEgRpkHKcdoimb0rWDGgFs3TtsvNOLMeyTEPwP3StyTnNbLApUVPHN MBUUjlICd2wMmD/YmLDB5VLtOT/B8AgJY0sH8STQN6w1YO25Hs908T51aanHO/BZyFEt mr6vyg0UXeN0X49dmJ+dQiYeYnK9opZGAcco9cuCODnT5/J0hzge9jaP9aBxnnpG3Ysb hVDV9XFgUQ/1IREucvar62g7hl+kVnOUB8EHSzgxFLNxhApxnWnHWH0iNRqlmKUslIJ6 CDXRmfnXZj8D3/3DxPWeGHDiHThUjXsruolnY+6/ED1KQeMXylsMb6FenNhnOZd0RiBT 1A5A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=tVPpA4RQ1p5rJwkA8HPIAk7M05A9PwrvQZVEWuO/aN8=; b=FZ82S18xqjBL7a8yFiL50tz2clPqw1xinJ2qdcpkJOi5q7268LDfKwSiI9MFHcWH+a y3DNGnilEXPKG1nBemhVXMtf7QswnUPIajPAACxt6XvY0xqlWpCK12z48qanMcIzvE+N kL6jZJ8c3O6B+/mxCqOimL9Qg2Bge7FMPnba6OiRDYR694DeVO3vYbRtpk/gHOrExqbD sXfjgaOxYjidaG6laxHowzxf0a6lYtrZNVShN2iXMomH/XtKV+G1zT5n4xs9BXcGYN+D Y5gvl5M6UvIYE1c5VgxyV25rAQcRSTtiFluAHQDZjXdrtwAyHvVotkdbKYGLPpHlIIog F8Eg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20210112 header.b=LpBTxYKG; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: from out1.vger.email (out1.vger.email. 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[93.42.71.18]) by smtp.googlemail.com with ESMTPSA id z14-20020adff74e000000b0022cdb687bf9sm14130285wrp.0.2022.11.08.16.56.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Nov 2022 16:56:39 -0800 (PST) From: Christian Marangi To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Michael Turquette , Stephen Boyd , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Christian Marangi Subject: [PATCH 4/5] clk: qcom: krait-cc: convert to devm_clk_hw_register Date: Wed, 9 Nov 2022 01:56:30 +0100 Message-Id: <20221109005631.3189-4-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20221109005631.3189-1-ansuelsmth@gmail.com> References: <20221109005631.3189-1-ansuelsmth@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748978074974254541?= X-GMAIL-MSGID: =?utf-8?q?1748978074974254541?= clk_register is now deprecated. Convert the driver to devm_clk_hw_register. Signed-off-by: Christian Marangi --- drivers/clk/qcom/krait-cc.c | 31 +++++++++++++++++++------------ 1 file changed, 19 insertions(+), 12 deletions(-) diff --git a/drivers/clk/qcom/krait-cc.c b/drivers/clk/qcom/krait-cc.c index 17bf39076830..63322cb38aa8 100644 --- a/drivers/clk/qcom/krait-cc.c +++ b/drivers/clk/qcom/krait-cc.c @@ -79,8 +79,7 @@ krait_add_div(struct device *dev, int id, const char *s, unsigned int offset) .flags = CLK_SET_RATE_PARENT, }; const char *p_names[1]; - struct clk *clk; - int cpu; + int cpu, ret; div = devm_kzalloc(dev, sizeof(*div), GFP_KERNEL); if (!div) @@ -103,8 +102,8 @@ krait_add_div(struct device *dev, int id, const char *s, unsigned int offset) return -ENOMEM; } - clk = devm_clk_register(dev, &div->hw); - if (IS_ERR(clk)) + ret = devm_clk_hw_register(dev, &div->hw); + if (ret) goto err; /* clk-krait ignore any rate change if mux is not flagged as enabled */ @@ -118,7 +117,7 @@ krait_add_div(struct device *dev, int id, const char *s, unsigned int offset) kfree(p_names[0]); kfree(init.name); - return PTR_ERR_OR_ZERO(clk); + return ret; } static int @@ -137,7 +136,6 @@ krait_add_sec_mux(struct device *dev, int id, const char *s, .ops = &krait_mux_clk_ops, .flags = CLK_SET_RATE_PARENT, }; - struct clk *clk; mux = devm_kzalloc(dev, sizeof(*mux), GFP_KERNEL); if (!mux) @@ -166,14 +164,16 @@ krait_add_sec_mux(struct device *dev, int id, const char *s, if (unique_aux) { sec_mux_list[0] = kasprintf(GFP_KERNEL, "acpu%s_aux", s); if (!sec_mux_list[0]) { - clk = ERR_PTR(-ENOMEM); + ret = -ENOMEM; goto err_aux; } } - clk = devm_clk_register(dev, &mux->hw); + ret = devm_clk_hw_register(dev, &mux->hw); + if (ret) + goto unique_aux; - ret = krait_notifier_register(dev, clk, mux); + ret = krait_notifier_register(dev, mux->hw.clk, mux); if (ret) goto unique_aux; @@ -189,7 +189,7 @@ krait_add_sec_mux(struct device *dev, int id, const char *s, kfree(sec_mux_list[0]); err_aux: kfree(init.name); - return PTR_ERR_OR_ZERO(clk); + return ret; } static struct clk * @@ -241,11 +241,18 @@ krait_add_pri_mux(struct device *dev, int id, const char *s, goto err_p2; } - clk = devm_clk_register(dev, &mux->hw); + ret = devm_clk_hw_register(dev, &mux->hw); + if (ret) { + clk = ERR_PTR(ret); + goto err_p3; + } + + clk = mux->hw.clk; ret = krait_notifier_register(dev, clk, mux); if (ret) - goto err_p3; + clk = ERR_PTR(ret); + err_p3: kfree(p_names[2]); err_p2: From patchwork Wed Nov 9 00:56:31 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 17299 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp65614wru; Tue, 8 Nov 2022 16:59:52 -0800 (PST) X-Google-Smtp-Source: AMsMyM4UfrxRdZYBOUnkx110DBv1QMg860eLdYJvuoFOkxhw78SYR8myeooSVuD5sd6SGS7XGeOL X-Received: by 2002:a17:902:d511:b0:186:ae37:c041 with SMTP id b17-20020a170902d51100b00186ae37c041mr59831441plg.14.1667955591749; Tue, 08 Nov 2022 16:59:51 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1667955591; cv=none; d=google.com; s=arc-20160816; b=uOMpzQ1Cw0DDm5/JtUUISvBSoGXbPzmlVAG1lE1xK83ihMRTd0RRj2GkY1RgjzWAlL qS5fw+cwuY04Y6pfXOmJhhr7XzYT+fSfD/ubjigNubCSXF34lz3Dua5eI3rgOtNHwVgz uMWy0EwwTRekZ3U4aWmXvvH0nOOwEjJMBbq4mwsNCNYKnI6PwiSoX0qeamfr3hIOObki UGQzICMYiI11bNeex3qP3gyvETO+T3iPkBn5pKW30k0s/eC9ZE5Ony6O9qi1VNSkEv2A 73flehD65eEnY/j3m6m2zZiR8en9bMAL7yCuq0sSZsmg+eUWhbvM43RE3zrdq+R+kBFi W3ag== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=MLJFXJ9wFjgZ8dt+15qgCZ9/qEqxsRiMINkokB1vgY4=; b=JgplV7/JbDGJ5NWUmB0dMZP8zH3ig/Pv3Z7C8yQBboXFDw7Ph1j1nblJgItzfB9Lyx R9ki7txAEf57Bqu37NUV2HTlLw/MVMaC6WzdDh9CPoEum21xdGZIm6bq7Z+wFPKH4WT9 2WfGGXfXhbiHoXQMBYixu77177gy5NQZhEVBDgaGXXi5LQ7ti/YnQWNybdX38/jDI8uF YKUMX7BO5u3ln9QuLqU8t7/OZXEq4dMQXudDReBpq4c2s22wK7Gq/hp4HQo7qd6Dh+W7 JS+xCECYzoFQUFXjUljmOD4Fb1r0+qI+dZDmh9Xbheoeh/BTagsLJoM+chQITZXq3nrb cC2Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20210112 header.b=Uj2AXKFi; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: from out1.vger.email (out1.vger.email. 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[93.42.71.18]) by smtp.googlemail.com with ESMTPSA id z14-20020adff74e000000b0022cdb687bf9sm14130285wrp.0.2022.11.08.16.56.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Nov 2022 16:56:40 -0800 (PST) From: Christian Marangi To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Michael Turquette , Stephen Boyd , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Christian Marangi Subject: [PATCH 5/5] clk: qcom: krait-cc: convert to parent_data API Date: Wed, 9 Nov 2022 01:56:31 +0100 Message-Id: <20221109005631.3189-5-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20221109005631.3189-1-ansuelsmth@gmail.com> References: <20221109005631.3189-1-ansuelsmth@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748978202534388821?= X-GMAIL-MSGID: =?utf-8?q?1748978202534388821?= Modernize the krait-cc driver to parent-data API and refactor to drop any use of parent_names. From Documentation all the required clocks should be declared in DTS so fw_name can be correctly used to get the parents for all the muxes. .name is also declared to save compatibility with old DT. While at it also drop some hardcoded index and introduce an enum to make index values more clear. Signed-off-by: Christian Marangi --- drivers/clk/qcom/krait-cc.c | 202 ++++++++++++++++++++---------------- 1 file changed, 112 insertions(+), 90 deletions(-) diff --git a/drivers/clk/qcom/krait-cc.c b/drivers/clk/qcom/krait-cc.c index 63322cb38aa8..0a15da568156 100644 --- a/drivers/clk/qcom/krait-cc.c +++ b/drivers/clk/qcom/krait-cc.c @@ -15,6 +15,16 @@ #include "clk-krait.h" +enum { + cpu0_mux = 0, + cpu1_mux, + cpu2_mux, + cpu3_mux, + l2_mux, + + clks_max, +}; + static unsigned int sec_mux_map[] = { 2, 0, @@ -69,21 +79,23 @@ static int krait_notifier_register(struct device *dev, struct clk *clk, return ret; } -static int +static struct clk_hw * krait_add_div(struct device *dev, int id, const char *s, unsigned int offset) { struct krait_div2_clk *div; + static struct clk_parent_data p_data[1]; struct clk_init_data init = { - .num_parents = 1, + .num_parents = ARRAY_SIZE(p_data), .ops = &krait_div2_clk_ops, .flags = CLK_SET_RATE_PARENT, }; - const char *p_names[1]; + struct clk_hw *clk; + char *parent_name; int cpu, ret; div = devm_kzalloc(dev, sizeof(*div), GFP_KERNEL); if (!div) - return -ENOMEM; + return ERR_PTR(-ENOMEM); div->width = 2; div->shift = 6; @@ -93,18 +105,25 @@ krait_add_div(struct device *dev, int id, const char *s, unsigned int offset) init.name = kasprintf(GFP_KERNEL, "hfpll%s_div", s); if (!init.name) - return -ENOMEM; + return ERR_PTR(-ENOMEM); - init.parent_names = p_names; - p_names[0] = kasprintf(GFP_KERNEL, "hfpll%s", s); - if (!p_names[0]) { - kfree(init.name); - return -ENOMEM; + init.parent_data = p_data; + parent_name = kasprintf(GFP_KERNEL, "hfpll%s", s); + if (!parent_name) { + clk = ERR_PTR(-ENOMEM); + goto err_parent_name; } + p_data[0].fw_name = parent_name; + p_data[0].name = parent_name; + ret = devm_clk_hw_register(dev, &div->hw); - if (ret) - goto err; + if (ret) { + clk = ERR_PTR(ret); + goto err_clk; + } + + clk = &div->hw; /* clk-krait ignore any rate change if mux is not flagged as enabled */ if (id < 0) @@ -113,33 +132,36 @@ krait_add_div(struct device *dev, int id, const char *s, unsigned int offset) else clk_prepare_enable(div->hw.clk); -err: - kfree(p_names[0]); +err_clk: + kfree(parent_name); +err_parent_name: kfree(init.name); - return ret; + return clk; } -static int +static struct clk_hw * krait_add_sec_mux(struct device *dev, int id, const char *s, unsigned int offset, bool unique_aux) { int cpu, ret; struct krait_mux_clk *mux; - static const char *sec_mux_list[] = { - "qsb", - "acpu_aux", + static struct clk_parent_data sec_mux_list[2] = { + { .name = "qsb", .fw_name = "qsb" }, + {}, }; struct clk_init_data init = { - .parent_names = sec_mux_list, + .parent_data = sec_mux_list, .num_parents = ARRAY_SIZE(sec_mux_list), .ops = &krait_mux_clk_ops, .flags = CLK_SET_RATE_PARENT, }; + struct clk_hw *clk; + char *parent_name; mux = devm_kzalloc(dev, sizeof(*mux), GFP_KERNEL); if (!mux) - return -ENOMEM; + return ERR_PTR(-ENOMEM); mux->offset = offset; mux->lpl = id >= 0; @@ -159,23 +181,33 @@ krait_add_sec_mux(struct device *dev, int id, const char *s, init.name = kasprintf(GFP_KERNEL, "krait%s_sec_mux", s); if (!init.name) - return -ENOMEM; + return ERR_PTR(-ENOMEM); if (unique_aux) { - sec_mux_list[0] = kasprintf(GFP_KERNEL, "acpu%s_aux", s); - if (!sec_mux_list[0]) { - ret = -ENOMEM; + parent_name = kasprintf(GFP_KERNEL, "acpu%s_aux", s); + if (!parent_name) { + clk = ERR_PTR(-ENOMEM); goto err_aux; } + sec_mux_list[1].fw_name = parent_name; + sec_mux_list[1].name = parent_name; + } else { + sec_mux_list[1].name = "apu_aux"; } ret = devm_clk_hw_register(dev, &mux->hw); - if (ret) - goto unique_aux; + if (ret) { + clk = ERR_PTR(ret); + goto err_clk; + } + + clk = &mux->hw; ret = krait_notifier_register(dev, mux->hw.clk, mux); - if (ret) - goto unique_aux; + if (ret) { + clk = ERR_PTR(ret); + goto err_clk; + } /* clk-krait ignore any rate change if mux is not flagged as enabled */ if (id < 0) @@ -184,28 +216,29 @@ krait_add_sec_mux(struct device *dev, int id, const char *s, else clk_prepare_enable(mux->hw.clk); -unique_aux: +err_clk: if (unique_aux) - kfree(sec_mux_list[0]); + kfree(parent_name); err_aux: kfree(init.name); - return ret; + return clk; } -static struct clk * -krait_add_pri_mux(struct device *dev, int id, const char *s, - unsigned int offset) +static struct clk_hw * +krait_add_pri_mux(struct device *dev, struct clk_hw *hfpll_div, struct clk_hw *sec_mux, + int id, const char *s, unsigned int offset) { int ret; struct krait_mux_clk *mux; - const char *p_names[3]; + static struct clk_parent_data p_data[3]; struct clk_init_data init = { - .parent_names = p_names, - .num_parents = ARRAY_SIZE(p_names), + .parent_data = p_data, + .num_parents = ARRAY_SIZE(p_data), .ops = &krait_mux_clk_ops, .flags = CLK_SET_RATE_PARENT, }; - struct clk *clk; + struct clk_hw *clk; + char *hfpll_name; mux = devm_kzalloc(dev, sizeof(*mux), GFP_KERNEL); if (!mux) @@ -223,55 +256,44 @@ krait_add_pri_mux(struct device *dev, int id, const char *s, if (!init.name) return ERR_PTR(-ENOMEM); - p_names[0] = kasprintf(GFP_KERNEL, "hfpll%s", s); - if (!p_names[0]) { + hfpll_name = kasprintf(GFP_KERNEL, "hfpll%s", s); + if (!hfpll_name) { clk = ERR_PTR(-ENOMEM); - goto err_p0; + goto err_hfpll; } - p_names[1] = kasprintf(GFP_KERNEL, "hfpll%s_div", s); - if (!p_names[1]) { - clk = ERR_PTR(-ENOMEM); - goto err_p1; - } + p_data[0].fw_name = hfpll_name; + p_data[0].name = hfpll_name; - p_names[2] = kasprintf(GFP_KERNEL, "krait%s_sec_mux", s); - if (!p_names[2]) { - clk = ERR_PTR(-ENOMEM); - goto err_p2; - } + p_data[1].hw = hfpll_div; + p_data[2].hw = sec_mux; ret = devm_clk_hw_register(dev, &mux->hw); if (ret) { clk = ERR_PTR(ret); - goto err_p3; + goto err_clk; } - clk = mux->hw.clk; + clk = &mux->hw; - ret = krait_notifier_register(dev, clk, mux); + ret = krait_notifier_register(dev, mux->hw.clk, mux); if (ret) clk = ERR_PTR(ret); -err_p3: - kfree(p_names[2]); -err_p2: - kfree(p_names[1]); -err_p1: - kfree(p_names[0]); -err_p0: +err_clk: + kfree(hfpll_name); +err_hfpll: kfree(init.name); return clk; } /* id < 0 for L2, otherwise id == physical CPU number */ -static struct clk *krait_add_clks(struct device *dev, int id, bool unique_aux) +static struct clk_hw *krait_add_clks(struct device *dev, int id, bool unique_aux) { - int ret; + struct clk_hw *hfpll_div, *sec_mux, *pri_mux; unsigned int offset; void *p = NULL; const char *s; - struct clk *clk; if (id >= 0) { offset = 0x4501 + (0x1000 * id); @@ -283,22 +305,23 @@ static struct clk *krait_add_clks(struct device *dev, int id, bool unique_aux) s = "_l2"; } - ret = krait_add_div(dev, id, s, offset); - if (ret) { - clk = ERR_PTR(ret); + hfpll_div = krait_add_div(dev, id, s, offset); + if (IS_ERR(hfpll_div)) { + pri_mux = hfpll_div; goto err; } - ret = krait_add_sec_mux(dev, id, s, offset, unique_aux); - if (ret) { - clk = ERR_PTR(ret); + sec_mux = krait_add_sec_mux(dev, id, s, offset, unique_aux); + if (IS_ERR(sec_mux)) { + pri_mux = sec_mux; goto err; } - clk = krait_add_pri_mux(dev, id, s, offset); + pri_mux = krait_add_pri_mux(dev, hfpll_div, sec_mux, id, s, offset); + err: kfree(p); - return clk; + return pri_mux; } static struct clk *krait_of_get(struct of_phandle_args *clkspec, void *data) @@ -306,7 +329,7 @@ static struct clk *krait_of_get(struct of_phandle_args *clkspec, void *data) unsigned int idx = clkspec->args[0]; struct clk **clks = data; - if (idx >= 5) { + if (idx >= clks_max) { pr_err("%s: invalid clock index %d\n", __func__, idx); return ERR_PTR(-EINVAL); } @@ -327,9 +350,8 @@ static int krait_cc_probe(struct platform_device *pdev) const struct of_device_id *id; unsigned long cur_rate, aux_rate; int cpu; - struct clk *clk; - struct clk **clks; - struct clk *l2_pri_mux_clk; + struct clk_hw *mux, *l2_pri_mux; + struct clk *clk, **clks; id = of_match_device(krait_cc_match_table, dev); if (!id) @@ -348,21 +370,21 @@ static int krait_cc_probe(struct platform_device *pdev) } /* Krait configurations have at most 4 CPUs and one L2 */ - clks = devm_kcalloc(dev, 5, sizeof(*clks), GFP_KERNEL); + clks = devm_kcalloc(dev, clks_max, sizeof(*clks), GFP_KERNEL); if (!clks) return -ENOMEM; for_each_possible_cpu(cpu) { - clk = krait_add_clks(dev, cpu, id->data); + mux = krait_add_clks(dev, cpu, id->data); if (IS_ERR(clk)) return PTR_ERR(clk); - clks[cpu] = clk; + clks[cpu] = mux->clk; } - l2_pri_mux_clk = krait_add_clks(dev, -1, id->data); - if (IS_ERR(l2_pri_mux_clk)) - return PTR_ERR(l2_pri_mux_clk); - clks[4] = l2_pri_mux_clk; + l2_pri_mux = krait_add_clks(dev, -1, id->data); + if (IS_ERR(l2_pri_mux)) + return PTR_ERR(l2_pri_mux); + clks[l2_mux] = l2_pri_mux->clk; /* * We don't want the CPU or L2 clocks to be turned off at late init @@ -372,7 +394,7 @@ static int krait_cc_probe(struct platform_device *pdev) * they take over. */ for_each_online_cpu(cpu) { - clk_prepare_enable(l2_pri_mux_clk); + clk_prepare_enable(clks[l2_mux]); WARN(clk_prepare_enable(clks[cpu]), "Unable to turn on CPU%d clock", cpu); } @@ -388,16 +410,16 @@ static int krait_cc_probe(struct platform_device *pdev) * two different rates to force a HFPLL reinit under all * circumstances. */ - cur_rate = clk_get_rate(l2_pri_mux_clk); + cur_rate = clk_get_rate(clks[l2_mux]); aux_rate = 384000000; if (cur_rate < aux_rate) { pr_info("L2 @ Undefined rate. Forcing new rate.\n"); cur_rate = aux_rate; } - clk_set_rate(l2_pri_mux_clk, aux_rate); - clk_set_rate(l2_pri_mux_clk, 2); - clk_set_rate(l2_pri_mux_clk, cur_rate); - pr_info("L2 @ %lu KHz\n", clk_get_rate(l2_pri_mux_clk) / 1000); + clk_set_rate(clks[l2_mux], aux_rate); + clk_set_rate(clks[l2_mux], 2); + clk_set_rate(clks[l2_mux], cur_rate); + pr_info("L2 @ %lu KHz\n", clk_get_rate(clks[l2_mux]) / 1000); for_each_possible_cpu(cpu) { clk = clks[cpu]; cur_rate = clk_get_rate(clk);