From patchwork Wed Nov 8 00:31:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Christopherson X-Patchwork-Id: 162837 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:aa0b:0:b0:403:3b70:6f57 with SMTP id k11csp606838vqo; Tue, 7 Nov 2023 16:32:47 -0800 (PST) X-Google-Smtp-Source: AGHT+IEhA2nVxE0yuVSNzyF+e3K0SWlGtrUBu/ajuiKXGSQKb6RfI89uIihWAmr8vu+y3oMrwVkl X-Received: by 2002:a05:6808:3847:b0:3af:e67d:8295 with SMTP id ej7-20020a056808384700b003afe67d8295mr800979oib.40.1699403567053; Tue, 07 Nov 2023 16:32:47 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1699403567; cv=none; d=google.com; s=arc-20160816; b=OQS3fRCFULxRa5BQnk1f/K8SD1znnp+AofE61cIX8KFSddCmZolAYqCMxiDv6bBt1F 0no3qw0vYF8LSyQ/9MQBv0zDRe7cIqIpq+FuX7HDM3Pvj06Zlhk5kr7C/yekWty+K9tg DdHY4w9G++Wr6swcYcLyiB09fSzXeAAgtLBy+zlhzLGsy9QrwB+JDo0VmINfhxeXqCnI 7hMp49fw9Rh2XbycV0Awu1dUWIBsJhQ0aKC4IZKysdtThwQYJTwcqStrWRNFyiyG2IY9 wljbiOjZaacrOOzr84gE7uoAmQ77lzeYg4B4E0m216C9LXjKADXy5snaRjdhfr/dKvDV tywg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:reply-to:dkim-signature; bh=nHi8MKAu3RoJG1H9OsREjBorzQIuSOD8CbIQ6CUD2qY=; fh=gm96CM+cG0KJxn7vnhn0c1c98ILNP1HHUrKfrGecw3M=; b=LgflXgGu90gD1W0IVPEnwM9b42I5ax2J1oDBK6kY94HpHyJkg39ro+eXC695v71Sec 2v08+HQlXfHSZDZ7ipIrrs9H5as4FVhhdyiQsJL4wzsAnupS1E2YLSTvx4MqVBJDRnGt A2kd3oLHGN6xA1Nz0GkYla3InSAKT+tg20ONooit2v39pFZ0Yp8+L+WS5zlvtfGVuKUQ cRsBEDXijV48jnkRkCvIa9z4x5RFOQe3zHuxX9f9f3+NKi6yPuNdoczJJ5i5UFHtWJzJ qbKaF0ugrLxQo2FxbpUtE9sUVusrqEk7gAa/UqOorwmFeCWhvJ6JGU3jjfnVYPviGYtl 3yDw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=f4fWGlDV; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:8 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from fry.vger.email (fry.vger.email. [2620:137:e000::3:8]) by mx.google.com with ESMTPS id s17-20020a056a0008d100b006910a45a234si12051731pfu.202.2023.11.07.16.32.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Nov 2023 16:32:47 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:8 as permitted sender) client-ip=2620:137:e000::3:8; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=f4fWGlDV; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:8 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by fry.vger.email (Postfix) with ESMTP id 4DC0E81D6BEF; Tue, 7 Nov 2023 16:32:24 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at fry.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232538AbjKHAbp (ORCPT + 32 others); Tue, 7 Nov 2023 19:31:45 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38892 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232160AbjKHAbn (ORCPT ); Tue, 7 Nov 2023 19:31:43 -0500 Received: from mail-yb1-xb49.google.com (mail-yb1-xb49.google.com [IPv6:2607:f8b0:4864:20::b49]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9596B10FA for ; Tue, 7 Nov 2023 16:31:41 -0800 (PST) Received: by mail-yb1-xb49.google.com with SMTP id 3f1490d57ef6-d9b9aeb4962so7587114276.3 for ; Tue, 07 Nov 2023 16:31:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1699403501; x=1700008301; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=nHi8MKAu3RoJG1H9OsREjBorzQIuSOD8CbIQ6CUD2qY=; b=f4fWGlDVtYmmChQc60xF6VR19CcCHcVPHR5PLZwK7MJ6RcfchihMbTASkjdedMY1B7 Md8lzHjDvAl+46maS4QRm21capeQt5koUBJOyMCQKDS7CApT2dcEjmXen9IFIoDFkR44 HBvUjCDPFGJ9i8jQYFLVq8n6vpaDzRXDjKosyUR+U9dty10KCRLxgb/xNQI0bztY1zY0 kdVMfk0ZwY4wdCG9VY2ZR4Z5ZRr1hYcLhHs8jb+/b2jCsL3woY+xcotaYVYCJbRNmiqg SZNpJrG1K1YRa4DxcxdkA2uBFIe20zkJOTPX6mVxejDPCIYj8tQV78C4i6lq9XSRcsRg DOBw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699403501; x=1700008301; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=nHi8MKAu3RoJG1H9OsREjBorzQIuSOD8CbIQ6CUD2qY=; b=T/tOYxC5KwqW7HxW/ds7Gs9yFOTWbdJQjp/x5QzwZWuS2e+khHUSNOfIhEHouLwC2m v6GMlRcXTXqwgN+uI93bUJT4XWwWX5i35Cp1WybWOWmJ7QH+7By3xgWdSxmbaM6pNdo9 pvJqw99FSzbsRtc/czpQTIUBAeP9X+zY9lxHAUrKG6jNKCNblm8OVGe7mGhfeptIzexn bLN3uqwT3pcl0Mj9gHITPe7bMtY2hLzjIYA1c7aqboPa1GRxTWr1+g6TnKemaVRO+uKU H6PEQamHD9VwbYKrUyGTy/Jxp+gzWOwc/ALhf1a/tWUsrFbMaoRAO4s4TEB4YDKJtt+F tktw== X-Gm-Message-State: AOJu0Yy0vOxUbPGu0IlX+8mUQMHUoWr/erv39/HcC5o993+AsVcCGDsZ Pm0AFh5fLCZs9z8VivLM0Ur4fau1yIo= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a25:e643:0:b0:d9a:c218:8177 with SMTP id d64-20020a25e643000000b00d9ac2188177mr5331ybh.8.1699403500794; Tue, 07 Nov 2023 16:31:40 -0800 (PST) Reply-To: Sean Christopherson Date: Tue, 7 Nov 2023 16:31:17 -0800 In-Reply-To: <20231108003135.546002-1-seanjc@google.com> Mime-Version: 1.0 References: <20231108003135.546002-1-seanjc@google.com> X-Mailer: git-send-email 2.42.0.869.gea05f2083d-goog Message-ID: <20231108003135.546002-2-seanjc@google.com> Subject: [PATCH v7 01/19] KVM: x86/pmu: Always treat Fixed counters as available when supported From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Kan Liang , Dapeng Mi , Jim Mattson , Jinrong Liang , Aaron Lewis , Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (fry.vger.email [0.0.0.0]); Tue, 07 Nov 2023 16:32:24 -0800 (PST) X-Spam-Status: No, score=-8.4 required=5.0 tests=DKIMWL_WL_MED,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE, USER_IN_DEF_DKIM_WL autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on fry.vger.email X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1781953794559772069 X-GMAIL-MSGID: 1781953794559772069 Treat fixed counters as available when they are supported, i.e. don't silently ignore an enabled fixed counter just because guest CPUID says the associated general purpose architectural event is unavailable. KVM originally treated fixed counters as always available, but that got changed as part of a fix to avoid confusing REF_CPU_CYCLES, which does NOT map to an architectural event, with the actual architectural event used associated with bit 7, TOPDOWN_SLOTS. The commit justified the change with: If the event is marked as unavailable in the Intel guest CPUID 0AH.EBX leaf, we need to avoid any perf_event creation, whether it's a gp or fixed counter. but that justification doesn't mesh with reality. The Intel SDM uses "architectural events" to refer to both general purpose events (the ones with the reverse polarity mask in CPUID.0xA.EBX) and the events for fixed counters, e.g. the SDM makes statements like: Each of the fixed-function PMC can count only one architectural performance event. but the fact that fixed counter 2 (TSC reference cycles) doesn't have an associated general purpose architectural makes trying to apply the mask from CPUID.0xA.EBX impossible. Furthermore, the lack of enumeration for an architectural event in CPUID only means the CPU doesn't officially support the architectural encoding, i.e. it doesn't mean using the architectural encoding _won't_ work, it sipmly means there are no guarantees that it will work as expected. E.g. if KVM is running in a VM that advertises a fixed counters but not the corresponding architectural event encoding, and perf decides to use a general purpose counter instead of a fixed counter, odds are very good that the underlying hardware actually does support the architectrual encoding, and that programming the encoding will count the right thing. In other words, asking perf to count the event will probably work, whereas intentionally doing nothing is obviously guaranteed to fail. Note, at the time of the change, KVM didn't enforce hardware support, i.e. didn't prevent userspace from enumerating support in guest CPUID.0xA.EBX for architectural events that aren't supported in hardware. I.e. silently dropping the fixed counter didn't somehow protection against counting the wrong event, it just enforced guest CPUID. And practically speaking, this issue is almost certainly limited to running KVM on a funky virtual CPU model. No known real hardware has an asymmetric PMU where a fixed counter is supported but the associated architectural event is not. Fixes: a21864486f7e ("KVM: x86/pmu: Fix available_event_types check for REF_CPU_CYCLES event") Signed-off-by: Sean Christopherson --- arch/x86/kvm/vmx/pmu_intel.c | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c index 820d3e1f6b4f..c6e227edcf8e 100644 --- a/arch/x86/kvm/vmx/pmu_intel.c +++ b/arch/x86/kvm/vmx/pmu_intel.c @@ -108,11 +108,24 @@ static bool intel_hw_event_available(struct kvm_pmc *pmc) u8 unit_mask = (pmc->eventsel & ARCH_PERFMON_EVENTSEL_UMASK) >> 8; int i; + /* + * Fixed counters are always available if KVM reaches this point. If a + * fixed counter is unsupported in hardware or guest CPUID, KVM doesn't + * allow the counter's corresponding MSR to be written. KVM does use + * architectural events to program fixed counters, as the interface to + * perf doesn't allow requesting a specific fixed counter, e.g. perf + * may (sadly) back a guest fixed PMC with a general purposed counter. + * But if _hardware_ doesn't support the associated event, KVM simply + * doesn't enumerate support for the fixed counter. + */ + if (pmc_is_fixed(pmc)) + return true; + BUILD_BUG_ON(ARRAY_SIZE(intel_arch_events) != NR_INTEL_ARCH_EVENTS); /* * Disallow events reported as unavailable in guest CPUID. Note, this - * doesn't apply to pseudo-architectural events. + * doesn't apply to pseudo-architectural events (see above). */ for (i = 0; i < NR_REAL_INTEL_ARCH_EVENTS; i++) { if (intel_arch_events[i].eventsel != event_select || From patchwork Wed Nov 8 00:31:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Christopherson X-Patchwork-Id: 162839 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:aa0b:0:b0:403:3b70:6f57 with SMTP id k11csp607010vqo; Tue, 7 Nov 2023 16:33:13 -0800 (PST) X-Google-Smtp-Source: AGHT+IEblpE8VpB+eOyoDttpp/uw0cZsspntxvSnUq0EUuZtleYf7f97UZPiSY898gOawjEC4H8E X-Received: by 2002:a05:6a20:3d1f:b0:14e:a1f0:a8ea with SMTP id y31-20020a056a203d1f00b0014ea1f0a8eamr677565pzi.3.1699403593485; Tue, 07 Nov 2023 16:33:13 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1699403593; cv=none; d=google.com; s=arc-20160816; b=jP1uYPPARykdh+KNr9v9F8wPgtTKnH1BOBj01oAlJU6FBrLMLI4D0mmRX7B6WSMgtS RSQfPcBYjswBDBlDjSEM/vEbDYOd4aY6qKMv37UGFFoaxh4WGBiiXL5l6Db+TaBTxOSL cnAPthh31uNc8X4OOSErjVtuh0s1hxfe9toDHnx8pwaoTfzR9Kg+4y4P77qqF5MdTGkb dnHwc1ginP79Whfwhpd/nipKvwxbCEBzntebkF4kCv5VY4ZhY3Z23XopKEowJfI3lOpa TrmMSn5LdEjlkqg8ChVIBrlKrgO+L3L5vUE9FdVIHM90yWrrjb4EeuzRTY45WcsbAhDe pYmQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:reply-to:dkim-signature; bh=rIRxzXLXpgSnDoyGRMhFbBRVg5vafHFYB9OFSW8L9KA=; fh=gm96CM+cG0KJxn7vnhn0c1c98ILNP1HHUrKfrGecw3M=; b=CuTjpKMBq4IA6PLMLKorPIsEEPNIk7DAjjk6b4G0E5iznRpIce1PrwHGq5VbkCr/E/ 6tBWexuiCkc2sJwM1nmdyT6Ip3sCcQBmpk5euJGuHiG2hYRyTg/f0epgnTP2+FOKwAgy N1KS9OVD19ctW7G0DkrqKtcujWeraKg4i4AyqWLAwesEjsnUDToi6XXG6io0kd9tAHhS +gmIPIkCtB4oDEjhYsXHGhPMohJR0hNX0gdyWunXxHn1d7OKNYq/4Ccgm4arGDlpfRW7 xNjqtkmckoc7HPbTHgzMlnFOOm8zr5pa6GGMUyE+3gO/2usYAR9qYbCBAwxSxox+PuFW 040A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=EKqf7npn; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from snail.vger.email (snail.vger.email. [23.128.96.37]) by mx.google.com with ESMTPS id a14-20020a17090a8c0e00b00280cc652dd6si866830pjo.173.2023.11.07.16.33.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Nov 2023 16:33:13 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) client-ip=23.128.96.37; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=EKqf7npn; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by snail.vger.email (Postfix) with ESMTP id A012E82DD0B3; Tue, 7 Nov 2023 16:32:06 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at snail.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235408AbjKHAbx (ORCPT + 32 others); Tue, 7 Nov 2023 19:31:53 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38912 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235187AbjKHAbq (ORCPT ); Tue, 7 Nov 2023 19:31:46 -0500 Received: from mail-yb1-xb49.google.com (mail-yb1-xb49.google.com [IPv6:2607:f8b0:4864:20::b49]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5CBD610F8 for ; Tue, 7 Nov 2023 16:31:44 -0800 (PST) Received: by mail-yb1-xb49.google.com with SMTP id 3f1490d57ef6-da2b87dd614so7890096276.2 for ; Tue, 07 Nov 2023 16:31:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1699403503; x=1700008303; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=rIRxzXLXpgSnDoyGRMhFbBRVg5vafHFYB9OFSW8L9KA=; b=EKqf7npnqL1q0Uy2J1ICeiF+7WGb1xzUlDB6MDolWbesG8wb2QGqb1it3vMRDUwky+ jPmjdzM2ft4+f+dQFKxESZAlwJdDTHI37Z5jhRod4P2JkI4ZxkU5PFi0foVrWeOnCh2g PnlAjYjJQqSbgqzLYAjUseCblR0g4JzpPSedDkR7xefEZlldAfTLG6m8H2Gv3PxBEMl8 nUvn6PAR/vLUjXNcp3u72BnXGsS2ESyipLDHZ61vnoC07mwJBLwimynn7jAfFwL3d/gC MCUsAEzvTOFNanyo+ZsslitTdlubRm8buysnzzRVu/bh7aRW/tgclxNHDjZvbCyLkbAa C/Gg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699403503; x=1700008303; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=rIRxzXLXpgSnDoyGRMhFbBRVg5vafHFYB9OFSW8L9KA=; b=IVUwiE2z6ONIkjJaygHRAzvyhKOxfcQDR5SNjoHCwDlrZ9xQX2TZ9xNCG7zJTglKRN A0BH7s/zhNwVhZjlQEZpfk2CycZBYY+XeIXkQ05qFwfr2qI4+A1ndMqGoA3lmPVwKcKQ lMGUE2HKXDhEJp9+GUFJI21OAR51OwbQYAlKfpbFG+F1QnawYWSZpwqr75LsfRxg6CWl D2BWj4V1kg6RPfZGi8FhQ+YrYLnlatbsjhwoRmaaCR7Q8Oj3Z5DpiSgomkpjQ2KMx7dX F3A87XeD/cVlpsaarBPUrr+wTWP4SHMWFtNh1eOD7GPhuOW59llSo0RPVM+YXS+wTbSN n/Fw== X-Gm-Message-State: AOJu0YwHhnd1D709VPk6OKJd0cP8kN58kh+wGmGnOjKf08zWRlReJUqw R0zGd5iF09BGA1dAJJGXfU8au6yDrxA= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a25:b109:0:b0:d9a:556d:5f8a with SMTP id g9-20020a25b109000000b00d9a556d5f8amr6081ybj.12.1699403503575; Tue, 07 Nov 2023 16:31:43 -0800 (PST) Reply-To: Sean Christopherson Date: Tue, 7 Nov 2023 16:31:18 -0800 In-Reply-To: <20231108003135.546002-1-seanjc@google.com> Mime-Version: 1.0 References: <20231108003135.546002-1-seanjc@google.com> X-Mailer: git-send-email 2.42.0.869.gea05f2083d-goog Message-ID: <20231108003135.546002-3-seanjc@google.com> Subject: [PATCH v7 02/19] KVM: x86/pmu: Allow programming events that match unsupported arch events From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Kan Liang , Dapeng Mi , Jim Mattson , Jinrong Liang , Aaron Lewis , Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Tue, 07 Nov 2023 16:32:06 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1781953822498806434 X-GMAIL-MSGID: 1781953822498806434 Remove KVM's bogus restriction that the guest can't program an event whose encoding matches an unsupported architectural event. The enumeration of an architectural event only says that if a CPU supports an architectural event, then the event can be programmed using the architectural encoding. The enumeration does NOT say anything about the encoding when the CPU doesn't report support the architectural event. Preventing the guest from counting events whose encoding happens to match an architectural event breaks existing functionality whenever Intel adds an architectural encoding that was *ever* used for a CPU that doesn't enumerate support for the architectural event, even if the encoding is for the exact same event! E.g. the architectural encoding for Top-Down Slots is 0x01a4. Broadwell CPUs, which do not support the Top-Down Slots architectural event, 0x10a4 is a valid, model-specific event. Denying guest usage of 0x01a4 if/when KVM adds support for Top-Down slots would break any Broadwell-based guest. Reported-by: Kan Liang Closes: https://lore.kernel.org/all/2004baa6-b494-462c-a11f-8104ea152c6a@linux.intel.com Fixes: a21864486f7e ("KVM: x86/pmu: Fix available_event_types check for REF_CPU_CYCLES event") Reviewed-by: Dapeng Mi Reviewed-by: Jim Mattson Signed-off-by: Sean Christopherson Reviewed-by: Kan Liang --- arch/x86/include/asm/kvm-x86-pmu-ops.h | 1 - arch/x86/kvm/pmu.c | 1 - arch/x86/kvm/pmu.h | 1 - arch/x86/kvm/svm/pmu.c | 6 ---- arch/x86/kvm/vmx/pmu_intel.c | 38 -------------------------- 5 files changed, 47 deletions(-) diff --git a/arch/x86/include/asm/kvm-x86-pmu-ops.h b/arch/x86/include/asm/kvm-x86-pmu-ops.h index 6c98f4bb4228..884af8ef7657 100644 --- a/arch/x86/include/asm/kvm-x86-pmu-ops.h +++ b/arch/x86/include/asm/kvm-x86-pmu-ops.h @@ -12,7 +12,6 @@ BUILD_BUG_ON(1) * a NULL definition, for example if "static_call_cond()" will be used * at the call sites. */ -KVM_X86_PMU_OP(hw_event_available) KVM_X86_PMU_OP(pmc_idx_to_pmc) KVM_X86_PMU_OP(rdpmc_ecx_to_pmc) KVM_X86_PMU_OP(msr_idx_to_pmc) diff --git a/arch/x86/kvm/pmu.c b/arch/x86/kvm/pmu.c index 9ae07db6f0f6..99ed72966528 100644 --- a/arch/x86/kvm/pmu.c +++ b/arch/x86/kvm/pmu.c @@ -374,7 +374,6 @@ static bool check_pmu_event_filter(struct kvm_pmc *pmc) static bool pmc_event_is_allowed(struct kvm_pmc *pmc) { return pmc_is_globally_enabled(pmc) && pmc_speculative_in_use(pmc) && - static_call(kvm_x86_pmu_hw_event_available)(pmc) && check_pmu_event_filter(pmc); } diff --git a/arch/x86/kvm/pmu.h b/arch/x86/kvm/pmu.h index 1d64113de488..10fe5bf02705 100644 --- a/arch/x86/kvm/pmu.h +++ b/arch/x86/kvm/pmu.h @@ -19,7 +19,6 @@ #define VMWARE_BACKDOOR_PMC_APPARENT_TIME 0x10002 struct kvm_pmu_ops { - bool (*hw_event_available)(struct kvm_pmc *pmc); struct kvm_pmc *(*pmc_idx_to_pmc)(struct kvm_pmu *pmu, int pmc_idx); struct kvm_pmc *(*rdpmc_ecx_to_pmc)(struct kvm_vcpu *vcpu, unsigned int idx, u64 *mask); diff --git a/arch/x86/kvm/svm/pmu.c b/arch/x86/kvm/svm/pmu.c index 373ff6a6687b..5596fe816ea8 100644 --- a/arch/x86/kvm/svm/pmu.c +++ b/arch/x86/kvm/svm/pmu.c @@ -73,11 +73,6 @@ static inline struct kvm_pmc *get_gp_pmc_amd(struct kvm_pmu *pmu, u32 msr, return amd_pmc_idx_to_pmc(pmu, idx); } -static bool amd_hw_event_available(struct kvm_pmc *pmc) -{ - return true; -} - static bool amd_is_valid_rdpmc_ecx(struct kvm_vcpu *vcpu, unsigned int idx) { struct kvm_pmu *pmu = vcpu_to_pmu(vcpu); @@ -249,7 +244,6 @@ static void amd_pmu_reset(struct kvm_vcpu *vcpu) } struct kvm_pmu_ops amd_pmu_ops __initdata = { - .hw_event_available = amd_hw_event_available, .pmc_idx_to_pmc = amd_pmc_idx_to_pmc, .rdpmc_ecx_to_pmc = amd_rdpmc_ecx_to_pmc, .msr_idx_to_pmc = amd_msr_idx_to_pmc, diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c index c6e227edcf8e..7737ee2fc62f 100644 --- a/arch/x86/kvm/vmx/pmu_intel.c +++ b/arch/x86/kvm/vmx/pmu_intel.c @@ -101,43 +101,6 @@ static struct kvm_pmc *intel_pmc_idx_to_pmc(struct kvm_pmu *pmu, int pmc_idx) } } -static bool intel_hw_event_available(struct kvm_pmc *pmc) -{ - struct kvm_pmu *pmu = pmc_to_pmu(pmc); - u8 event_select = pmc->eventsel & ARCH_PERFMON_EVENTSEL_EVENT; - u8 unit_mask = (pmc->eventsel & ARCH_PERFMON_EVENTSEL_UMASK) >> 8; - int i; - - /* - * Fixed counters are always available if KVM reaches this point. If a - * fixed counter is unsupported in hardware or guest CPUID, KVM doesn't - * allow the counter's corresponding MSR to be written. KVM does use - * architectural events to program fixed counters, as the interface to - * perf doesn't allow requesting a specific fixed counter, e.g. perf - * may (sadly) back a guest fixed PMC with a general purposed counter. - * But if _hardware_ doesn't support the associated event, KVM simply - * doesn't enumerate support for the fixed counter. - */ - if (pmc_is_fixed(pmc)) - return true; - - BUILD_BUG_ON(ARRAY_SIZE(intel_arch_events) != NR_INTEL_ARCH_EVENTS); - - /* - * Disallow events reported as unavailable in guest CPUID. Note, this - * doesn't apply to pseudo-architectural events (see above). - */ - for (i = 0; i < NR_REAL_INTEL_ARCH_EVENTS; i++) { - if (intel_arch_events[i].eventsel != event_select || - intel_arch_events[i].unit_mask != unit_mask) - continue; - - return pmu->available_event_types & BIT(i); - } - - return true; -} - static bool intel_is_valid_rdpmc_ecx(struct kvm_vcpu *vcpu, unsigned int idx) { struct kvm_pmu *pmu = vcpu_to_pmu(vcpu); @@ -802,7 +765,6 @@ void intel_pmu_cross_mapped_check(struct kvm_pmu *pmu) } struct kvm_pmu_ops intel_pmu_ops __initdata = { - .hw_event_available = intel_hw_event_available, .pmc_idx_to_pmc = intel_pmc_idx_to_pmc, .rdpmc_ecx_to_pmc = intel_rdpmc_ecx_to_pmc, .msr_idx_to_pmc = intel_msr_idx_to_pmc, From patchwork Wed Nov 8 00:31:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Christopherson X-Patchwork-Id: 162840 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:aa0b:0:b0:403:3b70:6f57 with SMTP id k11csp607012vqo; Tue, 7 Nov 2023 16:33:13 -0800 (PST) X-Google-Smtp-Source: AGHT+IFaWdEKlMv4jtucEzMmvzRn6SP4mTavQjYJGjl0VIuEm1w87RfC8rL7O+VDOuB/kGWofF8i X-Received: by 2002:a05:6358:921d:b0:168:dbfd:cec8 with SMTP id d29-20020a056358921d00b00168dbfdcec8mr202982rwb.13.1699403593493; Tue, 07 Nov 2023 16:33:13 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1699403593; cv=none; d=google.com; s=arc-20160816; b=xtK/HxfFMvbXPwWJbaFfQ6UCKOt+rPDz92AYZVeyBLWP8eOno8r6NsRbjFrjweX605 9Bt/QTWuXmac/Lvu/a+QSnPdKV0JwVabeku6gel7vrH0ENZb0CBWUVKTROt9DHswmSON b6xq2N8v1xt9d5iL9XxMcPtZiQTLecijpD5aIvQPUItjOmFZp4yhLz5fpTxek5VQIw9B 8LT3SU23+nzGNpTKKyvh/1aqmu61cF/TjyT+rFoIrEgHh6QIeIlTEYLDZ7fHlhtrUbB2 BZLYHUwyTeqLIAKFXLiDXNw+lM0Z1oiaXruJzJVaae2CVeMJrQTUzRfe8g/YAGrx3VZ2 clPw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:reply-to:dkim-signature; bh=rhicNGhqq5fztpWLcEppgCSeLbp+B1utXe2pu96crUY=; fh=gm96CM+cG0KJxn7vnhn0c1c98ILNP1HHUrKfrGecw3M=; b=AdeijVijEZn0kyS0iXWKc6gX/j9uMC3qdIVsS4UwWwl1Saq4lF87CZhNep3rGlyi75 0rHvyvk+8YsX5k8XsdlvonjsaeCUgxYzjCM0PLWT1E53LOh539tKyfZ97BOyyxkJyPbm n3cHlphevi27isSOSUcbuiEg1iY+OmfpyuInn+VRTxjiH6zE62JqjO6jeErjZ7lo0lNJ OMi5pWHplvLTpU2MIGBjN89KHrZKLosaUxeEDfGCis0yUAKk1FqdpRPENZIhivRlp9kl V6jV0qxzSbyaudzM4dW1WS13uPADlI2mIgneG0Pt/VVzCgrzJut1WLAIn50afmWB+MsF 1LfQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=KXl73Fup; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from snail.vger.email (snail.vger.email. [23.128.96.37]) by mx.google.com with ESMTPS id j70-20020a638049000000b005b11ce9c97esi3044557pgd.353.2023.11.07.16.33.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Nov 2023 16:33:13 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) client-ip=23.128.96.37; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=KXl73Fup; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by snail.vger.email (Postfix) with ESMTP id 140B282B1C77; Tue, 7 Nov 2023 16:32:06 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at snail.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235516AbjKHAbz (ORCPT + 32 others); Tue, 7 Nov 2023 19:31:55 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47170 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235215AbjKHAbs (ORCPT ); Tue, 7 Nov 2023 19:31:48 -0500 Received: from mail-pl1-x649.google.com (mail-pl1-x649.google.com [IPv6:2607:f8b0:4864:20::649]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D8CA610FB for ; Tue, 7 Nov 2023 16:31:45 -0800 (PST) Received: by mail-pl1-x649.google.com with SMTP id d9443c01a7336-1cc5ef7e815so44359945ad.3 for ; Tue, 07 Nov 2023 16:31:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1699403505; x=1700008305; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=rhicNGhqq5fztpWLcEppgCSeLbp+B1utXe2pu96crUY=; b=KXl73FupIeZiAwtiD8+G2a8yahwlalV0b70y5pN6rHmzbJ8lu/gzhGIL2AdlwjE1/z GkPldipLp1NcurLpbR0vRbmB4L6PGtu86p+mNwrFy4hA1b5sjnFRvazMRudC2414uz9S nzOejT5f0MvEgVQwl+o8m6AsBnHR5g3lnmeI2G8rJavSHl9JziLvn3FauxOy7th3CiEP 3FBw1PKCt67tDIJ5+LDlThBj0pV43xVPmv9AjWin0IzG2/q0dEUVS1q1l0Je2sqttknQ 6LCx+5su1hZhB1eEBisbLxLBUhgGQ5uEQBhRIEI+I02gYdyGIZqfSiMIwVK/WKOKCcsH 4hQg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699403505; x=1700008305; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=rhicNGhqq5fztpWLcEppgCSeLbp+B1utXe2pu96crUY=; b=Khy4COKYqNFr/NUbBajNtCRGIZU1pYLv9NvrohZQZhUP4XDsH+YqBxrtFPRs/U23ud CSKzTMyYGPrXXCCWU2XduZm4G0KaUF+FzB4cKYO3XhReQvv+MiTI72TzHrI4zJCwZUAh 0Rhfi+AFfthoGeMnfQ0XlGfskGlonxdhGxvJgy5+A7CoMPv1rIloEmh/jwzAunjvb3vT 8q3nKQieiQlWQa3BAFu8ebYdIqd2AbbXxwza4wM+4anANQwejzmV/nTABw53iYnxskD9 QrA7x8MFcnqq+oP+lHlwa0u8ZFWaIJJ4rkWLYRQAjj9tzt5cwUGNMqHk5W0qjxrEXZNz M9VA== X-Gm-Message-State: AOJu0Yztz14mySWctlkLhl60hoZh2G6a3Emw3xo4ociuzhF64VDMVFEN cKEAmMY2vuj2ukwvZgecKee4/Ak01dM= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a17:903:260e:b0:1ca:1e12:7c85 with SMTP id jd14-20020a170903260e00b001ca1e127c85mr9958plb.3.1699403505298; Tue, 07 Nov 2023 16:31:45 -0800 (PST) Reply-To: Sean Christopherson Date: Tue, 7 Nov 2023 16:31:19 -0800 In-Reply-To: <20231108003135.546002-1-seanjc@google.com> Mime-Version: 1.0 References: <20231108003135.546002-1-seanjc@google.com> X-Mailer: git-send-email 2.42.0.869.gea05f2083d-goog Message-ID: <20231108003135.546002-4-seanjc@google.com> Subject: [PATCH v7 03/19] KVM: x86/pmu: Remove KVM's enumeration of Intel's architectural encodings From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Kan Liang , Dapeng Mi , Jim Mattson , Jinrong Liang , Aaron Lewis , Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Tue, 07 Nov 2023 16:32:06 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1781953822564061315 X-GMAIL-MSGID: 1781953822564061315 Drop KVM's enumeration of Intel's architectural event encodings, and instead open code the three encodings (of which only two are real) that KVM uses to emulate fixed counters. Now that KVM doesn't incorrectly enforce the availability of architectural encodings, there is no reason for KVM to ever care about the encodings themselves, at least not in the current format of an array indexed by the encoding's position in CPUID. Opportunistically add a comment to explain why KVM cares about eventsel values for fixed counters. Suggested-by: Jim Mattson Signed-off-by: Sean Christopherson --- arch/x86/kvm/vmx/pmu_intel.c | 72 ++++++++++++------------------------ 1 file changed, 23 insertions(+), 49 deletions(-) diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c index 7737ee2fc62f..c4f2c6a268e7 100644 --- a/arch/x86/kvm/vmx/pmu_intel.c +++ b/arch/x86/kvm/vmx/pmu_intel.c @@ -22,52 +22,6 @@ #define MSR_PMC_FULL_WIDTH_BIT (MSR_IA32_PMC0 - MSR_IA32_PERFCTR0) -enum intel_pmu_architectural_events { - /* - * The order of the architectural events matters as support for each - * event is enumerated via CPUID using the index of the event. - */ - INTEL_ARCH_CPU_CYCLES, - INTEL_ARCH_INSTRUCTIONS_RETIRED, - INTEL_ARCH_REFERENCE_CYCLES, - INTEL_ARCH_LLC_REFERENCES, - INTEL_ARCH_LLC_MISSES, - INTEL_ARCH_BRANCHES_RETIRED, - INTEL_ARCH_BRANCHES_MISPREDICTED, - - NR_REAL_INTEL_ARCH_EVENTS, - - /* - * Pseudo-architectural event used to implement IA32_FIXED_CTR2, a.k.a. - * TSC reference cycles. The architectural reference cycles event may - * or may not actually use the TSC as the reference, e.g. might use the - * core crystal clock or the bus clock (yeah, "architectural"). - */ - PSEUDO_ARCH_REFERENCE_CYCLES = NR_REAL_INTEL_ARCH_EVENTS, - NR_INTEL_ARCH_EVENTS, -}; - -static struct { - u8 eventsel; - u8 unit_mask; -} const intel_arch_events[] = { - [INTEL_ARCH_CPU_CYCLES] = { 0x3c, 0x00 }, - [INTEL_ARCH_INSTRUCTIONS_RETIRED] = { 0xc0, 0x00 }, - [INTEL_ARCH_REFERENCE_CYCLES] = { 0x3c, 0x01 }, - [INTEL_ARCH_LLC_REFERENCES] = { 0x2e, 0x4f }, - [INTEL_ARCH_LLC_MISSES] = { 0x2e, 0x41 }, - [INTEL_ARCH_BRANCHES_RETIRED] = { 0xc4, 0x00 }, - [INTEL_ARCH_BRANCHES_MISPREDICTED] = { 0xc5, 0x00 }, - [PSEUDO_ARCH_REFERENCE_CYCLES] = { 0x00, 0x03 }, -}; - -/* mapping between fixed pmc index and intel_arch_events array */ -static int fixed_pmc_events[] = { - [0] = INTEL_ARCH_INSTRUCTIONS_RETIRED, - [1] = INTEL_ARCH_CPU_CYCLES, - [2] = PSEUDO_ARCH_REFERENCE_CYCLES, -}; - static void reprogram_fixed_counters(struct kvm_pmu *pmu, u64 data) { struct kvm_pmc *pmc; @@ -442,8 +396,29 @@ static int intel_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info) return 0; } +/* + * Map fixed counter events to architectural general purpose event encodings. + * Perf doesn't provide APIs to allow KVM to directly program a fixed counter, + * and so KVM instead programs the architectural event to effectively request + * the fixed counter. Perf isn't guaranteed to use a fixed counter and may + * instead program the encoding into a general purpose counter, e.g. if a + * different perf_event is already utilizing the requested counter, but the end + * result is the same (ignoring the fact that using a general purpose counter + * will likely exacerbate counter contention). + * + * Note, reference cycles is counted using a perf-defined "psuedo-encoding", + * as there is no architectural general purpose encoding for reference cycles. + */ static void setup_fixed_pmc_eventsel(struct kvm_pmu *pmu) { + const struct { + u8 eventsel; + u8 unit_mask; + } fixed_pmc_events[] = { + [0] = { 0xc0, 0x00 }, /* Instruction Retired / PERF_COUNT_HW_INSTRUCTIONS. */ + [1] = { 0x3c, 0x00 }, /* CPU Cycles/ PERF_COUNT_HW_CPU_CYCLES. */ + [2] = { 0x00, 0x03 }, /* Reference Cycles / PERF_COUNT_HW_REF_CPU_CYCLES*/ + }; int i; BUILD_BUG_ON(ARRAY_SIZE(fixed_pmc_events) != KVM_PMC_MAX_FIXED); @@ -451,10 +426,9 @@ static void setup_fixed_pmc_eventsel(struct kvm_pmu *pmu) for (i = 0; i < pmu->nr_arch_fixed_counters; i++) { int index = array_index_nospec(i, KVM_PMC_MAX_FIXED); struct kvm_pmc *pmc = &pmu->fixed_counters[index]; - u32 event = fixed_pmc_events[index]; - pmc->eventsel = (intel_arch_events[event].unit_mask << 8) | - intel_arch_events[event].eventsel; + pmc->eventsel = (fixed_pmc_events[index].unit_mask << 8) | + fixed_pmc_events[index].eventsel; } } From patchwork Wed Nov 8 00:31:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Christopherson X-Patchwork-Id: 162836 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:aa0b:0:b0:403:3b70:6f57 with SMTP id k11csp606829vqo; Tue, 7 Nov 2023 16:32:46 -0800 (PST) X-Google-Smtp-Source: AGHT+IHxednIvGmmZT9Jqewb5u6UOwBkiCsXH4gTB+SXxS0o0IZT9ffoIKbQDsGbaX9JrSCxLfgW X-Received: by 2002:a05:6358:4412:b0:168:e862:70d0 with SMTP id z18-20020a056358441200b00168e86270d0mr205064rwc.14.1699403566034; Tue, 07 Nov 2023 16:32:46 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1699403565; cv=none; d=google.com; s=arc-20160816; b=kfqPyzFfG3r7sQySAeiqNCAmMqPq3O7PxhnZnEIfwfSYDth9D0u5eF5288aUMc74hR ubcOHYETUUpfa1sUuBViYu+5XRzGBcKe83ZhpYhsnSWZ8R4BAEFQ8iU6FAtv/qY0jSA2 C2BthhEaG1sJapA5KlOZ4T21QE2+6DYa8O0J0RESnuMOuzVnsXVI+6Ions/vztJBvKTj 93eeIz7nG3dt5YqDZLU+qrHVYPPlo7KoU4eF3xTKgffwT+xcHInB/0fZrokfO4XO41T/ ditDCmTEUZhiDKT/CcgP3Av7rkDO/mGHuoWFtCBfkePWT5oS+EPayBSpMQCmh9KhvflA wZvA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:reply-to:dkim-signature; bh=eOsNu1hfSZJra6BKusRtLnJPQ4S9SkH0BAaz2rzZCWg=; fh=gm96CM+cG0KJxn7vnhn0c1c98ILNP1HHUrKfrGecw3M=; b=ENHW5KcYJqNEQQhAYaZjrEel6m3vVLiXdnz19lmjftsgLcOObNWJ7YQzqw3GSY2xaV g7FgB6fqlUYbjIgUcnYGeJxX+cvu5fYadnK89QFfTX7R7TestJrPb/4TBeUUIJcfa7pV OVu5CNNKOyndnmmNF3tgng9UUj3xwgR81Skf0VTkGJ+glwxQVJ3IyD7iR8sL02O+Kxgu vMJuvH89aj+btJVNZbtoC83BuGn0O4BSn8HhDCxDK8Y06Qd9b4hKHLf2L4YoksdOOJqY STro32JTwXSmff0QHqPLrW12oqZ91OlL3dc3AzOGQJjwM3hA+hBVnaDMOgCaAUs6aXPK WWgw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=NoyOZ8tv; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:2 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from agentk.vger.email (agentk.vger.email. [2620:137:e000::3:2]) by mx.google.com with ESMTPS id i2-20020a639d02000000b0057cbd803b30si3305935pgd.654.2023.11.07.16.32.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Nov 2023 16:32:45 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:2 as permitted sender) client-ip=2620:137:e000::3:2; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=NoyOZ8tv; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:2 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by agentk.vger.email (Postfix) with ESMTP id BE1358183585; Tue, 7 Nov 2023 16:32:32 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at agentk.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1343517AbjKHAb7 (ORCPT + 32 others); Tue, 7 Nov 2023 19:31:59 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47234 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235442AbjKHAbv (ORCPT ); Tue, 7 Nov 2023 19:31:51 -0500 Received: from mail-pl1-x64a.google.com (mail-pl1-x64a.google.com [IPv6:2607:f8b0:4864:20::64a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 09A93170F for ; Tue, 7 Nov 2023 16:31:47 -0800 (PST) Received: by mail-pl1-x64a.google.com with SMTP id d9443c01a7336-1cc3130ba31so45055935ad.0 for ; Tue, 07 Nov 2023 16:31:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1699403507; x=1700008307; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=eOsNu1hfSZJra6BKusRtLnJPQ4S9SkH0BAaz2rzZCWg=; b=NoyOZ8tvKa10YQU8dxWgfxeaZ6ZN0SBerdImfyGt1C62VfoeysYKNCHcxeLufylL6d fsgmtPub5D1mt4DtTyfJR7Wqy5CzpdKPXEs5yYy+HKAaMCm/bsPEJ4THn4XgLl94RNP4 33qDzj0cCAZWBrQD5diUAFVY7dsFaXYjEh6Pu46zhVM8EQQGsg5SomdBA47jfuGvq2xj 4pHr8/j2HJCu+e90jD7z9wEXzwbJ1vwFbGKPAawDdJrBISMPnuSBzY4iC+5MKY6bJYVF EJF+jmbQQVgNccCAjeIhmON3YCHMFxfrEZiOVNI3lyHbs14gk+5UGCTUIEOdNo6b3OQy fCFw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699403507; x=1700008307; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=eOsNu1hfSZJra6BKusRtLnJPQ4S9SkH0BAaz2rzZCWg=; b=ZZ9HXB5QKql+KeyoyGWLB54bNIGPoOpto6i05RIXBov9urVuR0ExQCOTl1zoTaCSHZ 01lCTsvQY/IXxW6EQSa5MNBHSMeJJYQ+cUU54cFmDdf9o9j42Z4xD5W9J8T3w5MIfhXe XT9SkNAd3gESyrVLhcqIyYDRcqPGkzlCrbllUb8S8koKmvl4cuf8aDvOBPIKkVLnQiTa /pO2Hg/Mn9fiwWulRVZP7U5C4kpihfsd2s/M5+kgVRBnLexTTx6PM6zbTWmduZCIloS1 8dk/4gVBBN6UYm5zty9m7BgmNAMi4ZMmuBaYibLq/KDJUEnDsN+7GpFfRj4Lp6MDJnWy Kf0w== X-Gm-Message-State: AOJu0Yz/B+2MGXHNSqY9PWVJ2V3Ue0LLRpt0lh7OIMhHOzB8I9BE0WV4 PfldaGjfgS3kbDQCnjmThZaRvYAsdfM= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a17:902:6b06:b0:1cc:2f2a:7d33 with SMTP id o6-20020a1709026b0600b001cc2f2a7d33mr10169plk.2.1699403507489; Tue, 07 Nov 2023 16:31:47 -0800 (PST) Reply-To: Sean Christopherson Date: Tue, 7 Nov 2023 16:31:20 -0800 In-Reply-To: <20231108003135.546002-1-seanjc@google.com> Mime-Version: 1.0 References: <20231108003135.546002-1-seanjc@google.com> X-Mailer: git-send-email 2.42.0.869.gea05f2083d-goog Message-ID: <20231108003135.546002-5-seanjc@google.com> Subject: [PATCH v7 04/19] KVM: x86/pmu: Setup fixed counters' eventsel during PMU initialization From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Kan Liang , Dapeng Mi , Jim Mattson , Jinrong Liang , Aaron Lewis , Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (agentk.vger.email [0.0.0.0]); Tue, 07 Nov 2023 16:32:32 -0800 (PST) X-Spam-Status: No, score=-8.4 required=5.0 tests=DKIMWL_WL_MED,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE, USER_IN_DEF_DKIM_WL autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on agentk.vger.email X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1781953793692389872 X-GMAIL-MSGID: 1781953793692389872 Set the eventsel for all fixed counters during PMU initialization, the eventsel is hardcoded and consumed if and only if the counter is supported, i.e. there is no reason to redo the setup every time the PMU is refreshed. Configuring all KVM-supported fixed counter also eliminates a potential pitfall if/when KVM supports discontiguous fixed counters, in which case configuring only nr_arch_fixed_counters will be insufficient (ignoring the fact that KVM will need many other changes to support discontiguous fixed counters). Signed-off-by: Sean Christopherson --- arch/x86/kvm/vmx/pmu_intel.c | 14 ++++---------- 1 file changed, 4 insertions(+), 10 deletions(-) diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c index c4f2c6a268e7..5fc5a62af428 100644 --- a/arch/x86/kvm/vmx/pmu_intel.c +++ b/arch/x86/kvm/vmx/pmu_intel.c @@ -409,7 +409,7 @@ static int intel_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info) * Note, reference cycles is counted using a perf-defined "psuedo-encoding", * as there is no architectural general purpose encoding for reference cycles. */ -static void setup_fixed_pmc_eventsel(struct kvm_pmu *pmu) +static u64 intel_get_fixed_pmc_eventsel(int index) { const struct { u8 eventsel; @@ -419,17 +419,11 @@ static void setup_fixed_pmc_eventsel(struct kvm_pmu *pmu) [1] = { 0x3c, 0x00 }, /* CPU Cycles/ PERF_COUNT_HW_CPU_CYCLES. */ [2] = { 0x00, 0x03 }, /* Reference Cycles / PERF_COUNT_HW_REF_CPU_CYCLES*/ }; - int i; BUILD_BUG_ON(ARRAY_SIZE(fixed_pmc_events) != KVM_PMC_MAX_FIXED); - for (i = 0; i < pmu->nr_arch_fixed_counters; i++) { - int index = array_index_nospec(i, KVM_PMC_MAX_FIXED); - struct kvm_pmc *pmc = &pmu->fixed_counters[index]; - - pmc->eventsel = (fixed_pmc_events[index].unit_mask << 8) | - fixed_pmc_events[index].eventsel; - } + return (fixed_pmc_events[index].unit_mask << 8) | + fixed_pmc_events[index].eventsel; } static void intel_pmu_refresh(struct kvm_vcpu *vcpu) @@ -495,7 +489,6 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu) kvm_pmu_cap.bit_width_fixed); pmu->counter_bitmask[KVM_PMC_FIXED] = ((u64)1 << edx.split.bit_width_fixed) - 1; - setup_fixed_pmc_eventsel(pmu); } for (i = 0; i < pmu->nr_arch_fixed_counters; i++) @@ -573,6 +566,7 @@ static void intel_pmu_init(struct kvm_vcpu *vcpu) pmu->fixed_counters[i].vcpu = vcpu; pmu->fixed_counters[i].idx = i + INTEL_PMC_IDX_FIXED; pmu->fixed_counters[i].current_config = 0; + pmu->fixed_counters[i].eventsel = intel_get_fixed_pmc_eventsel(i); } lbr_desc->records.nr = 0; From patchwork Wed Nov 8 00:31:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Christopherson X-Patchwork-Id: 162838 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:aa0b:0:b0:403:3b70:6f57 with SMTP id k11csp606884vqo; Tue, 7 Nov 2023 16:32:56 -0800 (PST) X-Google-Smtp-Source: AGHT+IETxbSAAGjhh9nWZzpuPSyp/lrrfSBYdVX/Yo9+Bo4yKG8HEGzWND0ZtnXMSVzrYJ2Z4fmm X-Received: by 2002:a05:6a00:2d81:b0:6c3:6cdc:a297 with SMTP id fb1-20020a056a002d8100b006c36cdca297mr276501pfb.14.1699403575809; Tue, 07 Nov 2023 16:32:55 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1699403575; cv=none; d=google.com; s=arc-20160816; b=bcAJOtGHRsGXSK7xssEiscnP9o8DlG+EPq3ooI2qeN3nfM1esTluqgxVt1f5upyEJ6 MXQ9/PkihDfUjap7sGlZx+cCx0YqYnMaUTaCpg/WJfo2QsxFE4BUcXPhLwKLFsvYDs4E ExMdk1F6j+VD2gSKVETtsJbxBR+G+u/l7RFd455XxNyo1gpIQw+JRTm5IJPK2YJ6OxEK DaKwEgF6aFzVfo+1D+Kw/8jHiHZ56nQL7Ox4gYST6pRIoOB9pb44E2W7HLhzM4YRx1UD MgqF9kKimj9HX33RDyOmeYIGagdNzIU+9sTPKKEeYAJc/KFf67fRg7SViTZw7wP9bLCG QoyQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:reply-to:dkim-signature; bh=V1aBnNwJk8GR2J7q9EpiLV4j0BFKjZECzb8pGjdIuF8=; fh=gm96CM+cG0KJxn7vnhn0c1c98ILNP1HHUrKfrGecw3M=; b=eeF+WfpYL0FPSVoivMcSuQETurjsuvHm/H1Flm9iNAW+3OI/sd4BBW4czvW4kqN//d uthNOJHjI0KFHZtknts5QlF8NVMei9qpgdRxvuiKYLinbBNZLq6fFhmbi5Hp7zc2bSxK NZFNkoEqS8g5akiF2QchbdWKPXgswAF3QcnKQ5sEPy92mFPzJFetLPLOQIbbyoybNgwY Y8FaVw7BLX2XNRGzOXbqTjRTPYxoaxQ9gHphBmo/xw0ejsuAEeLlefAwFBhqhVA5CDPV nLpKUsey3cklqx1chSnmEqp5aAblgA1pbhHU8grMWtfsCz7QotsjAuRiLCD5+IjQkgJ/ xBBA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=ECT3kBiH; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.32 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from agentk.vger.email (agentk.vger.email. [23.128.96.32]) by mx.google.com with ESMTPS id x37-20020a056a0018a500b006935df301a3si12013895pfh.8.2023.11.07.16.32.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Nov 2023 16:32:55 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.32 as permitted sender) client-ip=23.128.96.32; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=ECT3kBiH; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.32 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by agentk.vger.email (Postfix) with ESMTP id 2E06F81835A0; Tue, 7 Nov 2023 16:32:43 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at agentk.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235434AbjKHAcB (ORCPT + 32 others); Tue, 7 Nov 2023 19:32:01 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47358 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235478AbjKHAbw (ORCPT ); Tue, 7 Nov 2023 19:31:52 -0500 Received: from mail-yb1-xb49.google.com (mail-yb1-xb49.google.com [IPv6:2607:f8b0:4864:20::b49]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F2A0510FB for ; Tue, 7 Nov 2023 16:31:49 -0800 (PST) Received: by mail-yb1-xb49.google.com with SMTP id 3f1490d57ef6-da0631f977bso7543817276.2 for ; Tue, 07 Nov 2023 16:31:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1699403509; x=1700008309; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=V1aBnNwJk8GR2J7q9EpiLV4j0BFKjZECzb8pGjdIuF8=; b=ECT3kBiHnT47vcqj67ZBkiRtuPrdVkOyqQ106DWa87K1l4jHc0gkTbSPUxX+uTKuUy d49jrQn43VjO2WPVmPG6OPFDnDYIgso4YyWdB2uXZf7jvNycF6zoo2wOh2v7ncSWxv1f Y8SSrgh1Bda5SgWT12A1MiL8+ZcnS5LJBRHPank9r+0QC0zPbZuU/cJI4h7ZVHMdAs3x 0TdiDnj89yglCsQi3qnyUjYuUxiSsXTmVswIt/4MBPUOwFnlcS8MUfkETRzFqXm/lSsG 7zFOhW5aMfhsWYF28DdvpwyBoxwE19CTPCSKGxqt9njYqfHhhM+s+7ck0VDXr9lRwFDv qDEw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699403509; x=1700008309; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=V1aBnNwJk8GR2J7q9EpiLV4j0BFKjZECzb8pGjdIuF8=; b=iLvhD3+c04hd6QezQ76XkZuSN7b5pO8iDp8B5fBNDg5Yh0rBok+JlezJMDVlFP7OIM Or2k+wa/fk0R4HY08NlzszHh47NRfUV8hjRDwGMR2iOsVH/IG4samvhKO/Jf9BKGF1ri 6TyFj3k3x26CZGUQrs9k+wbtcxUPAI+e6+Fv2zoP6ykSsMqXoJKL4CJh0V+LO1C/pAMY jJ1Z/MmqAgjx5zf9xV/eoVwHUyKGWxtGGETQE47y3Sbgik0SGU/ZnBUyxwXhlFOrkVDS xE/fpGD03YkN82OMgrgAQATMLhcaMsVH4wgWUszUZJ8dTXmuGgj6QToIBCUdtpS9fDvg X2gw== X-Gm-Message-State: AOJu0YyhWEyQLesnVuKji/6yyLcLGdB9Zark2xJ4t7G0rJzYY1NiEnqs V43y4Gol03Cf4t0xInlrxdSRiHBqzxo= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a25:e04f:0:b0:d9b:e3f6:c8c6 with SMTP id x76-20020a25e04f000000b00d9be3f6c8c6mr5638ybg.4.1699403509176; Tue, 07 Nov 2023 16:31:49 -0800 (PST) Reply-To: Sean Christopherson Date: Tue, 7 Nov 2023 16:31:21 -0800 In-Reply-To: <20231108003135.546002-1-seanjc@google.com> Mime-Version: 1.0 References: <20231108003135.546002-1-seanjc@google.com> X-Mailer: git-send-email 2.42.0.869.gea05f2083d-goog Message-ID: <20231108003135.546002-6-seanjc@google.com> Subject: [PATCH v7 05/19] KVM: selftests: Add vcpu_set_cpuid_property() to set properties From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Kan Liang , Dapeng Mi , Jim Mattson , Jinrong Liang , Aaron Lewis , Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (agentk.vger.email [0.0.0.0]); Tue, 07 Nov 2023 16:32:43 -0800 (PST) X-Spam-Status: No, score=-8.4 required=5.0 tests=DKIMWL_WL_MED,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE, USER_IN_DEF_DKIM_WL autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on agentk.vger.email X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1781953803688351573 X-GMAIL-MSGID: 1781953803688351573 From: Jinrong Liang Add vcpu_set_cpuid_property() helper function for setting properties, and use it instead of open coding an equivalent for MAX_PHY_ADDR. Future vPMU testcases will also need to stuff various CPUID properties. Signed-off-by: Jinrong Liang Co-developed-by: Sean Christopherson Signed-off-by: Sean Christopherson Reviewed-by: Jim Mattson --- .../selftests/kvm/include/x86_64/processor.h | 4 +++- .../testing/selftests/kvm/lib/x86_64/processor.c | 15 ++++++++++++--- .../x86_64/smaller_maxphyaddr_emulation_test.c | 2 +- 3 files changed, 16 insertions(+), 5 deletions(-) diff --git a/tools/testing/selftests/kvm/include/x86_64/processor.h b/tools/testing/selftests/kvm/include/x86_64/processor.h index 25bc61dac5fb..a01931f7d954 100644 --- a/tools/testing/selftests/kvm/include/x86_64/processor.h +++ b/tools/testing/selftests/kvm/include/x86_64/processor.h @@ -994,7 +994,9 @@ static inline void vcpu_set_cpuid(struct kvm_vcpu *vcpu) vcpu_ioctl(vcpu, KVM_GET_CPUID2, vcpu->cpuid); } -void vcpu_set_cpuid_maxphyaddr(struct kvm_vcpu *vcpu, uint8_t maxphyaddr); +void vcpu_set_cpuid_property(struct kvm_vcpu *vcpu, + struct kvm_x86_cpu_property property, + uint32_t value); void vcpu_clear_cpuid_entry(struct kvm_vcpu *vcpu, uint32_t function); void vcpu_set_or_clear_cpuid_feature(struct kvm_vcpu *vcpu, diff --git a/tools/testing/selftests/kvm/lib/x86_64/processor.c b/tools/testing/selftests/kvm/lib/x86_64/processor.c index d8288374078e..67eb82a6c754 100644 --- a/tools/testing/selftests/kvm/lib/x86_64/processor.c +++ b/tools/testing/selftests/kvm/lib/x86_64/processor.c @@ -752,12 +752,21 @@ void vcpu_init_cpuid(struct kvm_vcpu *vcpu, const struct kvm_cpuid2 *cpuid) vcpu_set_cpuid(vcpu); } -void vcpu_set_cpuid_maxphyaddr(struct kvm_vcpu *vcpu, uint8_t maxphyaddr) +void vcpu_set_cpuid_property(struct kvm_vcpu *vcpu, + struct kvm_x86_cpu_property property, + uint32_t value) { - struct kvm_cpuid_entry2 *entry = vcpu_get_cpuid_entry(vcpu, 0x80000008); + struct kvm_cpuid_entry2 *entry; + + entry = __vcpu_get_cpuid_entry(vcpu, property.function, property.index); + + (&entry->eax)[property.reg] &= ~GENMASK(property.hi_bit, property.lo_bit); + (&entry->eax)[property.reg] |= value << property.lo_bit; - entry->eax = (entry->eax & ~0xff) | maxphyaddr; vcpu_set_cpuid(vcpu); + + /* Sanity check that @value doesn't exceed the bounds in any way. */ + TEST_ASSERT_EQ(kvm_cpuid_property(vcpu->cpuid, property), value); } void vcpu_clear_cpuid_entry(struct kvm_vcpu *vcpu, uint32_t function) diff --git a/tools/testing/selftests/kvm/x86_64/smaller_maxphyaddr_emulation_test.c b/tools/testing/selftests/kvm/x86_64/smaller_maxphyaddr_emulation_test.c index 06edf00a97d6..9b89440dff19 100644 --- a/tools/testing/selftests/kvm/x86_64/smaller_maxphyaddr_emulation_test.c +++ b/tools/testing/selftests/kvm/x86_64/smaller_maxphyaddr_emulation_test.c @@ -63,7 +63,7 @@ int main(int argc, char *argv[]) vm_init_descriptor_tables(vm); vcpu_init_descriptor_tables(vcpu); - vcpu_set_cpuid_maxphyaddr(vcpu, MAXPHYADDR); + vcpu_set_cpuid_property(vcpu, X86_PROPERTY_MAX_PHY_ADDR, MAXPHYADDR); rc = kvm_check_cap(KVM_CAP_EXIT_ON_EMULATION_FAILURE); TEST_ASSERT(rc, "KVM_CAP_EXIT_ON_EMULATION_FAILURE is unavailable"); From patchwork Wed Nov 8 00:31:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Christopherson X-Patchwork-Id: 162841 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:aa0b:0:b0:403:3b70:6f57 with SMTP id k11csp607046vqo; Tue, 7 Nov 2023 16:33:18 -0800 (PST) X-Google-Smtp-Source: AGHT+IGic1BjvICFkfEhN9uv/xwyzOlzxBp5O5zjObWaN669PGGy3DsY7SXdsdsh/DC8kwHNAmkk X-Received: by 2002:a05:6808:1591:b0:3ae:126b:8bfc with SMTP id t17-20020a056808159100b003ae126b8bfcmr736120oiw.4.1699403598049; Tue, 07 Nov 2023 16:33:18 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1699403598; cv=none; d=google.com; s=arc-20160816; b=Q2EWquLms6Ebb+flV9Tu46G2/8Tee0EFYrkE/xE2rR2VwtO3nhy99HmOHhjaRg/Qtq QrF2JWv1/09jgqKAy+tBxhIpopYBRNn8QudPKZRFApRG48WNbbPJz1CZoe1FWEBDz8Oj L13r4cMddlh1MmOG7S38h0AFSQ2PyQWL+/UbTl/wExzlLpTB8WgBkEwvZHmOvDzYD+u+ RZAhbI9hJfGQo/ASMSKKpNHgG9l9fD1MK5uKhRb8JvLMupOYs5GdAkftanIa09u8YlXu v5eIj/Nsuj1PrstyAA0s7kl10Jwni2PdchcTk8GkUR+NUj/zq/W1MZHrzo/FpAI7brks tLmg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:reply-to:dkim-signature; bh=xR4tNxv+g07FJHlmB9dj3yDxoywssp8UIvL+izkb3n8=; fh=gm96CM+cG0KJxn7vnhn0c1c98ILNP1HHUrKfrGecw3M=; b=FDfPNR7/uGZKVzkhYmaVOcgqE2dwbsSnJMXrDhCCteduPijI5wNzALjBIIFklRlZpw nKYLcHM3NTgVxE+Vg45gWsGdqa8B3ZTmvUPsPhAvbujZSZJIGiSsdBB/LO8TKgTca3IK SJRu24IEYbQocWeI2UtAXLc6jpjd/mUWDfhJ9Vx3CEEbRC1Wci2NfElpZvcCgMDHI0Fy MztEhMDEM71MaHZely6b3fUhv1vGYHCiFg0KjxfqtWDvSSh9YCYdM9gnCIfkxexG7EM4 i0nAXuTOYHL0C2IdigdGtLg6i08h7HLXSc7hu5Pp8dLMhW4rtLfDyGfAslOwiChnuBHd 7JVg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=mcuBP0qP; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from snail.vger.email (snail.vger.email. [2620:137:e000::3:7]) by mx.google.com with ESMTPS id j5-20020a056a00234500b006c0db523732si12684664pfj.136.2023.11.07.16.33.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Nov 2023 16:33:18 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) client-ip=2620:137:e000::3:7; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=mcuBP0qP; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by snail.vger.email (Postfix) with ESMTP id 4867682ECB10; Tue, 7 Nov 2023 16:32:24 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at snail.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235662AbjKHAcI (ORCPT + 32 others); Tue, 7 Nov 2023 19:32:08 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47338 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235363AbjKHAby (ORCPT ); Tue, 7 Nov 2023 19:31:54 -0500 Received: from mail-yw1-x1149.google.com (mail-yw1-x1149.google.com [IPv6:2607:f8b0:4864:20::1149]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C7EC61707 for ; Tue, 7 Nov 2023 16:31:51 -0800 (PST) Received: by mail-yw1-x1149.google.com with SMTP id 00721157ae682-5b02ed0f886so86120427b3.0 for ; Tue, 07 Nov 2023 16:31:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1699403511; x=1700008311; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=xR4tNxv+g07FJHlmB9dj3yDxoywssp8UIvL+izkb3n8=; b=mcuBP0qPGUO84/kUz8vmjV6Gtnm+1X39C8G3AoHnlxpn9GODEWIQICrU97Y8LVHmH5 wsisMZjO9tHWduxCKM7Hk3y9zWAKSZPkEhPjZ+b6G/CK5eYmahqJxGgkbGXSaA3QVIp1 lpkeRKeq58bpXFr3qhEQOKY/0n6lTxX/qNENL81LC5s8MiCh3aMltl3Ggrf4G0RXS3uc QKIhPueQkz/3PgQcu1/rAbK1DOdyrLAsqbzqcR65xNlcNFjSuOYrpsLvIo5blZkkpqYL NJPeRXtsXHO85/v20pnmK/rtFUQNR0ZvfEf+BTWFd3VswUtMtF5eIfIc/afOZOwAornB VQ0g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699403511; x=1700008311; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=xR4tNxv+g07FJHlmB9dj3yDxoywssp8UIvL+izkb3n8=; b=DGahTvpVP3pAJqp+L6iqFjKx5D6B281RVZxWf7VhpsIycDsjeN628ggoqDqMP2DdaI 0xNAiFQiaxIdPIkXwWaAiyyo1bciAThtn+Sl53pd/QPB66USkJIWgADhBYxfv2+y128s g+Ria+IDjQmYefObLMkULTsgZ6FgMG3G1Udx3i/a3+aX96+DqlEBIJMLua/h9GyBq0Ds i/K3986hqCfoqgbBdQXjfbmqR1nQ3SqmMgEgqLLkRN0LJamMRW/J7VVXbi50+lLXRnfJ FTWzlB+9CzxabuGVacn8PG3zpFOL6z3pjk+KNWOCVLYwyQANQwOxRIWHHhkk1IGbzpoH hZ+g== X-Gm-Message-State: AOJu0YxnXqJlUxjcDGE7TNNkx8CmcIviSo6YuidrdrT2Szzxkr0f3c2F XZgVdkvOFIrTVTLHU6KI0zSiaRK5FqY= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a05:6902:1366:b0:dae:49a3:ae23 with SMTP id bt6-20020a056902136600b00dae49a3ae23mr6014ybb.7.1699403511034; Tue, 07 Nov 2023 16:31:51 -0800 (PST) Reply-To: Sean Christopherson Date: Tue, 7 Nov 2023 16:31:22 -0800 In-Reply-To: <20231108003135.546002-1-seanjc@google.com> Mime-Version: 1.0 References: <20231108003135.546002-1-seanjc@google.com> X-Mailer: git-send-email 2.42.0.869.gea05f2083d-goog Message-ID: <20231108003135.546002-7-seanjc@google.com> Subject: [PATCH v7 06/19] KVM: selftests: Drop the "name" param from KVM_X86_PMU_FEATURE() From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Kan Liang , Dapeng Mi , Jim Mattson , Jinrong Liang , Aaron Lewis , Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Tue, 07 Nov 2023 16:32:24 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1781953827456352072 X-GMAIL-MSGID: 1781953827456352072 Drop the "name" parameter from KVM_X86_PMU_FEATURE(), it's unused and the name is redundant with the macro, i.e. it's truly useless. Reviewed-by: Jim Mattson Signed-off-by: Sean Christopherson --- tools/testing/selftests/kvm/include/x86_64/processor.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tools/testing/selftests/kvm/include/x86_64/processor.h b/tools/testing/selftests/kvm/include/x86_64/processor.h index a01931f7d954..2d9771151dd9 100644 --- a/tools/testing/selftests/kvm/include/x86_64/processor.h +++ b/tools/testing/selftests/kvm/include/x86_64/processor.h @@ -289,7 +289,7 @@ struct kvm_x86_cpu_property { struct kvm_x86_pmu_feature { struct kvm_x86_cpu_feature anti_feature; }; -#define KVM_X86_PMU_FEATURE(name, __bit) \ +#define KVM_X86_PMU_FEATURE(__bit) \ ({ \ struct kvm_x86_pmu_feature feature = { \ .anti_feature = KVM_X86_CPU_FEATURE(0xa, 0, EBX, __bit), \ @@ -298,7 +298,7 @@ struct kvm_x86_pmu_feature { feature; \ }) -#define X86_PMU_FEATURE_BRANCH_INSNS_RETIRED KVM_X86_PMU_FEATURE(BRANCH_INSNS_RETIRED, 5) +#define X86_PMU_FEATURE_BRANCH_INSNS_RETIRED KVM_X86_PMU_FEATURE(5) static inline unsigned int x86_family(unsigned int eax) { From patchwork Wed Nov 8 00:31:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Christopherson X-Patchwork-Id: 162842 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:aa0b:0:b0:403:3b70:6f57 with SMTP id k11csp607057vqo; Tue, 7 Nov 2023 16:33:19 -0800 (PST) X-Google-Smtp-Source: AGHT+IEDCO0TRaswnQOi+XfAPuJFT/ogFWOektr2XErLKDkDIXeVWlgHFG8nRhKq1WaKMPCiSBba X-Received: by 2002:a17:902:d486:b0:1cc:87f8:96b6 with SMTP id c6-20020a170902d48600b001cc87f896b6mr727328plg.66.1699403599429; Tue, 07 Nov 2023 16:33:19 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1699403599; cv=none; d=google.com; s=arc-20160816; b=ENvWR99tQ2Dcq412IJkUlQXsyDQ2dB8o9T/uq7t0R4DWzcsr8eupx1fJzVW+gX33I9 HDNaqLchSWudvi1ZbGnrlgrDjtnN/NIl7LhzAk6BK7V90k7TQIgmPqVweg/on1WLJcnV b73xxsGvf/QjbULLNtKhl3I/EHulfCUl/CTkb+pC2RZvNRpx3UUzTSrqst4W41Ld1qCp QH7j77buTlspMxenVvhWfwTzmW0zfVI1i7TA0z8iAVVNNCJyJDryrlZ9FND6H2wel7e+ mngFNzYdlc/6r6f4Dz5JoKooxNs2VpHnRylLZGDwZvOtn/FYU2As64yYsX8JBS3y+r5K A/Cg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:reply-to:dkim-signature; bh=M4yIuLWtUhd20HNDbIbdJZg/15m7GuOnQW/l0bWB/Yg=; fh=gm96CM+cG0KJxn7vnhn0c1c98ILNP1HHUrKfrGecw3M=; b=0h0mEBqtb972d32boikaiHTtfVeslgbJC3Xej8SUTZGXguRD6yDXVqZElvaW1krXqB kIcB2cWCW8jFXVotce+E9gsj+XFnIEHyCPs/8rf4tKbQ70N8v7cqsCcdRKoFN/ZLtjPm n/QwD6Cz63NvHvbMqmXNxzq9VCv3vxS6E6TP4qxMAaDj+6ERGKcxAFFq8DztF0r9kxeL rnh8TmNMeGIyVT7CsPfB50mV9Eq6/ocnwsaAFk86fsGhbOCQp0eXUo+k7JyKqJeHFr/X 6kU9VunOEcZbfnybtDuEpK4aMwgWhnqQ2MCZyKZAu/cYrJmjmP6PqMUMe0Sm+Qc6qlGG +44Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=TQNj32ib; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from snail.vger.email (snail.vger.email. [23.128.96.37]) by mx.google.com with ESMTPS id e4-20020a17090301c400b001cc4770b9aesi1067332plh.419.2023.11.07.16.33.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Nov 2023 16:33:19 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) client-ip=23.128.96.37; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=TQNj32ib; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by snail.vger.email (Postfix) with ESMTP id 4FE5182ECB1D; Tue, 7 Nov 2023 16:32:26 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at snail.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235478AbjKHAcM (ORCPT + 32 others); Tue, 7 Nov 2023 19:32:12 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47318 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235566AbjKHAb4 (ORCPT ); Tue, 7 Nov 2023 19:31:56 -0500 Received: from mail-yb1-xb49.google.com (mail-yb1-xb49.google.com [IPv6:2607:f8b0:4864:20::b49]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B50C7170F for ; Tue, 7 Nov 2023 16:31:53 -0800 (PST) Received: by mail-yb1-xb49.google.com with SMTP id 3f1490d57ef6-d9a5a3f2d4fso7256004276.3 for ; Tue, 07 Nov 2023 16:31:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1699403513; x=1700008313; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=M4yIuLWtUhd20HNDbIbdJZg/15m7GuOnQW/l0bWB/Yg=; b=TQNj32ibUGvqOlULKYklb2l45iGtZbUtdmt9uwG3qyh5cTxOQauZFKnbZRM8H3ar2H wbqfaArK/cWVYjPBX4QG7qtmtNBm+/XXpMZlo27i6L7OyyM/HgLnHX6fXR7z/jJ5tsOU dgueE06HAIivwAbnhePCuHW/M9TbS8JDjoWf2kyW6BFf/BZwdiL3+0NHc2I0hYSvyF0e IOmjY8NfBtCuSjJd/HtitMHlqEXZSItjaAma4Nr3cwXizkfT957c/lg2u+EmOaiWctRk eP+3RkhAe5D68QFXUpNjAER7RpIKHwoXx2cFasZxWznDy+3jswZVbc3XBxwvJWiUR8Az v3HA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699403513; x=1700008313; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=M4yIuLWtUhd20HNDbIbdJZg/15m7GuOnQW/l0bWB/Yg=; b=cU+qZSijG/ho1hAdzEJJzqtknRIJr2FcqaKoVbmI2gfYAPWb54elvqHw3PpzuOOP75 Ra8Fnp2uxu9sfgtPMig9onHprJ0UYM2hg3dxrN66JlDNYYMUtiaj0oxARaJ3JhCGisck EVb9xSYTsxEiIiZiC0bwe7eNOtr7Bvil662j0w50z6r2nu8JdFyGgLqGC8ke5u3TBXJk VMgrGhncDmbTuLi83ChdbEIgk20rg947bI69XJ2FY7VvkuubgMx1Ue4iHYPbBcwespMQ LkWoXoxZuD3uMT48tXwV+TFRI0cDPqiMO43cv0a25aprCmbPukd9a2jj/wTbd3/2GPC6 yq7Q== X-Gm-Message-State: AOJu0YyBQXqah5FVVH7Hz1JGLtJGWQzkKG7WKu7IVT+CigmCdQqvG7vf Uizry3q9vPhZLYxjJt6TJwupvbkF8HU= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a25:e64a:0:b0:da0:29ba:668c with SMTP id d71-20020a25e64a000000b00da029ba668cmr5699ybh.10.1699403512902; Tue, 07 Nov 2023 16:31:52 -0800 (PST) Reply-To: Sean Christopherson Date: Tue, 7 Nov 2023 16:31:23 -0800 In-Reply-To: <20231108003135.546002-1-seanjc@google.com> Mime-Version: 1.0 References: <20231108003135.546002-1-seanjc@google.com> X-Mailer: git-send-email 2.42.0.869.gea05f2083d-goog Message-ID: <20231108003135.546002-8-seanjc@google.com> Subject: [PATCH v7 07/19] KVM: selftests: Extend {kvm,this}_pmu_has() to support fixed counters From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Kan Liang , Dapeng Mi , Jim Mattson , Jinrong Liang , Aaron Lewis , Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Tue, 07 Nov 2023 16:32:26 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1781953828671834907 X-GMAIL-MSGID: 1781953828671834907 Extend the kvm_x86_pmu_feature framework to allow querying for fixed counters via {kvm,this}_pmu_has(). Like architectural events, checking for a fixed counter annoyingly requires checking multiple CPUID fields, as a fixed counter exists if: FxCtr[i]_is_supported := ECX[i] || (EDX[4:0] > i); Note, KVM currently doesn't actually support exposing fixed counters via the bitmask, but that will hopefully change sooner than later, and Intel's SDM explicitly "recommends" checking both the number of counters and the mask. Rename the intermedate "anti_feature" field to simply 'f' since the fixed counter bitmask (thankfully) doesn't have reversed polarity like the architectural events bitmask. Note, ideally the helpers would use BUILD_BUG_ON() to assert on the incoming register, but the expected usage in PMU tests can't guarantee the inputs are compile-time constants. Opportunistically define macros for all of the known architectural events and fixed counters. Signed-off-by: Sean Christopherson --- .../selftests/kvm/include/x86_64/processor.h | 65 ++++++++++++++----- 1 file changed, 47 insertions(+), 18 deletions(-) diff --git a/tools/testing/selftests/kvm/include/x86_64/processor.h b/tools/testing/selftests/kvm/include/x86_64/processor.h index 2d9771151dd9..64aecb3dcf60 100644 --- a/tools/testing/selftests/kvm/include/x86_64/processor.h +++ b/tools/testing/selftests/kvm/include/x86_64/processor.h @@ -281,24 +281,41 @@ struct kvm_x86_cpu_property { * that indicates the feature is _not_ supported, and a property that states * the length of the bit mask of unsupported features. A feature is supported * if the size of the bit mask is larger than the "unavailable" bit, and said - * bit is not set. + * bit is not set. Fixed counters also bizarre enumeration, but inverted from + * arch events for general purpose counters. Fixed counters are supported if a + * feature flag is set **OR** the total number of fixed counters is greater + * than index of the counter. * - * Wrap the "unavailable" feature to simplify checking whether or not a given - * architectural event is supported. + * Wrap the events for general purpose and fixed counters to simplify checking + * whether or not a given architectural event is supported. */ struct kvm_x86_pmu_feature { - struct kvm_x86_cpu_feature anti_feature; + struct kvm_x86_cpu_feature f; }; -#define KVM_X86_PMU_FEATURE(__bit) \ -({ \ - struct kvm_x86_pmu_feature feature = { \ - .anti_feature = KVM_X86_CPU_FEATURE(0xa, 0, EBX, __bit), \ - }; \ - \ - feature; \ +#define KVM_X86_PMU_FEATURE(__reg, __bit) \ +({ \ + struct kvm_x86_pmu_feature feature = { \ + .f = KVM_X86_CPU_FEATURE(0xa, 0, __reg, __bit), \ + }; \ + \ + kvm_static_assert(KVM_CPUID_##__reg == KVM_CPUID_EBX || \ + KVM_CPUID_##__reg == KVM_CPUID_ECX); \ + feature; \ }) -#define X86_PMU_FEATURE_BRANCH_INSNS_RETIRED KVM_X86_PMU_FEATURE(5) +#define X86_PMU_FEATURE_CPU_CYCLES KVM_X86_PMU_FEATURE(EBX, 0) +#define X86_PMU_FEATURE_INSNS_RETIRED KVM_X86_PMU_FEATURE(EBX, 1) +#define X86_PMU_FEATURE_REFERENCE_CYCLES KVM_X86_PMU_FEATURE(EBX, 2) +#define X86_PMU_FEATURE_LLC_REFERENCES KVM_X86_PMU_FEATURE(EBX, 3) +#define X86_PMU_FEATURE_LLC_MISSES KVM_X86_PMU_FEATURE(EBX, 4) +#define X86_PMU_FEATURE_BRANCH_INSNS_RETIRED KVM_X86_PMU_FEATURE(EBX, 5) +#define X86_PMU_FEATURE_BRANCHES_MISPREDICTED KVM_X86_PMU_FEATURE(EBX, 6) +#define X86_PMU_FEATURE_TOPDOWN_SLOTS KVM_X86_PMU_FEATURE(EBX, 7) + +#define X86_PMU_FEATURE_INSNS_RETIRED_FIXED KVM_X86_PMU_FEATURE(ECX, 0) +#define X86_PMU_FEATURE_CPU_CYCLES_FIXED KVM_X86_PMU_FEATURE(ECX, 1) +#define X86_PMU_FEATURE_REFERENCE_TSC_CYCLES_FIXED KVM_X86_PMU_FEATURE(ECX, 2) +#define X86_PMU_FEATURE_TOPDOWN_SLOTS_FIXED KVM_X86_PMU_FEATURE(ECX, 3) static inline unsigned int x86_family(unsigned int eax) { @@ -697,10 +714,16 @@ static __always_inline bool this_cpu_has_p(struct kvm_x86_cpu_property property) static inline bool this_pmu_has(struct kvm_x86_pmu_feature feature) { - uint32_t nr_bits = this_cpu_property(X86_PROPERTY_PMU_EBX_BIT_VECTOR_LENGTH); + uint32_t nr_bits; - return nr_bits > feature.anti_feature.bit && - !this_cpu_has(feature.anti_feature); + if (feature.f.reg == KVM_CPUID_EBX) { + nr_bits = this_cpu_property(X86_PROPERTY_PMU_EBX_BIT_VECTOR_LENGTH); + return nr_bits > feature.f.bit && !this_cpu_has(feature.f); + } + + GUEST_ASSERT(feature.f.reg == KVM_CPUID_ECX); + nr_bits = this_cpu_property(X86_PROPERTY_PMU_NR_FIXED_COUNTERS); + return nr_bits > feature.f.bit || this_cpu_has(feature.f); } static __always_inline uint64_t this_cpu_supported_xcr0(void) @@ -916,10 +939,16 @@ static __always_inline bool kvm_cpu_has_p(struct kvm_x86_cpu_property property) static inline bool kvm_pmu_has(struct kvm_x86_pmu_feature feature) { - uint32_t nr_bits = kvm_cpu_property(X86_PROPERTY_PMU_EBX_BIT_VECTOR_LENGTH); + uint32_t nr_bits; - return nr_bits > feature.anti_feature.bit && - !kvm_cpu_has(feature.anti_feature); + if (feature.f.reg == KVM_CPUID_EBX) { + nr_bits = kvm_cpu_property(X86_PROPERTY_PMU_EBX_BIT_VECTOR_LENGTH); + return nr_bits > feature.f.bit && !kvm_cpu_has(feature.f); + } + + TEST_ASSERT_EQ(feature.f.reg, KVM_CPUID_ECX); + nr_bits = kvm_cpu_property(X86_PROPERTY_PMU_NR_FIXED_COUNTERS); + return nr_bits > feature.f.bit || kvm_cpu_has(feature.f); } static __always_inline uint64_t kvm_cpu_supported_xcr0(void) From patchwork Wed Nov 8 00:31:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Christopherson X-Patchwork-Id: 162843 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:aa0b:0:b0:403:3b70:6f57 with SMTP id k11csp607060vqo; Tue, 7 Nov 2023 16:33:21 -0800 (PST) X-Google-Smtp-Source: AGHT+IFiqUDIG2QVqA0Ifs3O9vRVV7a9966/NxnxXzApyRGbyRz0JvJokquu+hn0uTDk52v78d51 X-Received: by 2002:a17:902:d301:b0:1c4:4462:f1bd with SMTP id b1-20020a170902d30100b001c44462f1bdmr503722plc.35.1699403600900; Tue, 07 Nov 2023 16:33:20 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1699403600; cv=none; d=google.com; s=arc-20160816; b=GdTuVpxgCE4vDX/ZZsn1A4W7utlHN6qEGo4iyoXf9xqQggH8j+mqnRluBLlamcDetF 7t5wzKUFMtXsWG9uR+q3QlU9hPyL63ofDIEORMP7SpvC4gXNAWCdyDed0fN0HLb1pTjt 6id3xTg0OxmjS5wuOWQNZA5ZOJ/6JxVWDE554n/fRCrVRzq53UaAaIEhMD4DnmsYbicS 733gHQ30H7N6217XJzmicBYf58f8iR7rgO54bjz+5DKXRgG6tG0oJTQpz3pSPeuNN5qp QF/JmdrHprNDbzoo9DCvIsYanrkJsQARVu4LEMrXiVVm9Wt0N+b9nIQy5FwTV6II6Noa YT/w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:reply-to:dkim-signature; bh=aX4qpoGq000cywXQKb8bS41+M3EhnxCjWJlTWHL92M0=; fh=gm96CM+cG0KJxn7vnhn0c1c98ILNP1HHUrKfrGecw3M=; b=ZjtUh3ugBMRk8APnufo63Xq3hFhQWCowIeBdnmrCTOqWl13OoBQgEpIOsR+U/Z6wy/ ohHcJMl82Ys9cRGjq303scje/usIK3oQSvzbSoXJFGnVjsMb9Azvy8JXcZEG/llyJKXL 26qlrTScPECvTFcoFRyEwnE7eCuGmx2zrTrXq3FKMEH5q7I8eORCXMQcgxgXgouwE1WR Kfs4Fp+wESanPUh8YAuuXFeiFS+yTtMcPN1m3A+en+ht8l2XUHsOaANXc/xViBVz5vS4 czCVetPrI6Ma93li/lM7eENrXq9wXfhgzOzKopULfwjKZdl248tE5Ui6mv3s3jZI/RqZ 3+nA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=ejF1DgGf; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from snail.vger.email (snail.vger.email. [23.128.96.37]) by mx.google.com with ESMTPS id m4-20020a170902db0400b001c9fe071f2csi1079106plx.105.2023.11.07.16.33.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Nov 2023 16:33:20 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) client-ip=23.128.96.37; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=ejF1DgGf; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by snail.vger.email (Postfix) with ESMTP id 80E55802A6FC; Tue, 7 Nov 2023 16:32:39 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at snail.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234703AbjKHAcR (ORCPT + 32 others); Tue, 7 Nov 2023 19:32:17 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39734 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234662AbjKHAcF (ORCPT ); Tue, 7 Nov 2023 19:32:05 -0500 Received: from mail-yb1-xb49.google.com (mail-yb1-xb49.google.com [IPv6:2607:f8b0:4864:20::b49]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C1DE9171B for ; Tue, 7 Nov 2023 16:31:55 -0800 (PST) Received: by mail-yb1-xb49.google.com with SMTP id 3f1490d57ef6-d9cb79eb417so6385134276.2 for ; Tue, 07 Nov 2023 16:31:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1699403515; x=1700008315; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=aX4qpoGq000cywXQKb8bS41+M3EhnxCjWJlTWHL92M0=; b=ejF1DgGfwuwjaYqCwuSLtSUfeBUMM8llUR08zNlWh/DQqC2Zpe2gxhJJjN67gzFN1Y Qk0EQVJVgO2d1NNldRU9gbXO8m3MzqLQglgFqDf60XDxa+h0Ss/RROLGzzI8ZOo540DB BIwJJJ/hLvP/zOfa3VW8nEjJER2m1XI67pDO2mO5dtCAyOgCbHrpCkLBdPFJW517rQHW CCs2M6JASwRKhrWAYVKHgaeAWjhbtBeuxGVLzAdl32iYJHtmNQMlN76Qcqe4p088eKAl 3bRMQ/dFlX21MfLXsijErX71+ROaSNp8c+/8NXpwbtdCgj1M06UX6F85NxJ8zTbVjEhM OI/w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699403515; x=1700008315; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=aX4qpoGq000cywXQKb8bS41+M3EhnxCjWJlTWHL92M0=; b=pIceYpXz53HS8zZdJN2xwWSlpg0cBURogwRMo/iyjIjQSwm8AnNpoV14HEESGEcAqR 2ih7eiE6uAtzota4azbmt0BBms/obrgJJugRI40PC8FwP/kbBYqfFmvHELKFhwTe8dBn m5vBcwaljN7W4ifXI/fdjKsYOMIMXOmkQmAOKTTopt+7UumU72pRooUUifPFeypz0sZB gkVcImKVU6EW5g+Hp2q10AVWC+taKX/Uz/iqDJSC30GGtdd58Yl4TmbBH1xfXKfX2i5v V7kDucI2YZEgJBKgnlNccyJ5UWzuzikeLhAkwSRp8XQufOVo3dVA18yfiwlPXchc59h4 LD2Q== X-Gm-Message-State: AOJu0Yw1UDFwJSommXKOzriCAUHoAsGORyYeObSkdj2VljhWYmCB8v+r SoBcNN906ExOG1yCfVojIyhCJN/2A44= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a25:bb46:0:b0:da0:c584:defe with SMTP id b6-20020a25bb46000000b00da0c584defemr5842ybk.13.1699403514931; Tue, 07 Nov 2023 16:31:54 -0800 (PST) Reply-To: Sean Christopherson Date: Tue, 7 Nov 2023 16:31:24 -0800 In-Reply-To: <20231108003135.546002-1-seanjc@google.com> Mime-Version: 1.0 References: <20231108003135.546002-1-seanjc@google.com> X-Mailer: git-send-email 2.42.0.869.gea05f2083d-goog Message-ID: <20231108003135.546002-9-seanjc@google.com> Subject: [PATCH v7 08/19] KVM: selftests: Add pmu.h and lib/pmu.c for common PMU assets From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Kan Liang , Dapeng Mi , Jim Mattson , Jinrong Liang , Aaron Lewis , Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Tue, 07 Nov 2023 16:32:39 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1781953829783719872 X-GMAIL-MSGID: 1781953829783719872 From: Jinrong Liang Add a PMU library for x86 selftests to help eliminate open-coded event encodings, and to reduce the amount of copy+paste between PMU selftests. Use the new common macro definitions in the existing PMU event filter test. Cc: Aaron Lewis Suggested-by: Sean Christopherson Signed-off-by: Jinrong Liang Co-developed-by: Sean Christopherson Signed-off-by: Sean Christopherson --- tools/testing/selftests/kvm/Makefile | 1 + tools/testing/selftests/kvm/include/pmu.h | 95 ++++++++++++ tools/testing/selftests/kvm/lib/pmu.c | 31 ++++ .../kvm/x86_64/pmu_event_filter_test.c | 141 ++++++------------ 4 files changed, 171 insertions(+), 97 deletions(-) create mode 100644 tools/testing/selftests/kvm/include/pmu.h create mode 100644 tools/testing/selftests/kvm/lib/pmu.c diff --git a/tools/testing/selftests/kvm/Makefile b/tools/testing/selftests/kvm/Makefile index a5963ab9215b..44d8d022b023 100644 --- a/tools/testing/selftests/kvm/Makefile +++ b/tools/testing/selftests/kvm/Makefile @@ -32,6 +32,7 @@ LIBKVM += lib/guest_modes.c LIBKVM += lib/io.c LIBKVM += lib/kvm_util.c LIBKVM += lib/memstress.c +LIBKVM += lib/pmu.c LIBKVM += lib/guest_sprintf.c LIBKVM += lib/rbtree.c LIBKVM += lib/sparsebit.c diff --git a/tools/testing/selftests/kvm/include/pmu.h b/tools/testing/selftests/kvm/include/pmu.h new file mode 100644 index 000000000000..2da59a9d98b3 --- /dev/null +++ b/tools/testing/selftests/kvm/include/pmu.h @@ -0,0 +1,95 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (C) 2023, Tencent, Inc. + */ +#ifndef SELFTEST_KVM_PMU_H +#define SELFTEST_KVM_PMU_H + +#include + +#define KVM_PMU_EVENT_FILTER_MAX_EVENTS 300 + +/* + * Encode an eventsel+umask pair into event-select MSR format. Note, this is + * technically AMD's format, as Intel's format only supports 8 bits for the + * event selector, i.e. doesn't use bits 24:16 for the selector. But, OR-ing + * in '0' is a nop and won't clobber the CMASK. + */ +#define RAW_EVENT(eventsel, umask) (((eventsel & 0xf00UL) << 24) | \ + ((eventsel) & 0xff) | \ + ((umask) & 0xff) << 8) + +/* + * These are technically Intel's definitions, but except for CMASK (see above), + * AMD's layout is compatible with Intel's. + */ +#define ARCH_PERFMON_EVENTSEL_EVENT GENMASK_ULL(7, 0) +#define ARCH_PERFMON_EVENTSEL_UMASK GENMASK_ULL(15, 8) +#define ARCH_PERFMON_EVENTSEL_USR BIT_ULL(16) +#define ARCH_PERFMON_EVENTSEL_OS BIT_ULL(17) +#define ARCH_PERFMON_EVENTSEL_EDGE BIT_ULL(18) +#define ARCH_PERFMON_EVENTSEL_PIN_CONTROL BIT_ULL(19) +#define ARCH_PERFMON_EVENTSEL_INT BIT_ULL(20) +#define ARCH_PERFMON_EVENTSEL_ANY BIT_ULL(21) +#define ARCH_PERFMON_EVENTSEL_ENABLE BIT_ULL(22) +#define ARCH_PERFMON_EVENTSEL_INV BIT_ULL(23) +#define ARCH_PERFMON_EVENTSEL_CMASK GENMASK_ULL(31, 24) + +/* RDPMC offset for Fixed PMCs */ +#define FIXED_PMC_RDPMC_METRICS BIT_ULL(29) +#define FIXED_PMC_RDPMC_BASE BIT_ULL(30) + +#define FIXED_PMC_GLOBAL_CTRL_ENABLE(_idx) BIT_ULL((32 + (_idx))) + +#define FIXED_PMC_KERNEL BIT_ULL(0) +#define FIXED_PMC_USER BIT_ULL(1) +#define FIXED_PMC_ANYTHREAD BIT_ULL(2) +#define FIXED_PMC_ENABLE_PMI BIT_ULL(3) +#define FIXED_PMC_NR_BITS 4 +#define FIXED_PMC_CTRL(_idx, _val) ((_val) << ((_idx) * FIXED_PMC_NR_BITS)) + +#define PMU_CAP_FW_WRITES BIT_ULL(13) +#define PMU_CAP_LBR_FMT 0x3f + +#define INTEL_ARCH_CPU_CYCLES RAW_EVENT(0x3c, 0x00) +#define INTEL_ARCH_INSTRUCTIONS_RETIRED RAW_EVENT(0xc0, 0x00) +#define INTEL_ARCH_REFERENCE_CYCLES RAW_EVENT(0x3c, 0x01) +#define INTEL_ARCH_LLC_REFERENCES RAW_EVENT(0x2e, 0x4f) +#define INTEL_ARCH_LLC_MISSES RAW_EVENT(0x2e, 0x41) +#define INTEL_ARCH_BRANCHES_RETIRED RAW_EVENT(0xc4, 0x00) +#define INTEL_ARCH_BRANCHES_MISPREDICTED RAW_EVENT(0xc5, 0x00) +#define INTEL_ARCH_TOPDOWN_SLOTS RAW_EVENT(0xa4, 0x01) + +#define AMD_ZEN_CORE_CYCLES RAW_EVENT(0x76, 0x00) +#define AMD_ZEN_INSTRUCTIONS_RETIRED RAW_EVENT(0xc0, 0x00) +#define AMD_ZEN_BRANCHES_RETIRED RAW_EVENT(0xc2, 0x00) +#define AMD_ZEN_BRANCHES_MISPREDICTED RAW_EVENT(0xc3, 0x00) + +/* + * Note! The order and thus the index of the architectural events matters as + * support for each event is enumerated via CPUID using the index of the event. + */ +enum intel_pmu_architectural_events { + INTEL_ARCH_CPU_CYCLES_INDEX, + INTEL_ARCH_INSTRUCTIONS_RETIRED_INDEX, + INTEL_ARCH_REFERENCE_CYCLES_INDEX, + INTEL_ARCH_LLC_REFERENCES_INDEX, + INTEL_ARCH_LLC_MISSES_INDEX, + INTEL_ARCH_BRANCHES_RETIRED_INDEX, + INTEL_ARCH_BRANCHES_MISPREDICTED_INDEX, + INTEL_ARCH_TOPDOWN_SLOTS_INDEX, + NR_INTEL_ARCH_EVENTS, +}; + +enum amd_pmu_zen_events { + AMD_ZEN_CORE_CYCLES_INDEX, + AMD_ZEN_INSTRUCTIONS_INDEX, + AMD_ZEN_BRANCHES_INDEX, + AMD_ZEN_BRANCH_MISSES_INDEX, + NR_AMD_ZEN_EVENTS, +}; + +extern const uint64_t intel_pmu_arch_events[]; +extern const uint64_t amd_pmu_zen_events[]; + +#endif /* SELFTEST_KVM_PMU_H */ diff --git a/tools/testing/selftests/kvm/lib/pmu.c b/tools/testing/selftests/kvm/lib/pmu.c new file mode 100644 index 000000000000..f31f0427c17c --- /dev/null +++ b/tools/testing/selftests/kvm/lib/pmu.c @@ -0,0 +1,31 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2023, Tencent, Inc. + */ + +#include + +#include + +#include "kvm_util.h" +#include "pmu.h" + +const uint64_t intel_pmu_arch_events[] = { + INTEL_ARCH_CPU_CYCLES, + INTEL_ARCH_INSTRUCTIONS_RETIRED, + INTEL_ARCH_REFERENCE_CYCLES, + INTEL_ARCH_LLC_REFERENCES, + INTEL_ARCH_LLC_MISSES, + INTEL_ARCH_BRANCHES_RETIRED, + INTEL_ARCH_BRANCHES_MISPREDICTED, + INTEL_ARCH_TOPDOWN_SLOTS, +}; +kvm_static_assert(ARRAY_SIZE(intel_pmu_arch_events) == NR_INTEL_ARCH_EVENTS); + +const uint64_t amd_pmu_zen_events[] = { + AMD_ZEN_CORE_CYCLES, + AMD_ZEN_INSTRUCTIONS_RETIRED, + AMD_ZEN_BRANCHES_RETIRED, + AMD_ZEN_BRANCHES_MISPREDICTED, +}; +kvm_static_assert(ARRAY_SIZE(amd_pmu_zen_events) == NR_AMD_ZEN_EVENTS); diff --git a/tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c b/tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c index 283cc55597a4..7ec9fbed92e0 100644 --- a/tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c +++ b/tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c @@ -11,72 +11,18 @@ */ #define _GNU_SOURCE /* for program_invocation_short_name */ -#include "test_util.h" + #include "kvm_util.h" +#include "pmu.h" #include "processor.h" - -/* - * In lieu of copying perf_event.h into tools... - */ -#define ARCH_PERFMON_EVENTSEL_OS (1ULL << 17) -#define ARCH_PERFMON_EVENTSEL_ENABLE (1ULL << 22) - -/* End of stuff taken from perf_event.h. */ - -/* Oddly, this isn't in perf_event.h. */ -#define ARCH_PERFMON_BRANCHES_RETIRED 5 +#include "test_util.h" #define NUM_BRANCHES 42 -#define INTEL_PMC_IDX_FIXED 32 - -/* Matches KVM_PMU_EVENT_FILTER_MAX_EVENTS in pmu.c */ -#define MAX_FILTER_EVENTS 300 #define MAX_TEST_EVENTS 10 #define PMU_EVENT_FILTER_INVALID_ACTION (KVM_PMU_EVENT_DENY + 1) #define PMU_EVENT_FILTER_INVALID_FLAGS (KVM_PMU_EVENT_FLAGS_VALID_MASK << 1) -#define PMU_EVENT_FILTER_INVALID_NEVENTS (MAX_FILTER_EVENTS + 1) - -/* - * This is how the event selector and unit mask are stored in an AMD - * core performance event-select register. Intel's format is similar, - * but the event selector is only 8 bits. - */ -#define EVENT(select, umask) ((select & 0xf00UL) << 24 | (select & 0xff) | \ - (umask & 0xff) << 8) - -/* - * "Branch instructions retired", from the Intel SDM, volume 3, - * "Pre-defined Architectural Performance Events." - */ - -#define INTEL_BR_RETIRED EVENT(0xc4, 0) - -/* - * "Retired branch instructions", from Processor Programming Reference - * (PPR) for AMD Family 17h Model 01h, Revision B1 Processors, - * Preliminary Processor Programming Reference (PPR) for AMD Family - * 17h Model 31h, Revision B0 Processors, and Preliminary Processor - * Programming Reference (PPR) for AMD Family 19h Model 01h, Revision - * B1 Processors Volume 1 of 2. - */ - -#define AMD_ZEN_BR_RETIRED EVENT(0xc2, 0) - - -/* - * "Retired instructions", from Processor Programming Reference - * (PPR) for AMD Family 17h Model 01h, Revision B1 Processors, - * Preliminary Processor Programming Reference (PPR) for AMD Family - * 17h Model 31h, Revision B0 Processors, and Preliminary Processor - * Programming Reference (PPR) for AMD Family 19h Model 01h, Revision - * B1 Processors Volume 1 of 2. - * --- and --- - * "Instructions retired", from the Intel SDM, volume 3, - * "Pre-defined Architectural Performance Events." - */ - -#define INST_RETIRED EVENT(0xc0, 0) +#define PMU_EVENT_FILTER_INVALID_NEVENTS (KVM_PMU_EVENT_FILTER_MAX_EVENTS + 1) struct __kvm_pmu_event_filter { __u32 action; @@ -84,26 +30,28 @@ struct __kvm_pmu_event_filter { __u32 fixed_counter_bitmap; __u32 flags; __u32 pad[4]; - __u64 events[MAX_FILTER_EVENTS]; + __u64 events[KVM_PMU_EVENT_FILTER_MAX_EVENTS]; }; /* - * This event list comprises Intel's eight architectural events plus - * AMD's "retired branch instructions" for Zen[123] (and possibly - * other AMD CPUs). + * This event list comprises Intel's known architectural events, plus AMD's + * "retired branch instructions" for Zen1-Zen3 (and* possibly other AMD CPUs). + * Note, AMD and Intel use the same encoding for instructions retired. */ +kvm_static_assert(INTEL_ARCH_INSTRUCTIONS_RETIRED == AMD_ZEN_INSTRUCTIONS_RETIRED); + static const struct __kvm_pmu_event_filter base_event_filter = { .nevents = ARRAY_SIZE(base_event_filter.events), .events = { - EVENT(0x3c, 0), - INST_RETIRED, - EVENT(0x3c, 1), - EVENT(0x2e, 0x4f), - EVENT(0x2e, 0x41), - EVENT(0xc4, 0), - EVENT(0xc5, 0), - EVENT(0xa4, 1), - AMD_ZEN_BR_RETIRED, + INTEL_ARCH_CPU_CYCLES, + INTEL_ARCH_INSTRUCTIONS_RETIRED, + INTEL_ARCH_REFERENCE_CYCLES, + INTEL_ARCH_LLC_REFERENCES, + INTEL_ARCH_LLC_MISSES, + INTEL_ARCH_BRANCHES_RETIRED, + INTEL_ARCH_BRANCHES_MISPREDICTED, + INTEL_ARCH_TOPDOWN_SLOTS, + AMD_ZEN_BRANCHES_RETIRED, }, }; @@ -165,9 +113,9 @@ static void intel_guest_code(void) for (;;) { wrmsr(MSR_CORE_PERF_GLOBAL_CTRL, 0); wrmsr(MSR_P6_EVNTSEL0, ARCH_PERFMON_EVENTSEL_ENABLE | - ARCH_PERFMON_EVENTSEL_OS | INTEL_BR_RETIRED); + ARCH_PERFMON_EVENTSEL_OS | INTEL_ARCH_BRANCHES_RETIRED); wrmsr(MSR_P6_EVNTSEL1, ARCH_PERFMON_EVENTSEL_ENABLE | - ARCH_PERFMON_EVENTSEL_OS | INST_RETIRED); + ARCH_PERFMON_EVENTSEL_OS | INTEL_ARCH_INSTRUCTIONS_RETIRED); wrmsr(MSR_CORE_PERF_GLOBAL_CTRL, 0x3); run_and_measure_loop(MSR_IA32_PMC0); @@ -189,9 +137,9 @@ static void amd_guest_code(void) for (;;) { wrmsr(MSR_K7_EVNTSEL0, 0); wrmsr(MSR_K7_EVNTSEL0, ARCH_PERFMON_EVENTSEL_ENABLE | - ARCH_PERFMON_EVENTSEL_OS | AMD_ZEN_BR_RETIRED); + ARCH_PERFMON_EVENTSEL_OS | AMD_ZEN_BRANCHES_RETIRED); wrmsr(MSR_K7_EVNTSEL1, ARCH_PERFMON_EVENTSEL_ENABLE | - ARCH_PERFMON_EVENTSEL_OS | INST_RETIRED); + ARCH_PERFMON_EVENTSEL_OS | AMD_ZEN_INSTRUCTIONS_RETIRED); run_and_measure_loop(MSR_K7_PERFCTR0); GUEST_SYNC(0); @@ -312,7 +260,7 @@ static void test_amd_deny_list(struct kvm_vcpu *vcpu) .action = KVM_PMU_EVENT_DENY, .nevents = 1, .events = { - EVENT(0x1C2, 0), + RAW_EVENT(0x1C2, 0), }, }; @@ -347,9 +295,9 @@ static void test_not_member_deny_list(struct kvm_vcpu *vcpu) f.action = KVM_PMU_EVENT_DENY; - remove_event(&f, INST_RETIRED); - remove_event(&f, INTEL_BR_RETIRED); - remove_event(&f, AMD_ZEN_BR_RETIRED); + remove_event(&f, INTEL_ARCH_INSTRUCTIONS_RETIRED); + remove_event(&f, INTEL_ARCH_BRANCHES_RETIRED); + remove_event(&f, AMD_ZEN_BRANCHES_RETIRED); test_with_filter(vcpu, &f); ASSERT_PMC_COUNTING_INSTRUCTIONS(); @@ -361,9 +309,9 @@ static void test_not_member_allow_list(struct kvm_vcpu *vcpu) f.action = KVM_PMU_EVENT_ALLOW; - remove_event(&f, INST_RETIRED); - remove_event(&f, INTEL_BR_RETIRED); - remove_event(&f, AMD_ZEN_BR_RETIRED); + remove_event(&f, INTEL_ARCH_INSTRUCTIONS_RETIRED); + remove_event(&f, INTEL_ARCH_BRANCHES_RETIRED); + remove_event(&f, AMD_ZEN_BRANCHES_RETIRED); test_with_filter(vcpu, &f); ASSERT_PMC_NOT_COUNTING_INSTRUCTIONS(); @@ -452,9 +400,9 @@ static bool use_amd_pmu(void) * - Sapphire Rapids, Ice Lake, Cascade Lake, Skylake. */ #define MEM_INST_RETIRED 0xD0 -#define MEM_INST_RETIRED_LOAD EVENT(MEM_INST_RETIRED, 0x81) -#define MEM_INST_RETIRED_STORE EVENT(MEM_INST_RETIRED, 0x82) -#define MEM_INST_RETIRED_LOAD_STORE EVENT(MEM_INST_RETIRED, 0x83) +#define MEM_INST_RETIRED_LOAD RAW_EVENT(MEM_INST_RETIRED, 0x81) +#define MEM_INST_RETIRED_STORE RAW_EVENT(MEM_INST_RETIRED, 0x82) +#define MEM_INST_RETIRED_LOAD_STORE RAW_EVENT(MEM_INST_RETIRED, 0x83) static bool supports_event_mem_inst_retired(void) { @@ -486,9 +434,9 @@ static bool supports_event_mem_inst_retired(void) * B1 Processors Volume 1 of 2. */ #define LS_DISPATCH 0x29 -#define LS_DISPATCH_LOAD EVENT(LS_DISPATCH, BIT(0)) -#define LS_DISPATCH_STORE EVENT(LS_DISPATCH, BIT(1)) -#define LS_DISPATCH_LOAD_STORE EVENT(LS_DISPATCH, BIT(2)) +#define LS_DISPATCH_LOAD RAW_EVENT(LS_DISPATCH, BIT(0)) +#define LS_DISPATCH_STORE RAW_EVENT(LS_DISPATCH, BIT(1)) +#define LS_DISPATCH_LOAD_STORE RAW_EVENT(LS_DISPATCH, BIT(2)) #define INCLUDE_MASKED_ENTRY(event_select, mask, match) \ KVM_PMU_ENCODE_MASKED_ENTRY(event_select, mask, match, false) @@ -729,14 +677,14 @@ static void add_dummy_events(uint64_t *events, int nevents) static void test_masked_events(struct kvm_vcpu *vcpu) { - int nevents = MAX_FILTER_EVENTS - MAX_TEST_EVENTS; - uint64_t events[MAX_FILTER_EVENTS]; + int nevents = KVM_PMU_EVENT_FILTER_MAX_EVENTS - MAX_TEST_EVENTS; + uint64_t events[KVM_PMU_EVENT_FILTER_MAX_EVENTS]; /* Run the test cases against a sparse PMU event filter. */ run_masked_events_tests(vcpu, events, 0); /* Run the test cases against a dense PMU event filter. */ - add_dummy_events(events, MAX_FILTER_EVENTS); + add_dummy_events(events, KVM_PMU_EVENT_FILTER_MAX_EVENTS); run_masked_events_tests(vcpu, events, nevents); } @@ -809,20 +757,19 @@ static void test_filter_ioctl(struct kvm_vcpu *vcpu) TEST_ASSERT(!r, "Masking non-existent fixed counters should be allowed"); } -static void intel_run_fixed_counter_guest_code(uint8_t fixed_ctr_idx) +static void intel_run_fixed_counter_guest_code(uint8_t idx) { for (;;) { wrmsr(MSR_CORE_PERF_GLOBAL_CTRL, 0); - wrmsr(MSR_CORE_PERF_FIXED_CTR0 + fixed_ctr_idx, 0); + wrmsr(MSR_CORE_PERF_FIXED_CTR0 + idx, 0); /* Only OS_EN bit is enabled for fixed counter[idx]. */ - wrmsr(MSR_CORE_PERF_FIXED_CTR_CTRL, BIT_ULL(4 * fixed_ctr_idx)); - wrmsr(MSR_CORE_PERF_GLOBAL_CTRL, - BIT_ULL(INTEL_PMC_IDX_FIXED + fixed_ctr_idx)); + wrmsr(MSR_CORE_PERF_FIXED_CTR_CTRL, FIXED_PMC_CTRL(idx, FIXED_PMC_KERNEL)); + wrmsr(MSR_CORE_PERF_GLOBAL_CTRL, FIXED_PMC_GLOBAL_CTRL_ENABLE(idx)); __asm__ __volatile__("loop ." : "+c"((int){NUM_BRANCHES})); wrmsr(MSR_CORE_PERF_GLOBAL_CTRL, 0); - GUEST_SYNC(rdmsr(MSR_CORE_PERF_FIXED_CTR0 + fixed_ctr_idx)); + GUEST_SYNC(rdmsr(MSR_CORE_PERF_FIXED_CTR0 + idx)); } } From patchwork Wed Nov 8 00:31:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Christopherson X-Patchwork-Id: 162853 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:aa0b:0:b0:403:3b70:6f57 with SMTP id k11csp607399vqo; Tue, 7 Nov 2023 16:34:18 -0800 (PST) X-Google-Smtp-Source: AGHT+IGTm5IOubSFGLXG80VDFiLKNIk8dW5iGOeQwmcTvU6vtuH9qbo3mkYtX+aMwDp4aAUVZhg/ X-Received: by 2002:a17:902:f547:b0:1cc:32ae:4afd with SMTP id h7-20020a170902f54700b001cc32ae4afdmr633856plf.46.1699403657764; Tue, 07 Nov 2023 16:34:17 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1699403657; cv=none; d=google.com; s=arc-20160816; b=Ep+3bQjfntekDbm4fJ9rH9IsW2k/TGR0X4n7o8e302Lx9tSewcqrzsUIpmneOoYGKT gsAusRqqtotcKCesTqw9w7Gaars50pwgAGPAg2jOnEVfczGaqi0K5rMDo5cQA4RypWgC 2TmYClkWBQoZNSky0BsoXGA6IjTNshllBEE1pHUYUBAzeOUM6towMj4cRlM6deUduUgd pcveRP4b//iDbXZIGr6QPwCHmhsqoLTiQ19+Y20T6cTZsv15ocS0bcPHmiFuFCd8X1ps MZP0GbqkuQ1PFNJMO1cFlWQQAUpQKGqxLKQeg69NIOq1QfW429GhVRmPuQ8rS/+hxJ2R tR0A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:reply-to:dkim-signature; bh=9rStNPepuKR46HB8cV+26UAuhvwEQAlcD6Z/oDJzK3k=; fh=gm96CM+cG0KJxn7vnhn0c1c98ILNP1HHUrKfrGecw3M=; b=VO18SrCSjqMLkIlZUqvV6JDyDHDq17pdWEjre3mTvYG8IduQ9t3q8QkYtAlnJcitP4 0mHW3B+oBLmTbTjVktMd52vCYT6e42QlOXJhfemcqgt2fBfksHMlDJl3UvQRQsIWRx5T pTI+FfmyHyN7g23bNhGxMefv7F8V593iOWvdT6XFARB5VtR+2la/k7408rwbyUpuypv+ FcPzJy8Fwtwrk0dbbdQ+9L/WARJhCCNj+UjBngfPVf3O0W+hSd3QqFj9utRLAJ4hW3bC 0jdZ3n0tEjOIcDBXAzeFhZSu77BS36NQm5e7t2EjTAgtreY5ZJdu+ED9iVj+dRmkttbr Gfpw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=H50cak2w; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.32 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from agentk.vger.email (agentk.vger.email. [23.128.96.32]) by mx.google.com with ESMTPS id q5-20020a170902a3c500b001cc55215729si862442plb.363.2023.11.07.16.34.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Nov 2023 16:34:17 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.32 as permitted sender) client-ip=23.128.96.32; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=H50cak2w; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.32 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by agentk.vger.email (Postfix) with ESMTP id 2BC9E8183587; Tue, 7 Nov 2023 16:34:07 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at agentk.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235460AbjKHAcY (ORCPT + 32 others); Tue, 7 Nov 2023 19:32:24 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47426 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235431AbjKHAcJ (ORCPT ); Tue, 7 Nov 2023 19:32:09 -0500 Received: from mail-yw1-x114a.google.com (mail-yw1-x114a.google.com [IPv6:2607:f8b0:4864:20::114a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B0E741981 for ; Tue, 7 Nov 2023 16:31:58 -0800 (PST) Received: by mail-yw1-x114a.google.com with SMTP id 00721157ae682-5af16e00fadso86021007b3.0 for ; Tue, 07 Nov 2023 16:31:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1699403518; x=1700008318; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=9rStNPepuKR46HB8cV+26UAuhvwEQAlcD6Z/oDJzK3k=; b=H50cak2w7lAd3qtiU6eOSfvtyh3uYCXTX5U0Y5DLIn0i19OUXNF28/HeqqWC6wMEfT +J3h7QIXjN7CsdSlMchTnm3uH5dHbjHNEVYj6I5G4UjvUCcHu/RbW+a2hqAyYLHHfjJQ o4a04bjleFeE9ZRMW3n8LAw8tOU89p4sBm84s2foNCxEs9BsB0I7xNmtE92IDcgtXmc8 HEdx34TWLK5N2bSLbbYHmOQuNMTyVPU7v1ChSOO4BGpcuI//a9dwxY+drnYwlZgLxZPC 21zM0uYUGf+XD6q1RIyfknYopkjURXdNraeUZSUyl7sd6cscfqprMQsLRhoX4W7g01Sr RFDA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699403518; x=1700008318; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=9rStNPepuKR46HB8cV+26UAuhvwEQAlcD6Z/oDJzK3k=; b=dbkP9UI8RiEcEtewrcAamLW2D7Q3jT9PfC1KVETc8VPKM4FkbZhKBtHEHNR74/0hYV B5gio2W4pJYAVJLI+jtFXfIzHxJ0TuyrlhHI2BqdPfg5ckmjZk0UFaYdyF29OSJbAZLS uywOYUALA4p7DVPxBZMQifUleqpSypSQpoxmnW/PpomrfzjRBPkpqwoGLmO31i5X6g/W Q2KjflIrIIqs0xoqRv86e29zYmEBSUaQi9EdMe3nTxyBGK6pXB2WWmDpYrkViOyUySc1 XUed0LPDYD7+M7KRGTRbytEXrYSCpKW9QpxXMv6NLJzoF9ecdzEJevl+4WZhZ3A27E/J Ejgw== X-Gm-Message-State: AOJu0YyIryAqdW/Mc0U/xW0ulINSMvj0N0E3n0H84LYp8Y/cuNN0VGmj oOVzCZh8N+lUVJ9IpnYyS42xJV0xRKc= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a81:4e02:0:b0:5a7:b54e:bfc1 with SMTP id c2-20020a814e02000000b005a7b54ebfc1mr4277ywb.10.1699403517983; Tue, 07 Nov 2023 16:31:57 -0800 (PST) Reply-To: Sean Christopherson Date: Tue, 7 Nov 2023 16:31:25 -0800 In-Reply-To: <20231108003135.546002-1-seanjc@google.com> Mime-Version: 1.0 References: <20231108003135.546002-1-seanjc@google.com> X-Mailer: git-send-email 2.42.0.869.gea05f2083d-goog Message-ID: <20231108003135.546002-10-seanjc@google.com> Subject: [PATCH v7 09/19] KVM: selftests: Test Intel PMU architectural events on gp counters From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Kan Liang , Dapeng Mi , Jim Mattson , Jinrong Liang , Aaron Lewis , Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (agentk.vger.email [0.0.0.0]); Tue, 07 Nov 2023 16:34:07 -0800 (PST) X-Spam-Status: No, score=-8.4 required=5.0 tests=DKIMWL_WL_MED,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE, USER_IN_DEF_DKIM_WL autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on agentk.vger.email X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1781953889897716167 X-GMAIL-MSGID: 1781953889897716167 From: Jinrong Liang Add test cases to verify that Intel's Architectural PMU events work as expected when the are (un)available according to guest CPUID. Iterate over a range of sane PMU versions, with and without full-width writes enabled, and over interesting combinations of lengths/masks for the bit vector that enumerates unavailable events. Test up to vPMU version 5, i.e. the current architectural max. KVM only officially supports up to version 2, but the behavior of the counters is backwards compatible, i.e. KVM shouldn't do something completely different for a higher, architecturally-defined vPMU version. Verify KVM behavior against the effective vPMU version, e.g. advertising vPMU 5 when KVM only supports vPMU 2 shouldn't magically unlock vPMU 5 features. According to Intel SDM, the number of architectural events is reported through CPUID.0AH:EAX[31:24] and the architectural event x is supported if EBX[x]=0 && EAX[31:24]>x. Handcode the entirety of the measured section so that the test can precisely assert on the number of instructions and branches retired. Co-developed-by: Like Xu Signed-off-by: Like Xu Signed-off-by: Jinrong Liang Co-developed-by: Sean Christopherson Signed-off-by: Sean Christopherson --- tools/testing/selftests/kvm/Makefile | 1 + .../selftests/kvm/x86_64/pmu_counters_test.c | 321 ++++++++++++++++++ 2 files changed, 322 insertions(+) create mode 100644 tools/testing/selftests/kvm/x86_64/pmu_counters_test.c diff --git a/tools/testing/selftests/kvm/Makefile b/tools/testing/selftests/kvm/Makefile index 44d8d022b023..09f5d6fe84de 100644 --- a/tools/testing/selftests/kvm/Makefile +++ b/tools/testing/selftests/kvm/Makefile @@ -91,6 +91,7 @@ TEST_GEN_PROGS_x86_64 += x86_64/mmio_warning_test TEST_GEN_PROGS_x86_64 += x86_64/monitor_mwait_test TEST_GEN_PROGS_x86_64 += x86_64/nested_exceptions_test TEST_GEN_PROGS_x86_64 += x86_64/platform_info_test +TEST_GEN_PROGS_x86_64 += x86_64/pmu_counters_test TEST_GEN_PROGS_x86_64 += x86_64/pmu_event_filter_test TEST_GEN_PROGS_x86_64 += x86_64/set_boot_cpu_id TEST_GEN_PROGS_x86_64 += x86_64/set_sregs_test diff --git a/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c b/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c new file mode 100644 index 000000000000..5b8687bb4639 --- /dev/null +++ b/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c @@ -0,0 +1,321 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2023, Tencent, Inc. + */ + +#define _GNU_SOURCE /* for program_invocation_short_name */ +#include + +#include "pmu.h" +#include "processor.h" + +/* Number of LOOP instructions for the guest measurement payload. */ +#define NUM_BRANCHES 10 +/* + * Number of "extra" instructions that will be counted, i.e. the number of + * instructions that are needed to set up the loop and then disabled the + * counter. 2 MOV, 2 XOR, 1 WRMSR. + */ +#define NUM_EXTRA_INSNS 5 +#define NUM_INSNS_RETIRED (NUM_BRANCHES + NUM_EXTRA_INSNS) + +static uint8_t kvm_pmu_version; +static bool kvm_has_perf_caps; + +static struct kvm_vm *pmu_vm_create_with_one_vcpu(struct kvm_vcpu **vcpu, + void *guest_code, + uint8_t pmu_version, + uint64_t perf_capabilities) +{ + struct kvm_vm *vm; + + vm = vm_create_with_one_vcpu(vcpu, guest_code); + vm_init_descriptor_tables(vm); + vcpu_init_descriptor_tables(*vcpu); + + sync_global_to_guest(vm, kvm_pmu_version); + + /* + * Set PERF_CAPABILITIES before PMU version as KVM disallows enabling + * features via PERF_CAPABILITIES if the guest doesn't have a vPMU. + */ + if (kvm_has_perf_caps) + vcpu_set_msr(*vcpu, MSR_IA32_PERF_CAPABILITIES, perf_capabilities); + + vcpu_set_cpuid_property(*vcpu, X86_PROPERTY_PMU_VERSION, pmu_version); + return vm; +} + +static void run_vcpu(struct kvm_vcpu *vcpu) +{ + struct ucall uc; + + do { + vcpu_run(vcpu); + switch (get_ucall(vcpu, &uc)) { + case UCALL_SYNC: + break; + case UCALL_ABORT: + REPORT_GUEST_ASSERT(uc); + break; + case UCALL_PRINTF: + pr_info("%s", uc.buffer); + break; + case UCALL_DONE: + break; + default: + TEST_FAIL("Unexpected ucall: %lu", uc.cmd); + } + } while (uc.cmd != UCALL_DONE); +} + +static uint8_t guest_get_pmu_version(void) +{ + /* + * Return the effective PMU version, i.e. the minimum between what KVM + * supports and what is enumerated to the guest. The host deliberately + * advertises a PMU version to the guest beyond what is actually + * supported by KVM to verify KVM doesn't freak out and do something + * bizarre with an architecturally valid, but unsupported, version. + */ + return min_t(uint8_t, kvm_pmu_version, this_cpu_property(X86_PROPERTY_PMU_VERSION)); +} + +/* + * If an architectural event is supported and guaranteed to generate at least + * one "hit, assert that its count is non-zero. If an event isn't supported or + * the test can't guarantee the associated action will occur, then all bets are + * off regarding the count, i.e. no checks can be done. + * + * Sanity check that in all cases, the event doesn't count when it's disabled, + * and that KVM correctly emulates the write of an arbitrary value. + */ +static void guest_assert_event_count(uint8_t idx, + struct kvm_x86_pmu_feature event, + uint32_t pmc, uint32_t pmc_msr) +{ + uint64_t count; + + count = _rdpmc(pmc); + if (!this_pmu_has(event)) + goto sanity_checks; + + switch (idx) { + case INTEL_ARCH_INSTRUCTIONS_RETIRED_INDEX: + GUEST_ASSERT_EQ(count, NUM_INSNS_RETIRED); + break; + case INTEL_ARCH_BRANCHES_RETIRED_INDEX: + GUEST_ASSERT_EQ(count, NUM_BRANCHES); + break; + case INTEL_ARCH_CPU_CYCLES_INDEX: + case INTEL_ARCH_REFERENCE_CYCLES_INDEX: + GUEST_ASSERT_NE(count, 0); + break; + default: + break; + } + +sanity_checks: + __asm__ __volatile__("loop ." : "+c"((int){NUM_BRANCHES})); + GUEST_ASSERT_EQ(_rdpmc(pmc), count); + + wrmsr(pmc_msr, 0xdead); + GUEST_ASSERT_EQ(_rdpmc(pmc), 0xdead); +} + +static void __guest_test_arch_event(uint8_t idx, struct kvm_x86_pmu_feature event, + uint32_t pmc, uint32_t pmc_msr, + uint32_t ctrl_msr, uint64_t ctrl_msr_value) +{ + wrmsr(pmc_msr, 0); + + /* + * Enable and disable the PMC in a monolithic asm blob to ensure that + * the compiler can't insert _any_ code into the measured sequence. + * Note, ECX doesn't need to be clobbered as the input value, @pmc_msr, + * is restored before the end of the sequence. + */ + __asm__ __volatile__("wrmsr\n\t" + "mov $" __stringify(NUM_BRANCHES) ", %%ecx\n\t" + "loop .\n\t" + "mov %%edi, %%ecx\n\t" + "xor %%eax, %%eax\n\t" + "xor %%edx, %%edx\n\t" + "wrmsr\n\t" + :: "a"((uint32_t)ctrl_msr_value), + "d"(ctrl_msr_value >> 32), + "c"(ctrl_msr), "D"(ctrl_msr) + ); + + guest_assert_event_count(idx, event, pmc, pmc_msr); +} + +static void guest_test_arch_event(uint8_t idx) +{ + const struct { + struct kvm_x86_pmu_feature gp_event; + } intel_event_to_feature[] = { + [INTEL_ARCH_CPU_CYCLES_INDEX] = { X86_PMU_FEATURE_CPU_CYCLES }, + [INTEL_ARCH_INSTRUCTIONS_RETIRED_INDEX] = { X86_PMU_FEATURE_INSNS_RETIRED }, + [INTEL_ARCH_REFERENCE_CYCLES_INDEX] = { X86_PMU_FEATURE_REFERENCE_CYCLES }, + [INTEL_ARCH_LLC_REFERENCES_INDEX] = { X86_PMU_FEATURE_LLC_REFERENCES }, + [INTEL_ARCH_LLC_MISSES_INDEX] = { X86_PMU_FEATURE_LLC_MISSES }, + [INTEL_ARCH_BRANCHES_RETIRED_INDEX] = { X86_PMU_FEATURE_BRANCH_INSNS_RETIRED }, + [INTEL_ARCH_BRANCHES_MISPREDICTED_INDEX] = { X86_PMU_FEATURE_BRANCHES_MISPREDICTED }, + [INTEL_ARCH_TOPDOWN_SLOTS_INDEX] = { X86_PMU_FEATURE_TOPDOWN_SLOTS }, + }; + + uint32_t nr_gp_counters = this_cpu_property(X86_PROPERTY_PMU_NR_GP_COUNTERS); + uint32_t pmu_version = guest_get_pmu_version(); + /* PERF_GLOBAL_CTRL exists only for Architectural PMU Version 2+. */ + bool guest_has_perf_global_ctrl = pmu_version >= 2; + struct kvm_x86_pmu_feature gp_event; + uint32_t base_pmc_msr; + unsigned int i; + + /* The host side shouldn't invoke this without a guest PMU. */ + GUEST_ASSERT(pmu_version); + + if (this_cpu_has(X86_FEATURE_PDCM) && + rdmsr(MSR_IA32_PERF_CAPABILITIES) & PMU_CAP_FW_WRITES) + base_pmc_msr = MSR_IA32_PMC0; + else + base_pmc_msr = MSR_IA32_PERFCTR0; + + gp_event = intel_event_to_feature[idx].gp_event; + GUEST_ASSERT_EQ(idx, gp_event.f.bit); + + GUEST_ASSERT(nr_gp_counters); + + for (i = 0; i < nr_gp_counters; i++) { + uint64_t eventsel = ARCH_PERFMON_EVENTSEL_OS | + ARCH_PERFMON_EVENTSEL_ENABLE | + intel_pmu_arch_events[idx]; + + wrmsr(MSR_P6_EVNTSEL0 + i, 0); + if (guest_has_perf_global_ctrl) + wrmsr(MSR_CORE_PERF_GLOBAL_CTRL, BIT_ULL(i)); + + __guest_test_arch_event(idx, gp_event, i, base_pmc_msr + i, + MSR_P6_EVNTSEL0 + i, eventsel); + } +} + +static void guest_test_arch_events(void) +{ + uint8_t i; + + for (i = 0; i < NR_INTEL_ARCH_EVENTS; i++) + guest_test_arch_event(i); + + GUEST_DONE(); +} + +static void test_arch_events(uint8_t pmu_version, uint64_t perf_capabilities, + uint8_t length, uint8_t unavailable_mask) +{ + struct kvm_vcpu *vcpu; + struct kvm_vm *vm; + + /* Testing arch events requires a vPMU (there are no negative tests). */ + if (!pmu_version) + return; + + vm = pmu_vm_create_with_one_vcpu(&vcpu, guest_test_arch_events, + pmu_version, perf_capabilities); + + vcpu_set_cpuid_property(vcpu, X86_PROPERTY_PMU_EBX_BIT_VECTOR_LENGTH, + length); + vcpu_set_cpuid_property(vcpu, X86_PROPERTY_PMU_EVENTS_MASK, + unavailable_mask); + + run_vcpu(vcpu); + + kvm_vm_free(vm); +} + +static void test_intel_counters(void) +{ + uint8_t nr_arch_events = kvm_cpu_property(X86_PROPERTY_PMU_EBX_BIT_VECTOR_LENGTH); + uint8_t pmu_version = kvm_cpu_property(X86_PROPERTY_PMU_VERSION); + unsigned int i; + uint8_t v, j; + uint32_t k; + + const uint64_t perf_caps[] = { + 0, + PMU_CAP_FW_WRITES, + }; + + /* + * Test up to PMU v5, which is the current maximum version defined by + * Intel, i.e. is the last version that is guaranteed to be backwards + * compatible with KVM's existing behavior. + */ + uint8_t max_pmu_version = max_t(typeof(pmu_version), pmu_version, 5); + + /* + * Detect the existence of events that aren't supported by selftests. + * This will (obviously) fail any time the kernel adds support for a + * new event, but it's worth paying that price to keep the test fresh. + */ + TEST_ASSERT(nr_arch_events <= NR_INTEL_ARCH_EVENTS, + "New architectural event(s) detected; please update this test (length = %u, mask = %x)", + nr_arch_events, kvm_cpu_property(X86_PROPERTY_PMU_EVENTS_MASK)); + + /* + * Force iterating over known arch events regardless of whether or not + * KVM/hardware supports a given event. + */ + nr_arch_events = max_t(typeof(nr_arch_events), nr_arch_events, NR_INTEL_ARCH_EVENTS); + + for (v = 0; v <= max_pmu_version; v++) { + for (i = 0; i < ARRAY_SIZE(perf_caps); i++) { + if (!kvm_has_perf_caps && perf_caps[i]) + continue; + + pr_info("Testing arch events, PMU version %u, perf_caps = %lx\n", + v, perf_caps[i]); + /* + * To keep the total runtime reasonable, test every + * possible non-zero, non-reserved bitmap combination + * only with the native PMU version and the full bit + * vector length. + */ + if (v == pmu_version) { + for (k = 1; k < (BIT(nr_arch_events) - 1); k++) + test_arch_events(v, perf_caps[i], nr_arch_events, k); + } + /* + * Test single bits for all PMU version and lengths up + * the number of events +1 (to verify KVM doesn't do + * weird things if the guest length is greater than the + * host length). Explicitly test a mask of '0' and all + * ones i.e. all events being available and unavailable. + */ + for (j = 0; j <= nr_arch_events + 1; j++) { + test_arch_events(v, perf_caps[i], j, 0); + test_arch_events(v, perf_caps[i], j, 0xff); + + for (k = 0; k < nr_arch_events; k++) + test_arch_events(v, perf_caps[i], j, BIT(k)); + } + } + } +} + +int main(int argc, char *argv[]) +{ + TEST_REQUIRE(get_kvm_param_bool("enable_pmu")); + + TEST_REQUIRE(host_cpu_is_intel); + TEST_REQUIRE(kvm_cpu_has_p(X86_PROPERTY_PMU_VERSION)); + TEST_REQUIRE(kvm_cpu_property(X86_PROPERTY_PMU_VERSION) > 0); + + kvm_pmu_version = kvm_cpu_property(X86_PROPERTY_PMU_VERSION); + kvm_has_perf_caps = kvm_cpu_has(X86_FEATURE_PDCM); + + test_intel_counters(); + + return 0; +} From patchwork Wed Nov 8 00:31:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Christopherson X-Patchwork-Id: 162844 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:aa0b:0:b0:403:3b70:6f57 with SMTP id k11csp607083vqo; Tue, 7 Nov 2023 16:33:24 -0800 (PST) X-Google-Smtp-Source: AGHT+IGlEbn2ta8XCYVaCiyU7AGHnWycXNondH9lxaxRPDbyXBCEuJi96Tg/ebkU3PXn7l0O0E+/ X-Received: by 2002:a05:6a21:3b46:b0:181:7f53:acfa with SMTP id zy6-20020a056a213b4600b001817f53acfamr711290pzb.28.1699403603798; Tue, 07 Nov 2023 16:33:23 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1699403603; cv=none; d=google.com; s=arc-20160816; b=jGFGvwRByneB91pFmkbNPSDUE3xIUxdiRTQCk3ML/1Cbuhjog8gAcW2fqaM481P3XL Fp0E+MSx463ZYHY/S/iR0bDBz5O5Q+EhHCVk0W+XC31mm44FzaWpDK+jkIrwUnj37soW XnX/SuHXLrd7bzaSxOh2RHdhHKv02Ecdzr+DAyHN/hlTmw843ZqI5M8RnwPJhvEFhi1G xrrFrfE0vQRhpaCcb0zRlPBEtiCkZqC/3StiFwsnG1UpPt+cxWdwhSwQxFpJDo395Qfq qdQiCx0fS6Oc0TtXKSHzaE4WoLYnhObDmq3FAtC2yvj6LPyxuDu318PMnGkmKsVD0hJh shsw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:reply-to:dkim-signature; bh=694GN2yhKF8CrRVn5s3EqhYau/KZr9xDvX1ZDohDyv0=; fh=gm96CM+cG0KJxn7vnhn0c1c98ILNP1HHUrKfrGecw3M=; b=vV/DbRe2Uh68F9pXXT1GqoDO1suMWoj9g4hhUGjHqA98OzdUt7wERDjtdCBWYVxC1u ZydGGq2Gx51Qs3EgOHA5MTARqEliAhoBLHYwK5PgrxR+GfFd/35mzm3kWc7r3bBUXo6G wTGrDcV6ryS92jd+bAHeEUCxHliK7OGfYBGtbU+Ngmx/rXIHHvKCi/8TEON8Opvpd7pZ F3lera7w8WjwDioilp2/RzU9UdnvXa4SoA89XrOQJk34B7HagMSN5UuRwcHUvHMV8wc/ Ga8SIo6DlVi1KUSSZnyDqeX8aFZtUl5UkBOYfhGbvfZ4VutU93+KBYaHGZGsYqJ7KXUA iV+w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=Syp0sL31; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from snail.vger.email (snail.vger.email. [23.128.96.37]) by mx.google.com with ESMTPS id q9-20020a170902dac900b001c9b20887afsi1033002plx.431.2023.11.07.16.33.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Nov 2023 16:33:23 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) client-ip=23.128.96.37; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=Syp0sL31; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by snail.vger.email (Postfix) with ESMTP id A5016837AD0D; Tue, 7 Nov 2023 16:32:45 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at snail.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234791AbjKHAc0 (ORCPT + 32 others); Tue, 7 Nov 2023 19:32:26 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47256 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235689AbjKHAcK (ORCPT ); Tue, 7 Nov 2023 19:32:10 -0500 Received: from mail-yw1-x114a.google.com (mail-yw1-x114a.google.com [IPv6:2607:f8b0:4864:20::114a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2945C199C for ; Tue, 7 Nov 2023 16:32:00 -0800 (PST) Received: by mail-yw1-x114a.google.com with SMTP id 00721157ae682-5af592fed43so74641047b3.2 for ; Tue, 07 Nov 2023 16:32:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1699403520; x=1700008320; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=694GN2yhKF8CrRVn5s3EqhYau/KZr9xDvX1ZDohDyv0=; b=Syp0sL31YLpOc/hFnopDkEgW6HeDPFFnq4boVIw6hL9Qy35bcCXtIgK8eV6TvSUjGP uPtapynzbQyakDWARLHRbsiawMraCM/rnBCuIayeGojOc2CTG900BMGNy7bIBM2Gm/c4 ufPSLBd5JBkHM8V/y+FeiM869Qoh4LKcJ7qcq28sTwD6wCBZFVZgamvJqkQw0VLBTQz2 u2HNybCPjG8h+F+o7U6JX9agm4jaHUuRFTa+RpPAc3mmP4nEDp/kGj5cqIQud0MMw9fN Qg6VKQX/2/odGU7YjzrEisSjjqTABl1EWVpB2Q/+Zd6PzKl/Rg42o2OMKYeOc/mbEm+5 9GkA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699403520; x=1700008320; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=694GN2yhKF8CrRVn5s3EqhYau/KZr9xDvX1ZDohDyv0=; b=Ltk9eNbTszTjZWfUxoIYI4L+gO6/M6ufpqhE1SyJl+gYDhPQQSTurpPhwfNwmzN9s1 lI8mURw7h0eEfIRkIKy/C86Wa0kfVNtT1L7jJPdGPKQhvfSuvGPpAmLJL0IGlTkVYTCd usXiuIWyWEdEW04hz9NrqEPvdXjy8XUj4PPqefhKIhkrQXp6neOkJNHXy+r7vbSbmCvy /LoqRRqrD5upzwnFCVXMv/EPutlrv001+SdOK6gRdYIHgGGsMRtg6xKEhCxIuzp5bpBz FJOJm+1vqGJQ7wb8NM/eiHsc/E+Qv/HXEwyL5DOnZ5jfsP3aM29tF7SwzsSud9OVHm5u BkDA== X-Gm-Message-State: AOJu0Yy8qXmdFSVKWOJnLrGrdp9wAtM9036IexJrjJosbq6QzPw5Lj/H K1Te+vTlZW3nS+DWPioHW3Ka50H+6cc= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a0d:ebca:0:b0:5a7:acc1:5142 with SMTP id u193-20020a0debca000000b005a7acc15142mr4020ywe.8.1699403519923; Tue, 07 Nov 2023 16:31:59 -0800 (PST) Reply-To: Sean Christopherson Date: Tue, 7 Nov 2023 16:31:26 -0800 In-Reply-To: <20231108003135.546002-1-seanjc@google.com> Mime-Version: 1.0 References: <20231108003135.546002-1-seanjc@google.com> X-Mailer: git-send-email 2.42.0.869.gea05f2083d-goog Message-ID: <20231108003135.546002-11-seanjc@google.com> Subject: [PATCH v7 10/19] KVM: selftests: Test Intel PMU architectural events on fixed counters From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Kan Liang , Dapeng Mi , Jim Mattson , Jinrong Liang , Aaron Lewis , Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Tue, 07 Nov 2023 16:32:45 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1781953833365738047 X-GMAIL-MSGID: 1781953833365738047 From: Jinrong Liang Extend the PMU counters test to validate architectural events using fixed counters. The core logic is largely the same, the biggest difference being that if a fixed counter exists, its associated event is available (the SDM doesn't explicitly state this to be true, but it's KVM's ABI and letting software program a fixed counter that doesn't actually count would be quite bizarre). Note, fixed counters rely on PERF_GLOBAL_CTRL. Reviewed-by: Jim Mattson Co-developed-by: Like Xu Signed-off-by: Like Xu Signed-off-by: Jinrong Liang Co-developed-by: Sean Christopherson Signed-off-by: Sean Christopherson Reviewed-by: Dapeng Mi --- .../selftests/kvm/x86_64/pmu_counters_test.c | 54 +++++++++++++++---- 1 file changed, 45 insertions(+), 9 deletions(-) diff --git a/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c b/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c index 5b8687bb4639..9cd308417aeb 100644 --- a/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c +++ b/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c @@ -150,26 +150,46 @@ static void __guest_test_arch_event(uint8_t idx, struct kvm_x86_pmu_feature even guest_assert_event_count(idx, event, pmc, pmc_msr); } +#define X86_PMU_FEATURE_NULL \ +({ \ + struct kvm_x86_pmu_feature feature = {}; \ + \ + feature; \ +}) + +static bool pmu_is_null_feature(struct kvm_x86_pmu_feature event) +{ + return !(*(u64 *)&event); +} + static void guest_test_arch_event(uint8_t idx) { const struct { struct kvm_x86_pmu_feature gp_event; + struct kvm_x86_pmu_feature fixed_event; } intel_event_to_feature[] = { - [INTEL_ARCH_CPU_CYCLES_INDEX] = { X86_PMU_FEATURE_CPU_CYCLES }, - [INTEL_ARCH_INSTRUCTIONS_RETIRED_INDEX] = { X86_PMU_FEATURE_INSNS_RETIRED }, - [INTEL_ARCH_REFERENCE_CYCLES_INDEX] = { X86_PMU_FEATURE_REFERENCE_CYCLES }, - [INTEL_ARCH_LLC_REFERENCES_INDEX] = { X86_PMU_FEATURE_LLC_REFERENCES }, - [INTEL_ARCH_LLC_MISSES_INDEX] = { X86_PMU_FEATURE_LLC_MISSES }, - [INTEL_ARCH_BRANCHES_RETIRED_INDEX] = { X86_PMU_FEATURE_BRANCH_INSNS_RETIRED }, - [INTEL_ARCH_BRANCHES_MISPREDICTED_INDEX] = { X86_PMU_FEATURE_BRANCHES_MISPREDICTED }, - [INTEL_ARCH_TOPDOWN_SLOTS_INDEX] = { X86_PMU_FEATURE_TOPDOWN_SLOTS }, + [INTEL_ARCH_CPU_CYCLES_INDEX] = { X86_PMU_FEATURE_CPU_CYCLES, X86_PMU_FEATURE_CPU_CYCLES_FIXED }, + [INTEL_ARCH_INSTRUCTIONS_RETIRED_INDEX] = { X86_PMU_FEATURE_INSNS_RETIRED, X86_PMU_FEATURE_INSNS_RETIRED_FIXED }, + /* + * Note, the fixed counter for reference cycles is NOT the same + * as the general purpose architectural event. The fixed counter + * explicitly counts at the same frequency as the TSC, whereas + * the GP event counts at a fixed, but uarch specific, frequency. + * Bundle them here for simplicity. + */ + [INTEL_ARCH_REFERENCE_CYCLES_INDEX] = { X86_PMU_FEATURE_REFERENCE_CYCLES, X86_PMU_FEATURE_REFERENCE_TSC_CYCLES_FIXED }, + [INTEL_ARCH_LLC_REFERENCES_INDEX] = { X86_PMU_FEATURE_LLC_REFERENCES, X86_PMU_FEATURE_NULL }, + [INTEL_ARCH_LLC_MISSES_INDEX] = { X86_PMU_FEATURE_LLC_MISSES, X86_PMU_FEATURE_NULL }, + [INTEL_ARCH_BRANCHES_RETIRED_INDEX] = { X86_PMU_FEATURE_BRANCH_INSNS_RETIRED, X86_PMU_FEATURE_NULL }, + [INTEL_ARCH_BRANCHES_MISPREDICTED_INDEX] = { X86_PMU_FEATURE_BRANCHES_MISPREDICTED, X86_PMU_FEATURE_NULL }, + [INTEL_ARCH_TOPDOWN_SLOTS_INDEX] = { X86_PMU_FEATURE_TOPDOWN_SLOTS, X86_PMU_FEATURE_TOPDOWN_SLOTS_FIXED }, }; uint32_t nr_gp_counters = this_cpu_property(X86_PROPERTY_PMU_NR_GP_COUNTERS); uint32_t pmu_version = guest_get_pmu_version(); /* PERF_GLOBAL_CTRL exists only for Architectural PMU Version 2+. */ bool guest_has_perf_global_ctrl = pmu_version >= 2; - struct kvm_x86_pmu_feature gp_event; + struct kvm_x86_pmu_feature gp_event, fixed_event; uint32_t base_pmc_msr; unsigned int i; @@ -199,6 +219,22 @@ static void guest_test_arch_event(uint8_t idx) __guest_test_arch_event(idx, gp_event, i, base_pmc_msr + i, MSR_P6_EVNTSEL0 + i, eventsel); } + + if (!guest_has_perf_global_ctrl) + return; + + fixed_event = intel_event_to_feature[idx].fixed_event; + if (pmu_is_null_feature(fixed_event) || !this_pmu_has(fixed_event)) + return; + + i = fixed_event.f.bit; + + wrmsr(MSR_CORE_PERF_FIXED_CTR_CTRL, FIXED_PMC_CTRL(i, FIXED_PMC_KERNEL)); + + __guest_test_arch_event(idx, fixed_event, FIXED_PMC_RDPMC_BASE + i, + MSR_CORE_PERF_FIXED_CTR0 + i, + MSR_CORE_PERF_GLOBAL_CTRL, + FIXED_PMC_GLOBAL_CTRL_ENABLE(i)); } static void guest_test_arch_events(void) From patchwork Wed Nov 8 00:31:27 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Christopherson X-Patchwork-Id: 162846 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:aa0b:0:b0:403:3b70:6f57 with SMTP id k11csp607100vqo; Tue, 7 Nov 2023 16:33:25 -0800 (PST) X-Google-Smtp-Source: AGHT+IGFZrT0li4GOp9sMFkoY78kPHiRmYk8Szfp+IFDH/AktsjTSfHxQbW+LLAlit2adM8gwThW X-Received: by 2002:a17:902:6ac4:b0:1cc:47a6:12bf with SMTP id i4-20020a1709026ac400b001cc47a612bfmr479366plt.47.1699403605467; Tue, 07 Nov 2023 16:33:25 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1699403605; cv=none; d=google.com; s=arc-20160816; b=ELoxU00ZsjWK5PtLPHO/F6HfY1vfVpZ1AN/kbPKdMk3WAgyRgYyuf3CF32IrV1FE1K eTdQyz6xvVAy94imOI8uMlzk7fHmVy5zar60i8ruOi5+Uo9DjR2OVVFvdKp9VYE21Tnu r8lh/5sNNDBl3GrEh/m8WsOuK36S0bdiZ2naQH8ArsNBFxizm+HpjgaXm3iODCC35vSU kYmRaCvyVxkHrMCwKAEN7PPfZS7XTOM0hZ4NIJRaHrHqwOaWS+M9UJkuNe1DqucAzHa1 kFq+GotYENhdC+aQ68BRv4A08Iuz+v5k5PKYkw6uRQrQ4mzKqMWvghtQCCJ4+CXBVqQu DMaw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:reply-to:dkim-signature; bh=fciy2uDvKGS0QuzQncpVsszUsz4UsN4JK2VW9jvddoA=; fh=gm96CM+cG0KJxn7vnhn0c1c98ILNP1HHUrKfrGecw3M=; b=m4Z35157XBcNtQZZWQ241EiRUV2bKg+HG+mM8IkbWzmXNEIrRxNlMY5oVIOg8jA0Dg PM13SuqPXNyW4Gs9wBi5OlulpUTzYUYb0wQr1gg9+oFZdfYygsdSddW9a2c175H9Ycg+ xgbH9fWy5RjOwSyVDRyVRZHTXJMiyV+TKEaxmYA2meLmkyDPM8983M0NUy7HIhE+0N/V TO+Sqnz5igdxdfUeOuUoJfaCPCI5RkD8/2BEumEsoXGWEmIh+o8/vnGBDzBYhwabYAhg BQnEoXCZxD2XaX7zz3o4J9OSDLBqryi8NlCcD1fDMCCMa/1hkSM0Wk8/Ocamt27tW4H9 38ow== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=iMlPBMR9; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from snail.vger.email (snail.vger.email. [23.128.96.37]) by mx.google.com with ESMTPS id a10-20020a170902ecca00b001cc4807a1b3si1066524plh.100.2023.11.07.16.33.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Nov 2023 16:33:25 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) client-ip=23.128.96.37; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=iMlPBMR9; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by snail.vger.email (Postfix) with ESMTP id 80E2682A6BCD; Tue, 7 Nov 2023 16:32:52 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at snail.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235729AbjKHAco (ORCPT + 32 others); Tue, 7 Nov 2023 19:32:44 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42522 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235591AbjKHAcL (ORCPT ); Tue, 7 Nov 2023 19:32:11 -0500 Received: from mail-pg1-x54a.google.com (mail-pg1-x54a.google.com [IPv6:2607:f8b0:4864:20::54a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9AA2719A7 for ; Tue, 7 Nov 2023 16:32:02 -0800 (PST) Received: by mail-pg1-x54a.google.com with SMTP id 41be03b00d2f7-5b9615ecd47so4178660a12.1 for ; Tue, 07 Nov 2023 16:32:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1699403522; x=1700008322; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=fciy2uDvKGS0QuzQncpVsszUsz4UsN4JK2VW9jvddoA=; b=iMlPBMR9Z1f9Jqjw5qC4hVmNv+O2KtmDsKzTH4+ikfhU69VZCUMJtCd4aMc7hNtrMx ycqRLH2MCdjUBJMkcyUC8DSkasWrbt/rawjthKCpVkRY3I81g4oOUdUnteMJFwfC6RKi XOK4U7nK4ryseriWxa3U5sxe7inwa2O56gKtx/CpOaCr5bMu5I+HFmQvU1n3T9vcEtRg JVIvC02UQ4Jwb6WEUQMfFJ+r0Wu0W0rzGnvfkoFMKRV7BtMvyBeeCITDlkS4EbNZGYJC W5B9hfJXRSmKCRxxJsxOcb7DS0etwmraQt+uUSy/BcvrIn/1IMm+/OfMNRzwTJewNWQp PS4g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699403522; x=1700008322; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=fciy2uDvKGS0QuzQncpVsszUsz4UsN4JK2VW9jvddoA=; b=ifB5cl7W2AMYhnQW8fTFmeIXDSza9Ns1G8k8Qqn+fPrwlzqmgwZYfzcNQbi0OGMz3C JxnY4DkD6nR7Hu5SK9QBiohJydwmvJJ23syxO/C0wF4bTQJZNHOHrSmwr7ALk4DYTctB Qcj5VS/mr8KxEa++qZwg8uqn6hqVCosXQuzoShQorP6vTGxooa2S3YuEKcP4cCz84zDY 47RDqbZkmTAxrfswEUldQO69O4w0rKKJ3uVcg4BuY/X8wy4SMFFc6iXNgaX5sU1sDWwy Zk8LgLIzW6Kzb+AwRa6TOoLR5655qXEMqu0+Xb8c7KkiInmRZhf8Wwz6qZSMBc/2R/vc QMiw== X-Gm-Message-State: AOJu0YzYXGKGzRKRAzE54agv801I3csmqw1j7ZzfRAQutNo1ZefkNmrt Bs3Lzfob7x8qur/7JWK+1Y84xM4a/qs= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a17:902:ef8f:b0:1cc:454f:73dc with SMTP id iz15-20020a170902ef8f00b001cc454f73dcmr8085plb.7.1699403521842; Tue, 07 Nov 2023 16:32:01 -0800 (PST) Reply-To: Sean Christopherson Date: Tue, 7 Nov 2023 16:31:27 -0800 In-Reply-To: <20231108003135.546002-1-seanjc@google.com> Mime-Version: 1.0 References: <20231108003135.546002-1-seanjc@google.com> X-Mailer: git-send-email 2.42.0.869.gea05f2083d-goog Message-ID: <20231108003135.546002-12-seanjc@google.com> Subject: [PATCH v7 11/19] KVM: selftests: Test consistency of CPUID with num of gp counters From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Kan Liang , Dapeng Mi , Jim Mattson , Jinrong Liang , Aaron Lewis , Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Tue, 07 Nov 2023 16:32:52 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1781953834791054786 X-GMAIL-MSGID: 1781953834791054786 From: Jinrong Liang Add a test to verify that KVM correctly emulates MSR-based accesses to general purpose counters based on guest CPUID, e.g. that accesses to non-existent counters #GP and accesses to existent counters succeed. Note, for compatibility reasons, KVM does not emulate #GP when MSR_P6_PERFCTR[0|1] is not present (writes should be dropped). Co-developed-by: Like Xu Signed-off-by: Like Xu Signed-off-by: Jinrong Liang Co-developed-by: Sean Christopherson Signed-off-by: Sean Christopherson --- .../selftests/kvm/x86_64/pmu_counters_test.c | 91 +++++++++++++++++++ 1 file changed, 91 insertions(+) diff --git a/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c b/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c index 9cd308417aeb..6f2d3a64a118 100644 --- a/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c +++ b/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c @@ -270,9 +270,95 @@ static void test_arch_events(uint8_t pmu_version, uint64_t perf_capabilities, kvm_vm_free(vm); } +/* + * Limit testing to MSRs that are actually defined by Intel (in the SDM). MSRs + * that aren't defined counter MSRs *probably* don't exist, but there's no + * guarantee that currently undefined MSR indices won't be used for something + * other than PMCs in the future. + */ +#define MAX_NR_GP_COUNTERS 8 +#define MAX_NR_FIXED_COUNTERS 3 + +#define GUEST_ASSERT_PMC_MSR_ACCESS(insn, msr, expect_gp, vector) \ +__GUEST_ASSERT(expect_gp ? vector == GP_VECTOR : !vector, \ + "Expected %s on " #insn "(0x%x), got vector %u", \ + expect_gp ? "#GP" : "no fault", msr, vector) \ + +static void guest_rd_wr_counters(uint32_t base_msr, uint8_t nr_possible_counters, + uint8_t nr_counters) +{ + uint8_t i; + + for (i = 0; i < nr_possible_counters; i++) { + const uint32_t msr = base_msr + i; + const bool expect_success = i < nr_counters; + + /* + * KVM drops writes to MSR_P6_PERFCTR[0|1] if the counters are + * unsupported, i.e. doesn't #GP and reads back '0'. + */ + const uint64_t expected_val = expect_success ? 0xffff : 0; + const bool expect_gp = !expect_success && msr != MSR_P6_PERFCTR0 && + msr != MSR_P6_PERFCTR1; + uint8_t vector; + uint64_t val; + + vector = wrmsr_safe(msr, 0xffff); + GUEST_ASSERT_PMC_MSR_ACCESS(WRMSR, msr, expect_gp, vector); + + vector = rdmsr_safe(msr, &val); + GUEST_ASSERT_PMC_MSR_ACCESS(RDMSR, msr, expect_gp, vector); + + /* On #GP, the result of RDMSR is undefined. */ + if (!expect_gp) + __GUEST_ASSERT(val == expected_val, + "Expected RDMSR(0x%x) to yield 0x%lx, got 0x%lx", + msr, expected_val, val); + + vector = wrmsr_safe(msr, 0); + GUEST_ASSERT_PMC_MSR_ACCESS(WRMSR, msr, expect_gp, vector); + } + GUEST_DONE(); +} + +static void guest_test_gp_counters(void) +{ + uint8_t nr_gp_counters = 0; + uint32_t base_msr; + + if (guest_get_pmu_version()) + nr_gp_counters = this_cpu_property(X86_PROPERTY_PMU_NR_GP_COUNTERS); + + if (this_cpu_has(X86_FEATURE_PDCM) && + rdmsr(MSR_IA32_PERF_CAPABILITIES) & PMU_CAP_FW_WRITES) + base_msr = MSR_IA32_PMC0; + else + base_msr = MSR_IA32_PERFCTR0; + + guest_rd_wr_counters(base_msr, MAX_NR_GP_COUNTERS, nr_gp_counters); +} + +static void test_gp_counters(uint8_t pmu_version, uint64_t perf_capabilities, + uint8_t nr_gp_counters) +{ + struct kvm_vcpu *vcpu; + struct kvm_vm *vm; + + vm = pmu_vm_create_with_one_vcpu(&vcpu, guest_test_gp_counters, + pmu_version, perf_capabilities); + + vcpu_set_cpuid_property(vcpu, X86_PROPERTY_PMU_NR_GP_COUNTERS, + nr_gp_counters); + + run_vcpu(vcpu); + + kvm_vm_free(vm); +} + static void test_intel_counters(void) { uint8_t nr_arch_events = kvm_cpu_property(X86_PROPERTY_PMU_EBX_BIT_VECTOR_LENGTH); + uint8_t nr_gp_counters = kvm_cpu_property(X86_PROPERTY_PMU_NR_GP_COUNTERS); uint8_t pmu_version = kvm_cpu_property(X86_PROPERTY_PMU_VERSION); unsigned int i; uint8_t v, j; @@ -336,6 +422,11 @@ static void test_intel_counters(void) for (k = 0; k < nr_arch_events; k++) test_arch_events(v, perf_caps[i], j, BIT(k)); } + + pr_info("Testing GP counters, PMU version %u, perf_caps = %lx\n", + v, perf_caps[i]); + for (j = 0; j <= nr_gp_counters; j++) + test_gp_counters(v, perf_caps[i], j); } } } From patchwork Wed Nov 8 00:31:28 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Christopherson X-Patchwork-Id: 162845 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:aa0b:0:b0:403:3b70:6f57 with SMTP id k11csp607072vqo; Tue, 7 Nov 2023 16:33:22 -0800 (PST) X-Google-Smtp-Source: AGHT+IE2Mjc2pcbJzRvzHAH0+dhmdaILzPTWuB2ZLdPSWPP0JduUPWHr/jP1M03Er8a+ojQy82Lo X-Received: by 2002:a05:6870:8a2b:b0:1e9:fc64:14b4 with SMTP id p43-20020a0568708a2b00b001e9fc6414b4mr369171oaq.33.1699403602550; Tue, 07 Nov 2023 16:33:22 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1699403602; cv=none; d=google.com; s=arc-20160816; b=fhc2Sope+azEtza/D9DiwiJSFTXRWY3h65m0o+6IBEX3eZDC5p4TGZaU649QI55WSj bfWzfnGAd1Ko+wzI92zJnoEzzCQYMgIfOWqz5Q/Q/NvXYfDfu2X0NfgJsrLkG/yxwjNx BhJetKy8okqhPaJCBNoCrGKsh5bD1mOOH8O6QXwYOLdx5rTk3mW/mc1n6xsuGYsKg0cf 6wJTp0DKNtYtbumop0LcU+nNMayKpY6MWIf2Kt0IU9oyWnSqMoOeMLOa4YrFT3/Nu09A tOFbuWic94y2pDPyL3e8Pxwccs14qiFvZF2o0lnCgycMWMiK6suVdcCLAFxD90KLw/FH KL2A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:reply-to:dkim-signature; bh=hPsaF5MvjEojCPzVh5GmBO1K8rW4186JxKylBK7c9PE=; fh=gm96CM+cG0KJxn7vnhn0c1c98ILNP1HHUrKfrGecw3M=; b=y8FGUpMkdZV13yTJfRGKisC3IZiMUVpLi7lFJkvHDw1vS22Awg4JufSO4antg0G6yY YcdTY1VqTkANthK6xNCyHRI2IbNrNCIXzzbmXYE9Wlj/esmKm7cKsrUH2tpqoaIjSMm+ NojwvZf42DU05MOd0Wcz09ONFzJ4cecWV3RsgoxP90l3HR6uHqnEjXacRnws+eWIhfpo l4KIKmgVpkfoxui6cp3AjafzsjfwyhIwOgZW2JY3c9DpBasaDKl6PAGSuIcesIAlAR41 oOw1LMCQVbAuVBn2Bd7AujhObe12UuDC+E87POSO9qbRONbre1P8yP5ttmObKD4Dym7i pepw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=OAFBfY9X; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.32 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from agentk.vger.email (agentk.vger.email. [23.128.96.32]) by mx.google.com with ESMTPS id ch2-20020a056a0208c200b005bd2e734ceasi3597678pgb.368.2023.11.07.16.33.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Nov 2023 16:33:22 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.32 as permitted sender) client-ip=23.128.96.32; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=OAFBfY9X; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.32 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by agentk.vger.email (Postfix) with ESMTP id 59FAB8183589; Tue, 7 Nov 2023 16:33:13 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at agentk.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235509AbjKHAcs (ORCPT + 32 others); Tue, 7 Nov 2023 19:32:48 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47398 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235636AbjKHAcU (ORCPT ); Tue, 7 Nov 2023 19:32:20 -0500 Received: from mail-yw1-x114a.google.com (mail-yw1-x114a.google.com [IPv6:2607:f8b0:4864:20::114a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8AA1D1BCA for ; Tue, 7 Nov 2023 16:32:04 -0800 (PST) Received: by mail-yw1-x114a.google.com with SMTP id 00721157ae682-5a8ee6a1801so85683167b3.3 for ; Tue, 07 Nov 2023 16:32:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1699403524; x=1700008324; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=hPsaF5MvjEojCPzVh5GmBO1K8rW4186JxKylBK7c9PE=; b=OAFBfY9XypCElQ9k0vy2MllCoFB3uTTEepZ7kCSFZjBphuaBe1UEd6dbFR43J/0CVG opg5u8gl8bceVULcY2ryirxNriurdu1rsf+KFgfCxwNZ+FFsMQeLNRGVqTHYHYQLhngh tJLBMgcNm7jU0lazUCG/P58UR+e/ogqasGk0DWbyMUGBrnp85SHjNNjRgxjyo3EmDFu1 teENiPrIJOTqHyemf1Jqr7WwnfIXPZhK0HVRvYw1Ictffk+8/8ktDw2WwOy6nG7wE8ki Vn2siG2GsnbbsERyRq/6q84+h8qhRF+18CLPrPFvMJ8Qpa3JQ0HrTsV9cgIv5i/ce2h2 d24g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699403524; x=1700008324; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=hPsaF5MvjEojCPzVh5GmBO1K8rW4186JxKylBK7c9PE=; b=igTNTC3sbyi1DlzA0I819CQGU/qUTrhtL/ikQDfvko1m7lyPSvGYyW05yG2FzqN0MB Ux/7E8N57VpdkVpXBckwv1yCq8MLVunNoT9QPzV8O+oK0nkdooMq7q+LhNDSLUftifu7 xRSqoHGczyTI5PhOgtuSohUASJGXGwognjxIwXzcYyS6HszmS2ehdC1rC0jaffTZVGnE hXDsV2Pqv04s79ge1Cf4pP6wlDIi/AV+0MukQ5XtV4xpku3JWpxwGDwFabwutEQRwRoV QSn29cx45Tr6QSffH7R6Us0lUV+Ym00Efym4ZXZs8sbLYlH5VOABH93XvktgW0o3EUhH GbTA== X-Gm-Message-State: AOJu0Yx+4nJxLbwve3knpFXwfuIq4ISL4lVYqH58P53i+RyHapqA2XCP +0AsOMew9aU7sz8k6oXZBZUsVNQkze0= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a05:6902:24c:b0:da3:ba0f:c84f with SMTP id k12-20020a056902024c00b00da3ba0fc84fmr6339ybs.4.1699403523759; Tue, 07 Nov 2023 16:32:03 -0800 (PST) Reply-To: Sean Christopherson Date: Tue, 7 Nov 2023 16:31:28 -0800 In-Reply-To: <20231108003135.546002-1-seanjc@google.com> Mime-Version: 1.0 References: <20231108003135.546002-1-seanjc@google.com> X-Mailer: git-send-email 2.42.0.869.gea05f2083d-goog Message-ID: <20231108003135.546002-13-seanjc@google.com> Subject: [PATCH v7 12/19] KVM: selftests: Test consistency of CPUID with num of fixed counters From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Kan Liang , Dapeng Mi , Jim Mattson , Jinrong Liang , Aaron Lewis , Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (agentk.vger.email [0.0.0.0]); Tue, 07 Nov 2023 16:33:13 -0800 (PST) X-Spam-Status: No, score=-8.4 required=5.0 tests=DKIMWL_WL_MED,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE, USER_IN_DEF_DKIM_WL autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on agentk.vger.email X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1781953832253063061 X-GMAIL-MSGID: 1781953832253063061 From: Jinrong Liang Extend the PMU counters test to verify KVM emulation of fixed counters in addition to general purpose counters. Fixed counters add an extra wrinkle in the form of an extra supported bitmask. Thus quoth the SDM: fixed-function performance counter 'i' is supported if ECX[i] || (EDX[4:0] > i) Test that KVM handles a counter being available through either method. Co-developed-by: Like Xu Signed-off-by: Like Xu Signed-off-by: Jinrong Liang Co-developed-by: Sean Christopherson Signed-off-by: Sean Christopherson Reviewed-by: Dapeng Mi --- .../selftests/kvm/x86_64/pmu_counters_test.c | 60 ++++++++++++++++++- 1 file changed, 57 insertions(+), 3 deletions(-) diff --git a/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c b/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c index 6f2d3a64a118..8c934e261f2d 100644 --- a/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c +++ b/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c @@ -285,13 +285,19 @@ __GUEST_ASSERT(expect_gp ? vector == GP_VECTOR : !vector, \ expect_gp ? "#GP" : "no fault", msr, vector) \ static void guest_rd_wr_counters(uint32_t base_msr, uint8_t nr_possible_counters, - uint8_t nr_counters) + uint8_t nr_counters, uint32_t or_mask) { uint8_t i; for (i = 0; i < nr_possible_counters; i++) { const uint32_t msr = base_msr + i; - const bool expect_success = i < nr_counters; + + /* + * Fixed counters are supported if the counter is less than the + * number of enumerated contiguous counters *or* the counter is + * explicitly enumerated in the supported counters mask. + */ + const bool expect_success = i < nr_counters || (or_mask & BIT(i)); /* * KVM drops writes to MSR_P6_PERFCTR[0|1] if the counters are @@ -335,7 +341,7 @@ static void guest_test_gp_counters(void) else base_msr = MSR_IA32_PERFCTR0; - guest_rd_wr_counters(base_msr, MAX_NR_GP_COUNTERS, nr_gp_counters); + guest_rd_wr_counters(base_msr, MAX_NR_GP_COUNTERS, nr_gp_counters, 0); } static void test_gp_counters(uint8_t pmu_version, uint64_t perf_capabilities, @@ -355,9 +361,50 @@ static void test_gp_counters(uint8_t pmu_version, uint64_t perf_capabilities, kvm_vm_free(vm); } +static void guest_test_fixed_counters(void) +{ + uint64_t supported_bitmask = 0; + uint8_t nr_fixed_counters = 0; + + /* Fixed counters require Architectural vPMU Version 2+. */ + if (guest_get_pmu_version() >= 2) + nr_fixed_counters = this_cpu_property(X86_PROPERTY_PMU_NR_FIXED_COUNTERS); + + /* + * The supported bitmask for fixed counters was introduced in PMU + * version 5. + */ + if (guest_get_pmu_version() >= 5) + supported_bitmask = this_cpu_property(X86_PROPERTY_PMU_FIXED_COUNTERS_BITMASK); + + guest_rd_wr_counters(MSR_CORE_PERF_FIXED_CTR0, MAX_NR_FIXED_COUNTERS, + nr_fixed_counters, supported_bitmask); +} + +static void test_fixed_counters(uint8_t pmu_version, uint64_t perf_capabilities, + uint8_t nr_fixed_counters, + uint32_t supported_bitmask) +{ + struct kvm_vcpu *vcpu; + struct kvm_vm *vm; + + vm = pmu_vm_create_with_one_vcpu(&vcpu, guest_test_fixed_counters, + pmu_version, perf_capabilities); + + vcpu_set_cpuid_property(vcpu, X86_PROPERTY_PMU_FIXED_COUNTERS_BITMASK, + supported_bitmask); + vcpu_set_cpuid_property(vcpu, X86_PROPERTY_PMU_NR_FIXED_COUNTERS, + nr_fixed_counters); + + run_vcpu(vcpu); + + kvm_vm_free(vm); +} + static void test_intel_counters(void) { uint8_t nr_arch_events = kvm_cpu_property(X86_PROPERTY_PMU_EBX_BIT_VECTOR_LENGTH); + uint8_t nr_fixed_counters = kvm_cpu_property(X86_PROPERTY_PMU_NR_FIXED_COUNTERS); uint8_t nr_gp_counters = kvm_cpu_property(X86_PROPERTY_PMU_NR_GP_COUNTERS); uint8_t pmu_version = kvm_cpu_property(X86_PROPERTY_PMU_VERSION); unsigned int i; @@ -427,6 +474,13 @@ static void test_intel_counters(void) v, perf_caps[i]); for (j = 0; j <= nr_gp_counters; j++) test_gp_counters(v, perf_caps[i], j); + + pr_info("Testing fixed counters, PMU version %u, perf_caps = %lx\n", + v, perf_caps[i]); + for (j = 0; j <= nr_fixed_counters; j++) { + for (k = 0; k <= (BIT(nr_fixed_counters) - 1); k++) + test_fixed_counters(v, perf_caps[i], j, k); + } } } } From patchwork Wed Nov 8 00:31:29 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Christopherson X-Patchwork-Id: 162847 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:aa0b:0:b0:403:3b70:6f57 with SMTP id k11csp607127vqo; Tue, 7 Nov 2023 16:33:31 -0800 (PST) X-Google-Smtp-Source: AGHT+IH10jN4AzRi7Wk/j/S+aK2u1hybchRrTtuZkkU6VUCZWH7HCCpKaXGarGzpzLLrUn1G2riD X-Received: by 2002:a05:6a00:4516:b0:6c3:4135:d1da with SMTP id cw22-20020a056a00451600b006c34135d1damr593448pfb.1.1699403610700; Tue, 07 Nov 2023 16:33:30 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1699403610; cv=none; d=google.com; s=arc-20160816; b=Nd9lQaBnZRjRUIPE2ii2s9WxTkUSbIWSZnWOjuF1ky9HzRny/l/B6h2DNcfiq4kQ8D aWSs/VZ+G8jyniow4VLBePE7UuvNuFscWUusGNg44AqZY7tqfBMK5ZG+NMafbhMXdMEd F6+HUXSVZdH1xVgUy41QljDWabYduDxnqz8F/XGdQnrYLtp1o13ubeRiVNInFhH36j+K E61oS7r0P6SklaERoKRRLF+Ht0v5mm8xhdjSs8ro0/KE9HR382TxMjg1eFoP2iiGopMc X919UxijSMa6O9hah2iGns+0L1esB6q6McB0vcSPbm/gjHk1WA9l4oH7JGQWh5asjgvn XwfA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:reply-to:dkim-signature; bh=DXez8jM/aEISjIp4D8bbMEqvy5rF4I4jxOIMNNd6V3A=; fh=gm96CM+cG0KJxn7vnhn0c1c98ILNP1HHUrKfrGecw3M=; b=OOVzGXQIZzHATcMJ50chy1dRPwJkWfFD+1hcTYbv1GuX4Jw9jat1tv57MxE6gsrxqB kXtgJ9kmsEctBnBt+29SRldUa1fycDfDo3A3m1IE1mpP0Wq3Jxk4UVOHqSLUNYBkvwIq e03Zuw/YGDCtm+/MJE95A3sGpOloHpALdi7trSnSgZXMxpPu6lPO8JAXav+aLwj77O3K KkjffWug2XDSRo7xEfdDeVYFVE9pZqryC+vO3rL7uul7L6BKCfvn6InKLbfgUSsDypwn ccnWyb8fMLzceIh/csSR6AlBm/CzJtRqN7bQb6OCuKv7RcNZSTH61NyNB7CJf+GsceSM vsfQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=lyBjIQ5X; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from snail.vger.email (snail.vger.email. [2620:137:e000::3:7]) by mx.google.com with ESMTPS id fa30-20020a056a002d1e00b006be30cdc3d8si11644148pfb.163.2023.11.07.16.33.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Nov 2023 16:33:30 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) client-ip=2620:137:e000::3:7; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=lyBjIQ5X; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by snail.vger.email (Postfix) with ESMTP id 71D1F82A6BE7; Tue, 7 Nov 2023 16:33:03 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at snail.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344045AbjKHAcy (ORCPT + 32 others); Tue, 7 Nov 2023 19:32:54 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35936 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235664AbjKHAcU (ORCPT ); Tue, 7 Nov 2023 19:32:20 -0500 Received: from mail-yw1-x1149.google.com (mail-yw1-x1149.google.com [IPv6:2607:f8b0:4864:20::1149]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 766EC1BE1 for ; Tue, 7 Nov 2023 16:32:06 -0800 (PST) Received: by mail-yw1-x1149.google.com with SMTP id 00721157ae682-5afe220cadeso84220167b3.3 for ; Tue, 07 Nov 2023 16:32:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1699403525; x=1700008325; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=DXez8jM/aEISjIp4D8bbMEqvy5rF4I4jxOIMNNd6V3A=; b=lyBjIQ5XMT/AeIUzefVzZ1MIElN6D646JHLWWEg7/U9TLU8njDxdsd/aDaz4ThaHOw BoiGpYhJEonoropoT9flAcokZOxqZ1GJUMkiGpvl1L5EXd/MkcoVQ8EhPkcdpo8CsG/G YEth6QNRSPOkNxzKr3EiXCJdgG22Uo131WZnRfIm1JiU/Ehux4mfo9elF0Vq13wfOF4/ Eth5CJKlGYYT54qVHX/zm0zMmnpBxFFPdnwXQ048hSAE+jqf/I/uzG/CTiKTjeLHA2cD /8uYTzXS8LEyUr7nxZToI5QSejnwMo1YWPwM3171Dqnd/kIOKmK98jwJKb1ioJ2axNQQ WxeA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699403525; x=1700008325; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=DXez8jM/aEISjIp4D8bbMEqvy5rF4I4jxOIMNNd6V3A=; b=s0ZVv418LD2EbUjpVeA/T5DjDYc8ucel2P7CBaQtVMDqMjKELkf6v2U/gQ9SSQ7VXU aQs38poVaJkY662i9gf+vgVBEZHYW6716TYRYesFcwW6fy0/SwVy4sAZrjT9/T5vMH19 LyIsySevfNBUpZrAAE200eDx5h+nPhdQozSRP/2PtKZ3v4vmGqqo4sstPtT5OJ7jcgO2 eAyRK/LG7SmNejzqpFEOfSGwW21GUb/KdvDVXYWXP5ctsavPfaXSag2SyViDuCI/eIax GIzQrsTDXHJwe1HxqQaGPLjYXsDMKOkx05TubnqSn4GfZwvsGk7PUzhIAlV2rZplo8hs OMSw== X-Gm-Message-State: AOJu0YxnJGMugY5VTEq1ZNAoGQo4CqAl3jO22GlVO5ECTchnoScG7PX7 48hlw0jainPic8H4RcYFnVoq8T2Dmec= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a0d:d80e:0:b0:5a7:b9ea:5c9d with SMTP id a14-20020a0dd80e000000b005a7b9ea5c9dmr4203ywe.8.1699403525714; Tue, 07 Nov 2023 16:32:05 -0800 (PST) Reply-To: Sean Christopherson Date: Tue, 7 Nov 2023 16:31:29 -0800 In-Reply-To: <20231108003135.546002-1-seanjc@google.com> Mime-Version: 1.0 References: <20231108003135.546002-1-seanjc@google.com> X-Mailer: git-send-email 2.42.0.869.gea05f2083d-goog Message-ID: <20231108003135.546002-14-seanjc@google.com> Subject: [PATCH v7 13/19] KVM: selftests: Add functional test for Intel's fixed PMU counters From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Kan Liang , Dapeng Mi , Jim Mattson , Jinrong Liang , Aaron Lewis , Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Tue, 07 Nov 2023 16:33:03 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1781953840922023071 X-GMAIL-MSGID: 1781953840922023071 From: Jinrong Liang Extend the fixed counters test to verify that supported counters can actually be enabled in the control MSRs, that unsupported counters cannot, and that enabled counters actually count. Co-developed-by: Like Xu Signed-off-by: Like Xu Signed-off-by: Jinrong Liang [sean: fold into the rd/wr access test, massage changelog] Signed-off-by: Sean Christopherson Reviewed-by: Dapeng Mi --- .../selftests/kvm/x86_64/pmu_counters_test.c | 31 ++++++++++++++++++- 1 file changed, 30 insertions(+), 1 deletion(-) diff --git a/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c b/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c index 8c934e261f2d..b9c073d3ade9 100644 --- a/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c +++ b/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c @@ -324,7 +324,6 @@ static void guest_rd_wr_counters(uint32_t base_msr, uint8_t nr_possible_counters vector = wrmsr_safe(msr, 0); GUEST_ASSERT_PMC_MSR_ACCESS(WRMSR, msr, expect_gp, vector); } - GUEST_DONE(); } static void guest_test_gp_counters(void) @@ -342,6 +341,7 @@ static void guest_test_gp_counters(void) base_msr = MSR_IA32_PERFCTR0; guest_rd_wr_counters(base_msr, MAX_NR_GP_COUNTERS, nr_gp_counters, 0); + GUEST_DONE(); } static void test_gp_counters(uint8_t pmu_version, uint64_t perf_capabilities, @@ -365,6 +365,7 @@ static void guest_test_fixed_counters(void) { uint64_t supported_bitmask = 0; uint8_t nr_fixed_counters = 0; + uint8_t i; /* Fixed counters require Architectural vPMU Version 2+. */ if (guest_get_pmu_version() >= 2) @@ -379,6 +380,34 @@ static void guest_test_fixed_counters(void) guest_rd_wr_counters(MSR_CORE_PERF_FIXED_CTR0, MAX_NR_FIXED_COUNTERS, nr_fixed_counters, supported_bitmask); + + for (i = 0; i < MAX_NR_FIXED_COUNTERS; i++) { + uint8_t vector; + uint64_t val; + + if (i >= nr_fixed_counters && !(supported_bitmask & BIT_ULL(i))) { + vector = wrmsr_safe(MSR_CORE_PERF_FIXED_CTR_CTRL, + FIXED_PMC_CTRL(i, FIXED_PMC_KERNEL)); + __GUEST_ASSERT(vector == GP_VECTOR, + "Expected #GP for counter %u in FIXED_CTR_CTRL", i); + + vector = wrmsr_safe(MSR_CORE_PERF_GLOBAL_CTRL, + FIXED_PMC_GLOBAL_CTRL_ENABLE(i)); + __GUEST_ASSERT(vector == GP_VECTOR, + "Expected #GP for counter %u in PERF_GLOBAL_CTRL", i); + continue; + } + + wrmsr(MSR_CORE_PERF_FIXED_CTR0 + i, 0); + wrmsr(MSR_CORE_PERF_FIXED_CTR_CTRL, FIXED_PMC_CTRL(i, FIXED_PMC_KERNEL)); + wrmsr(MSR_CORE_PERF_GLOBAL_CTRL, FIXED_PMC_GLOBAL_CTRL_ENABLE(i)); + __asm__ __volatile__("loop ." : "+c"((int){NUM_BRANCHES})); + wrmsr(MSR_CORE_PERF_GLOBAL_CTRL, 0); + val = rdmsr(MSR_CORE_PERF_FIXED_CTR0 + i); + + GUEST_ASSERT_NE(val, 0); + } + GUEST_DONE(); } static void test_fixed_counters(uint8_t pmu_version, uint64_t perf_capabilities, From patchwork Wed Nov 8 00:31:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Christopherson X-Patchwork-Id: 162848 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:aa0b:0:b0:403:3b70:6f57 with SMTP id k11csp607130vqo; Tue, 7 Nov 2023 16:33:31 -0800 (PST) X-Google-Smtp-Source: AGHT+IH1GQr3IvVvw07c7FF6/Q1f4zbqGKucyD04wfz1mRXgZNWnE2AGfjuNPy5r4ea+0W0AhJim X-Received: by 2002:a92:c56d:0:b0:359:523d:f1f7 with SMTP id b13-20020a92c56d000000b00359523df1f7mr609507ilj.9.1699403611323; Tue, 07 Nov 2023 16:33:31 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1699403611; cv=none; d=google.com; s=arc-20160816; b=ifbzUM1YddFtWSNC1Lh6kVVwTMagcLA5s2LSWPFnelH/lD2BdBir5Wtx+Ry9Z6Urwg DgAOwbcLgl70obLbXO8id1zjUY5CNz/Btd/VQEUCkeriPafQv7i5BVm7sF2mrVW7jQnf UPEmBwE09JeG+X6uOK1+yJB3X3C7fREX92w+G89UTtZQDQYTDq+tCbbrr9rOXvO+UH7+ 7uqKEYuBCvZCQUBYgb3ySbZd1Ygq9vziIkn2R5mq7UrwNrG1tdBSnEYAlafcLOxyiKBw ltVY5D5zP5r6nn3Tf5a4zT+Zo/AsUV8fCsBXdWpubW6sFYI2vguxl+TtdIwd0DZVA7dw Vk7w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:reply-to:dkim-signature; bh=wf+zlCo108XjvE8MPLJv7QMxtCkSi3xWeOr1iRY+q5s=; fh=gm96CM+cG0KJxn7vnhn0c1c98ILNP1HHUrKfrGecw3M=; b=ZaBhim4uHa0S7dOT/BcFGjnQ+VBDzuisjkuoLBwD0PmaozePuX6eYvXUh/yEovZ9XH osHipzJXCiTSJE8UnDy004GovwA0XPmtBlpPL98qsnsMx2/mgY3fAxmVLQklkcyUGMAd 1JoDsZEJyOun/9tBkR6qwwN3SpGJVnBRsukmA+mkH8gzmdHBde6tp2X+Yfdx99mA82rd CGUPg/IxR59ZxkU1H2ZoLWqLymkFD9l9CT/wcg9lY6e3WNFmQ4pFOF/jhf6/YhjG6b/H TQjt8tili0v7sCt2NdFJTzIq62jti2eKgaRvNPwZUNMHwfqtZTwdoQk9S7HldAMmuWlh EZtw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=IiEyOS4+; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from snail.vger.email (snail.vger.email. [23.128.96.37]) by mx.google.com with ESMTPS id by8-20020a056a02058800b005849fe1d3aesi3536690pgb.458.2023.11.07.16.33.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Nov 2023 16:33:31 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) client-ip=23.128.96.37; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=IiEyOS4+; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by snail.vger.email (Postfix) with ESMTP id 3B14482A6BF0; Tue, 7 Nov 2023 16:33:06 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at snail.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344332AbjKHAc5 (ORCPT + 32 others); Tue, 7 Nov 2023 19:32:57 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47254 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344242AbjKHAcV (ORCPT ); Tue, 7 Nov 2023 19:32:21 -0500 Received: from mail-pl1-x649.google.com (mail-pl1-x649.google.com [IPv6:2607:f8b0:4864:20::649]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 405B6171B for ; Tue, 7 Nov 2023 16:32:08 -0800 (PST) Received: by mail-pl1-x649.google.com with SMTP id d9443c01a7336-1cc29f3afe0so42784095ad.2 for ; Tue, 07 Nov 2023 16:32:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1699403527; x=1700008327; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=wf+zlCo108XjvE8MPLJv7QMxtCkSi3xWeOr1iRY+q5s=; b=IiEyOS4++t0n0zdyc2LUBn/oMOqmwrNdLeRwB6moKHobZhTaUSoTAo/XZ2rdsj86Fu Exm7j+JYXirpA2BQ2EhoJkdZM4jRBmZy4+rUn/gH3v3ym/UM77LW78E+Z3lFXoRXEU7i dBruiI9ygZBOTYbXbXfw/pQn2qKUmtYgGxKcKeIdLAPADyPn0AHd6koBqu1wsUHbNmkJ uHIic4oEygCifzmt6OwfmHmehMmD9uuwGgdsb6SbdWt53LRUBACXS7BEAb1qHO4MsloZ PbXzWybMkdCBQsIZC/MclLAxd8xF6DahNI+aON7siz2vwusW4l1ht7S+GHAVyZGniipu 8q9w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699403527; x=1700008327; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=wf+zlCo108XjvE8MPLJv7QMxtCkSi3xWeOr1iRY+q5s=; b=Dap7JgrAIBKUsFYeUEwrny560HFbMgBB1g4emAiIINz3johI3LWfvyXd+z+HktOAVk 8lxz329ee9/+TVybkor8jRxkvcaBIAiWk/cXCbVxruEBdPfwKArDReMbt5HlOKIjLSXw p+8PYXuO5vueYNEeX2mXX/fKyRv/SQWrxBzkYVoKSfpmoqEIWyJdAG76NGmA8PsF/0AZ mevLnw9fSzM8s/IQGwEtUH50/fW6YRlntOSvD0tHg9iF1yF4XPfHfCRh79CSkZRLE9/3 hBdcAt24XyFfFN8KLUlPfq94noV4CpeqMzGEheO6AkQi8CQWy0/4/BYdfsNh9UfTvb+x jKVA== X-Gm-Message-State: AOJu0YyY0KBgxedY6aW0sDmzf92wgPFCRCwSHUIVKm/wrOe8up9HSFiw VQ9xmwlV11cCJDoTEUivTbkY4ABcVGE= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a17:902:f7d6:b0:1cc:2bff:fe61 with SMTP id h22-20020a170902f7d600b001cc2bfffe61mr10573plw.3.1699403527679; Tue, 07 Nov 2023 16:32:07 -0800 (PST) Reply-To: Sean Christopherson Date: Tue, 7 Nov 2023 16:31:30 -0800 In-Reply-To: <20231108003135.546002-1-seanjc@google.com> Mime-Version: 1.0 References: <20231108003135.546002-1-seanjc@google.com> X-Mailer: git-send-email 2.42.0.869.gea05f2083d-goog Message-ID: <20231108003135.546002-15-seanjc@google.com> Subject: [PATCH v7 14/19] KVM: selftests: Expand PMU counters test to verify LLC events From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Kan Liang , Dapeng Mi , Jim Mattson , Jinrong Liang , Aaron Lewis , Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Tue, 07 Nov 2023 16:33:06 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1781953841440511568 X-GMAIL-MSGID: 1781953841440511568 Expand the PMU counters test to verify that LLC references and misses have non-zero counts when the code being executed while the LLC event(s) is active is evicted via CFLUSH{,OPT}. Note, CLFLUSH{,OPT} requires a fence of some kind to ensure the cache lines are flushed before execution continues. Use MFENCE for simplicity (performance is not a concern). Suggested-by: Jim Mattson Signed-off-by: Sean Christopherson Reviewed-by: Dapeng Mi --- .../selftests/kvm/x86_64/pmu_counters_test.c | 59 +++++++++++++------ 1 file changed, 40 insertions(+), 19 deletions(-) diff --git a/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c b/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c index b9c073d3ade9..90381382c51f 100644 --- a/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c +++ b/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c @@ -14,9 +14,9 @@ /* * Number of "extra" instructions that will be counted, i.e. the number of * instructions that are needed to set up the loop and then disabled the - * counter. 2 MOV, 2 XOR, 1 WRMSR. + * counter. 1 CLFLUSH/CLFLUSHOPT/NOP, 1 MFENCE, 2 MOV, 2 XOR, 1 WRMSR. */ -#define NUM_EXTRA_INSNS 5 +#define NUM_EXTRA_INSNS 7 #define NUM_INSNS_RETIRED (NUM_BRANCHES + NUM_EXTRA_INSNS) static uint8_t kvm_pmu_version; @@ -107,6 +107,12 @@ static void guest_assert_event_count(uint8_t idx, case INTEL_ARCH_BRANCHES_RETIRED_INDEX: GUEST_ASSERT_EQ(count, NUM_BRANCHES); break; + case INTEL_ARCH_LLC_REFERENCES_INDEX: + case INTEL_ARCH_LLC_MISSES_INDEX: + if (!this_cpu_has(X86_FEATURE_CLFLUSHOPT) && + !this_cpu_has(X86_FEATURE_CLFLUSH)) + break; + fallthrough; case INTEL_ARCH_CPU_CYCLES_INDEX: case INTEL_ARCH_REFERENCE_CYCLES_INDEX: GUEST_ASSERT_NE(count, 0); @@ -123,29 +129,44 @@ static void guest_assert_event_count(uint8_t idx, GUEST_ASSERT_EQ(_rdpmc(pmc), 0xdead); } +/* + * Enable and disable the PMC in a monolithic asm blob to ensure that the + * compiler can't insert _any_ code into the measured sequence. Note, ECX + * doesn't need to be clobbered as the input value, @pmc_msr, is restored + * before the end of the sequence. + * + * If CLFUSH{,OPT} is supported, flush the cacheline containing (at least) the + * start of the loop to force LLC references and misses, i.e. to allow testing + * that those events actually count. + */ +#define GUEST_MEASURE_EVENT(_msr, _value, clflush) \ +do { \ + __asm__ __volatile__("wrmsr\n\t" \ + clflush "\n\t" \ + "mfence\n\t" \ + "1: mov $" __stringify(NUM_BRANCHES) ", %%ecx\n\t" \ + "loop .\n\t" \ + "mov %%edi, %%ecx\n\t" \ + "xor %%eax, %%eax\n\t" \ + "xor %%edx, %%edx\n\t" \ + "wrmsr\n\t" \ + :: "a"((uint32_t)_value), "d"(_value >> 32), \ + "c"(_msr), "D"(_msr) \ + ); \ +} while (0) + static void __guest_test_arch_event(uint8_t idx, struct kvm_x86_pmu_feature event, uint32_t pmc, uint32_t pmc_msr, uint32_t ctrl_msr, uint64_t ctrl_msr_value) { wrmsr(pmc_msr, 0); - /* - * Enable and disable the PMC in a monolithic asm blob to ensure that - * the compiler can't insert _any_ code into the measured sequence. - * Note, ECX doesn't need to be clobbered as the input value, @pmc_msr, - * is restored before the end of the sequence. - */ - __asm__ __volatile__("wrmsr\n\t" - "mov $" __stringify(NUM_BRANCHES) ", %%ecx\n\t" - "loop .\n\t" - "mov %%edi, %%ecx\n\t" - "xor %%eax, %%eax\n\t" - "xor %%edx, %%edx\n\t" - "wrmsr\n\t" - :: "a"((uint32_t)ctrl_msr_value), - "d"(ctrl_msr_value >> 32), - "c"(ctrl_msr), "D"(ctrl_msr) - ); + if (this_cpu_has(X86_FEATURE_CLFLUSHOPT)) + GUEST_MEASURE_EVENT(ctrl_msr, ctrl_msr_value, "clflushopt 1f"); + else if (this_cpu_has(X86_FEATURE_CLFLUSH)) + GUEST_MEASURE_EVENT(ctrl_msr, ctrl_msr_value, "clflush 1f"); + else + GUEST_MEASURE_EVENT(ctrl_msr, ctrl_msr_value, "nop"); guest_assert_event_count(idx, event, pmc, pmc_msr); } From patchwork Wed Nov 8 00:31:31 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Christopherson X-Patchwork-Id: 162849 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:aa0b:0:b0:403:3b70:6f57 with SMTP id k11csp607145vqo; Tue, 7 Nov 2023 16:33:33 -0800 (PST) X-Google-Smtp-Source: AGHT+IGy+iuuC10or9hu5B0f7BjLVNqHPzqCe12UbXr6nhoMJYnvkgrRBMkIFCUq1t1C/HbqO2na X-Received: by 2002:a05:6a21:1f24:b0:17b:129b:1815 with SMTP id ry36-20020a056a211f2400b0017b129b1815mr463729pzb.33.1699403612800; Tue, 07 Nov 2023 16:33:32 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1699403612; cv=none; d=google.com; s=arc-20160816; b=m1rm19+ziofEronkB7icdPB2RigbvK8c5mixfkvX/Nll0QOCxxvQ16gQB5sde8v8J3 /gJqpw7DZDGlQxZMACnnxH4rSMEGX6Sh4bHQF9oroW7BXXXB8PkCF+TRGx2+TZ+7xUi5 uzwsnKnAbGwn1+ECpJvssBWOQFxfNZCRWS1bSE1593bMgfkMDfmih/MBchEdIgWIyTlA YfGGnxrNtMegx7bQgxmhv6Ktv7W9H2OzcPaisMN/rNVh8TXZLE1J2FA6W2J/DofQELCp GdvB4NZsZIEKDzHBFiDznpusTRpDcGoVawJ7ydmMaV5TzbhZ61uWo3DYdghBuabyAEC8 eNwg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:reply-to:dkim-signature; bh=d/dAIl3E7dSknIpj/mbUAcQ6yoHoVBYd62xaxn7wfeg=; fh=gm96CM+cG0KJxn7vnhn0c1c98ILNP1HHUrKfrGecw3M=; b=IdCZ36DEo3Ns5vyP96FfyUXOaFVQP5RkWfZr4zLg+lzPrBvPqyBdCZ9imy1S9j11SI 3hfMBJ4NtGPvM1Ug6LNbTs/F/nkov6c9Z8ilhGUtnqU0igmBgoY3ZwrePfxuLyZ3UJ8G qSeMglpQfrFSZgxGGr1MDUhIyo0ZO4ny1mUHWyH+MS7JP7B+UZcPp8GsmrhJ4REUhFKt ZQdXY+GfeHD8VHNLheq2O0/IJdduSX7V0B9yfSe+03hwTZa1O8JSGNger6GSN865TbCv Z9htuwbOvaSw/mfugGY/z9VE0id5JzkDferhQljAbTGC4I5Ur4nWpOnEpi4W2pEvAu0P OaWA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=1ysSe0cV; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from snail.vger.email (snail.vger.email. [2620:137:e000::3:7]) by mx.google.com with ESMTPS id i2-20020a17090a3d8200b002810849f25csi832393pjc.85.2023.11.07.16.33.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Nov 2023 16:33:32 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) client-ip=2620:137:e000::3:7; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=1ysSe0cV; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by snail.vger.email (Postfix) with ESMTP id F3AD782A6BFF; Tue, 7 Nov 2023 16:33:10 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at snail.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235672AbjKHAdF (ORCPT + 32 others); Tue, 7 Nov 2023 19:33:05 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47228 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235575AbjKHAc0 (ORCPT ); Tue, 7 Nov 2023 19:32:26 -0500 Received: from mail-pl1-x649.google.com (mail-pl1-x649.google.com [IPv6:2607:f8b0:4864:20::649]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 32C851BEA for ; Tue, 7 Nov 2023 16:32:10 -0800 (PST) Received: by mail-pl1-x649.google.com with SMTP id d9443c01a7336-1cc1ddb34ccso42811835ad.1 for ; Tue, 07 Nov 2023 16:32:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1699403529; x=1700008329; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=d/dAIl3E7dSknIpj/mbUAcQ6yoHoVBYd62xaxn7wfeg=; b=1ysSe0cVrhaGiWIeb1ZVFDTx+8uSlcMOSie46ndKOpihRbJxFFRA+pCRYPeYBe4VdM cYHfMpmEuns9s6jMuLb2KhP5oiSrKYMAk+gcCM9cVaDi3IPzOsvu9INdK3W1HqRDveUO iK92vbJuQZSgjY3GI4hiH68ZkJh9AiQE8WbZEJIajnRhmhuRs11pz4GUHj6cujKTzuGa SKHcWfNNu+jr6P3U1CSDx8nlim0vpadOJVq3b3bXNrFhSOfjdilQP8rgDXjvXpi5nHB5 lfc3ByNLue1f6fwLsdfo60AGQ4RGRqJ6TIttnDsqXRjsiUmCwZaomL+ZWVtWciO7tf3j sxMA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699403529; x=1700008329; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=d/dAIl3E7dSknIpj/mbUAcQ6yoHoVBYd62xaxn7wfeg=; b=VBAG2w8ir+0YP0t5W9oj5Fpy7S1ZnsWVggUFCSjIfpJB7Y+V6IsgufFdH7UUE+Zw67 pFkOfM+gTKR60LZeBhi762MHf20jrzF/D02qArpY9F5wyUbSDxOTLt5zq2FBUn7SoDxG Uhi6JID3x5+cNys8sYUrmAVFTEPfnHf1p+ecu/8/qBT18edY2/Ltm7gZ7wxDdiZ7zyi+ lbe2jnLYRtzRyqU3eathSiCL7yZEWxPr+xnB9dCBVxx0LzOC1SsaDisij5QoaskBYWeS B0iCzpIw08OWo6OLSqnBvJTk7YE6KO/lk6dI/M21nxbWcrBUjloKldBHmgJl6aWxh2HK T4dQ== X-Gm-Message-State: AOJu0YyuriP4LepYKnTjoB+61CHzA+SwD4yHmTQ+zdwr2knvs8Fm9Faf 6gyHAYPoVeW5+XE4amT9kC9PfjJDl9o= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a17:903:1390:b0:1cc:cc77:94ed with SMTP id jx16-20020a170903139000b001cccc7794edmr8893plb.10.1699403529654; Tue, 07 Nov 2023 16:32:09 -0800 (PST) Reply-To: Sean Christopherson Date: Tue, 7 Nov 2023 16:31:31 -0800 In-Reply-To: <20231108003135.546002-1-seanjc@google.com> Mime-Version: 1.0 References: <20231108003135.546002-1-seanjc@google.com> X-Mailer: git-send-email 2.42.0.869.gea05f2083d-goog Message-ID: <20231108003135.546002-16-seanjc@google.com> Subject: [PATCH v7 15/19] KVM: selftests: Add a helper to query if the PMU module param is enabled From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Kan Liang , Dapeng Mi , Jim Mattson , Jinrong Liang , Aaron Lewis , Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Tue, 07 Nov 2023 16:33:11 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1781953842564614150 X-GMAIL-MSGID: 1781953842564614150 Add a helper to problem KVM's "enable_pmu" param, open coding strings in multiple places is just asking for a false negatives and/or runtime errors due to typos. Signed-off-by: Sean Christopherson Reviewed-by: Dapeng Mi --- tools/testing/selftests/kvm/include/x86_64/processor.h | 5 +++++ tools/testing/selftests/kvm/x86_64/pmu_counters_test.c | 2 +- tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c | 2 +- tools/testing/selftests/kvm/x86_64/vmx_pmu_caps_test.c | 2 +- 4 files changed, 8 insertions(+), 3 deletions(-) diff --git a/tools/testing/selftests/kvm/include/x86_64/processor.h b/tools/testing/selftests/kvm/include/x86_64/processor.h index 64aecb3dcf60..c261e0941dfe 100644 --- a/tools/testing/selftests/kvm/include/x86_64/processor.h +++ b/tools/testing/selftests/kvm/include/x86_64/processor.h @@ -1216,6 +1216,11 @@ static inline uint8_t xsetbv_safe(uint32_t index, uint64_t value) bool kvm_is_tdp_enabled(void); +static inline bool kvm_is_pmu_enabled(void) +{ + return get_kvm_param_bool("enable_pmu"); +} + uint64_t *__vm_get_page_table_entry(struct kvm_vm *vm, uint64_t vaddr, int *level); uint64_t *vm_get_page_table_entry(struct kvm_vm *vm, uint64_t vaddr); diff --git a/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c b/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c index 90381382c51f..d775cc7e8fab 100644 --- a/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c +++ b/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c @@ -537,7 +537,7 @@ static void test_intel_counters(void) int main(int argc, char *argv[]) { - TEST_REQUIRE(get_kvm_param_bool("enable_pmu")); + TEST_REQUIRE(kvm_is_pmu_enabled()); TEST_REQUIRE(host_cpu_is_intel); TEST_REQUIRE(kvm_cpu_has_p(X86_PROPERTY_PMU_VERSION)); diff --git a/tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c b/tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c index 7ec9fbed92e0..fa407e2ccb2f 100644 --- a/tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c +++ b/tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c @@ -867,7 +867,7 @@ int main(int argc, char *argv[]) struct kvm_vcpu *vcpu, *vcpu2 = NULL; struct kvm_vm *vm; - TEST_REQUIRE(get_kvm_param_bool("enable_pmu")); + TEST_REQUIRE(kvm_is_pmu_enabled()); TEST_REQUIRE(kvm_has_cap(KVM_CAP_PMU_EVENT_FILTER)); TEST_REQUIRE(kvm_has_cap(KVM_CAP_PMU_EVENT_MASKED_EVENTS)); diff --git a/tools/testing/selftests/kvm/x86_64/vmx_pmu_caps_test.c b/tools/testing/selftests/kvm/x86_64/vmx_pmu_caps_test.c index ebbcb0a3f743..562b0152a122 100644 --- a/tools/testing/selftests/kvm/x86_64/vmx_pmu_caps_test.c +++ b/tools/testing/selftests/kvm/x86_64/vmx_pmu_caps_test.c @@ -237,7 +237,7 @@ int main(int argc, char *argv[]) { union perf_capabilities host_cap; - TEST_REQUIRE(get_kvm_param_bool("enable_pmu")); + TEST_REQUIRE(kvm_is_pmu_enabled()); TEST_REQUIRE(kvm_cpu_has(X86_FEATURE_PDCM)); TEST_REQUIRE(kvm_cpu_has_p(X86_PROPERTY_PMU_VERSION)); From patchwork Wed Nov 8 00:31:32 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Christopherson X-Patchwork-Id: 162850 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:aa0b:0:b0:403:3b70:6f57 with SMTP id k11csp607149vqo; Tue, 7 Nov 2023 16:33:33 -0800 (PST) X-Google-Smtp-Source: AGHT+IFXwYcqJL8ssP1o8DwvxCPcuclelEzwN0ocNaMNJu0nFq2N6XEW47X9F5RMpXnYzDkI5wr4 X-Received: by 2002:a17:902:eac6:b0:1cc:6f7b:636a with SMTP id p6-20020a170902eac600b001cc6f7b636amr604952pld.2.1699403613617; Tue, 07 Nov 2023 16:33:33 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1699403613; cv=none; d=google.com; s=arc-20160816; b=LZszOJ+yK21S5EKs0jInS+4mGUF4Y/j2MkZ9HsQS0k5a2bxGVZ+uiuepeL9fxi9Dz3 6ZcPzwyDRncILyDsQzzLMWymMxlHpnVUHUbUMLTeWBW0aMg+u2wGtMcB8Wq/FnT2s1au bgwDbI16FMqdptwTqnibx55kSlKRhEoeR4cfIGXFrgrrraZXGpet9yjHp56kzQyOPcih Z+UNTAKsbgBQi6pIGKlEWN8v9Bp4N3rzYeljvjf33xFCQlfhgwDoRonHKfwpt3GBDjEn UeR87uHi2M9sCGhLPoVnDPzOJnLbGYxbeHQACOoq7LvoObKtsB99YOaj5B39r5+lUO01 hnLg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:reply-to:dkim-signature; bh=QsiXyox+rGQhiB/Za0Yz/FRQCQ9gMcg4U4njvPOlEGQ=; fh=gm96CM+cG0KJxn7vnhn0c1c98ILNP1HHUrKfrGecw3M=; b=jP3AC1wnfYQ9fdKzYe8UHKIU5LW2QF66j2uYTHZjMUmLuztA/qPQDm3M87eJD0aXdB T1IkevBU5y9k6fXebSet46wwbnmahnOtuchDOMrWNKApZrwVcyMbqraXZ6FO3To9pMDA UUQoRUXyUU+lnZtfM5lcmKrNVCAqnNSKd1oGW1BjQPl7eypNqE0ypj9SBAVt2np9t7xz zxpqEGW/N5PNzLwSXUtJI3XQV24yzVhuGumM4rQ5hOatqzipN+ftA3HFsuhgkQcvFPBu WChidhdOkFxWHtDwWQq5UBwWeNfYc3gHr8VZV6b90lTUlOGpJkeMSRjFpYBvasDj3XxV VVbQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=Pa+CN6zB; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from snail.vger.email (snail.vger.email. [23.128.96.37]) by mx.google.com with ESMTPS id 4-20020a170902c14400b001cc58b18552si853337plj.540.2023.11.07.16.33.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Nov 2023 16:33:33 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) client-ip=23.128.96.37; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=Pa+CN6zB; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by snail.vger.email (Postfix) with ESMTP id 9057482C300B; Tue, 7 Nov 2023 16:33:16 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at snail.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235609AbjKHAdL (ORCPT + 32 others); Tue, 7 Nov 2023 19:33:11 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35800 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344044AbjKHAcp (ORCPT ); Tue, 7 Nov 2023 19:32:45 -0500 Received: from mail-yb1-xb49.google.com (mail-yb1-xb49.google.com [IPv6:2607:f8b0:4864:20::b49]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 38F801FD5 for ; Tue, 7 Nov 2023 16:32:12 -0800 (PST) Received: by mail-yb1-xb49.google.com with SMTP id 3f1490d57ef6-d9cb4de3bf0so7624317276.0 for ; Tue, 07 Nov 2023 16:32:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1699403531; x=1700008331; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=QsiXyox+rGQhiB/Za0Yz/FRQCQ9gMcg4U4njvPOlEGQ=; b=Pa+CN6zBsJjkdBE7W/FQCYsPXuUUXms+Q+EM3mILSUy9m/l8WThH2O21CoZq61Wer2 i83p1K4/9tsAqzIK1SpKvILU7gA4BRofHs15mG9AKYnsA6oI5DagRYHAWZ9vClXHBCLr rumE7WG8LUrvHF6nK655o8MeU9va8+FHot8BvTSzyM9oT9+RwFqtImBJH9avRHFX956l EuI+DgeBV20KEBV5Kuydz1U+PTWNSG/M2RdzgW/OAHF1i4kLw1rmAp5zpi4kYVIE8MvL alTPEEbbSlDfmnqLaHdHuZP74zizyXtJtVIEllSmKUhIInH4iJslU511d7mPsffw0wOE XCWA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699403531; x=1700008331; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=QsiXyox+rGQhiB/Za0Yz/FRQCQ9gMcg4U4njvPOlEGQ=; b=Bog2DaWAOXFk49LhbaWdGVGKnlkQzTW2jDVe+o9ofEpZUIhPDbfiAEb24E0XAWv9hW JtrPMExsV2QEb6P2OnXnwPtNWmK1kPZDDIoxIRXSvFltkNP+LkgZtet510WyGvmSQiwq cMOVnfzqOOt88kcpkXQ6UK5kBWD9fqfOdSmGw6sU+kbMeVJVt6lh6jGZeemvM/L8OUUT sXt6Hx2L8x1IlMBYjJqiViwNdJBK5UGN8RfvyW0gG0u3Bbo0aLrNZDy0gLxKgwE/FowY O/9F+stkuPocyFj1AMgM8tPowMocOHFFEk3Ihj/XrOp1otCiEGuM2C0FrjpU6egQq94E 5xrA== X-Gm-Message-State: AOJu0YynKBg00buj/gZxQcel6Zcv1RjR7e2yad1cHuxcr59XYvGiEHSM G9uzCqMQD4xZmlKeCZuJx2nLpbDtjAA= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a25:ef0a:0:b0:d89:b072:d06f with SMTP id g10-20020a25ef0a000000b00d89b072d06fmr5890ybd.7.1699403531496; Tue, 07 Nov 2023 16:32:11 -0800 (PST) Reply-To: Sean Christopherson Date: Tue, 7 Nov 2023 16:31:32 -0800 In-Reply-To: <20231108003135.546002-1-seanjc@google.com> Mime-Version: 1.0 References: <20231108003135.546002-1-seanjc@google.com> X-Mailer: git-send-email 2.42.0.869.gea05f2083d-goog Message-ID: <20231108003135.546002-17-seanjc@google.com> Subject: [PATCH v7 16/19] KVM: selftests: Add helpers to read integer module params From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Kan Liang , Dapeng Mi , Jim Mattson , Jinrong Liang , Aaron Lewis , Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Tue, 07 Nov 2023 16:33:16 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1781953843379771990 X-GMAIL-MSGID: 1781953843379771990 Add helpers to read integer module params, which is painfully non-trivial because the pain of dealing with strings in C is exacerbated by the kernel inserting a newline. Don't bother differentiating between int, uint, short, etc. They all fit in an int, and KVM (thankfully) doesn't have any integer params larger than an int. Signed-off-by: Sean Christopherson --- .../selftests/kvm/include/kvm_util_base.h | 4 ++ tools/testing/selftests/kvm/lib/kvm_util.c | 62 +++++++++++++++++-- 2 files changed, 60 insertions(+), 6 deletions(-) diff --git a/tools/testing/selftests/kvm/include/kvm_util_base.h b/tools/testing/selftests/kvm/include/kvm_util_base.h index a18db6a7b3cf..46b71241216e 100644 --- a/tools/testing/selftests/kvm/include/kvm_util_base.h +++ b/tools/testing/selftests/kvm/include/kvm_util_base.h @@ -238,6 +238,10 @@ bool get_kvm_param_bool(const char *param); bool get_kvm_intel_param_bool(const char *param); bool get_kvm_amd_param_bool(const char *param); +int get_kvm_param_integer(const char *param); +int get_kvm_intel_param_integer(const char *param); +int get_kvm_amd_param_integer(const char *param); + unsigned int kvm_check_cap(long cap); static inline bool kvm_has_cap(long cap) diff --git a/tools/testing/selftests/kvm/lib/kvm_util.c b/tools/testing/selftests/kvm/lib/kvm_util.c index 7a8af1821f5d..65101c7d1a1a 100644 --- a/tools/testing/selftests/kvm/lib/kvm_util.c +++ b/tools/testing/selftests/kvm/lib/kvm_util.c @@ -51,13 +51,13 @@ int open_kvm_dev_path_or_exit(void) return _open_kvm_dev_path_or_exit(O_RDONLY); } -static bool get_module_param_bool(const char *module_name, const char *param) +static ssize_t get_module_param(const char *module_name, const char *param, + void *buffer, size_t buffer_size) { const int path_size = 128; char path[path_size]; - char value; - ssize_t r; - int fd; + ssize_t bytes_read; + int fd, r; r = snprintf(path, path_size, "/sys/module/%s/parameters/%s", module_name, param); @@ -66,11 +66,46 @@ static bool get_module_param_bool(const char *module_name, const char *param) fd = open_path_or_exit(path, O_RDONLY); - r = read(fd, &value, 1); - TEST_ASSERT(r == 1, "read(%s) failed", path); + bytes_read = read(fd, buffer, buffer_size); + TEST_ASSERT(bytes_read > 0, "read(%s) returned %ld, wanted %ld bytes", + path, bytes_read, buffer_size); r = close(fd); TEST_ASSERT(!r, "close(%s) failed", path); + return bytes_read; +} + +static int get_module_param_integer(const char *module_name, const char *param) +{ + /* + * 16 bytes to hold a 64-bit value (1 byte per char), 1 byte for the + * NUL char, and 1 byte because the kernel sucks and inserts a newline + * at the end. + */ + char value[16 + 1 + 1]; + ssize_t r; + + memset(value, '\0', sizeof(value)); + + r = get_module_param(module_name, param, value, sizeof(value)); + TEST_ASSERT(value[r - 1] == '\n', + "Expected trailing newline, got char '%c'", value[r - 1]); + + /* + * Squash the newline, otherwise atoi_paranoid() will complain about + * trailing non-NUL characters in the string. + */ + value[r - 1] = '\0'; + return atoi_paranoid(value); +} + +static bool get_module_param_bool(const char *module_name, const char *param) +{ + char value; + ssize_t r; + + r = get_module_param(module_name, param, &value, sizeof(value)); + TEST_ASSERT_EQ(r, 1); if (value == 'Y') return true; @@ -95,6 +130,21 @@ bool get_kvm_amd_param_bool(const char *param) return get_module_param_bool("kvm_amd", param); } +int get_kvm_param_integer(const char *param) +{ + return get_module_param_integer("kvm", param); +} + +int get_kvm_intel_param_integer(const char *param) +{ + return get_module_param_integer("kvm_intel", param); +} + +int get_kvm_amd_param_integer(const char *param) +{ + return get_module_param_integer("kvm_amd", param); +} + /* * Capability * From patchwork Wed Nov 8 00:31:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Christopherson X-Patchwork-Id: 162854 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:aa0b:0:b0:403:3b70:6f57 with SMTP id k11csp607612vqo; Tue, 7 Nov 2023 16:34:55 -0800 (PST) X-Google-Smtp-Source: AGHT+IE5HxwwTYHPGrxtoSvf8ERZgWjS9q0ZfgHnRaMM5syCdpNgg7tIA6Wo0O5ktlHTn88+us8W X-Received: by 2002:a17:902:74c4:b0:1cc:2a23:cbab with SMTP id f4-20020a17090274c400b001cc2a23cbabmr677268plt.27.1699403695378; Tue, 07 Nov 2023 16:34:55 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1699403695; cv=none; d=google.com; s=arc-20160816; b=zeBBtzx1opgIsgoNVgvPUqkRhP8HkjOeTDg7mOzyOKXtruJ9JxKq8oZRMXhCGmoypj nZszfg9A+G+SYk+VS04IS1o1dDlO9DYoamps80Vg6yfZCi5Wn8xHHjgHvHPb7jeOUab7 H+cFraNYbxIRHKwdrFPB+mAaQaUrRIX5W5J+mwaLRzahZz6Q5jfIrPwddQNDxF6xAcLF VBD3/TzmXwsAnkEUqi7Tk6YBF1GhIkLjEAz+AQtc/A1uXVvaXD4J9or5ejINot2pjEnY VYKDECjQnnTq+XWDBj7zR/cULXNszQJUMnZn6dc7MTAYOVPqp833OWTmMRqATcbF710J qCGQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:reply-to:dkim-signature; bh=k2UNp8+7yoYn4+LUw6sJaKJMtfEPLdWk0fOhhGx9xpo=; fh=gm96CM+cG0KJxn7vnhn0c1c98ILNP1HHUrKfrGecw3M=; b=WxEaJtSuyJ8Baf1H+Exck/KLcl823okebEM25jpPKyT+KTQsOzrQP7VsOkSxWgfwHE H7uQ4kkNwRgxt5LgyN6RD0+aDXntdUwjkhcQMNpmAWw6/GdL7CyAljU9mbTzDfSLZQU5 eB+xvowK9FNO/NvbIHqCLidAGjjRi7TzgNrP0LEe8bThuXpKMMCNY3z69YtcPTxlO0Nl oH50YjXr+CqVzcEYfCf7aV85zRB9xc8gjpQDiR/hd3l+2EzrEBmuzC/RyRjq+jDZL0uE ZEzjc9CPTF1r0bxBv04aIMsKfhN5fHdJbAvgShpDdZgLabCBu8k/bgkYvw3vW2Izv8Ct Fs/g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=Iixq3tzO; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:8 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from fry.vger.email (fry.vger.email. [2620:137:e000::3:8]) by mx.google.com with ESMTPS id z16-20020a170903019000b001c574110eecsi1085297plg.341.2023.11.07.16.34.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Nov 2023 16:34:55 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:8 as permitted sender) client-ip=2620:137:e000::3:8; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=Iixq3tzO; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:8 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by fry.vger.email (Postfix) with ESMTP id D5B7681CF405; Tue, 7 Nov 2023 16:34:49 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at fry.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344044AbjKHAdS (ORCPT + 32 others); Tue, 7 Nov 2023 19:33:18 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47254 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235719AbjKHAcw (ORCPT ); Tue, 7 Nov 2023 19:32:52 -0500 Received: from mail-yw1-x1149.google.com (mail-yw1-x1149.google.com [IPv6:2607:f8b0:4864:20::1149]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2E6341FFA for ; Tue, 7 Nov 2023 16:32:14 -0800 (PST) Received: by mail-yw1-x1149.google.com with SMTP id 00721157ae682-5b59662ff67so2196417b3.0 for ; Tue, 07 Nov 2023 16:32:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1699403533; x=1700008333; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=k2UNp8+7yoYn4+LUw6sJaKJMtfEPLdWk0fOhhGx9xpo=; b=Iixq3tzORT+IgX0wWdsTYe39XjCfjri+3hqq5sstdz+dasYFEvmohUH+rvLL9STACe ej1M4fazP5kxKwlBy4FixDsc5HqRyZjn+SRZOAfS/qprX3iQUboRsemrw+p4GxKSF/41 i0fOy9vkChzbL5Ry7ZRnKVXC3hx7ZT4dTzKGtW+t/K3xoWn7sUtbHeG31XYVLsfRJVP0 cx2j4nSNzRlGjddHnjHirc827YGrt25Q+OdbwCApnQJnkR1VCNIVNVtvCRPqJleJdkbh jHsFJeOwtkYouduLUK0l1YgtHaVyJlkLTcXv3WUpzZduq+N14LD3sjwg6Xs4k8BLOude EKUg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699403533; x=1700008333; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=k2UNp8+7yoYn4+LUw6sJaKJMtfEPLdWk0fOhhGx9xpo=; b=JtjfCAam5185CmA+cONc7AicwHquhywG1s6FoHQeLWlPVQZp4DM4EAQF0hKePqKchR gQnsV2gVTflujeRfHpzIPhMOcIatBGSRAx36izCvFt2Vm1DewSrMAUPkjUEL25sk/Ydo 0SKPaVekWWKguVaCnnbPN1ZmEJBocFlr+xT0JSxf5jbHETCgD5IKI1N1owMlhonngimh 6z1xRHfpxZHM76pin6KP1T6Sbk0Roj+WtkJ8PysnSwsiOAFjgGr8fgVwWhGGKVgvbmOL fZ/DiulhbVCtgCoHpYF5qXfgUwqQAp8ynALt9325dRb882tv4NUDAirDZ6YBL2p6DrV3 IAdw== X-Gm-Message-State: AOJu0YyS/YpcEQj8iQQD0SRpLsRyGMm+I88QADnLAxnPlgVXgd9xjZ3z Bk2GMZtCbqXC6yrkFQJzms+RLn/mdpU= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a81:d844:0:b0:5b8:d09e:704d with SMTP id n4-20020a81d844000000b005b8d09e704dmr99902ywl.1.1699403533438; Tue, 07 Nov 2023 16:32:13 -0800 (PST) Reply-To: Sean Christopherson Date: Tue, 7 Nov 2023 16:31:33 -0800 In-Reply-To: <20231108003135.546002-1-seanjc@google.com> Mime-Version: 1.0 References: <20231108003135.546002-1-seanjc@google.com> X-Mailer: git-send-email 2.42.0.869.gea05f2083d-goog Message-ID: <20231108003135.546002-18-seanjc@google.com> Subject: [PATCH v7 17/19] KVM: selftests: Query module param to detect FEP in MSR filtering test From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Kan Liang , Dapeng Mi , Jim Mattson , Jinrong Liang , Aaron Lewis , Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (fry.vger.email [0.0.0.0]); Tue, 07 Nov 2023 16:34:49 -0800 (PST) X-Spam-Status: No, score=-8.4 required=5.0 tests=DKIMWL_WL_MED,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE, USER_IN_DEF_DKIM_WL autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on fry.vger.email X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1781953929067398254 X-GMAIL-MSGID: 1781953929067398254 Add a helper to detect KVM support for forced emulation by querying the module param, and use the helper to detect support for the MSR filtering test instead of throwing a noodle/NOP at KVM to see if it sticks. Cc: Aaron Lewis Signed-off-by: Sean Christopherson --- .../selftests/kvm/include/x86_64/processor.h | 5 ++++ .../kvm/x86_64/userspace_msr_exit_test.c | 27 +++++++------------ 2 files changed, 14 insertions(+), 18 deletions(-) diff --git a/tools/testing/selftests/kvm/include/x86_64/processor.h b/tools/testing/selftests/kvm/include/x86_64/processor.h index c261e0941dfe..8a404faafb21 100644 --- a/tools/testing/selftests/kvm/include/x86_64/processor.h +++ b/tools/testing/selftests/kvm/include/x86_64/processor.h @@ -1221,6 +1221,11 @@ static inline bool kvm_is_pmu_enabled(void) return get_kvm_param_bool("enable_pmu"); } +static inline bool kvm_is_forced_emulation_enabled(void) +{ + return !!get_kvm_param_integer("force_emulation_prefix"); +} + uint64_t *__vm_get_page_table_entry(struct kvm_vm *vm, uint64_t vaddr, int *level); uint64_t *vm_get_page_table_entry(struct kvm_vm *vm, uint64_t vaddr); diff --git a/tools/testing/selftests/kvm/x86_64/userspace_msr_exit_test.c b/tools/testing/selftests/kvm/x86_64/userspace_msr_exit_test.c index 3533dc2fbfee..9e12dbc47a72 100644 --- a/tools/testing/selftests/kvm/x86_64/userspace_msr_exit_test.c +++ b/tools/testing/selftests/kvm/x86_64/userspace_msr_exit_test.c @@ -14,8 +14,7 @@ /* Forced emulation prefix, used to invoke the emulator unconditionally. */ #define KVM_FEP "ud2; .byte 'k', 'v', 'm';" -#define KVM_FEP_LENGTH 5 -static int fep_available = 1; +static bool fep_available; #define MSR_NON_EXISTENT 0x474f4f00 @@ -260,13 +259,6 @@ static void guest_code_filter_allow(void) GUEST_ASSERT(data == 2); GUEST_ASSERT(guest_exception_count == 0); - /* - * Test to see if the instruction emulator is available (ie: the module - * parameter 'kvm.force_emulation_prefix=1' is set). This instruction - * will #UD if it isn't available. - */ - __asm__ __volatile__(KVM_FEP "nop"); - if (fep_available) { /* Let userspace know we aren't done. */ GUEST_SYNC(0); @@ -388,12 +380,6 @@ static void guest_fep_gp_handler(struct ex_regs *regs) &em_wrmsr_start, &em_wrmsr_end); } -static void guest_ud_handler(struct ex_regs *regs) -{ - fep_available = 0; - regs->rip += KVM_FEP_LENGTH; -} - static void check_for_guest_assert(struct kvm_vcpu *vcpu) { struct ucall uc; @@ -531,9 +517,11 @@ static void test_msr_filter_allow(void) { struct kvm_vcpu *vcpu; struct kvm_vm *vm; + uint64_t cmd; int rc; vm = vm_create_with_one_vcpu(&vcpu, guest_code_filter_allow); + sync_global_to_guest(vm, fep_available); rc = kvm_check_cap(KVM_CAP_X86_USER_SPACE_MSR); TEST_ASSERT(rc, "KVM_CAP_X86_USER_SPACE_MSR is available"); @@ -561,11 +549,11 @@ static void test_msr_filter_allow(void) run_guest_then_process_wrmsr(vcpu, MSR_NON_EXISTENT); run_guest_then_process_rdmsr(vcpu, MSR_NON_EXISTENT); - vm_install_exception_handler(vm, UD_VECTOR, guest_ud_handler); vcpu_run(vcpu); - vm_install_exception_handler(vm, UD_VECTOR, NULL); + cmd = process_ucall(vcpu); - if (process_ucall(vcpu) != UCALL_DONE) { + if (fep_available) { + TEST_ASSERT_EQ(cmd, UCALL_SYNC); vm_install_exception_handler(vm, GP_VECTOR, guest_fep_gp_handler); /* Process emulated rdmsr and wrmsr instructions. */ @@ -583,6 +571,7 @@ static void test_msr_filter_allow(void) /* Confirm the guest completed without issues. */ run_guest_then_process_ucall_done(vcpu); } else { + TEST_ASSERT_EQ(cmd, UCALL_DONE); printf("To run the instruction emulated tests set the module parameter 'kvm.force_emulation_prefix=1'\n"); } @@ -804,6 +793,8 @@ static void test_user_exit_msr_flags(void) int main(int argc, char *argv[]) { + fep_available = kvm_is_forced_emulation_enabled(); + test_msr_filter_allow(); test_msr_filter_deny(); From patchwork Wed Nov 8 00:31:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Christopherson X-Patchwork-Id: 162851 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:aa0b:0:b0:403:3b70:6f57 with SMTP id k11csp607201vqo; Tue, 7 Nov 2023 16:33:43 -0800 (PST) X-Google-Smtp-Source: AGHT+IHy5TOVeav3V1ekWbQcRmqkYnYOWMxNEdUWimcsHB3gcBVSNG9ln8M6RHGxX68FKGwVB0G4 X-Received: by 2002:a05:6a21:a103:b0:161:2607:d815 with SMTP id aq3-20020a056a21a10300b001612607d815mr801455pzc.24.1699403622858; Tue, 07 Nov 2023 16:33:42 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1699403622; cv=none; d=google.com; s=arc-20160816; b=kEkYMYg2gN1haQ3LPxVDJaVYbN5/SSsqOD02AdJybABTcGZlqvMW4rgRzXgriP1A3m je/yzGVF9gOWKBs5zjzVl0KX89klICqaWFdyaWY8Aluf1PPRMgruoSI16c1hr9gRn+sE YREZ12qdgbm4Ma2JVvEXAMqb/XYevQY3Bi8m0EKdNVpweg7dAOrvJxNTGdcF6MbhCj72 nG8krFunpRq9agwmYlursWRgPWPpGz6ACvLhYdMx2BQAucwZ8PjzMS+KCnueW1jhvFSF rlebotR/BgZ71GnsJXLAyfxoxjD6yGP408NfskhaOGxE5UI/25h3r1ELlB39rJVYJaAJ JAfA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:reply-to:dkim-signature; bh=4fLduEULj/w/qTyuS7dxoyFHFX9Y3I4W7nZGJLTTI/Q=; fh=gm96CM+cG0KJxn7vnhn0c1c98ILNP1HHUrKfrGecw3M=; b=b/qAMO2P5iJfeIEqYtOW7r6gpZBXq45Uzyfu1mjIvTTPd8oGhh+BxLfcHxywjuy//8 s+cB3QWdJll4cOLUFhpaTZAJ0GZ+0K4RNZboW5xVda5UHLs4OYWQqJs7SMkVwbGINUfD bEFY41AS0dgJdXC23ziFqtSnizBRkFxALP/GfSqoSX5qXENiWgoiBshuvB4gbGX7Pf3y iSmzG9HUWqv22diPOrjEHfc7gBfxQCRQxIJnxv3mS2ThE3acSwI08A7vzY3wvfzDdkvR MmuJ3QsDT+kFHs4b74aFHWzcQIsa2kFZGzMNYuR694T+YauqKhkOSpQH+8+HeZxdsQlf vLNQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b="l9AD/gMU"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from snail.vger.email (snail.vger.email. [2620:137:e000::3:7]) by mx.google.com with ESMTPS id k18-20020a170902c41200b001b811261289si1046907plk.482.2023.11.07.16.33.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Nov 2023 16:33:42 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) client-ip=2620:137:e000::3:7; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b="l9AD/gMU"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by snail.vger.email (Postfix) with ESMTP id C9E7482DD09E; Tue, 7 Nov 2023 16:33:41 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at snail.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235215AbjKHAdX (ORCPT + 32 others); Tue, 7 Nov 2023 19:33:23 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47256 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344530AbjKHAdA (ORCPT ); Tue, 7 Nov 2023 19:33:00 -0500 Received: from mail-yw1-x1149.google.com (mail-yw1-x1149.google.com [IPv6:2607:f8b0:4864:20::1149]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1C1001725 for ; Tue, 7 Nov 2023 16:32:16 -0800 (PST) Received: by mail-yw1-x1149.google.com with SMTP id 00721157ae682-5a7af69a4baso84626827b3.0 for ; Tue, 07 Nov 2023 16:32:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1699403535; x=1700008335; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=4fLduEULj/w/qTyuS7dxoyFHFX9Y3I4W7nZGJLTTI/Q=; b=l9AD/gMU0/dtCaF8qUbSXvV2aPJepf1/58uKDor2tIhCv1IbdVaUMJXMbVFzQIMQGF 95iBpUqUHQamuWByMvjSEt+EbP4L9EJCGkArZC4pRfN1iIMYYZU9Xd1kS4NP5oY1WGjP IlcGCrKkWvCo/LLNFhtEG0191KKVvvJ5JwQPriLNlGilhqYVkSHE9DN1SCfThzSmL4mm C1AuoVn82gzSDajT9i59urcgMzsw6ERkQhuYn/jFp9oQdvy+iQ/NgvpMC0XVg7NRcf+l 5DTYRs2/hM6zkeclGZ1LXbH1HrFFVmc1tW2xqLgYiDrgqApO7RVxd9RUY9D3SMTnbqVR HwGQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699403535; x=1700008335; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=4fLduEULj/w/qTyuS7dxoyFHFX9Y3I4W7nZGJLTTI/Q=; b=FyvIO8U2pllbxiu7AMjkWs4HDOOm2VeNfgcXZ2ekbY5IUybrU0EMHwV2elKi1W7/m2 /2ictRahm56pcaSitMeU9uueCFf2iuI0gO9LOSO0/CGcHfaiA8OgEvGDkYGzi2l5jI+L YPfIAkdXZdvqk4nXdWsRhRpXTfBSY5TJrxUNWgW0X/bv+lU5IfQg4OoRmLtHRQBjZ+OF 921tkz94adYLghoyMkpN6pxEfeNVQ8Kt/wu6I70Aefj9uqj+zkGvnzsMC+WGIb91IU4V x8jthISAobv6enfEYap3eJbhJ7fkpgtMxshqNhBGOGjIXmyYiu8ZyjMPpudmMD96hLDe /9jQ== X-Gm-Message-State: AOJu0YzjR6rc4O+F/yeg3GrD2izu6Ap7laXDS3YtC1mEjpRYbyPikobu pX5fI4Q5pJfGEI1vLsYtv3vuFXpqHSI= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a0d:cb14:0:b0:5af:a9ab:e131 with SMTP id n20-20020a0dcb14000000b005afa9abe131mr4542ywd.1.1699403535389; Tue, 07 Nov 2023 16:32:15 -0800 (PST) Reply-To: Sean Christopherson Date: Tue, 7 Nov 2023 16:31:34 -0800 In-Reply-To: <20231108003135.546002-1-seanjc@google.com> Mime-Version: 1.0 References: <20231108003135.546002-1-seanjc@google.com> X-Mailer: git-send-email 2.42.0.869.gea05f2083d-goog Message-ID: <20231108003135.546002-19-seanjc@google.com> Subject: [PATCH v7 18/19] KVM: selftests: Move KVM_FEP macro into common library header From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Kan Liang , Dapeng Mi , Jim Mattson , Jinrong Liang , Aaron Lewis , Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Tue, 07 Nov 2023 16:33:41 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1781953852950020602 X-GMAIL-MSGID: 1781953852950020602 Move the KVM_FEP definition, a.k.a. the KVM force emulation prefix, into processor.h so that it can be used for other tests besides the MSR filter test. Signed-off-by: Sean Christopherson --- tools/testing/selftests/kvm/include/x86_64/processor.h | 3 +++ tools/testing/selftests/kvm/x86_64/userspace_msr_exit_test.c | 2 -- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/tools/testing/selftests/kvm/include/x86_64/processor.h b/tools/testing/selftests/kvm/include/x86_64/processor.h index 8a404faafb21..e5c383bd313b 100644 --- a/tools/testing/selftests/kvm/include/x86_64/processor.h +++ b/tools/testing/selftests/kvm/include/x86_64/processor.h @@ -22,6 +22,9 @@ extern bool host_cpu_is_intel; extern bool host_cpu_is_amd; +/* Forced emulation prefix, used to invoke the emulator unconditionally. */ +#define KVM_FEP "ud2; .byte 'k', 'v', 'm';" + #define NMI_VECTOR 0x02 #define X86_EFLAGS_FIXED (1u << 1) diff --git a/tools/testing/selftests/kvm/x86_64/userspace_msr_exit_test.c b/tools/testing/selftests/kvm/x86_64/userspace_msr_exit_test.c index 9e12dbc47a72..ab3a8c4f0b86 100644 --- a/tools/testing/selftests/kvm/x86_64/userspace_msr_exit_test.c +++ b/tools/testing/selftests/kvm/x86_64/userspace_msr_exit_test.c @@ -12,8 +12,6 @@ #include "kvm_util.h" #include "vmx.h" -/* Forced emulation prefix, used to invoke the emulator unconditionally. */ -#define KVM_FEP "ud2; .byte 'k', 'v', 'm';" static bool fep_available; #define MSR_NON_EXISTENT 0x474f4f00 From patchwork Wed Nov 8 00:31:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Christopherson X-Patchwork-Id: 162852 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:aa0b:0:b0:403:3b70:6f57 with SMTP id k11csp607210vqo; Tue, 7 Nov 2023 16:33:44 -0800 (PST) X-Google-Smtp-Source: AGHT+IHf07RyLToCvEL4JakzgWgeZT1jf24+y3X4/m/EyO9vP9GbuD7FU4O5pRjZA3tOjYGSYJK/ X-Received: by 2002:a05:6a20:3d8c:b0:13d:5b8e:db83 with SMTP id s12-20020a056a203d8c00b0013d5b8edb83mr710686pzi.9.1699403624678; Tue, 07 Nov 2023 16:33:44 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1699403624; cv=none; d=google.com; s=arc-20160816; b=aoeTZGJMphk/EYUU0X6LvC76oOYJNoGHyy56z91CVu1wH91hq7P+bZOM9O8VQXBFji 9ZhCX1Yz93qZe8eoOC4BfOrCTIwe0tBOmeu9rfTwHto2tOdNNnk3UG9OIXxS3+mt8y78 JEmrJS6DRR8q3fELt1fXDUeUftW0TeewwQRXyOlHbgxiZeW2heX0ng3d30e5RGXp2TcR 3yF5JOzJCQVhGijhpS7bzukPV10j62GyFmjzr2FevFr2KUsyNDYAspFBTRu9ynSgZkfH ynSFjDRB5CGMUufXFqtIfSyoe+nN+Llp6EvmsxlkcQJzMaNxM4r6OJktd6Nupadpd+Uq FEwg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:reply-to:dkim-signature; bh=+33edaVs5/Z2morXGikwBPQAuHCPyAZkKikXNnwhXvI=; fh=gm96CM+cG0KJxn7vnhn0c1c98ILNP1HHUrKfrGecw3M=; b=BrRVU1Vg4L7vy4V+l0AbHb6sXM03FxMMhNE2LN8lg9hjQDwpVZiflkrIjKSSZtecld O++65W5f0Z1JM7Dt9v5li26wX3A+18ZsvNkzhr/vuxyX4O3s8qVFJ9KBrBERIcLrwsw8 t94Rl7J9G3krhr6oGBXyqlayIgdb7fY7mKK2op7Jo/7BuAc01MOGvMj1cdpmsohPbUQx weEt1aCNoJcCNmL8gpyZm4eJHheNDjRzWkC0bIiVGRG+qxxF6qCrA0l0KaOuksM9+tLT pbW8KWCxYLyYGFkhGmAG4mu262iRXJ2SXEG/X3k9rf6zmVI2ZANFKrJxNSRPClMWrQP0 VzuA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=OLLDWRxO; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from snail.vger.email (snail.vger.email. [2620:137:e000::3:7]) by mx.google.com with ESMTPS id ju1-20020a170903428100b001ca85c6e508si850837plb.558.2023.11.07.16.33.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Nov 2023 16:33:44 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) client-ip=2620:137:e000::3:7; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=OLLDWRxO; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by snail.vger.email (Postfix) with ESMTP id A70D982C300B; Tue, 7 Nov 2023 16:33:43 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at snail.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344421AbjKHAda (ORCPT + 32 others); Tue, 7 Nov 2023 19:33:30 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35750 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344540AbjKHAdG (ORCPT ); Tue, 7 Nov 2023 19:33:06 -0500 Received: from mail-yb1-xb4a.google.com (mail-yb1-xb4a.google.com [IPv6:2607:f8b0:4864:20::b4a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EB2262120 for ; Tue, 7 Nov 2023 16:32:17 -0800 (PST) Received: by mail-yb1-xb4a.google.com with SMTP id 3f1490d57ef6-da03390793fso7188889276.3 for ; Tue, 07 Nov 2023 16:32:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1699403537; x=1700008337; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=+33edaVs5/Z2morXGikwBPQAuHCPyAZkKikXNnwhXvI=; b=OLLDWRxOWm7R9VBzYxDgewf+btCdrzjWGL1mgBeudJ40o00xcU+CukFX96oatdRcFC CdEuuwv38a8ZtWo/crL8NEOxI0hCqDSDjzhINeLh191LSswfSCoPmkcPThBq67IRnLAs NLORaPAT/TsozT/Kw3Sp3URaBI+tSepoRlg5q35GiYYqRZDJI643BikBc8eKPuIYqEDe buI5BWUnuE6izt+VBhcXdHPqf46A0HwneT3HDdgIYg7n/J4FstFQxnQ71viY6lSKaTMm Cbf+kKfyFNO2fnaOL4uIdXX1ooEd5yjKubbMZYZgVdp0FKP4kAY8IuFkCXydzd+Pm+K7 LT9Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699403537; x=1700008337; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=+33edaVs5/Z2morXGikwBPQAuHCPyAZkKikXNnwhXvI=; b=CIF5OK+9gnbD3klNjrnt+oNLWvRAKwd+d9A4x4WSOvI2Dw9KQ3UW56skUhrT66ff7D ll4dVwb+MgGJieuYZvmK6QMXLkJYz/p9EllyA9thzJu7ir6myHvojroN36Wb8d/RWk90 NN7vbNEPwn9gLtXVt5+4r9EvAkjL3OaGZJDblFSDDIBCt4QFRpro8pvB1v62ftmy93bc M/zXwcouY7t7mkubfjEeV/bVhzBVW/YtqvE+EowHkuxOauR6qED6NJnyvDR4i4eKOyt2 5ItAEfyLsJ7B/ZvQjZQalI8rhke2kZ/p/wvy6TR/twfBdo9aGixWMkyvAv6XDWeJSyys R3+g== X-Gm-Message-State: AOJu0YzONNsQWXf8zKq65Wau+iUI+mAYmfGM+zpseoUfCvezhDMcQO/N KxuX4m3Ef64Yr8yekg3YvYSGiRbMHv4= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a25:1fd6:0:b0:d9a:e3d9:99bd with SMTP id f205-20020a251fd6000000b00d9ae3d999bdmr5762ybf.5.1699403537213; Tue, 07 Nov 2023 16:32:17 -0800 (PST) Reply-To: Sean Christopherson Date: Tue, 7 Nov 2023 16:31:35 -0800 In-Reply-To: <20231108003135.546002-1-seanjc@google.com> Mime-Version: 1.0 References: <20231108003135.546002-1-seanjc@google.com> X-Mailer: git-send-email 2.42.0.869.gea05f2083d-goog Message-ID: <20231108003135.546002-20-seanjc@google.com> Subject: [PATCH v7 19/19] KVM: selftests: Test PMC virtualization with forced emulation From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Kan Liang , Dapeng Mi , Jim Mattson , Jinrong Liang , Aaron Lewis , Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Tue, 07 Nov 2023 16:33:43 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1781953855001386386 X-GMAIL-MSGID: 1781953855001386386 Extend the PMC counters test to use forced emulation to verify that KVM emulates counter events for instructions retired and branches retired. Force emulation for only a subset of the measured code to test that KVM does the right thing when mixing perf events with emulated events. Signed-off-by: Sean Christopherson Reviewed-by: Dapeng Mi --- .../selftests/kvm/x86_64/pmu_counters_test.c | 44 +++++++++++++------ 1 file changed, 30 insertions(+), 14 deletions(-) diff --git a/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c b/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c index d775cc7e8fab..09332b3c0a69 100644 --- a/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c +++ b/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c @@ -21,6 +21,7 @@ static uint8_t kvm_pmu_version; static bool kvm_has_perf_caps; +static bool is_forced_emulation_enabled; static struct kvm_vm *pmu_vm_create_with_one_vcpu(struct kvm_vcpu **vcpu, void *guest_code, @@ -34,6 +35,7 @@ static struct kvm_vm *pmu_vm_create_with_one_vcpu(struct kvm_vcpu **vcpu, vcpu_init_descriptor_tables(*vcpu); sync_global_to_guest(vm, kvm_pmu_version); + sync_global_to_guest(vm, is_forced_emulation_enabled); /* * Set PERF_CAPABILITIES before PMU version as KVM disallows enabling @@ -138,37 +140,50 @@ static void guest_assert_event_count(uint8_t idx, * If CLFUSH{,OPT} is supported, flush the cacheline containing (at least) the * start of the loop to force LLC references and misses, i.e. to allow testing * that those events actually count. + * + * If forced emulation is enabled (and specified), force emulation on a subset + * of the measured code to verify that KVM correctly emulates instructions and + * branches retired events in conjunction with hardware also counting said + * events. */ -#define GUEST_MEASURE_EVENT(_msr, _value, clflush) \ +#define GUEST_MEASURE_EVENT(_msr, _value, clflush, FEP) \ do { \ __asm__ __volatile__("wrmsr\n\t" \ clflush "\n\t" \ "mfence\n\t" \ "1: mov $" __stringify(NUM_BRANCHES) ", %%ecx\n\t" \ - "loop .\n\t" \ - "mov %%edi, %%ecx\n\t" \ - "xor %%eax, %%eax\n\t" \ - "xor %%edx, %%edx\n\t" \ + FEP "loop .\n\t" \ + FEP "mov %%edi, %%ecx\n\t" \ + FEP "xor %%eax, %%eax\n\t" \ + FEP "xor %%edx, %%edx\n\t" \ "wrmsr\n\t" \ :: "a"((uint32_t)_value), "d"(_value >> 32), \ "c"(_msr), "D"(_msr) \ ); \ } while (0) +#define GUEST_TEST_EVENT(_idx, _event, _pmc, _pmc_msr, _ctrl_msr, _value, FEP) \ +do { \ + wrmsr(pmc_msr, 0); \ + \ + if (this_cpu_has(X86_FEATURE_CLFLUSHOPT)) \ + GUEST_MEASURE_EVENT(_ctrl_msr, _value, "clflushopt 1f", FEP); \ + else if (this_cpu_has(X86_FEATURE_CLFLUSH)) \ + GUEST_MEASURE_EVENT(_ctrl_msr, _value, "clflush 1f", FEP); \ + else \ + GUEST_MEASURE_EVENT(_ctrl_msr, _value, "nop", FEP); \ + \ + guest_assert_event_count(_idx, _event, _pmc, _pmc_msr); \ +} while (0) + static void __guest_test_arch_event(uint8_t idx, struct kvm_x86_pmu_feature event, uint32_t pmc, uint32_t pmc_msr, uint32_t ctrl_msr, uint64_t ctrl_msr_value) { - wrmsr(pmc_msr, 0); + GUEST_TEST_EVENT(idx, event, pmc, pmc_msr, ctrl_msr, ctrl_msr_value, ""); - if (this_cpu_has(X86_FEATURE_CLFLUSHOPT)) - GUEST_MEASURE_EVENT(ctrl_msr, ctrl_msr_value, "clflushopt 1f"); - else if (this_cpu_has(X86_FEATURE_CLFLUSH)) - GUEST_MEASURE_EVENT(ctrl_msr, ctrl_msr_value, "clflush 1f"); - else - GUEST_MEASURE_EVENT(ctrl_msr, ctrl_msr_value, "nop"); - - guest_assert_event_count(idx, event, pmc, pmc_msr); + if (is_forced_emulation_enabled) + GUEST_TEST_EVENT(idx, event, pmc, pmc_msr, ctrl_msr, ctrl_msr_value, KVM_FEP); } #define X86_PMU_FEATURE_NULL \ @@ -545,6 +560,7 @@ int main(int argc, char *argv[]) kvm_pmu_version = kvm_cpu_property(X86_PROPERTY_PMU_VERSION); kvm_has_perf_caps = kvm_cpu_has(X86_FEATURE_PDCM); + is_forced_emulation_enabled = kvm_is_forced_emulation_enabled(); test_intel_counters();