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[2001:b400:e25d:e1ee:eb42:adf3:9163:f337]) by smtp.gmail.com with ESMTPSA id v13-20020a63f20d000000b0050f85ef50d1sm1078725pgh.26.2023.11.07.01.57.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Nov 2023 01:57:52 -0800 (PST) From: Victor Shih To: ulf.hansson@linaro.org, adrian.hunter@intel.com Cc: linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, benchuanggli@gmail.com, HL.Liu@genesyslogic.com.tw, Greg.tu@genesyslogic.com.tw, SeanHY.Chen.tu@genesyslogic.com.tw, kai.heng.feng@canonical.com, Victor Shih , Victor Shih , Kai-Heng Feng Subject: [PATCH V3 1/2] mmc: sdhci-pci-gli: GL9750: Mask the replay timer timeout of AER Date: Tue, 7 Nov 2023 17:57:40 +0800 Message-Id: <20231107095741.8832-2-victorshihgli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231107095741.8832-1-victorshihgli@gmail.com> References: <20231107095741.8832-1-victorshihgli@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-0.6 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on fry.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (fry.vger.email [0.0.0.0]); Tue, 07 Nov 2023 01:58:21 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1781898782297401556 X-GMAIL-MSGID: 1781898782297401556 From: Victor Shih Due to a flaw in the hardware design, the GL9750 replay timer frequently times out when ASPM is enabled. As a result, the warning messages will often appear in the system log when the system accesses the GL9750 PCI config. Therefore, the replay timer timeout must be masked. Fixes: d7133797e9e1 ("mmc: sdhci-pci-gli: A workaround to allow GL9750 to enter ASPM L1.2") Signed-off-by: Victor Shih Acked-by: Adrian Hunter Acked-by: Kai-Heng Feng --- drivers/mmc/host/sdhci-pci-gli.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/mmc/host/sdhci-pci-gli.c b/drivers/mmc/host/sdhci-pci-gli.c index d83261e857a5..3887bfd7386b 100644 --- a/drivers/mmc/host/sdhci-pci-gli.c +++ b/drivers/mmc/host/sdhci-pci-gli.c @@ -28,6 +28,9 @@ #define PCI_GLI_9750_PM_CTRL 0xFC #define PCI_GLI_9750_PM_STATE GENMASK(1, 0) +#define PCI_GLI_9750_CORRERR_MASK 0x214 +#define PCI_GLI_9750_CORRERR_MASK_REPLAY_TIMER_TIMEOUT BIT(12) + #define SDHCI_GLI_9750_CFG2 0x848 #define SDHCI_GLI_9750_CFG2_L1DLY GENMASK(28, 24) #define GLI_9750_CFG2_L1DLY_VALUE 0x1F @@ -561,6 +564,11 @@ static void gl9750_hw_setting(struct sdhci_host *host) value &= ~PCI_GLI_9750_PM_STATE; pci_write_config_dword(pdev, PCI_GLI_9750_PM_CTRL, value); + /* mask the replay timer timeout of AER */ + pci_read_config_dword(pdev, PCI_GLI_9750_CORRERR_MASK, &value); + value |= PCI_GLI_9750_CORRERR_MASK_REPLAY_TIMER_TIMEOUT; + pci_write_config_dword(pdev, PCI_GLI_9750_CORRERR_MASK, value); + gl9750_wt_off(host); } From patchwork Tue Nov 7 09:57:41 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Victor Shih X-Patchwork-Id: 162365 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:aa0b:0:b0:403:3b70:6f57 with SMTP id k11csp126160vqo; Tue, 7 Nov 2023 01:58:30 -0800 (PST) X-Google-Smtp-Source: AGHT+IHAJ5+LqSPLSydHJyZRN9TM5w87neznU5HAQN6lUdmNKezwmHv3WzKGem3tE0xv16QvrocS X-Received: by 2002:a9d:4f19:0:b0:6bd:b29:85d3 with SMTP id d25-20020a9d4f19000000b006bd0b2985d3mr32237500otl.24.1699351109876; Tue, 07 Nov 2023 01:58:29 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1699351109; cv=none; d=google.com; s=arc-20160816; b=xjUFa+9qLBWvS+aZIJEkqUjs1wRLc9Purmh6ktLPl5obJr1tYLnlF9wyWvoqVOdM7d UX7OHYWYM+A1majgPGHDqpUrz/N3yV3zYmkfrzo02zG693K6KR4PNoCBCRa76/JtrzC4 +iDFWxj0pSJAJaminlCUuQDNk0XoZkEyKQxUh1hJ0i40vbeTAbgR5nS6MKPf3jp2Nt6J LLAMw3jbDfnNY39yOtEKuCA14280MJKMPGEEojg/LqoQi8LAQsD3yJtUfZNwPcdd1J66 VnF2y0sm1DRMIYOlkUX1ReP1z5vsHwy3Wta5pARmOmWKRvr99+pNKrPXcUwDqs1wN5JG A1Yw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=SmIG2BB5oMZIMJvfS5LNShy64tFn+UOtZXHaIVjFwZs=; fh=zQgC8sTNi2x59HjzRDjjBr5HWRoco0nlaJ9ddut/E6w=; b=z9ByTAIABNWys+LQMDkf15U9TbjQu2ce0w/b5CJVE4Q69rhUBu6/b7RMFDEWur+/8N KcTOvwdp2mSblvC2CZrRIxkoWAYVm47BIHBC02JAi+6JYveGqpi+yFkuR+iQEwv5CApT wH2d8FGk+lpOkCx0q2PjQk4T7Jz2jNP14979Bbv+eieX2iIUiBGA5nQfNagEXHQO2qtP ktNEbWmvSMc+0tWzFZJXD67sbeNHDOMsvdcoN06CDJ9sqBX7KvWBnDoDksOnngsct9Yc ujnxo96DnSl9M7m9ETVv1rdmXvt7GGN08k/n9E+OAIoTV6VdccArEnxtLl174okm7A9X mldQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20230601 header.b=GVlv7eSm; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:3 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: from lipwig.vger.email (lipwig.vger.email. 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[2001:b400:e25d:e1ee:eb42:adf3:9163:f337]) by smtp.gmail.com with ESMTPSA id v13-20020a63f20d000000b0050f85ef50d1sm1078725pgh.26.2023.11.07.01.57.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Nov 2023 01:57:55 -0800 (PST) From: Victor Shih To: ulf.hansson@linaro.org, adrian.hunter@intel.com Cc: linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, benchuanggli@gmail.com, HL.Liu@genesyslogic.com.tw, Greg.tu@genesyslogic.com.tw, SeanHY.Chen.tu@genesyslogic.com.tw, kai.heng.feng@canonical.com, Victor Shih , Victor Shih , Kai-Heng Feng Subject: [PATCH V3 2/2] mmc: sdhci-pci-gli: GL9755: Mask the replay timer timeout of AER Date: Tue, 7 Nov 2023 17:57:41 +0800 Message-Id: <20231107095741.8832-3-victorshihgli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231107095741.8832-1-victorshihgli@gmail.com> References: <20231107095741.8832-1-victorshihgli@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-0.6 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lipwig.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (lipwig.vger.email [0.0.0.0]); Tue, 07 Nov 2023 01:58:27 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1781898789233925077 X-GMAIL-MSGID: 1781898789233925077 From: Victor Shih Due to a flaw in the hardware design, the GL9755 replay timer frequently times out when ASPM is enabled. As a result, the warning messages will often appear in the system log when the system accesses the GL9755 PCI config. Therefore, the replay timer timeout must be masked. Fixes: 36ed2fd32b2c ("mmc: sdhci-pci-gli: A workaround to allow GL9755 to enter ASPM L1.2") Signed-off-by: Victor Shih Acked-by: Adrian Hunter Acked-by: Kai-Heng Feng --- drivers/mmc/host/sdhci-pci-gli.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/mmc/host/sdhci-pci-gli.c b/drivers/mmc/host/sdhci-pci-gli.c index 3887bfd7386b..d8a991b349a8 100644 --- a/drivers/mmc/host/sdhci-pci-gli.c +++ b/drivers/mmc/host/sdhci-pci-gli.c @@ -155,6 +155,9 @@ #define PCI_GLI_9755_PM_CTRL 0xFC #define PCI_GLI_9755_PM_STATE GENMASK(1, 0) +#define PCI_GLI_9755_CORRERR_MASK 0x214 +#define PCI_GLI_9755_CORRERR_MASK_REPLAY_TIMER_TIMEOUT BIT(12) + #define SDHCI_GLI_9767_GM_BURST_SIZE 0x510 #define SDHCI_GLI_9767_GM_BURST_SIZE_AXI_ALWAYS_SET BIT(8) @@ -778,6 +781,11 @@ static void gl9755_hw_setting(struct sdhci_pci_slot *slot) value &= ~PCI_GLI_9755_PM_STATE; pci_write_config_dword(pdev, PCI_GLI_9755_PM_CTRL, value); + /* mask the replay timer timeout of AER */ + pci_read_config_dword(pdev, PCI_GLI_9755_CORRERR_MASK, &value); + value |= PCI_GLI_9755_CORRERR_MASK_REPLAY_TIMER_TIMEOUT; + pci_write_config_dword(pdev, PCI_GLI_9755_CORRERR_MASK, value); + gl9755_wt_off(pdev); }