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bh=QycXfDBEhq0qRzXPBuOMwlVks0T/s/4Q5C4/yaHESyc=; b=nh83F2RTB7Vg1ikk6u0UGB7Gaqq5l225g2N4IG5gDnlXKOtXjBmlSzeQw8YGAgy6E3 r9FYC6rkO/l+ZCfpPFOfbccCA2GQGe8KdSJ6I9ZXivXDp+JJgRqtBpJFwnkv35fHEb+P jdjCxdkyNTcsy5Mu9HQoOcXn2To6j5bUr33L3qFT48Ls6+6PkpkjETXeqg7sI6i6DzY7 4szBt5KAT9DYtNpdQaG9IzBHxs1lFiafUQyhAgLX0O/BV1LkA+GZVU7GryPKso2YI+Cd aL1MudNfYTuO3gEeDj01FjODVbR7nC6VooA8LcDQE4/vqcnNxg4zPYZ1Luw6m+NXIHLk apOQ== X-Gm-Message-State: AOJu0YxnO8ve6z+xObJW+G1/diMZ0tn4bvjLdqQXXAnfK/nyWaR7m2eN basmcK/tpFDHFCqtFZiDUHpSxIXDUwbapoxTrBYc3zL63poFKQ== X-Received: by 2002:aa7:d503:0:b0:53f:5b60:8269 with SMTP id y3-20020aa7d503000000b0053f5b608269mr17601092edq.33.1699025993580; Fri, 03 Nov 2023 08:39:53 -0700 (PDT) MIME-Version: 1.0 From: Uros Bizjak Date: Fri, 3 Nov 2023 16:39:42 +0100 Message-ID: Subject: [COMMITTED]: i386: Handle multiple address register classes To: "gcc-patches@gcc.gnu.org" Cc: Hongtao Liu , =?utf-8?b?546p6L+Y5pyJ?= X-Spam-Status: No, score=-8.3 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1781557924315703535 X-GMAIL-MSGID: 1781557924315703535 The patch generalizes address register class handling to allow multiple register classes. For APX EGPR targets, some instructions do not support GPR32 registers, so it is necessary to limit address register set to avoid them. The same situation happens for instructions with high registers, where REX registers can not be used in the address, so the existing infrastructure can be adapted to also handle this case. The patch is mostly a mechanical rename of "gpr32" attribute to "addr" and introduces no functional changes, although it fixes a couple of inconsistent attribute values in passing. A follow-up patch will use the above infrastructure to limit address register class to legacy registers for instructions with high registers. gcc/ChangeLog: * config/i386/i386.cc (ix86_memory_address_use_extended_reg_class_p): Rename to ... (ix86_memory_address_reg_class): ... this. Generalize address register class handling to allow multiple address register classes. Return maximal class for unrecognized instructions. Improve comments. (ix86_insn_base_reg_class): Rewrite to handle multiple address register classes. (ix86_regno_ok_for_insn_base_p): Ditto. (ix86_insn_index_reg_class): Ditto. * config/i386/i386.md: Rename "gpr32" attribute to "addr" and substitute its values with "0" -> "gpr16", "1" -> "*". (addr): New attribute to limit allowed address register set. (gpr32): Remove. * config/i386/mmx.md: Rename "gpr32" attribute to "addr" and substitute its values with "0" -> "gpr16", "1" -> "*". * config/i386/sse.md: Ditto. Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}. Uros. diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc index 0f17f7d0258..fdc9362cf5b 100644 --- a/gcc/config/i386/i386.cc +++ b/gcc/config/i386/i386.cc @@ -11357,93 +11357,116 @@ ix86_validate_address_register (rtx op) return NULL_RTX; } -/* Return true if insn memory address can use any available reg - in BASE_REG_CLASS or INDEX_REG_CLASS, otherwise false. - For APX, some instruction can't be encoded with gpr32 - which is BASE_REG_CLASS or INDEX_REG_CLASS, for that case - returns false. */ -static bool -ix86_memory_address_use_extended_reg_class_p (rtx_insn* insn) +/* Determine which memory address register set insn can use. */ + +static enum attr_addr +ix86_memory_address_reg_class (rtx_insn* insn) { - /* LRA will do some initialization with insn == NULL, - return the maximum reg class for that. - For other cases, real insn will be passed and checked. */ - bool ret = true; + /* LRA can do some initialization with NULL insn, + return maximum register class in this case. */ + enum attr_addr addr_rclass = ADDR_GPR32; + if (TARGET_APX_EGPR && insn) { if (asm_noperands (PATTERN (insn)) >= 0 || GET_CODE (PATTERN (insn)) == ASM_INPUT) - return ix86_apx_inline_asm_use_gpr32; + return ix86_apx_inline_asm_use_gpr32 ? ADDR_GPR32 : ADDR_GPR16; + /* Return maximum register class for unrecognized instructions. */ if (INSN_CODE (insn) < 0) - return false; + return addr_rclass; - /* Try recog the insn before calling get_attr_gpr32. Save - the current recog_data first. */ - /* Also save which_alternative for current recog. */ + /* Try to recognize the insn before calling get_attr_addr. + Save current recog_data and current alternative. */ + struct recog_data_d saved_recog_data = recog_data; + int saved_alternative = which_alternative; - struct recog_data_d recog_data_save = recog_data; - int which_alternative_saved = which_alternative; - - /* Update the recog_data for alternative check. */ + /* Update recog_data for processing of alternatives. */ if (recog_data.insn != insn) extract_insn_cached (insn); - /* If alternative is not set, loop throught each alternative - of insn and get gpr32 attr for all enabled alternatives. - If any enabled alternatives has 0 value for gpr32, disallow - gpr32 for addressing. */ - if (which_alternative_saved == -1) + /* If current alternative is not set, loop throught enabled + alternatives and get the most limited register class. */ + if (saved_alternative == -1) { alternative_mask enabled = get_enabled_alternatives (insn); - bool curr_insn_gpr32 = false; + for (int i = 0; i < recog_data.n_alternatives; i++) { if (!TEST_BIT (enabled, i)) continue; + which_alternative = i; - curr_insn_gpr32 = get_attr_gpr32 (insn); - if (!curr_insn_gpr32) - ret = false; + addr_rclass = MIN (addr_rclass, get_attr_addr (insn)); } } else { - which_alternative = which_alternative_saved; - ret = get_attr_gpr32 (insn); + which_alternative = saved_alternative; + addr_rclass = get_attr_addr (insn); } - recog_data = recog_data_save; - which_alternative = which_alternative_saved; + recog_data = saved_recog_data; + which_alternative = saved_alternative; } - return ret; + return addr_rclass; } -/* For APX, some instructions can't be encoded with gpr32. */ +/* Return memory address register class insn can use. */ + enum reg_class ix86_insn_base_reg_class (rtx_insn* insn) { - if (ix86_memory_address_use_extended_reg_class_p (insn)) - return BASE_REG_CLASS; - return GENERAL_GPR16; + switch (ix86_memory_address_reg_class (insn)) + { + case ADDR_GPR8: + gcc_unreachable (); + case ADDR_GPR16: + return GENERAL_GPR16; + case ADDR_GPR32: + break; + default: + gcc_unreachable (); + } + + return BASE_REG_CLASS; } bool ix86_regno_ok_for_insn_base_p (int regno, rtx_insn* insn) { + switch (ix86_memory_address_reg_class (insn)) + { + case ADDR_GPR8: + gcc_unreachable (); + case ADDR_GPR16: + return GENERAL_GPR16_REGNO_P (regno); + case ADDR_GPR32: + break; + default: + gcc_unreachable (); + } - if (ix86_memory_address_use_extended_reg_class_p (insn)) - return GENERAL_REGNO_P (regno); - return GENERAL_GPR16_REGNO_P (regno); + return GENERAL_REGNO_P (regno); } enum reg_class ix86_insn_index_reg_class (rtx_insn* insn) { - if (ix86_memory_address_use_extended_reg_class_p (insn)) - return INDEX_REG_CLASS; - return INDEX_GPR16; + switch (ix86_memory_address_reg_class (insn)) + { + case ADDR_GPR8: + gcc_unreachable (); + case ADDR_GPR16: + return INDEX_GPR16; + case ADDR_GPR32: + break; + default: + gcc_unreachable (); + } + + return INDEX_REG_CLASS; } /* Recognizes RTL expressions that are valid memory addresses for an diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 663db73707a..ecc74e9994e 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -882,8 +882,8 @@ (define_attr "use_carry" "0,1" (const_string "0")) ;; Define attribute to indicate unaligned ssemov insns (define_attr "movu" "0,1" (const_string "0")) -;; Define attribute to indicate gpr32 insns. -(define_attr "gpr32" "0, 1" (const_string "1")) +;; Define attribute to limit memory address register set. +(define_attr "addr" "gpr8,gpr16,gpr32" (const_string "gpr32")) ;; Define instruction set of MMX instructions (define_attr "mmx_isa" "base,native,sse,sse_noavx,avx" @@ -2987,10 +2987,10 @@ (define_insn "*movhi_internal" (const_string "avx") ] (const_string "*"))) - (set (attr "gpr32") + (set (attr "addr") (if_then_else (eq_attr "alternative" "14") - (const_string "0") - (const_string "1"))) + (const_string "gpr16") + (const_string "*"))) (set (attr "type") (cond [(eq_attr "alternative" "4,5,6,7") (const_string "mskmov") @@ -4470,10 +4470,10 @@ (define_insn "*mov_internal" (const_string "avx") ] (const_string "*"))) - (set (attr "gpr32") - (if_then_else (eq_attr "alternative" "8") - (const_string "0") - (const_string "1"))) + (set (attr "addr") + (if_then_else (eq_attr "alternative" "7") + (const_string "gpr16") + (const_string "*"))) (set (attr "type") (cond [(eq_attr "alternative" "4") (const_string "sselog1") @@ -16913,7 +16913,7 @@ (define_insn "setcc__sse" cmp%D3\t{%2, %0|%0, %2} vcmp%D3\t{%2, %1, %0|%0, %1, %2}" [(set_attr "isa" "noavx,avx") - (set_attr "gpr32" "1,0") + (set_attr "addr" "*,gpr16") (set_attr "type" "ssecmp") (set_attr "length_immediate" "1") (set_attr "prefix" "orig,vex") @@ -20379,7 +20379,7 @@ (define_insn "*rcpsf2_sse" rcpss\t{%1, %d0|%d0, %1} vrcpss\t{%1, %d0|%d0, %1}" [(set_attr "isa" "*,*,noavx,avx") - (set_attr "gpr32" "1,1,1,0") + (set_attr "addr" "*,*,*,gpr16") (set_attr "type" "sse") (set_attr "atom_sse_attr" "rcp") (set_attr "btver2_sse_attr" "rcp") @@ -20642,7 +20642,7 @@ (define_insn "*rsqrtsf2_sse" rsqrtss\t{%1, %d0|%d0, %1} vrsqrtss\t{%1, %d0|%d0, %1}" [(set_attr "isa" "*,*,noavx,avx") - (set_attr "gpr32" "1,1,1,0") + (set_attr "addr" "*,*,*,gpr16") (set_attr "type" "sse") (set_attr "atom_sse_attr" "rcp") (set_attr "btver2_sse_attr" "rcp") @@ -21881,7 +21881,7 @@ (define_insn "sse4_1_round2" [(set_attr "type" "ssecvt") (set_attr "prefix_extra" "1,1,1,*,*") (set_attr "length_immediate" "1") - (set_attr "gpr32" "1,1,0,1,1") + (set_attr "addr" "*,*,gpr16,*,*") (set_attr "prefix" "maybe_vex,maybe_vex,maybe_vex,evex,evex") (set_attr "isa" "noavx512f,noavx512f,noavx512f,avx512f,avx512f") (set_attr "avx_partial_xmm_update" "false,false,true,false,true") @@ -25924,7 +25924,7 @@ (define_insn "fxsave64" "TARGET_64BIT && TARGET_FXSR" "fxsave64\t%0" [(set_attr "type" "other") - (set_attr "gpr32" "0") + (set_attr "addr" "gpr16") (set_attr "memory" "store") (set (attr "length") (symbol_ref "ix86_attr_length_address_default (insn) + 4"))]) @@ -25945,7 +25945,7 @@ (define_insn "fxrstor64" "TARGET_64BIT && TARGET_FXSR" "fxrstor64\t%0" [(set_attr "type" "other") - (set_attr "gpr32" "0") + (set_attr "addr" "gpr16") (set_attr "memory" "load") (set (attr "length") (symbol_ref "ix86_attr_length_address_default (insn) + 4"))]) @@ -26008,7 +26008,7 @@ (define_insn "_rex64" "\t%0" [(set_attr "type" "other") (set_attr "memory" "store") - (set_attr "gpr32" "0") + (set_attr "addr" "gpr16") (set (attr "length") (symbol_ref "ix86_attr_length_address_default (insn) + 3"))]) @@ -26022,7 +26022,7 @@ (define_insn "" "\t%0" [(set_attr "type" "other") (set_attr "memory" "store") - (set_attr "gpr32" "0") + (set_attr "addr" "gpr16") (set (attr "length") (symbol_ref "ix86_attr_length_address_default (insn) + 4"))]) @@ -26048,7 +26048,7 @@ (define_insn "_rex64" "\t%0" [(set_attr "type" "other") (set_attr "memory" "load") - (set_attr "gpr32" "0") + (set_attr "addr" "gpr16") (set (attr "length") (symbol_ref "ix86_attr_length_address_default (insn) + 3"))]) @@ -26062,7 +26062,7 @@ (define_insn "64" "64\t%0" [(set_attr "type" "other") (set_attr "memory" "load") - (set_attr "gpr32" "0") + (set_attr "addr" "gpr16") (set (attr "length") (symbol_ref "ix86_attr_length_address_default (insn) + 4"))]) diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md index ba81ff72551..50402b5b544 100644 --- a/gcc/config/i386/mmx.md +++ b/gcc/config/i386/mmx.md @@ -467,10 +467,10 @@ (define_insn "*movv2qi_internal" (const_string "avx") ] (const_string "*"))) - (set (attr "gpr32") + (set (attr "addr") (if_then_else (eq_attr "alternative" "7") - (const_string "0") - (const_string "1"))) + (const_string "gpr16") + (const_string "*"))) (set (attr "type") (cond [(eq_attr "alternative" "6,7,8") (if_then_else (match_test "TARGET_AVX512FP16") @@ -1205,7 +1205,7 @@ (define_insn "@sse4_1_insertps_" } } [(set_attr "isa" "noavx,noavx,avx") - (set_attr "gpr32" "0,0,1") + (set_attr "addr" "*,*,gpr16") (set_attr "type" "sselog") (set_attr "prefix_data16" "1,1,*") (set_attr "prefix_extra" "1") @@ -4874,7 +4874,7 @@ (define_insn "*mmx_pinsrd" } } [(set_attr "isa" "noavx,avx") - (set_attr "gpr32" "0,1") + (set_attr "addr" "gpr16,*") (set_attr "prefix_extra" "1") (set_attr "type" "sselog") (set_attr "length_immediate" "1") @@ -4947,7 +4947,7 @@ (define_insn "*mmx_pinsrb" } [(set_attr "isa" "noavx,avx") (set_attr "type" "sselog") - (set_attr "gpr32" "0,1") + (set_attr "addr" "gpr16,*") (set_attr "prefix_extra" "1") (set_attr "length_immediate" "1") (set_attr "prefix" "orig,vex") @@ -4966,7 +4966,7 @@ (define_insn "*mmx_pextrw" pextrw\t{%2, %1, %0|%0, %1, %2} vpextrw\t{%2, %1, %0|%0, %1, %2}" [(set_attr "isa" "*,sse2,sse4_noavx,avx") - (set_attr "gpr32" "1,1,0,1") + (set_attr "addr" "*,*,gpr16,*") (set_attr "mmx_isa" "native,*,*,*") (set_attr "type" "mmxcvt,sselog1,sselog1,sselog1") (set_attr "length_immediate" "1") @@ -5003,7 +5003,7 @@ (define_insn "*mmx_pextrb" vpextrb\t{%2, %1, %k0|%k0, %1, %2} vpextrb\t{%2, %1, %0|%0, %1, %2}" [(set_attr "isa" "noavx,noavx,avx,avx") - (set_attr "gpr32" "1,0,1,1") + (set_attr "addr" "*,gpr16,*,*") (set_attr "type" "sselog1") (set_attr "prefix_extra" "1") (set_attr "length_immediate" "1") @@ -5036,7 +5036,7 @@ (define_insn "mmx_pshufbv8qi3" pshufb\t{%2, %0|%0, %2} vpshufb\t{%2, %1, %0|%0, %1, %2}" [(set_attr "isa" "noavx,avx") - (set_attr "gpr32" "0,1") + (set_attr "addr" "gpr16,*") (set_attr "type" "sselog1") (set_attr "prefix_extra" "1") (set_attr "prefix" "orig,maybe_evex") @@ -5054,7 +5054,7 @@ (define_insn "mmx_pshufbv4qi3" pshufb\t{%2, %0|%0, %2} vpshufb\t{%2, %1, %0|%0, %1, %2}" [(set_attr "isa" "noavx,avx") - (set_attr "gpr32" "0,1") + (set_attr "addr" "gpr16,*") (set_attr "type" "sselog1") (set_attr "prefix_extra" "1") (set_attr "prefix" "orig,maybe_evex") @@ -5330,7 +5330,10 @@ (define_insn "*vec_extractv2si_1" # #" [(set_attr "isa" "*,sse4_noavx,avx,sse2,noavx,*,*,*") - (set_attr "gpr32" "1,0,1,1,1,1,1,1") + (set (attr "addr") + (if_then_else (eq_attr "alternative" "1") + (const_string "gpr16") + (const_string "*"))) (set_attr "mmx_isa" "native,*,*,*,*,native,*,*") (set_attr "type" "mmxcvt,ssemov,ssemov,sseshuf1,sseshuf1,mmxmov,ssemov,imov") (set (attr "length_immediate") @@ -5534,7 +5537,7 @@ (define_insn "*pinsrb" } } [(set_attr "isa" "noavx,avx") - (set_attr "gpr32" "0,1") + (set_attr "addr" "gpr16,*") (set_attr "type" "sselog") (set_attr "prefix_extra" "1") (set_attr "length_immediate" "1") @@ -5552,7 +5555,7 @@ (define_insn "*pextrw" pextrw\t{%2, %1, %0|%0, %1, %2} vpextrw\t{%2, %1, %0|%0, %1, %2}" [(set_attr "isa" "*,sse4_noavx,avx") - (set_attr "gpr32" "1,0,1") + (set_attr "addr" "*,gpr16,*") (set_attr "type" "sselog1") (set_attr "length_immediate" "1") (set_attr "prefix" "maybe_vex") @@ -5583,7 +5586,7 @@ (define_insn "*pextrb" vpextrb\t{%2, %1, %k0|%k0, %1, %2} vpextrb\t{%2, %1, %0|%0, %1, %2}" [(set_attr "isa" "noavx,noavx,avx,avx") - (set_attr "gpr32" "1,0,1,1") + (set_attr "addr" "*,gpr16,*,*") (set_attr "type" "sselog1") (set_attr "prefix_extra" "1") (set_attr "length_immediate" "1") diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 906212fb4c1..e6a5c7911d5 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -1874,7 +1874,7 @@ (define_insn "_lddqu" "%vlddqu\t{%1, %0|%0, %1}" [(set_attr "isa" "noavx,avx") (set_attr "type" "ssemov") - (set_attr "gpr32" "1,0") + (set_attr "addr" "*,gpr16") (set_attr "movu" "1") (set (attr "prefix_data16") (if_then_else @@ -2578,7 +2578,7 @@ (define_insn "_rcp2" "%vrcpps\t{%1, %0|%0, %1}" [(set_attr "isa" "noavx,avx") (set_attr "type" "sse") - (set_attr "gpr32" "1,0") + (set_attr "addr" "*,gpr16") (set_attr "atom_sse_attr" "rcp") (set_attr "btver2_sse_attr" "rcp") (set_attr "prefix" "maybe_vex") @@ -2597,7 +2597,7 @@ (define_insn "sse_vmrcpv4sf2" vrcpss\t{%1, %2, %0|%0, %2, %k1}" [(set_attr "isa" "noavx,avx") (set_attr "type" "sse") - (set_attr "gpr32" "1,0") + (set_attr "addr" "*,gpr16") (set_attr "atom_sse_attr" "rcp") (set_attr "btver2_sse_attr" "rcp") (set_attr "prefix" "orig,vex") @@ -2617,7 +2617,7 @@ (define_insn "*sse_vmrcpv4sf2" vrcpss\t{%1, %2, %0|%0, %2, %1}" [(set_attr "isa" "noavx,avx") (set_attr "type" "sse") - (set_attr "gpr32" "1,0") + (set_attr "addr" "*,gpr16") (set_attr "atom_sse_attr" "rcp") (set_attr "btver2_sse_attr" "rcp") (set_attr "prefix" "orig,vex") @@ -2801,7 +2801,7 @@ (define_insn "_rsqrt2" "%vrsqrtps\t{%1, %0|%0, %1}" [(set_attr "isa" "noavx,avx") (set_attr "type" "sse") - (set_attr "gpr32" "1,0") + (set_attr "addr" "*,gpr16") (set_attr "prefix" "maybe_vex") (set_attr "mode" "")]) @@ -2870,7 +2870,7 @@ (define_insn "sse_vmrsqrtv4sf2" vrsqrtss\t{%1, %2, %0|%0, %2, %k1}" [(set_attr "isa" "noavx,avx") (set_attr "type" "sse") - (set_attr "gpr32" "1,0") + (set_attr "addr" "*,gpr16") (set_attr "prefix" "orig,vex") (set_attr "mode" "SF")]) @@ -2888,7 +2888,7 @@ (define_insn "*sse_vmrsqrtv4sf2" vrsqrtss\t{%1, %2, %0|%0, %2, %1}" [(set_attr "isa" "noavx,avx") (set_attr "type" "sse") - (set_attr "gpr32" "1,0") + (set_attr "addr" "*,gpr16") (set_attr "prefix" "orig,vex") (set_attr "mode" "SF")]) @@ -3073,7 +3073,7 @@ (define_insn "vec_addsub3" vaddsub\t{%2, %1, %0|%0, %1, %2}" [(set_attr "isa" "noavx,avx") (set_attr "type" "sseadd") - (set_attr "gpr32" "1,0") + (set_attr "addr" "*,gpr16") (set (attr "atom_unit") (if_then_else (match_test "mode == V2DFmode") @@ -3230,7 +3230,7 @@ (define_insn "avx_hv4df3" "TARGET_AVX" "vhpd\t{%2, %1, %0|%0, %1, %2}" [(set_attr "type" "sseadd") - (set_attr "gpr32" "0") + (set_attr "addr" "gpr16") (set_attr "prefix" "vex") (set_attr "mode" "V4DF")]) @@ -3273,7 +3273,7 @@ (define_insn "*sse3_haddv2df3" haddpd\t{%2, %0|%0, %2} vhaddpd\t{%2, %1, %0|%0, %1, %2}" [(set_attr "isa" "noavx,avx") - (set_attr "gpr32" "1,0") + (set_attr "addr" "*,gpr16") (set_attr "type" "sseadd") (set_attr "prefix" "orig,vex") (set_attr "mode" "V2DF")]) @@ -3297,7 +3297,7 @@ (define_insn "sse3_hsubv2df3" vhsubpd\t{%2, %1, %0|%0, %1, %2}" [(set_attr "isa" "noavx,avx") (set_attr "type" "sseadd") - (set_attr "gpr32" "1,0") + (set_attr "addr" "*,gpr16") (set_attr "prefix" "orig,vex") (set_attr "mode" "V2DF")]) @@ -3378,7 +3378,7 @@ (define_insn "avx_hv8sf3" "TARGET_AVX" "vhps\t{%2, %1, %0|%0, %1, %2}" [(set_attr "type" "sseadd") - (set_attr "gpr32" "0") + (set_attr "addr" "gpr16") (set_attr "prefix" "vex") (set_attr "mode" "V8SF")]) @@ -3409,7 +3409,7 @@ (define_insn "sse3_hv4sf3" vhps\t{%2, %1, %0|%0, %1, %2}" [(set_attr "isa" "noavx,avx") (set_attr "type" "sseadd") - (set_attr "gpr32" "1,0") + (set_attr "addr" "*,gpr16") (set_attr "atom_unit" "complex") (set_attr "prefix" "orig,vex") (set_attr "prefix_rep" "1,*") @@ -3613,7 +3613,7 @@ (define_insn "avx_cmp3" "TARGET_AVX" "vcmp\t{%3, %2, %1, %0|%0, %1, %2, %3}" [(set_attr "type" "ssecmp") - (set_attr "gpr32" "0") + (set_attr "addr" "gpr16") (set_attr "length_immediate" "1") (set_attr "prefix" "vex") (set_attr "mode" "")]) @@ -3827,7 +3827,7 @@ (define_insn "avx_vmcmp3" "TARGET_AVX" "vcmp\t{%3, %2, %1, %0|%0, %1, %2, %3}" [(set_attr "type" "ssecmp") - (set_attr "gpr32" "0") + (set_attr "addr" "gpr16") (set_attr "length_immediate" "1") (set_attr "prefix" "vex") (set_attr "mode" "")]) @@ -3843,7 +3843,7 @@ (define_insn "*_maskcmp3_comm" cmp%D3\t{%2, %0|%0, %2} vcmp%D3\t{%2, %1, %0|%0, %1, %2}" [(set_attr "isa" "noavx,avx") - (set_attr "gpr32" "1,0") + (set_attr "addr" "*,gpr16") (set_attr "type" "ssecmp") (set_attr "length_immediate" "1") (set_attr "prefix" "orig,vex") @@ -3859,7 +3859,7 @@ (define_insn "_maskcmp3" cmp%D3\t{%2, %0|%0, %2} vcmp%D3\t{%2, %1, %0|%0, %1, %2}" [(set_attr "isa" "noavx,avx") - (set_attr "gpr32" "1,0") + (set_attr "addr" "*,gpr16") (set_attr "type" "ssecmp") (set_attr "length_immediate" "1") (set_attr "prefix" "orig,vex") @@ -3878,7 +3878,7 @@ (define_insn "_vmmaskcmp3" cmp%D3\t{%2, %0|%0, %2} vcmp%D3\t{%2, %1, %0|%0, %1, %2}" [(set_attr "isa" "noavx,avx") - (set_attr "gpr32" "1,0") + (set_attr "addr" "*,gpr16") (set_attr "type" "ssecmp") (set_attr "length_immediate" "1,*") (set_attr "prefix" "orig,vex") @@ -4826,7 +4826,7 @@ (define_insn "_andnot3" return ""; } [(set_attr "isa" "noavx,avx_noavx512f,avx512dq,avx512f") - (set_attr "gpr32" "1,0,1,1") + (set_attr "addr" "*,gpr16,*,*") (set_attr "type" "sselog") (set_attr "prefix" "orig,maybe_vex,evex,evex") (set (attr "mode") @@ -5170,7 +5170,7 @@ (define_insn "*andnot3" return ""; } [(set_attr "isa" "noavx,avx_noavx512f,avx512vl,avx512f_512") - (set_attr "gpr32" "1,0,1,1") + (set_attr "addr" "*,gpr16,*,*") (set_attr "type" "sselog") (set (attr "prefix_data16") (if_then_else @@ -10958,10 +10958,10 @@ (define_insn "*vec_concatv2sf_sse4_1" (if_then_else (eq_attr "alternative" "7,8") (const_string "native") (const_string "*"))) - (set (attr "gpr32") + (set (attr "addr") (if_then_else (eq_attr "alternative" "3,4") - (const_string "0") - (const_string "1"))) + (const_string "gpr16") + (const_string "*"))) (set (attr "prefix_data16") (if_then_else (eq_attr "alternative" "3,4") (const_string "1") @@ -11093,10 +11093,10 @@ (define_insn "vec_set_0" (const_string "fmov") ] (const_string "ssemov"))) - (set (attr "gpr32") + (set (attr "addr") (if_then_else (eq_attr "alternative" "8,9") - (const_string "0") - (const_string "1"))) + (const_string "gpr16") + (const_string "*"))) (set (attr "prefix_extra") (if_then_else (eq_attr "alternative" "8,9,10") (const_string "1") @@ -11288,7 +11288,7 @@ (define_insn "*vec_setv4sf_sse4_1" } [(set_attr "isa" "noavx,noavx,avx") (set_attr "type" "sselog") - (set_attr "gpr32" "0,0,1") + (set_attr "addr" "gpr16,gpr16,*") (set_attr "prefix_data16" "1,1,*") (set_attr "prefix_extra" "1") (set_attr "length_immediate" "1") @@ -11389,7 +11389,7 @@ (define_insn "@sse4_1_insertps_" } } [(set_attr "isa" "noavx,noavx,avx") - (set_attr "gpr32" "0,0,1") + (set_attr "addr" "gpr16,gpr16,*") (set_attr "type" "sselog") (set_attr "prefix_data16" "1,1,*") (set_attr "prefix_extra" "1") @@ -11501,7 +11501,7 @@ (define_insn_and_split "*sse4_1_extractps" DONE; } [(set_attr "isa" "noavx,noavx,avx,noavx,avx") - (set_attr "gpr32" "0,0,1,1,1") + (set_attr "addr" "gpr16,gpr16,*,*,*") (set_attr "type" "sselog,sselog,sselog,*,*") (set_attr "prefix_data16" "1,1,1,*,*") (set_attr "prefix_extra" "1,1,1,*,*") @@ -12354,7 +12354,7 @@ (define_insn "vec_extract_hi_v32qi" (set_attr "prefix_extra" "1") (set_attr "length_immediate" "1") (set_attr "isa" "noavx512vl,avx512vl") - (set_attr "gpr32" "0,1") + (set_attr "addr" "gpr16,*") (set_attr "prefix" "vex,evex") (set_attr "mode" "OI")]) @@ -12400,7 +12400,7 @@ (define_insn "*vec_extract" } } [(set_attr "isa" "*,sse4_noavx,avx,noavx,avx") - (set_attr "gpr32" "1,0,1,1,1") + (set_attr "addr" "*,gpr16,*,*,*") (set_attr "type" "sselog1,sselog1,sselog1,sseishft1,sseishft1") (set_attr "prefix" "maybe_evex") (set_attr "mode" "TI")]) @@ -15774,7 +15774,7 @@ (define_insn "*sse4_1_mulv2siv2di3" pmuldq\t{%2, %0|%0, %2} vpmuldq\t{%2, %1, %0|%0, %1, %2}" [(set_attr "isa" "noavx,noavx,avx") - (set_attr "gpr32" "0,0,1") + (set_attr "addr" "gpr16,gpr16,*") (set_attr "type" "sseimul") (set_attr "prefix_extra" "1") (set_attr "prefix" "orig,orig,vex") @@ -16020,7 +16020,7 @@ (define_insn "*_mul3" pmulld\t{%2, %0|%0, %2} vpmulld\t{%2, %1, %0|%0, %1, %2}" [(set_attr "isa" "noavx,noavx,avx") - (set_attr "gpr32" "0,0,1") + (set_attr "addr" "gpr16,gpr16,*") (set_attr "type" "sseimul") (set_attr "prefix_extra" "1") (set_attr "prefix" "") @@ -16836,7 +16836,7 @@ (define_insn "*sse4_1_3" [(set_attr "isa" "noavx,noavx,avx") (set_attr "type" "sseiadd") (set_attr "prefix_extra" "1") - (set_attr "gpr32" "0,0,1") + (set_attr "addr" "gpr16,gpr16,*") (set_attr "prefix" "orig,orig,vex") (set_attr "mode" "TI")]) @@ -16851,7 +16851,7 @@ (define_insn "*v8hi3" vpw\t{%2, %1, %0|%0, %1, %2}" [(set_attr "isa" "noavx,avx") (set_attr "type" "sseiadd") - (set_attr "gpr32" "0,1") + (set_attr "addr" "gpr16,*") (set_attr "prefix" "orig,vex") (set_attr "mode" "TI")]) @@ -16919,7 +16919,7 @@ (define_insn "*sse4_1_3" vp\t{%2, %1, %0|%0, %1, %2}" [(set_attr "isa" "noavx,noavx,avx") (set_attr "type" "sseiadd") - (set_attr "gpr32" "0,0,1") + (set_attr "addr" "gpr16,gpr16,*") (set_attr "prefix_extra" "1,1,*") (set_attr "prefix" "orig,orig,vex") (set_attr "mode" "TI")]) @@ -16934,7 +16934,7 @@ (define_insn "*v16qi3" pb\t{%2, %0|%0, %2} vpb\t{%2, %1, %0|%0, %1, %2}" [(set_attr "isa" "noavx,avx") - (set_attr "gpr32" "0,1") + (set_attr "addr" "gpr16,*") (set_attr "type" "sseiadd") (set_attr "prefix" "orig,vex") (set_attr "mode" "TI")]) @@ -16957,7 +16957,7 @@ (define_insn "*avx2_eq3" (if_then_else (eq (const_string "mode") (const_string "V4DImode")) (const_string "1") (const_string "*"))) - (set_attr "gpr32" "0") + (set_attr "addr" "gpr16") (set_attr "prefix" "vex") (set_attr "mode" "OI")]) @@ -17148,7 +17148,7 @@ (define_insn "*sse4_1_eqv2di3" vpcmpeqq\t{%2, %1, %0|%0, %1, %2}" [(set_attr "isa" "noavx,noavx,avx") (set_attr "type" "ssecmp") - (set_attr "gpr32" "0") + (set_attr "addr" "gpr16") (set_attr "prefix_extra" "1") (set_attr "prefix" "orig,orig,vex") (set_attr "mode" "TI")]) @@ -17164,7 +17164,7 @@ (define_insn "*sse2_eq3" pcmpeq\t{%2, %0|%0, %2} vpcmpeq\t{%2, %1, %0|%0, %1, %2}" [(set_attr "isa" "noavx,avx") - (set_attr "gpr32" "1,0") + (set_attr "addr" "*,gpr16") (set_attr "type" "ssecmp") (set_attr "prefix" "orig,vex") (set_attr "mode" "TI")]) @@ -17181,7 +17181,7 @@ (define_insn "sse4_2_gtv2di3" vpcmpgtq\t{%2, %1, %0|%0, %1, %2}" [(set_attr "isa" "noavx,noavx,avx") (set_attr "type" "ssecmp") - (set_attr "gpr32" "0") + (set_attr "addr" "gpr16") (set_attr "prefix_extra" "1") (set_attr "prefix" "orig,orig,vex") (set_attr "mode" "TI")]) @@ -17198,7 +17198,7 @@ (define_insn "avx2_gt3" (if_then_else (eq (const_string "mode") (const_string "V4DImode")) (const_string "1") (const_string "*"))) - (set_attr "gpr32" "0") + (set_attr "addr" "gpr16") (set_attr "prefix" "vex") (set_attr "mode" "OI")]) @@ -17228,7 +17228,7 @@ (define_insn "*sse2_gt3" pcmpgt\t{%2, %0|%0, %2} vpcmpgt\t{%2, %1, %0|%0, %1, %2}" [(set_attr "isa" "noavx,avx") - (set_attr "gpr32" "1,0") + (set_attr "addr" "*,gpr16") (set_attr "type" "ssecmp") (set_attr "prefix" "orig,vex") (set_attr "mode" "TI")]) @@ -17637,7 +17637,7 @@ (define_insn "*andnot3" return ""; } [(set_attr "isa" "noavx,avx_noavx512f,avx512f,*,*") - (set_attr "gpr32" "1,0,1,1,1") + (set_attr "addr" "*,gpr16,*,*,*") (set_attr "type" "sselog") (set (attr "prefix_data16") (if_then_else @@ -17868,7 +17868,7 @@ (define_insn "*3" return ""; } [(set_attr "isa" "noavx,avx_noavx512f,avx512f") - (set_attr "gpr32" "1,0,1") + (set_attr "addr" "*,gpr16,*") (set_attr "type" "sselog") (set (attr "prefix_data16") (if_then_else @@ -17965,7 +17965,7 @@ (define_insn "*3" return ""; } [(set_attr "isa" "noavx,avx_noavx512f,avx512f") - (set_attr "gpr32" "1,0,1") + (set_attr "addr" "*,gpr16,*") (set_attr "type" "sselog") (set (attr "prefix_data16") (if_then_else @@ -17999,7 +17999,7 @@ (define_insn "v1ti3" vp\t{%2, %1, %0|%0, %1, %2} vpd\t{%2, %1, %0|%0, %1, %2}" [(set_attr "isa" "noavx,avx_noavx512vl,avx512vl") - (set_attr "gpr32" "1,0,1") + (set_attr "addr" "*,gpr16,*") (set_attr "prefix" "orig,vex,evex") (set_attr "prefix_data16" "1,*,*") (set_attr "type" "sselog") @@ -18980,7 +18980,10 @@ (define_insn "_pinsr" } [(set_attr "isa" "noavx,noavx,avx,avx,,,avx2") (set_attr "type" "sselog") - (set_attr "gpr32" "0,0,1,1,1,1,1") + (set (attr "addr") + (if_then_else (eq_attr "alternative" "0,1") + (const_string "gpr16") + (const_string "*"))) (set (attr "prefix_rex") (if_then_else (and (not (match_test "TARGET_AVX")) @@ -20157,7 +20160,7 @@ (define_insn "*vec_extract" pextr\t{%2, %1, %0|%0, %1, %2} vpextr\t{%2, %1, %0|%0, %1, %2}" [(set_attr "isa" "sse2_noavx,avx,sse4_noavx,avx") - (set_attr "gpr32" "1,1,0,1") + (set_attr "addr" "*,*,gpr16,*") (set_attr "type" "sselog1") (set (attr "prefix_extra") (if_then_else @@ -20334,7 +20337,10 @@ (define_insn "*vec_extractv4si" } [(set_attr "isa" "noavx,avx,avx512dq,noavx,noavx,avx") (set_attr "type" "sselog1,sselog1,sselog1,sseishft1,sseishft1,sseishft1") - (set_attr "gpr32" "0,1,1,1,1,1") + (set (attr "addr") + (if_then_else (eq_attr "alternative" "0") + (const_string "gpr16") + (const_string "*"))) (set (attr "prefix_extra") (if_then_else (eq_attr "alternative" "0,1") (const_string "1") @@ -20425,7 +20431,10 @@ (define_insn "*vec_extractv2di_1" (const_string "imov") ] (const_string "sselog1"))) - (set_attr "gpr32" "0,1,1,1,1,1,1,1,1,1") + (set (attr "addr") + (if_then_else (eq_attr "alternative" "0") + (const_string "gpr16") + (const_string "*"))) (set (attr "length_immediate") (if_then_else (eq_attr "alternative" "0,1,2,4,5,6") (const_string "1") @@ -20585,10 +20594,10 @@ (define_insn "*vec_concatv2si_sse4_1" (const_string "mmxmov") ] (const_string "sselog"))) - (set (attr "gpr32") + (set (attr "addr") (if_then_else (eq_attr "alternative" "0,1") - (const_string "0") - (const_string "1"))) + (const_string "gpr16") + (const_string "*"))) (set (attr "prefix_extra") (if_then_else (eq_attr "alternative" "0,1,2,3") (const_string "1") @@ -20743,10 +20752,10 @@ (define_insn "vec_concatv2di" (eq_attr "alternative" "0,1,2,3,4,5") (const_string "sselog") (const_string "ssemov"))) - (set (attr "gpr32") + (set (attr "addr") (if_then_else (eq_attr "alternative" "0,1") - (const_string "0") - (const_string "1"))) + (const_string "gpr16") + (const_string "*"))) (set (attr "prefix_rex") (if_then_else (eq_attr "alternative" "0,1,2,3") (const_string "1") @@ -21339,7 +21348,7 @@ (define_insn "sse_ldmxcsr" "%vldmxcsr\t%0" [(set_attr "isa" "noavx,avx") (set_attr "type" "sse") - (set_attr "gpr32" "1,0") + (set_attr "addr" "*,gpr16") (set_attr "atom_sse_attr" "mxcsr") (set_attr "prefix" "maybe_vex") (set_attr "memory" "load")]) @@ -21351,7 +21360,7 @@ (define_insn "sse_stmxcsr" "%vstmxcsr\t%0" [(set_attr "isa" "noavx,avx") (set_attr "type" "sse") - (set_attr "gpr32" "0") + (set_attr "addr" "gpr16") (set_attr "atom_sse_attr" "mxcsr") (set_attr "prefix" "maybe_vex") (set_attr "memory" "store")]) @@ -21422,7 +21431,7 @@ (define_insn "avx2_phwv16hi3" "TARGET_AVX2" "vphw\t{%2, %1, %0|%0, %1, %2}" [(set_attr "type" "sseiadd") - (set_attr "gpr32" "0") + (set_attr "addr" "gpr16") (set_attr "prefix_extra" "1") (set_attr "prefix" "vex") (set_attr "mode" "OI")]) @@ -21448,7 +21457,7 @@ (define_insn "ssse3_phwv8hi3" vphw\t{%2, %1, %0|%0, %1, %2}" [(set_attr "isa" "noavx,avx") (set_attr "type" "sseiadd") - (set_attr "gpr32" "0") + (set_attr "addr" "gpr16") (set_attr "atom_unit" "complex") (set_attr "prefix_extra" "1") (set_attr "prefix" "orig,vex") @@ -21512,7 +21521,7 @@ (define_insn "avx2_phdv8si3" "TARGET_AVX2" "vphd\t{%2, %1, %0|%0, %1, %2}" [(set_attr "type" "sseiadd") - (set_attr "gpr32" "0") + (set_attr "addr" "gpr16") (set_attr "prefix_extra" "1") (set_attr "prefix" "vex") (set_attr "mode" "OI")]) @@ -21536,7 +21545,7 @@ (define_insn "ssse3_phdv4si3" vphd\t{%2, %1, %0|%0, %1, %2}" [(set_attr "isa" "noavx,avx") (set_attr "type" "sseiadd") - (set_attr "gpr32" "0") + (set_attr "addr" "gpr16") (set_attr "atom_unit" "complex") (set_attr "prefix_data16" "1,*") (set_attr "prefix_extra" "1") @@ -21576,7 +21585,7 @@ (define_insn_and_split "ssse3_phdv2si3" } [(set_attr "mmx_isa" "native,sse_noavx,avx") (set_attr "type" "sseiadd") - (set_attr "gpr32" "0") + (set_attr "addr" "gpr16") (set_attr "atom_unit" "complex") (set_attr "prefix_extra" "1") (set (attr "prefix_rex") (symbol_ref "x86_extended_reg_mentioned_p (insn)")) @@ -21721,7 +21730,7 @@ (define_insn "ssse3_pmaddubsw128" pmaddubsw\t{%2, %0|%0, %2} vpmaddubsw\t{%2, %1, %0|%0, %1, %2}" [(set_attr "isa" "noavx,avx") - (set_attr "gpr32" "0,1") + (set_attr "addr" "gpr16,*") (set_attr "type" "sseiadd") (set_attr "atom_unit" "simul") (set_attr "prefix_extra" "1") @@ -21850,7 +21859,7 @@ (define_insn "*_pmulhrsw3" pmulhrsw\t{%2, %0|%0, %2} vpmulhrsw\t{%2, %1, %0|%0, %1, %2}" [(set_attr "isa" "noavx,avx") - (set_attr "gpr32" "0,1") + (set_attr "addr" "gpr16,*") (set_attr "type" "sseimul") (set_attr "prefix_extra" "1") (set_attr "prefix" "orig,maybe_evex") @@ -21974,7 +21983,7 @@ (define_insn "_pshufb3" pshufb\t{%2, %0|%0, %2} vpshufb\t{%2, %1, %0|%0, %1, %2}" [(set_attr "isa" "noavx,avx") - (set_attr "gpr32" "0,1") + (set_attr "addr" "gpr16,*") (set_attr "type" "sselog1") (set_attr "prefix_extra" "1") (set_attr "prefix" "orig,maybe_evex") @@ -22042,7 +22051,7 @@ (define_insn "_psign3" vpsign\t{%2, %1, %0|%0, %1, %2}" [(set_attr "isa" "noavx,avx") (set_attr "type" "sselog1") - (set_attr "gpr32" "0") + (set_attr "addr" "gpr16") (set_attr "prefix_extra" "1") (set_attr "prefix" "orig,vex") (set_attr "mode" "")]) @@ -22108,7 +22117,7 @@ (define_insn "_palignr" } } [(set_attr "isa" "noavx,avx") - (set_attr "gpr32" "0,1") + (set_attr "addr" "gpr16,*") (set_attr "type" "sseishft") (set_attr "atom_unit" "sishuf") (set_attr "prefix_extra" "1") @@ -22183,7 +22192,7 @@ (define_insn_and_split "ssse3_palignrdi" } [(set_attr "mmx_isa" "native,sse_noavx,avx") (set_attr "type" "sseishft") - (set_attr "gpr32" "0,0,1") + (set_attr "addr" "gpr16,gpr16,*") (set_attr "atom_unit" "sishuf") (set_attr "prefix_extra" "1") (set_attr "length_immediate" "1") @@ -22206,7 +22215,7 @@ (define_insn "*abs2" "TARGET_SSSE3" "%vpabs\t{%1, %0|%0, %1}" [(set_attr "isa" "noavx,avx") - (set_attr "gpr32" "0,1") + (set_attr "addr" "gpr16,*") (set_attr "type" "sselog1") (set_attr "prefix_extra" "1") (set_attr "prefix" "maybe_vex") @@ -22355,7 +22364,7 @@ (define_insn "_blend" vblend\t{%3, %2, %1, %0|%0, %1, %2, %3}" [(set_attr "isa" "noavx,noavx,avx") (set_attr "type" "ssemov") - (set_attr "gpr32" "0") + (set_attr "addr" "gpr16") (set_attr "length_immediate" "1") (set_attr "prefix_data16" "1,1,*") (set_attr "prefix_extra" "1") @@ -22376,7 +22385,7 @@ (define_insn "_blendv" vblendv\t{%3, %2, %1, %0|%0, %1, %2, %3}" [(set_attr "isa" "noavx,noavx,avx") (set_attr "type" "ssemov") - (set_attr "gpr32" "0") + (set_attr "addr" "gpr16") (set_attr "length_immediate" "1") (set_attr "prefix_data16" "1,1,*") (set_attr "prefix_extra" "1") @@ -22442,7 +22451,7 @@ (define_insn_and_split "*_blendv_lt" "operands[3] = gen_lowpart (mode, operands[3]);" [(set_attr "isa" "noavx,noavx,avx") (set_attr "type" "ssemov") - (set_attr "gpr32" "0") + (set_attr "addr" "gpr16") (set_attr "length_immediate" "1") (set_attr "prefix_data16" "1,1,*") (set_attr "prefix_extra" "1") @@ -22481,7 +22490,7 @@ (define_insn_and_split "*_blendv_ltint" } [(set_attr "isa" "noavx,noavx,avx") (set_attr "type" "ssemov") - (set_attr "gpr32" "0") + (set_attr "addr" "gpr16") (set_attr "length_immediate" "1") (set_attr "prefix_data16" "1,1,*") (set_attr "prefix_extra" "1") @@ -22530,7 +22539,7 @@ (define_insn "_dp" vdp\t{%3, %2, %1, %0|%0, %1, %2, %3}" [(set_attr "isa" "noavx,noavx,avx") (set_attr "type" "ssemul") - (set_attr "gpr32" "0") + (set_attr "addr" "gpr16") (set_attr "length_immediate" "1") (set_attr "prefix_data16" "1,1,*") (set_attr "prefix_extra" "1") @@ -22550,7 +22559,7 @@ (define_insn "_movntdqa" "TARGET_SSE4_1" "%vmovntdqa\t{%1, %0|%0, %1}" [(set_attr "isa" "noavx,noavx,avx") - (set_attr "gpr32" "0,0,1") + (set_attr "addr" "gpr16,gpr16,*") (set_attr "type" "ssemov") (set_attr "prefix_extra" "1") (set_attr "prefix" "orig,orig,maybe_evex") @@ -22569,9 +22578,8 @@ (define_insn "_mpsadbw" mpsadbw\t{%3, %2, %0|%0, %2, %3} vmpsadbw\t{%3, %2, %1, %0|%0, %1, %2, %3}" [(set_attr "isa" "noavx,noavx,avx") - (set_attr "gpr32" "0,0,1") + (set_attr "addr" "gpr16") (set_attr "type" "sselog1") - (set_attr "gpr32" "0") (set_attr "length_immediate" "1") (set_attr "prefix_extra" "1") (set_attr "prefix" "orig,orig,vex") @@ -22591,7 +22599,7 @@ (define_insn "_packusdw" packusdw\t{%2, %0|%0, %2} vpackusdw\t{%2, %1, %0|%0, %1, %2}" [(set_attr "isa" "noavx,noavx,avx") - (set_attr "gpr32" "0,0,1") + (set_attr "addr" "gpr16,gpr16,*") (set_attr "type" "sselog") (set_attr "prefix_extra" "1") (set_attr "prefix" "orig,orig,") @@ -22611,7 +22619,7 @@ (define_insn "_pblendvb" vpblendvb\t{%3, %2, %1, %0|%0, %1, %2, %3}" [(set_attr "isa" "noavx,noavx,avx") (set_attr "type" "ssemov") - (set_attr "gpr32" "0") + (set_attr "addr" "gpr16") (set_attr "prefix_extra" "1") (set_attr "length_immediate" "*,*,1") (set_attr "prefix" "orig,orig,vex") @@ -22664,7 +22672,7 @@ (define_insn_and_split "*_pblendvb_lt" "" [(set_attr "isa" "noavx,noavx,avx") (set_attr "type" "ssemov") - (set_attr "gpr32" "0") + (set_attr "addr" "gpr16") (set_attr "prefix_extra" "1") (set_attr "length_immediate" "*,*,1") (set_attr "prefix" "orig,orig,vex") @@ -22706,7 +22714,7 @@ (define_insn "sse4_1_pblend" vpblendw\t{%3, %2, %1, %0|%0, %1, %2, %3}" [(set_attr "isa" "noavx,noavx,avx") (set_attr "type" "ssemov") - (set_attr "gpr32" "0") + (set_attr "addr" "gpr16") (set_attr "prefix_extra" "1") (set_attr "length_immediate" "1") (set_attr "prefix" "orig,orig,vex") @@ -22778,7 +22786,7 @@ (define_insn "*avx2_pblend" return "vpblendw\t{%3, %2, %1, %0|%0, %1, %2, %3}"; } [(set_attr "type" "ssemov") - (set_attr "gpr32" "0") + (set_attr "addr" "gpr16") (set_attr "prefix_extra" "1") (set_attr "length_immediate" "1") (set_attr "prefix" "vex") @@ -22805,7 +22813,7 @@ (define_insn "sse4_1_phminposuw" "TARGET_SSE4_1" "%vphminposuw\t{%1, %0|%0, %1}" [(set_attr "isa" "noavx,noavx,avx") - (set_attr "gpr32" "0") + (set_attr "addr" "gpr16") (set_attr "type" "sselog1") (set_attr "prefix_extra" "1") (set_attr "prefix" "orig,orig,vex") @@ -22945,7 +22953,7 @@ (define_insn "*sse4_1_v8qiv8hi2_1" pmovbw\t{%1, %0|%0, %1} vpmovbw\t{%1, %0|%0, %1}" [(set_attr "isa" "noavx,noavx,avx") - (set_attr "gpr32" "0,0,1") + (set_attr "addr" "gpr16,gpr16,*") (set_attr "type" "ssemov") (set_attr "prefix_extra" "1") (set_attr "prefix" "orig,orig,maybe_evex") @@ -23001,7 +23009,7 @@ (define_insn_and_split "*sse4_1_zero_extendv8qiv8hi2_3" } } [(set_attr "isa" "noavx,noavx,avx") - (set_attr "gpr32" "0,0,1")]) + (set_attr "addr" "gpr16,gpr16,*")]) (define_insn_and_split "*sse4_1_zero_extendv8qiv8hi2_4" [(set (match_operand:V16QI 0 "register_operand" "=Yr,*x,Yw") @@ -23037,7 +23045,7 @@ (define_insn_and_split "*sse4_1_zero_extendv8qiv8hi2_4" operands[1] = lowpart_subreg (V16QImode, operands[1], mode); } [(set_attr "isa" "noavx,noavx,avx") - (set_attr "gpr32" "0,0,1")]) + (set_attr "addr" "gpr16,gpr16,*")]) (define_expand "v8qiv8hi2" [(set (match_operand:V8HI 0 "register_operand") @@ -23160,7 +23168,7 @@ (define_insn "*sse4_1_v4qiv4si2_1" "TARGET_SSE4_1 && " "%vpmovbd\t{%1, %0|%0, %1}" [(set_attr "isa" "noavx,noavx,avx") - (set_attr "gpr32" "0,0,1") + (set_attr "addr" "gpr16,gpr16,*") (set_attr "type" "ssemov") (set_attr "prefix_extra" "1") (set_attr "prefix" "orig,orig,maybe_evex") @@ -23333,7 +23341,7 @@ (define_insn "*sse4_1_v4hiv4si2_1" "TARGET_SSE4_1 && " "%vpmovwd\t{%1, %0|%0, %1}" [(set_attr "isa" "noavx,noavx,avx") - (set_attr "gpr32" "0,0,1") + (set_attr "addr" "gpr16,gpr16,*") (set_attr "type" "ssemov") (set_attr "prefix_extra" "1") (set_attr "prefix" "orig,orig,maybe_evex") @@ -23406,7 +23414,7 @@ (define_insn_and_split "*sse4_1_zero_extendv4hiv4si2_3" } } [(set_attr "isa" "noavx,noavx,avx") - (set_attr "gpr32" "0,0,1")]) + (set_attr "addr" "gpr16,gpr16,*")]) (define_insn_and_split "*sse4_1_zero_extendv4hiv4si2_4" [(set (match_operand:V8HI 0 "register_operand" "=Yr,*x,v") @@ -23440,7 +23448,7 @@ (define_insn_and_split "*sse4_1_zero_extendv4hiv4si2_4" operands[1] = lowpart_subreg (V8HImode, operands[1], mode); } [(set_attr "isa" "noavx,noavx,avx") - (set_attr "gpr32" "0,0,1")]) + (set_attr "addr" "gpr16,gpr16,*")]) (define_insn "avx512f_v8qiv8di2" [(set (match_operand:V8DI 0 "register_operand" "=v") @@ -23584,7 +23592,7 @@ (define_insn "*sse4_1_v2qiv2di2_1" "TARGET_SSE4_1 && " "%vpmovbq\t{%1, %0|%0, %1}" [(set_attr "isa" "noavx,avx") - (set_attr "gpr32" "0,1") + (set_attr "addr" "gpr16,*") (set_attr "type" "ssemov") (set_attr "prefix_extra" "1") (set_attr "prefix" "maybe_evex") @@ -23723,7 +23731,7 @@ (define_insn "*sse4_1_v2hiv2di2_1" "TARGET_SSE4_1 && " "%vpmovwq\t{%1, %0|%0, %1}" [(set_attr "isa" "noavx,noavx,avx") - (set_attr "gpr32" "0,0,1") + (set_attr "addr" "gpr16,gpr16,*") (set_attr "type" "ssemov") (set_attr "prefix_extra" "1") (set_attr "prefix" "orig,orig,maybe_evex") @@ -23889,7 +23897,7 @@ (define_insn "*sse4_1_v2siv2di2_1" "TARGET_SSE4_1 && " "%vpmovdq\t{%1, %0|%0, %1}" [(set_attr "isa" "noavx,noavx,avx") - (set_attr "gpr32" "0,0,1") + (set_attr "addr" "gpr16,gpr16,*") (set_attr "type" "ssemov") (set_attr "prefix_extra" "1") (set_attr "prefix" "orig,orig,maybe_evex") @@ -23938,7 +23946,7 @@ (define_insn_and_split "*sse4_1_zero_extendv2siv2di2_3" } } [(set_attr "isa" "noavx,noavx,avx") - (set_attr "gpr32" "0,0,1")]) + (set_attr "addr" "gpr16,gpr16,*")]) (define_insn_and_split "*sse4_1_zero_extendv2siv2di2_4" [(set (match_operand:V4SI 0 "register_operand" "=Yr,*x,v") @@ -23968,7 +23976,7 @@ (define_insn_and_split "*sse4_1_zero_extendv2siv2di2_4" operands[1] = lowpart_subreg (V4SImode, operands[1], V2SImode); } [(set_attr "isa" "noavx,noavx,avx") - (set_attr "gpr32" "0,0,1")]) + (set_attr "addr" "gpr16,gpr16,*")]) (define_expand "v2siv2di2" [(set (match_operand:V2DI 0 "register_operand") @@ -24001,7 +24009,7 @@ (define_insn "avx_vtest" "TARGET_AVX" "vtest\t{%1, %0|%0, %1}" [(set_attr "type" "ssecomi") - (set_attr "gpr32" "0") + (set_attr "addr" "gpr16") (set_attr "prefix_extra" "1") (set_attr "prefix" "vex") (set_attr "mode" "")]) @@ -24017,7 +24025,7 @@ (define_insn "*_ptest" "%vptest\t{%1, %0|%0, %1}" [(set_attr "isa" "noavx,noavx,avx") (set_attr "type" "ssecomi") - (set_attr "gpr32" "0") + (set_attr "addr" "gpr16") (set_attr "prefix_extra" "1") (set_attr "prefix" "orig,orig,vex") (set (attr "btver2_decode") @@ -24060,7 +24068,7 @@ (define_insn "ptesttf2" "%vptest\t{%1, %0|%0, %1}" [(set_attr "isa" "noavx,noavx,avx") (set_attr "type" "ssecomi") - (set_attr "gpr32" "0") + (set_attr "addr" "gpr16") (set_attr "prefix_extra" "1") (set_attr "prefix" "orig,orig,vex") (set_attr "mode" "TI")]) @@ -24178,7 +24186,7 @@ (define_insn "_round" "%vround\t{%2, %1, %0|%0, %1, %2}" [(set_attr "isa" "noavx,noavx,avx") (set_attr "type" "ssecvt") - (set_attr "gpr32" "0") + (set_attr "addr" "gpr16") (set_attr "prefix_data16" "1,1,*") (set_attr "prefix_extra" "1") (set_attr "length_immediate" "1") @@ -24290,7 +24298,7 @@ (define_insn "sse4_1_round" } [(set_attr "isa" "noavx,noavx,noavx512f,avx512f") (set_attr "type" "ssecvt") - (set_attr "gpr32" "0,0,0,1") + (set_attr "addr" "gpr16,gpr16,gpr16,*") (set_attr "length_immediate" "1") (set_attr "prefix_data16" "1,1,*,*") (set_attr "prefix_extra" "1") @@ -24327,7 +24335,7 @@ (define_insn "*sse4_1_round" } [(set_attr "isa" "noavx,noavx,noavx512f,avx512f") (set_attr "type" "ssecvt") - (set_attr "gpr32" "0,0,0,1") + (set_attr "addr" "gpr16,gpr16,gpr16,*") (set_attr "length_immediate" "1") (set_attr "prefix_data16" "1,1,*,*") (set_attr "prefix_extra" "1") @@ -24596,7 +24604,7 @@ (define_insn "sse4_2_pcmpestri" "TARGET_SSE4_2" "%vpcmpestri\t{%5, %3, %1|%1, %3, %5}" [(set_attr "type" "sselog") - (set_attr "gpr32" "0") + (set_attr "addr" "gpr16") (set_attr "prefix_extra" "1") (set_attr "prefix" "maybe_vex") (set_attr "length_immediate" "1") @@ -24624,7 +24632,7 @@ (define_insn "sse4_2_pcmpestrm" "TARGET_SSE4_2" "%vpcmpestrm\t{%5, %3, %1|%1, %3, %5}" [(set_attr "type" "sselog") - (set_attr "gpr32" "0") + (set_attr "addr" "gpr16") (set_attr "prefix_extra" "1") (set_attr "length_immediate" "1") (set_attr "prefix" "maybe_vex") @@ -24650,7 +24658,7 @@ (define_insn "sse4_2_pcmpestr_cconly" %vpcmpestri\t{%6, %4, %2|%2, %4, %6} %vpcmpestri\t{%6, %4, %2|%2, %4, %6}" [(set_attr "type" "sselog") - (set_attr "gpr32" "0") + (set_attr "addr" "gpr16") (set_attr "prefix_extra" "1") (set_attr "length_immediate" "1") (set_attr "memory" "none,load,none,load") @@ -24705,7 +24713,7 @@ (define_insn_and_split "sse4_2_pcmpistr" DONE; } [(set_attr "type" "sselog") - (set_attr "gpr32" "0") + (set_attr "addr" "gpr16") (set_attr "prefix_extra" "1") (set_attr "length_immediate" "1") (set_attr "memory" "none,load") @@ -24727,7 +24735,7 @@ (define_insn "sse4_2_pcmpistri" "TARGET_SSE4_2" "%vpcmpistri\t{%3, %2, %1|%1, %2, %3}" [(set_attr "type" "sselog") - (set_attr "gpr32" "0") + (set_attr "addr" "gpr16") (set_attr "prefix_extra" "1") (set_attr "length_immediate" "1") (set_attr "prefix" "maybe_vex") @@ -24751,7 +24759,7 @@ (define_insn "sse4_2_pcmpistrm" "TARGET_SSE4_2" "%vpcmpistrm\t{%3, %2, %1|%1, %2, %3}" [(set_attr "type" "sselog") - (set_attr "gpr32" "0") + (set_attr "addr" "gpr16") (set_attr "prefix_extra" "1") (set_attr "length_immediate" "1") (set_attr "prefix" "maybe_vex") @@ -24775,7 +24783,7 @@ (define_insn "sse4_2_pcmpistr_cconly" %vpcmpistri\t{%4, %3, %2|%2, %3, %4} %vpcmpistri\t{%4, %3, %2|%2, %3, %4}" [(set_attr "type" "sselog") - (set_attr "gpr32" "0") + (set_attr "addr" "gpr16") (set_attr "prefix_extra" "1") (set_attr "length_immediate" "1") (set_attr "memory" "none,load,none,load") @@ -26202,7 +26210,7 @@ (define_insn "aesenc" vaesenc\t{%2, %1, %0|%0, %1, %2}" [(set_attr "isa" "noavx,aes,avx512vl") (set_attr "type" "sselog1") - (set_attr "gpr32" "0,1,1") + (set_attr "addr" "gpr16,*,*") (set_attr "prefix_extra" "1") (set_attr "prefix" "orig,vex,evex") (set_attr "btver2_decode" "double,double,double") @@ -26220,7 +26228,7 @@ (define_insn "aesenclast" vaesenclast\t{%2, %1, %0|%0, %1, %2}" [(set_attr "isa" "noavx,aes,avx512vl") (set_attr "type" "sselog1") - (set_attr "gpr32" "0,1,1") + (set_attr "addr" "gpr16,*,*") (set_attr "prefix_extra" "1") (set_attr "prefix" "orig,vex,evex") (set_attr "btver2_decode" "double,double,double") @@ -26238,7 +26246,7 @@ (define_insn "aesdec" vaesdec\t{%2, %1, %0|%0, %1, %2}" [(set_attr "isa" "noavx,aes,avx512vl") (set_attr "type" "sselog1") - (set_attr "gpr32" "0,1,1") + (set_attr "addr" "gpr16,*,*") (set_attr "prefix_extra" "1") (set_attr "prefix" "orig,vex,evex") (set_attr "btver2_decode" "double,double,double") @@ -26255,7 +26263,7 @@ (define_insn "aesdeclast" vaesdeclast\t{%2, %1, %0|%0, %1, %2} vaesdeclast\t{%2, %1, %0|%0, %1, %2}" [(set_attr "isa" "noavx,aes,avx512vl") - (set_attr "gpr32" "0,1,1") + (set_attr "addr" "gpr16,*,*") (set_attr "type" "sselog1") (set_attr "prefix_extra" "1") (set_attr "prefix" "orig,vex,evex") @@ -26269,7 +26277,7 @@ (define_insn "aesimc" "TARGET_AES" "%vaesimc\t{%1, %0|%0, %1}" [(set_attr "type" "sselog1") - (set_attr "gpr32" "0") + (set_attr "addr" "gpr16") (set_attr "prefix_extra" "1") (set_attr "prefix" "maybe_vex") (set_attr "mode" "TI")]) @@ -26282,7 +26290,7 @@ (define_insn "aeskeygenassist" "TARGET_AES" "%vaeskeygenassist\t{%2, %1, %0|%0, %1, %2}" [(set_attr "type" "sselog1") - (set_attr "gpr32" "0") + (set_attr "addr" "gpr16") (set_attr "prefix_extra" "1") (set_attr "length_immediate" "1") (set_attr "prefix" "maybe_vex") @@ -26301,7 +26309,7 @@ (define_insn "pclmulqdq" vpclmulqdq\t{%3, %2, %1, %0|%0, %1, %2, %3}" [(set_attr "isa" "noavx,avx,vpclmulqdqvl") (set_attr "type" "sselog1") - (set_attr "gpr32" "0,1,1") + (set_attr "addr" "gpr16,*,*") (set_attr "prefix_extra" "1") (set_attr "length_immediate" "1") (set_attr "prefix" "orig,vex,evex") @@ -26743,7 +26751,7 @@ (define_insn "avx512f_perm_1" (set_attr "mode" "")]) ;; TODO (APX): vmovaps supports EGPR but not others, could split -;; pattern to enable gpr32 for this one. +;; pattern to enable rex2 address for this one. (define_insn "avx2_permv2ti" [(set (match_operand:V4DI 0 "register_operand" "=x") (unspec:V4DI @@ -26775,7 +26783,7 @@ (define_insn "avx2_permv2ti" return "vperm2i128\t{%3, %2, %1, %0|%0, %1, %2, %3}"; } [(set_attr "type" "sselog") - (set_attr "gpr32" "0") + (set_attr "addr" "gpr16") (set_attr "prefix" "vex") (set_attr "mode" "OI")]) @@ -27109,7 +27117,10 @@ (define_insn "avx_vbroadcastf128_" vinsert32x4\t{$1, %1, %0, %0|%0, %0, %1, 1}" [(set_attr "isa" "noavx512vl,*,*,avx512dq,avx512dq,avx512vl,avx512vl") (set_attr "type" "ssemov,sselog1,sselog1,ssemov,sselog1,ssemov,sselog1") - (set_attr "gpr32" "0,1,1,1,1,1,1") + (set (attr "addr") + (if_then_else (eq_attr "alternative" "0") + (const_string "gpr16") + (const_string "*"))) (set_attr "prefix_extra" "1") (set_attr "length_immediate" "0,1,1,0,1,0,1") (set_attr "prefix" "vex,vex,vex,evex,evex,evex,evex") @@ -27404,7 +27415,7 @@ (define_insn "*avx_vperm2f128_full" "TARGET_AVX" "vperm2\t{%3, %2, %1, %0|%0, %1, %2, %3}" [(set_attr "type" "sselog") - (set_attr "gpr32" "0") + (set_attr "addr" "gpr16") (set_attr "prefix_extra" "1") (set_attr "length_immediate" "1") (set_attr "prefix" "vex") @@ -27432,7 +27443,7 @@ (define_insn "*avx_vperm2f128_nozero" return "vperm2\t{%3, %2, %1, %0|%0, %1, %2, %3}"; } [(set_attr "type" "sselog") - (set_attr "gpr32" "0") + (set_attr "addr" "gpr16") (set_attr "prefix_extra" "1") (set_attr "length_immediate" "1") (set_attr "prefix" "vex") @@ -27537,7 +27548,7 @@ (define_insn "vec_set_lo_" return "vinsert\t{$0x0, %2, %1, %0|%0, %1, %2, 0x0}"; } [(set_attr "isa" "noavx512vl,avx512vl") - (set_attr "gpr32" "0,1") + (set_attr "addr" "gpr16,*") (set_attr "type" "sselog") (set_attr "prefix_extra" "1") (set_attr "length_immediate" "1") @@ -27582,7 +27593,7 @@ (define_insn "vec_set_lo_" return "vinsert\t{$0x0, %2, %1, %0|%0, %1, %2, 0x0}"; } [(set_attr "isa" "noavx512vl,avx512vl") - (set_attr "gpr32" "0,1") + (set_attr "addr" "gpr16,*") (set_attr "type" "sselog") (set_attr "prefix_extra" "1") (set_attr "length_immediate" "1") @@ -27605,7 +27616,7 @@ (define_insn "vec_set_hi_" return "vinsert\t{$0x1, %2, %1, %0|%0, %1, %2, 0x1}"; } [(set_attr "isa" "noavx512vl,avx512vl") - (set_attr "gpr32" "0,1") + (set_attr "addr" "gpr16,*") (set_attr "type" "sselog") (set_attr "prefix_extra" "1") (set_attr "length_immediate" "1") @@ -27627,7 +27638,7 @@ (define_insn "vec_set_lo_" vinsert%~128\t{$0x0, %2, %1, %0|%0, %1, %2, 0x0} vinserti32x4\t{$0x0, %2, %1, %0|%0, %1, %2, 0x0}" [(set_attr "isa" "noavx512vl,avx512vl") - (set_attr "gpr32" "0,1") + (set_attr "addr" "gpr16,*") (set_attr "type" "sselog") (set_attr "prefix_extra" "1") (set_attr "length_immediate" "1") @@ -27649,7 +27660,7 @@ (define_insn "vec_set_hi_" vinsert%~128\t{$0x1, %2, %1, %0|%0, %1, %2, 0x1} vinserti32x4\t{$0x1, %2, %1, %0|%0, %1, %2, 0x1}" [(set_attr "isa" "noavx512vl,avx512vl") - (set_attr "gpr32" "0,1") + (set_attr "addr" "gpr16,*") (set_attr "type" "sselog") (set_attr "prefix_extra" "1") (set_attr "length_immediate" "1") @@ -27676,7 +27687,7 @@ (define_insn "vec_set_lo_v32qi" vinserti32x4\t{$0x0, %2, %1, %0|%0, %1, %2, 0x0}" [(set_attr "isa" "noavx512vl,avx512vl") (set_attr "type" "sselog") - (set_attr "gpr32" "0,1") + (set_attr "addr" "gpr16,*") (set_attr "prefix_extra" "1") (set_attr "length_immediate" "1") (set_attr "prefix" "vex,evex") @@ -27701,7 +27712,7 @@ (define_insn "vec_set_hi_v32qi" vinsert%~128\t{$0x1, %2, %1, %0|%0, %1, %2, 0x1} vinserti32x4\t{$0x1, %2, %1, %0|%0, %1, %2, 0x1}" [(set_attr "isa" "noavx512vl,avx512vl") - (set_attr "gpr32" "0") + (set_attr "addr" "gpr16") (set_attr "type" "sselog") (set_attr "prefix_extra" "1") (set_attr "length_immediate" "1") @@ -27722,7 +27733,7 @@ (define_insn "_maskload" return "vmaskmov\t{%1, %2, %0|%0, %2, %1}"; } [(set_attr "type" "sselog1") - (set_attr "gpr32" "0") + (set_attr "addr" "gpr16") (set_attr "prefix_extra" "1") (set_attr "prefix" "vex") (set_attr "btver2_decode" "vector") @@ -27743,7 +27754,7 @@ (define_insn "_maskstore" return "vmaskmov\t{%2, %1, %0|%0, %1, %2}"; } [(set_attr "type" "sselog1") - (set_attr "gpr32" "0") + (set_attr "addr" "gpr16") (set_attr "prefix_extra" "1") (set_attr "prefix" "vex") (set_attr "btver2_decode" "vector") @@ -28102,7 +28113,7 @@ (define_insn "avx_vec_concat" } } [(set_attr "isa" "noavx512f,avx512f,*,*") - (set_attr "gpr32" "0,1,1,1") + (set_attr "addr" "gpr16,*,*,*") (set_attr "type" "sselog,sselog,ssemov,ssemov") (set_attr "prefix_extra" "1,1,*,*") (set_attr "length_immediate" "1,1,*,*") @@ -28352,7 +28363,7 @@ (define_insn "*avx2_gathersi" "TARGET_AVX2" "%M3vgatherd\t{%1, %7, %0|%0, %7, %1}" [(set_attr "type" "ssemov") - (set_attr "gpr32" "0") + (set_attr "addr" "gpr16") (set_attr "prefix" "vex") (set_attr "mode" "")]) @@ -28373,7 +28384,7 @@ (define_insn "*avx2_gathersi_2" "TARGET_AVX2" "%M2vgatherd\t{%1, %6, %0|%0, %6, %1}" [(set_attr "type" "ssemov") - (set_attr "gpr32" "0") + (set_attr "addr" "gpr16") (set_attr "prefix" "vex") (set_attr "mode" "")]) @@ -28415,7 +28426,7 @@ (define_insn "*avx2_gatherdi" "TARGET_AVX2" "%M3vgatherq\t{%5, %7, %2|%2, %7, %5}" [(set_attr "type" "ssemov") - (set_attr "gpr32" "0") + (set_attr "addr" "gpr16") (set_attr "prefix" "vex") (set_attr "mode" "")]) @@ -28440,7 +28451,7 @@ (define_insn "*avx2_gatherdi_2" return "%M2vgatherq\t{%4, %6, %0|%0, %6, %4}"; } [(set_attr "type" "ssemov") - (set_attr "gpr32" "0") + (set_attr "addr" "gpr16") (set_attr "prefix" "vex") (set_attr "mode" "")]) @@ -28464,7 +28475,7 @@ (define_insn "*avx2_gatherdi_3" "TARGET_AVX2" "%M3vgatherq\t{%5, %7, %0|%0, %7, %5}" [(set_attr "type" "ssemov") - (set_attr "gpr32" "0") + (set_attr "addr" "gpr16") (set_attr "prefix" "vex") (set_attr "mode" "")]) @@ -28488,7 +28499,7 @@ (define_insn "*avx2_gatherdi_4" "TARGET_AVX2" "%M2vgatherq\t{%4, %6, %0|%0, %6, %4}" [(set_attr "type" "ssemov") - (set_attr "gpr32" "0") + (set_attr "addr" "gpr16") (set_attr "prefix" "vex") (set_attr "mode" "")]) @@ -29688,7 +29699,7 @@ (define_insn "vgf2p8affineinvqb_" gf2p8affineinvqb\t{%3, %2, %0| %0, %2, %3} vgf2p8affineinvqb\t{%3, %2, %1, %0| %0, %1, %2, %3}" [(set_attr "isa" "noavx,avx") - (set_attr "gpr32" "0,1") + (set_attr "addr" "gpr16,*") (set_attr "prefix_extra" "1") (set_attr "prefix" "orig,maybe_evex") (set_attr "mode" "")]) @@ -29705,7 +29716,7 @@ (define_insn "vgf2p8affineqb_" gf2p8affineqb\t{%3, %2, %0| %0, %2, %3} vgf2p8affineqb\t{%3, %2, %1, %0| %0, %1, %2, %3}" [(set_attr "isa" "noavx,avx") - (set_attr "gpr32" "0,1") + (set_attr "addr" "gpr16,*") (set_attr "prefix_extra" "1") (set_attr "prefix" "orig,maybe_evex") (set_attr "mode" "")]) @@ -29721,7 +29732,7 @@ (define_insn "vgf2p8mulb_" gf2p8mulb\t{%2, %0| %0, %2} vgf2p8mulb\t{%2, %1, %0| %0, %1, %2}" [(set_attr "isa" "noavx,avx") - (set_attr "gpr32" "0,1") + (set_attr "addr" "gpr16,*") (set_attr "prefix_extra" "1") (set_attr "prefix" "orig,maybe_evex") (set_attr "mode" "")])