From patchwork Fri Nov 3 08:48:27 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "juzhe.zhong@rivai.ai" X-Patchwork-Id: 161206 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:8f47:0:b0:403:3b70:6f57 with SMTP id j7csp895294vqu; Fri, 3 Nov 2023 02:17:06 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHpwzbgiWi8p/eQ0ssV811WzN72KBSK/yxutZ/mnFqg0zZmmMXT305NCjqz7tBa28e5VYLo X-Received: by 2002:a9d:7aca:0:b0:6d3:1923:74c6 with SMTP id m10-20020a9d7aca000000b006d3192374c6mr8086230otn.13.1699003026510; Fri, 03 Nov 2023 02:17:06 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1699003026; cv=pass; d=google.com; s=arc-20160816; b=fUpaJH5BjWt733DJvcNNyTypQqyC7Utf4N65/N7s9pzJNJhl+LVp47U5o80dYp5dCP UkyLuxSQqUXTnL1TKABpFevH58MXuAoEIdr1HDTldPSAcl9I/ltKH2gKUg2Nvliujlso 1zAj50AGjPqGWtV08GRnnjHo8Ofzbo3kvumJPZQPn58VzcP+5yIKcuj5LeZrkG2qGtmV LE1QEhXJ68MUTqKfpfIUMHWlUTCgILeQv0oGhFVo11udJUB0KVSQgxdk9HpjwVh//4ld UsY0U7iTqBChU0LfZUJXsu91YmBTKX14Wr1YCmmgrbusaUWxpNSzJGLl2h/uph21f3oE pevA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:feedback-id :content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:arc-filter:dmarc-filter:delivered-to; bh=xRnfL3GPDeZigmwJ/CZvAbhicjBzGo1hYXJv9BrXdj8=; fh=mlgczqbmeDnBuudaUD0OKNtrN3YEp3C0UptLjTcyUZ8=; b=NmXgyam4diRUDMHfAavU6zyOP362IGS/FQZ9OcPB5x3S+DhoapqKnQZmizgP/TaSoE 6r1oXBBqePV3lUKMc1J+Hr1LPhornF4qkHAJNDEaw7DBskwvRefOLdm+zwHspM567vLB 8XfrWs0Kvytu+dQthOTz9aYun8ZRAV1t+T7kREKs2iMn/Qh5ysFu2/aI6T4uDtls+G+W AV/dhFuzQpWQrwZ3t0BsqpGW7oTcy0wfNrwVRWje4xqnLbTEdi5jpcaTFYVaETMmO62Y fHw0ZXYkI5lWr2OrJ4SttON/MmreuyNFqZoO9T344Lx488qqhc2h6ov3ClJf8kqEFTg3 l8LQ== ARC-Authentication-Results: i=2; mx.google.com; arc=pass (i=1); spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org" Received: from server2.sourceware.org (server2.sourceware.org. [2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id d8-20020ac85d88000000b0041810764755si1127936qtx.797.2023.11.03.02.17.06 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 03 Nov 2023 02:17:06 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; arc=pass (i=1); spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org" Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 4734F3858C2D for ; Fri, 3 Nov 2023 09:17:06 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from smtpbgsg1.qq.com (smtpbgsg1.qq.com [54.254.200.92]) by sourceware.org (Postfix) with ESMTPS id B89193858D28 for ; Fri, 3 Nov 2023 09:16:36 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org B89193858D28 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivai.ai Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivai.ai ARC-Filter: OpenARC Filter v1.0.0 sourceware.org B89193858D28 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=54.254.200.92 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1699003000; cv=none; b=S/LYmlzalJMmU00c8dyahl3BCaoGkvbcygAFh26tan+hcFY5PMRqhY/5a5hvZGUB+Px9aKuxX6DY8IVzV0GeGdvrZH99qDxcQIJrGEOREJ+xRI/2r1SrAZTAa5D/2sWIS80g+44TZE1WGz2c9UutHBcNT3QklKSSqTaQ/SIB50g= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1699003000; c=relaxed/simple; bh=Wq3QLl22BgukFvJswH2XwHfu3YqNg4Xqatm83JbWMy4=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=OaxggJfR9AKaHSeMdBWjPxQXDopmKks11f77PQLH4mJrHgBiL+rwNTu4augIM+nMgaKpjbBAkwUaEy267kbO59mzbvKshk/rQdZAikTJZNpg6VuM7g4QKtVMhg1YYeKTNw58L2klZIn4ELa04SKePfZWP/nuqlNd/m0NuJxj+5w= ARC-Authentication-Results: i=1; server2.sourceware.org X-QQ-mid: bizesmtp79t1699001309tybjc567 Received: from rios-cad121.hadoop.rioslab.org ( [58.60.1.9]) by bizesmtp.qq.com (ESMTP) with id ; Fri, 03 Nov 2023 16:48:28 +0800 (CST) X-QQ-SSF: 01400000000000G0V000000A0000000 X-QQ-FEAT: uGhnJwy6xZJzYHHF/h22hXlKtevaq1AvKyF1BijJKHOdnlfOdhs/db54LYrHs PpRlOZO0g05gbkmr1/U30DO6p2Vfve30A1JQOsPFo8S4WYGClxdknWaeUH4p0fmrNvPn6Ju CyXM9u/uj7KxKjZKN2K+FG1nIUWO2g3Q86oUIrt0U+JIDEMVqM9LYgSKfG6LI5nWkOdIIcr 1x6xeFqecvPzKo+oRb7Y+TtQmv4r5RcfXuDeettiSphfCwSs5ncQM1yivcjMmS0Zbfo528k ShpciW//5SyTvC93pp7nPoSJkGIkpbg7wIoYUworkzRa1Sg8g80lXrZNLE/zIplQ9pWI2gl G4oLU3RUqsIdc9ZyarzOSp3ZoopC5wIMmoGWUDRzQYZJYLFociIktY7kNTO6FUjqK8JUqK4 X-QQ-GoodBg: 2 X-BIZMAIL-ID: 6576161033864421861 From: Juzhe-Zhong To: gcc-patches@gcc.gnu.org Cc: richard.sandiford@arm.com, rguenther@suse.de, jeffreyalaw@gmail.com, Juzhe-Zhong Subject: [PATCH] OPTAB: Add mask_len_strided_load/mask_len_strided_store optab Date: Fri, 3 Nov 2023 16:48:27 +0800 Message-Id: <20231103084827.1306269-1-juzhe.zhong@rivai.ai> X-Mailer: git-send-email 2.36.3 MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:rivai.ai:qybglogicsvrgz:qybglogicsvrgz7a-one-0 X-Spam-Status: No, score=-12.2 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, SPF_HELO_PASS, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1781533797458000783 X-GMAIL-MSGID: 1781533797458000783 gcc/ChangeLog: * doc/md.texi: Add mask_len_strided_load/mask_len_strided_store optab. * optabs.def (OPTAB_D): Ditto. --- gcc/doc/md.texi | 27 +++++++++++++++++++++++++++ gcc/optabs.def | 2 ++ 2 files changed, 29 insertions(+) diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi index fab2513105a..eee4fe156e4 100644 --- a/gcc/doc/md.texi +++ b/gcc/doc/md.texi @@ -5094,6 +5094,20 @@ Bit @var{i} of the mask is set if element @var{i} of the result should be loaded from memory and clear if element @var{i} of the result should be undefined. Mask elements @var{i} with @var{i} > (operand 6 + operand 7) are ignored. +@cindex @code{mask_len_strided_load@var{m}} instruction pattern +@item @samp{mask_len_strided_load@var{m}} +Load several separate memory locations into a destination vector of mode @var{m}. +Operand 0 is a destination vector of mode @var{m}. +Operand 1 is a scalar base address and operand 2 is a scalar stride of Pmode. +operand 3 is mask operand, operand 4 is length operand and operand 5 is bias operand. +The instruction can be seen as a special case of @code{mask_len_gather_load@var{m}@var{n}} +with an offset vector that is a @code{vec_series} with operand 1 as base and operand 2 as step. +For each element index i load address is operand 1 + @var{i} * operand 2. +Similar to mask_len_load, the instruction loads at most (operand 4 + operand 5) elements from memory. +Element @var{i} of the mask (operand 3) is set if element @var{i} of the result should +be loaded from memory and clear if element @var{i} of the result should be zero. +Mask elements @var{i} with @var{i} > (operand 4 + operand 5) are ignored. + @cindex @code{scatter_store@var{m}@var{n}} instruction pattern @item @samp{scatter_store@var{m}@var{n}} Store a vector of mode @var{m} into several distinct memory locations. @@ -5131,6 +5145,19 @@ at most (operand 6 + operand 7) elements of (operand 4) to memory. Bit @var{i} of the mask is set if element @var{i} of (operand 4) should be stored. Mask elements @var{i} with @var{i} > (operand 6 + operand 7) are ignored. +@cindex @code{mask_len_strided_store@var{m}} instruction pattern +@item @samp{mask_len_strided_store@var{m}} +Store a vector of mode m into several distinct memory locations. +Operand 0 is a scalar base address and operand 1 is scalar stride of Pmode. +Operand 2 is the vector of values that should be stored, which is of mode @var{m}. +operand 3 is mask operand, operand 4 is length operand and operand 5 is bias operand. +The instruction can be seen as a special case of @code{mask_len_scatter_store@var{m}@var{n}} +with an offset vector that is a @code{vec_series} with operand 1 as base and operand 1 as step. +For each element index i store address is operand 0 + @var{i} * operand 1. +Similar to mask_len_store, the instruction stores at most (operand 4 + operand 5) elements of mask (operand 3) to memory. +Element @var{i} of the mask is set if element @var{i} of (operand 3) should be stored. +Mask elements @var{i} with @var{i} > (operand 4 + operand 5) are ignored. + @cindex @code{vec_set@var{m}} instruction pattern @item @samp{vec_set@var{m}} Set given field in the vector value. Operand 0 is the vector to modify, diff --git a/gcc/optabs.def b/gcc/optabs.def index 2ccbe4197b7..9ae677f8f27 100644 --- a/gcc/optabs.def +++ b/gcc/optabs.def @@ -536,4 +536,6 @@ OPTAB_DC (vec_series_optab, "vec_series$a", VEC_SERIES) OPTAB_D (vec_shl_insert_optab, "vec_shl_insert_$a") OPTAB_D (len_load_optab, "len_load_$a") OPTAB_D (len_store_optab, "len_store_$a") +OPTAB_D (mask_len_strided_load_optab, "mask_len_strided_load_$a") +OPTAB_D (mask_len_strided_store_optab, "mask_len_strided_store_$a") OPTAB_D (select_vl_optab, "select_vl$a")