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Tue, 31 Oct 2023 15:46:36 +0000 Received: from pps.filterd (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTP id 39VFkHpt006276; Tue, 31 Oct 2023 15:46:33 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTP id 3u0uckx0uh-1; Tue, 31 Oct 2023 15:46:33 +0000 Received: from APBLRPPMTA02.qualcomm.com (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 39VFkXhw006369; Tue, 31 Oct 2023 15:46:33 GMT Received: from hu-sgudaval-hyd.qualcomm.com (hu-msarkar-hyd.qualcomm.com [10.213.111.194]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTP id 39VFkWgx006365; Tue, 31 Oct 2023 15:46:33 +0000 Received: by hu-sgudaval-hyd.qualcomm.com (Postfix, from userid 3891782) id 34D4A4BFB; Tue, 31 Oct 2023 21:16:32 +0530 (+0530) From: Mrinmay Sarkar To: agross@kernel.org, andersson@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, konrad.dybcio@linaro.org, mani@kernel.org, robh+dt@kernel.org Cc: quic_shazhuss@quicinc.com, quic_nitegupt@quicinc.com, quic_ramkri@quicinc.com, quic_nayiluri@quicinc.com, dmitry.baryshkov@linaro.org, robh@kernel.org, quic_krichai@quicinc.com, quic_vbadigan@quicinc.com, quic_parass@quicinc.com, quic_schintav@quicinc.com, quic_shijjose@quicinc.com, Mrinmay Sarkar , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Bjorn Helgaas , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org Subject: [PATCH v1 1/3] PCI: qcom: Enable cache coherency for SA8775P RC Date: Tue, 31 Oct 2023 21:16:24 +0530 Message-Id: <1698767186-5046-2-git-send-email-quic_msarkar@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1698767186-5046-1-git-send-email-quic_msarkar@quicinc.com> References: <1698767186-5046-1-git-send-email-quic_msarkar@quicinc.com> X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: AJNGcFJ47bHHblEW8H5fD3inLLx8CUJX X-Proofpoint-GUID: AJNGcFJ47bHHblEW8H5fD3inLLx8CUJX X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-10-31_02,2023-10-31_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=715 priorityscore=1501 mlxscore=0 suspectscore=0 clxscore=1015 spamscore=0 phishscore=0 malwarescore=0 adultscore=0 bulkscore=0 impostorscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2310240000 definitions=main-2310310125 X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lipwig.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (lipwig.vger.email [0.0.0.0]); Tue, 31 Oct 2023 08:47:00 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1781286538979425110 X-GMAIL-MSGID: 1781286538979425110 This change will enable cache snooping logic to support cache coherency for SA8755P RC platform. Signed-off-by: Mrinmay Sarkar --- drivers/pci/controller/dwc/pcie-qcom.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c index 6902e97..6f240fc 100644 --- a/drivers/pci/controller/dwc/pcie-qcom.c +++ b/drivers/pci/controller/dwc/pcie-qcom.c @@ -51,6 +51,7 @@ #define PARF_SID_OFFSET 0x234 #define PARF_BDF_TRANSLATE_CFG 0x24c #define PARF_SLV_ADDR_SPACE_SIZE 0x358 +#define PCIE_PARF_NO_SNOOP_OVERIDE 0x3d4 #define PARF_DEVICE_TYPE 0x1000 #define PARF_BDF_TO_SID_TABLE_N 0x2000 @@ -117,6 +118,9 @@ /* PARF_LTSSM register fields */ #define LTSSM_EN BIT(8) +/* PARF_NO_SNOOP_OVERIDE register value */ +#define NO_SNOOP_OVERIDE_EN 0xa + /* PARF_DEVICE_TYPE register fields */ #define DEVICE_TYPE_RC 0x4 @@ -961,6 +965,13 @@ static int qcom_pcie_init_2_7_0(struct qcom_pcie *pcie) static int qcom_pcie_post_init_2_7_0(struct qcom_pcie *pcie) { + struct dw_pcie *pci = pcie->pci; + struct device *dev = pci->dev; + + /* Enable cache snooping for SA8775P */ + if (of_device_is_compatible(dev->of_node, "qcom,pcie-sa8775p")) + writel(NO_SNOOP_OVERIDE_EN, pcie->parf + PCIE_PARF_NO_SNOOP_OVERIDE); + qcom_pcie_clear_hpc(pcie->pci); return 0; From patchwork Tue Oct 31 15:46:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mrinmay Sarkar X-Patchwork-Id: 160172 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b90f:0:b0:403:3b70:6f57 with SMTP id t15csp332252vqg; Tue, 31 Oct 2023 08:47:20 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEFOAVWdk9D1N6Yfl/TESA7Zs9+lL1UawZd0u5DSQPCsPqWQMki8/S4jXJ6QyZ60uCtszvR X-Received: by 2002:a05:6a20:7aa7:b0:134:30a8:9df5 with SMTP id u39-20020a056a207aa700b0013430a89df5mr13048176pzh.43.1698767239976; Tue, 31 Oct 2023 08:47:19 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1698767239; cv=none; d=google.com; s=arc-20160816; b=v87DECRLQOJJj95okDmKzJJ9w90e0vFI7JK2a0dpwde3BIvRhh8vSikQr0Fg37FkP9 WA+sj7wKKs5+OlJRxfU0F7OAiCLaiMGS87i0ay6NavW67xIuey5nCxYxS9aTGMnOCyBM VAtAme4mcc25sgWhqEMZ8m66ytXvbihGnR48dOkfg7BQ9ai+1u/mxR0PD6OK+2rQ/u46 TRRg2ZReQo+d7UmcT9Z307gdR5YvFksE1hzaCkbuCy7SR/R/dk8seSqJ+EnyPPA0n/Wl ZzoSK8KkdLR+kMIqhxKxLWO2G2aZJrOqL7Xm3VvmCbEMbVeXh70OSyUsilRzsq3cxBsv zM8w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from:dkim-signature; bh=4i+UjBfccEyJpR7mWsj2oJ8qwKh7n8PKP5gW4vRIGxk=; fh=Pk1D+TX8j7yMhBoMDvb6Z0dI8+uPCwWwrh/XHSBJc1k=; b=lzUO7GKtg05hC3n5gkwq7XTGgf8gM9GOFLT7VZzB6x1PC+rzAOh8WLl9+ljyz3YA8c Pz3uNIt7mRIclt8Yfrx/X1FcGcCglsZHEA/urBWpDoS7BDAWxo91Otr9cDMkh5oyVG7u ETG8J2UGUwonvcuSHOK6rsRIHWBHP8frQj6+mco7CdnoEJFJMFvyvd9oqmNl/ff05/qt LFJ7DeSrWjql3WBaIvo12ZM9GeRIbktlDcgMZ+hirwNTlA8aMXm3l72kUDEHdn4xxFHI Rr5+1C5aGZv+ozwYjpAsDUJ2FCLYw5HYJaNvCvy+5omEQoi+pxiR1XESIXVb8TwDO8GJ rYEg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=YAvO9vgc; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.34 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from howler.vger.email (howler.vger.email. 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Tue, 31 Oct 2023 15:46:37 +0000 Received: from pps.filterd (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTP id 39VFdoOv032117; Tue, 31 Oct 2023 15:46:34 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTP id 3u0uckx0ur-1; Tue, 31 Oct 2023 15:46:34 +0000 Received: from APBLRPPMTA02.qualcomm.com (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 39VFkYkj006383; Tue, 31 Oct 2023 15:46:34 GMT Received: from hu-sgudaval-hyd.qualcomm.com (hu-msarkar-hyd.qualcomm.com [10.213.111.194]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTP id 39VFkY1Z006381; Tue, 31 Oct 2023 15:46:34 +0000 Received: by hu-sgudaval-hyd.qualcomm.com (Postfix, from userid 3891782) id BDA7D4BFB; Tue, 31 Oct 2023 21:16:33 +0530 (+0530) From: Mrinmay Sarkar To: agross@kernel.org, andersson@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, konrad.dybcio@linaro.org, mani@kernel.org, robh+dt@kernel.org Cc: quic_shazhuss@quicinc.com, quic_nitegupt@quicinc.com, quic_ramkri@quicinc.com, quic_nayiluri@quicinc.com, dmitry.baryshkov@linaro.org, robh@kernel.org, quic_krichai@quicinc.com, quic_vbadigan@quicinc.com, quic_parass@quicinc.com, quic_schintav@quicinc.com, quic_shijjose@quicinc.com, Mrinmay Sarkar , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Bjorn Helgaas , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org Subject: [PATCH v1 2/3] PCI: qcom-ep: Enable cache coherency for SA8775P EP Date: Tue, 31 Oct 2023 21:16:25 +0530 Message-Id: <1698767186-5046-3-git-send-email-quic_msarkar@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1698767186-5046-1-git-send-email-quic_msarkar@quicinc.com> References: <1698767186-5046-1-git-send-email-quic_msarkar@quicinc.com> X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: 9j63HvsVa2RRkPPU5Z6xQah4FGL9a9tD X-Proofpoint-GUID: 9j63HvsVa2RRkPPU5Z6xQah4FGL9a9tD X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-10-31_02,2023-10-31_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=570 priorityscore=1501 mlxscore=0 suspectscore=0 clxscore=1015 spamscore=0 phishscore=0 malwarescore=0 adultscore=0 bulkscore=0 impostorscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2310240000 definitions=main-2310310125 X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on howler.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (howler.vger.email [0.0.0.0]); Tue, 31 Oct 2023 08:47:17 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1781286557283402086 X-GMAIL-MSGID: 1781286557283402086 This change will enable cache snooping logic to support cache coherency for SA8755P EP platform. Signed-off-by: Mrinmay Sarkar --- drivers/pci/controller/dwc/pcie-qcom-ep.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/controller/dwc/pcie-qcom-ep.c index 3a53d97..bc958a0 100644 --- a/drivers/pci/controller/dwc/pcie-qcom-ep.c +++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c @@ -47,6 +47,7 @@ #define PARF_DBI_BASE_ADDR_HI 0x354 #define PARF_SLV_ADDR_SPACE_SIZE 0x358 #define PARF_SLV_ADDR_SPACE_SIZE_HI 0x35c +#define PCIE_PARF_NO_SNOOP_OVERIDE 0x3d4 #define PARF_ATU_BASE_ADDR 0x634 #define PARF_ATU_BASE_ADDR_HI 0x638 #define PARF_SRIS_MODE 0x644 @@ -86,6 +87,9 @@ #define PARF_DEBUG_INT_CFG_BUS_MASTER_EN BIT(2) #define PARF_DEBUG_INT_RADM_PM_TURNOFF BIT(3) +/* PARF_NO_SNOOP_OVERIDE register value */ +#define NO_SNOOP_OVERIDE_EN 0xa + /* PARF_DEVICE_TYPE register fields */ #define PARF_DEVICE_TYPE_EP 0x0 @@ -489,6 +493,10 @@ static int qcom_pcie_perst_deassert(struct dw_pcie *pci) val |= BIT(8); writel_relaxed(val, pcie_ep->parf + PARF_LTSSM); + /* Enable cache snooping for SA8775P */ + if (of_device_is_compatible(dev->of_node, "qcom,sa8775p-pcie-ep")) + writel_relaxed(NO_SNOOP_OVERIDE_EN, pcie_ep->parf + PCIE_PARF_NO_SNOOP_OVERIDE); + return 0; err_disable_resources: From patchwork Tue Oct 31 15:46:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mrinmay Sarkar X-Patchwork-Id: 160171 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b90f:0:b0:403:3b70:6f57 with SMTP id t15csp332146vqg; Tue, 31 Oct 2023 08:47:08 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEveMR1BgKOtKDvmgFK+gG1I8GByJBcKheeO6Ig6MhOlbJ7ywsIi0gvhhlkdPoFjhxZbPra X-Received: by 2002:a05:6a21:3d95:b0:180:1b3b:d560 with SMTP id bj21-20020a056a213d9500b001801b3bd560mr9595202pzc.41.1698767227949; Tue, 31 Oct 2023 08:47:07 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1698767227; cv=none; d=google.com; s=arc-20160816; b=MQ0aIr0OF6tamYtGAvmv8xnWxbRibbuwEgUQzHISYVLxkV7SuM/fxISJcFGdeJn38r Rdy5u+HLN6Mqtk1LY4ghODmsU+hVAXea3qWm+iItbbkV617jalSlTXhexj3j8lheBmPt v+5hu1NuQIKo8686wa7uXILgzy6T0JEyokARCXU+2heWctNHSGDQT52sa+p3K+NGrwX5 Tzm0phwqjm+5VNjUjAmyXgDuAhMa1Xou9NbXu67cXMKzB6Kxz9u8sU0NeUCvpgACt5XQ TwUbBEn+8Itx1mK45QPDbL2Sc/5rnIQyR8sF+MUQtV9Nu2v+aI4bA70tCaO2nTSovRyB LEOA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from:dkim-signature; bh=7lE9HDdThUZJFkz/86j+IR534+ZFu/F0XqT7dN6W6MA=; fh=Pk1D+TX8j7yMhBoMDvb6Z0dI8+uPCwWwrh/XHSBJc1k=; b=ClLiEusjqEiwt3K4Y39HtQlTA3FfmWHol0PcrZQib7IPOiruYU4bMic4ACoiZE0N3w ZBqSnXv4ncNozyXNVQAlL3kcP4dxu1S5BtesCwgP+9AlCySuK7d8bS2QTzPakOIjZwwb Z2hnDatUoXzv+ZLywVd577bSFlA43Ernf0PGf7f50ciJ3BHldkyaq8myy1qN7gGScfcr y8hN9Iera6eRoa4A2V9p/5YWrIO+7HDQDlrRNnZiaVg73rk7gtBJfmt9FXH34JM0KdCX SFxOy173WQ38K2Rpf2HhG90RywH8uhHAi5QhvmsQCrzSGPWKY+BBS2eIAW3Njvgbon05 Qh/g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=aHTZnfZk; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.33 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from lipwig.vger.email (lipwig.vger.email. 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Tue, 31 Oct 2023 15:46:39 +0000 Received: from pps.filterd (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTP id 39VFkaB1006406; Tue, 31 Oct 2023 15:46:36 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTP id 3u0uckx0v1-1; Tue, 31 Oct 2023 15:46:36 +0000 Received: from APBLRPPMTA02.qualcomm.com (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 39VFkaWK006399; Tue, 31 Oct 2023 15:46:36 GMT Received: from hu-sgudaval-hyd.qualcomm.com (hu-msarkar-hyd.qualcomm.com [10.213.111.194]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTP id 39VFkZN1006396; Tue, 31 Oct 2023 15:46:36 +0000 Received: by hu-sgudaval-hyd.qualcomm.com (Postfix, from userid 3891782) id 541D84BFB; Tue, 31 Oct 2023 21:16:35 +0530 (+0530) From: Mrinmay Sarkar To: agross@kernel.org, andersson@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, konrad.dybcio@linaro.org, mani@kernel.org, robh+dt@kernel.org Cc: quic_shazhuss@quicinc.com, quic_nitegupt@quicinc.com, quic_ramkri@quicinc.com, quic_nayiluri@quicinc.com, dmitry.baryshkov@linaro.org, robh@kernel.org, quic_krichai@quicinc.com, quic_vbadigan@quicinc.com, quic_parass@quicinc.com, quic_schintav@quicinc.com, quic_shijjose@quicinc.com, Mrinmay Sarkar , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Bjorn Helgaas , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org Subject: [PATCH v1 3/3] arm64: dts: qcom: sa8775p: Mark PCIe controller as cache coherent Date: Tue, 31 Oct 2023 21:16:26 +0530 Message-Id: <1698767186-5046-4-git-send-email-quic_msarkar@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1698767186-5046-1-git-send-email-quic_msarkar@quicinc.com> References: <1698767186-5046-1-git-send-email-quic_msarkar@quicinc.com> X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: 5vCNweJX_EmDVZDPzmbhLyP5WMn0uH-n X-Proofpoint-ORIG-GUID: 5vCNweJX_EmDVZDPzmbhLyP5WMn0uH-n X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-10-31_02,2023-10-31_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 spamscore=0 adultscore=0 impostorscore=0 phishscore=0 mlxlogscore=970 lowpriorityscore=0 clxscore=1015 priorityscore=1501 suspectscore=0 mlxscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2310240000 definitions=main-2310310125 X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lipwig.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (lipwig.vger.email [0.0.0.0]); Tue, 31 Oct 2023 08:47:05 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1781286544903323664 X-GMAIL-MSGID: 1781286544903323664 The PCIe controller on SA8775P supports cache coherency, hence add the "dma-coherent" property to mark it as such. Signed-off-by: Mrinmay Sarkar --- arch/arm64/boot/dts/qcom/sa8775p.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi index 7eab458..7df941d 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi @@ -3620,6 +3620,8 @@ <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_PCIE_0 0>; interconnect-names = "pcie-mem", "cpu-pcie"; + dma-coherent; + iommus = <&pcie_smmu 0x0000 0x7f>; resets = <&gcc GCC_PCIE_0_BCR>; reset-names = "core";