From patchwork Mon Oct 30 13:22:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 159734 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:d641:0:b0:403:3b70:6f57 with SMTP id cy1csp2208378vqb; Mon, 30 Oct 2023 06:23:18 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGyzvVkT5ukWKV6GY0h9EAELZUTd6XZuOLYj1Hl3Lo7NqDbsUvB3lbew5JPpCm/Xhk/nJ4H X-Received: by 2002:a05:6e02:1b8d:b0:351:57d5:51c4 with SMTP id h13-20020a056e021b8d00b0035157d551c4mr13949921ili.1.1698672198514; Mon, 30 Oct 2023 06:23:18 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1698672198; cv=none; d=google.com; s=arc-20160816; b=y7J7nyi/8LxgjGE9qd/+dKv28YUpGgu6AQVu56uK+Dq1OUWW+QurDYCQteO8D1d0mq TOutptfOhc4wYGZhxfIVZOTzslLcXq2Vr/DoYYcXny4r6dKjrXzztHxHffKFfpPZDwdj 7lVzrX/pk+BEhx+si7VRBJ0yLAfPzb5XzjTW50ZqAIdWeg4KQQiXh6VE/NzLXeydVEF1 4t22YE+ALvWJDbvgL+0j4rRAvNlX+RdGq/j0HjU+GWyWNyVEZdYmctELZHMCcKABDJol MrdMYRlTEESmnGClXR0KclGPtACD+5uhY+Yhiybxh1jQAkH3QnRiOHBKtakiBwq3+tL9 W9Ig== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=rjKV2EUYbgXW5b/dovYkd/mSqYZBiy9yWMip+YRYQw4=; fh=tAWvjMAEmVD3R8FzmIRYzQIb+yW9J+gWZJ2R8deHkVw=; b=wOg0fD6zqLJnKv/R3LqoUpH1n6BQioyRWaghXdo30oxwW8+FnhWO1W9WbFLgm1VWxF 5jcEuSSILRHUz3DQI6znAUdJVzHc8G4NdQd29FUcVUiXaYHTk27Vn28a9tUQSKwxB4aM /v7rCuAvkGHf/zj6jFjBpoizsPkdXAD7ziL84ARadBk7dM7kcVyYf7StJKTCcqfQuN/H FTTHOikZtbR3GaRzo4diOVjPishS9KPz1XidnTG9n5E7A0iYmtyXf7hseG5LUbT7PJm/ MgSxROWolH5QU5DrK0/blQbMh+pbOlsOr4/wiykUkatsbM7MICJtx1o0XkUGvqlxtE7+ YgOA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=PVBeFqRD; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: from snail.vger.email (snail.vger.email. [23.128.96.37]) by mx.google.com with ESMTPS id q17-20020a639811000000b005b3bcd9d7f8si3114326pgd.808.2023.10.30.06.23.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Oct 2023 06:23:18 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) client-ip=23.128.96.37; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=PVBeFqRD; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by snail.vger.email (Postfix) with ESMTP id 621AC80C0362; Mon, 30 Oct 2023 06:23:17 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at snail.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233389AbjJ3NXL (ORCPT + 31 others); Mon, 30 Oct 2023 09:23:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48898 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233330AbjJ3NXK (ORCPT ); Mon, 30 Oct 2023 09:23:10 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4C31BC9 for ; Mon, 30 Oct 2023 06:23:07 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 2A36666071A3; Mon, 30 Oct 2023 13:23:05 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1698672185; bh=AvtbfwF1Dmoz5okZm1OJr62qdbxZQHDDeV3MBvNQHDk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=PVBeFqRDwChS2uhD3feHK5NVM89UDT9+59Sdv/6XzOgefi6zsWF3gZ2vkz4hzWdMs Q5whdviz4xJ1Ty/S6e77JfwW8tV8wM53KOUilxbX3UPQCPdRpMyV3VrzC7V5WtYg5r lFnH/Pxovy6eEg1o/9DLvhNEdILT+gB+H1Fbvb3h6F14UBI0uHd/RKn6hytfkSHiRW pdzKpJ8s0uhL1moAk36RO725w3l8LgkYJ37cBf51KXkm3drCwHY0Z0EZ9LDcZ/MJgs IflFWu1YigiV+KltxuV9XDXqR1zHBrkmjRjyXs5elYMQYSMABz76iFYDJpIDt2/z56 BaUqEaxoouiGQ== From: AngeloGioacchino Del Regno To: boris.brezillon@collabora.com Cc: robh@kernel.org, steven.price@arm.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, daniel@ffwll.ch, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, wenst@chromium.org, AngeloGioacchino Del Regno , kernel@collabora.com Subject: [PATCH 1/4] drm/panfrost: Implement ability to turn on/off GPU clocks in suspend Date: Mon, 30 Oct 2023 14:22:54 +0100 Message-ID: <20231030132257.85379-2-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231030132257.85379-1-angelogioacchino.delregno@collabora.com> References: <20231030132257.85379-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Mon, 30 Oct 2023 06:23:17 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1781186899051666025 X-GMAIL-MSGID: 1781186899051666025 Currently, the GPU is being internally powered off for runtime suspend and turned back on for runtime resume through commands sent to it, but note that the GPU doesn't need to be clocked during the poweroff state, hence it is possible to save some power on selected platforms. Add suspend and resume handlers for full system sleep and then add a new panfrost_gpu_pm enumeration and a pm_features variable in the panfrost_compatible structure: BIT(GPU_PM_CLK_DIS) will be used to enable this power saving technique only on SoCs that are able to safely use it. Note that this was implemented only for the system sleep case and not for runtime PM because testing on one of my MediaTek platforms showed issues when turning on and off clocks aggressively (in PM runtime), with the GPU locking up and unable to soft reset, eventually resulting in a full system lockup. Doing this only for full system sleep never showed issues in 3 days of testing by suspending and resuming the system continuously. Signed-off-by: AngeloGioacchino Del Regno --- drivers/gpu/drm/panfrost/panfrost_device.c | 61 ++++++++++++++++++++-- drivers/gpu/drm/panfrost/panfrost_device.h | 11 ++++ 2 files changed, 68 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c b/drivers/gpu/drm/panfrost/panfrost_device.c index 28f7046e1b1a..2022ed76a620 100644 --- a/drivers/gpu/drm/panfrost/panfrost_device.c +++ b/drivers/gpu/drm/panfrost/panfrost_device.c @@ -403,7 +403,7 @@ void panfrost_device_reset(struct panfrost_device *pfdev) panfrost_job_enable_interrupts(pfdev); } -static int panfrost_device_resume(struct device *dev) +static int panfrost_device_runtime_resume(struct device *dev) { struct panfrost_device *pfdev = dev_get_drvdata(dev); @@ -413,7 +413,7 @@ static int panfrost_device_resume(struct device *dev) return 0; } -static int panfrost_device_suspend(struct device *dev) +static int panfrost_device_runtime_suspend(struct device *dev) { struct panfrost_device *pfdev = dev_get_drvdata(dev); @@ -426,5 +426,58 @@ static int panfrost_device_suspend(struct device *dev) return 0; } -EXPORT_GPL_RUNTIME_DEV_PM_OPS(panfrost_pm_ops, panfrost_device_suspend, - panfrost_device_resume, NULL); +static int panfrost_device_resume(struct device *dev) +{ + struct panfrost_device *pfdev = dev_get_drvdata(dev); + int ret; + + if (pfdev->comp->pm_features & BIT(GPU_PM_CLK_DIS)) { + ret = clk_enable(pfdev->clock); + if (ret) + return ret; + + if (pfdev->bus_clock) { + ret = clk_enable(pfdev->bus_clock); + if (ret) + goto err_bus_clk; + } + } + + ret = pm_runtime_force_resume(dev); + if (ret) + goto err_resume; + + return 0; + +err_resume: + if (pfdev->comp->pm_features & BIT(GPU_PM_CLK_DIS) && pfdev->bus_clock) + clk_disable(pfdev->bus_clock); +err_bus_clk: + if (pfdev->comp->pm_features & BIT(GPU_PM_CLK_DIS)) + clk_disable(pfdev->clock); + return ret; +} + +static int panfrost_device_suspend(struct device *dev) +{ + struct panfrost_device *pfdev = dev_get_drvdata(dev); + int ret; + + ret = pm_runtime_force_suspend(dev); + if (ret) + return ret; + + if (pfdev->comp->pm_features & BIT(GPU_PM_CLK_DIS)) { + clk_disable(pfdev->clock); + + if (pfdev->bus_clock) + clk_disable(pfdev->bus_clock); + } + + return 0; +} + +EXPORT_GPL_DEV_PM_OPS(panfrost_pm_ops) = { + RUNTIME_PM_OPS(panfrost_device_runtime_suspend, panfrost_device_runtime_resume, NULL) + SYSTEM_SLEEP_PM_OPS(panfrost_device_suspend, panfrost_device_resume) +}; diff --git a/drivers/gpu/drm/panfrost/panfrost_device.h b/drivers/gpu/drm/panfrost/panfrost_device.h index 1ef38f60d5dc..d7f179eb8ea3 100644 --- a/drivers/gpu/drm/panfrost/panfrost_device.h +++ b/drivers/gpu/drm/panfrost/panfrost_device.h @@ -25,6 +25,14 @@ struct panfrost_perfcnt; #define NUM_JOB_SLOTS 3 #define MAX_PM_DOMAINS 5 +/** + * enum panfrost_gpu_pm - Supported kernel power management features + * @GPU_PM_CLK_DIS: Allow disabling clocks during system suspend + */ +enum panfrost_gpu_pm { + GPU_PM_CLK_DIS, +}; + struct panfrost_features { u16 id; u16 revision; @@ -75,6 +83,9 @@ struct panfrost_compatible { /* Vendor implementation quirks callback */ void (*vendor_quirk)(struct panfrost_device *pfdev); + + /* Allowed PM features */ + u8 pm_features; }; struct panfrost_device { From patchwork Mon Oct 30 13:22:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 159735 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:d641:0:b0:403:3b70:6f57 with SMTP id cy1csp2208413vqb; Mon, 30 Oct 2023 06:23:22 -0700 (PDT) X-Google-Smtp-Source: AGHT+IH9N6csFs0QyRI61KVo6JWQYqJHxp6jxWlvYKQsgFMur7T7D64ePWunUSuY6MVH18j4z1YM X-Received: by 2002:a17:90b:111:b0:27d:97e5:f3fa with SMTP id p17-20020a17090b011100b0027d97e5f3famr8541764pjz.29.1698672202546; Mon, 30 Oct 2023 06:23:22 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1698672202; cv=none; d=google.com; s=arc-20160816; b=y3p1Mg24bC24DFP7+4xlZ5UnbYTmbYt/tA4WbZq6rYYgQPsFEPELPQ8nJha3AXpVHy 7qRAkd2CcvneBhg964kW0uJHBZS8w+ifC2HLRSOCqxQCcykbhEkIgOSXuOkTDkYoylNw MpKE0GQjrr15LMPxeXX8yTxVNHsUOMdELphGNfYtD6IW7aV+taU9WUBeiw76532JPfeA OaPrNTrd7tgpWdnSTUfGCuEnHympMNIEYXJ6XvLpNusdrf/FHyLja9wPhbZilw1gpEdq deLblcKq6ckdqCmAicFvl619mExjd60eOGtxhWtaNc5Dce1tE3GgEeTdjOzsuT8mzJVU EQVQ== ARC-Message-Signature: i=1; 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[23.128.96.37]) by mx.google.com with ESMTPS id bb1-20020a17090b008100b002791035445esi4877995pjb.76.2023.10.30.06.23.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Oct 2023 06:23:22 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) client-ip=23.128.96.37; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b="IVDlq/FH"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by snail.vger.email (Postfix) with ESMTP id 06C4B80C5FBB; Mon, 30 Oct 2023 06:23:21 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at snail.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233398AbjJ3NXO (ORCPT + 31 others); Mon, 30 Oct 2023 09:23:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48904 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232176AbjJ3NXL (ORCPT ); Mon, 30 Oct 2023 09:23:11 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DAD7DD3 for ; Mon, 30 Oct 2023 06:23:07 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 015CB6607385; Mon, 30 Oct 2023 13:23:05 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1698672186; bh=yXt8niUpqio+gdmTqqnUMTPMyUgKwAIOi8EGaWco710=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=IVDlq/FH4jjavt2ZWDKJiwXMVrsY7GhFgmBhj8euDGbAEmhbJ4VOMYgv+1wgCuvY8 cyfrR/+fLcJF2I093OA/i31G2bzz1MZmUJ8FuVU1jjPXiN0/wMQIY4mWc5E0w1BVIT wOTNjiKI3GZSP7YXpyo6x0g24p+vVLRFjaXh4P7lQR6KgqhyyfRyFfTjRfPndcDCpb qXMJCE0mg/sWIF38T8uO8hQH7mJEZKFF0YEZSI/40KFCuaoZc+yQ43U1zc573Mkai0 m7tg0HW/F6daZi2V83r096hgAGFr4o7P5FxZdHxJs9ELtvOb3nicEeG7aaEMj03Sis RVdzs/h8cumbQ== From: AngeloGioacchino Del Regno To: boris.brezillon@collabora.com Cc: robh@kernel.org, steven.price@arm.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, daniel@ffwll.ch, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, wenst@chromium.org, AngeloGioacchino Del Regno , kernel@collabora.com Subject: [PATCH 2/4] drm/panfrost: Set clocks on/off during system sleep on MediaTek SoCs Date: Mon, 30 Oct 2023 14:22:55 +0100 Message-ID: <20231030132257.85379-3-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231030132257.85379-1-angelogioacchino.delregno@collabora.com> References: <20231030132257.85379-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Mon, 30 Oct 2023 06:23:21 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1781186903446569817 X-GMAIL-MSGID: 1781186903446569817 All of the MediaTek SoCs supported by Panfrost can switch the clocks off and on during system sleep to save some power without any user experience penalty. Measurements taken on multiple MediaTek SoCs show that adding this will not prolong the time that is required to resume the system in any meaningful way. As an example, for MT8195 - a "before" with only runtime PM operations (so, without turning on/off GPU clocks), and an "after" executing full system sleep .resume() handler (.resume() -> .runtime_resume() -> done): Average Panfrost-only system sleep resume time, before: 110372ns Average Panfrost-only system sleep resume time, after: 114186ns Signed-off-by: AngeloGioacchino Del Regno --- drivers/gpu/drm/panfrost/panfrost_drv.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panfrost/panfrost_drv.c index 7cabf4e3d1f2..82f3c5fe9c58 100644 --- a/drivers/gpu/drm/panfrost/panfrost_drv.c +++ b/drivers/gpu/drm/panfrost/panfrost_drv.c @@ -734,6 +734,7 @@ static const struct panfrost_compatible mediatek_mt8183_b_data = { .supply_names = mediatek_mt8183_b_supplies, .num_pm_domains = ARRAY_SIZE(mediatek_mt8183_pm_domains), .pm_domain_names = mediatek_mt8183_pm_domains, + .pm_features = BIT(GPU_PM_CLK_DIS), }; static const char * const mediatek_mt8186_pm_domains[] = { "core0", "core1" }; @@ -742,6 +743,7 @@ static const struct panfrost_compatible mediatek_mt8186_data = { .supply_names = mediatek_mt8183_b_supplies, .num_pm_domains = ARRAY_SIZE(mediatek_mt8186_pm_domains), .pm_domain_names = mediatek_mt8186_pm_domains, + .pm_features = BIT(GPU_PM_CLK_DIS), }; static const char * const mediatek_mt8192_supplies[] = { "mali", NULL }; @@ -752,6 +754,7 @@ static const struct panfrost_compatible mediatek_mt8192_data = { .supply_names = mediatek_mt8192_supplies, .num_pm_domains = ARRAY_SIZE(mediatek_mt8192_pm_domains), .pm_domain_names = mediatek_mt8192_pm_domains, + .pm_features = BIT(GPU_PM_CLK_DIS), }; static const struct of_device_id dt_match[] = { From patchwork Mon Oct 30 13:22:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 159736 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:d641:0:b0:403:3b70:6f57 with SMTP id cy1csp2208630vqb; Mon, 30 Oct 2023 06:23:43 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFB6v1aj/AFiVMQWp3E6ag84qGDMxFO1Lffk0grQyIr9zKvenDDUJI0x3zv+Psivo7OMnfm X-Received: by 2002:a05:6300:8083:b0:16b:d137:dfb3 with SMTP id ap3-20020a056300808300b0016bd137dfb3mr12574541pzc.59.1698672223074; Mon, 30 Oct 2023 06:23:43 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1698672223; cv=none; d=google.com; s=arc-20160816; b=0QxTNsVHLJmuPdwt4nMtCAgqm3pX5pIvINEZMIQJ6xc7FA5edTabTmMXLV1z6zkYdJ azHkGBDyknGqjuE9yn4ApN8iwHkAnY4P/I5yoZBJTip9DSC3NSQnJz7A1xmVCSFaBJed fRZUWTgcAC9/5BLtPxmBjhbrofPsQlv+TA2TWv23wmlSQJC75EhCByj8swZYYvex476G xLWDcdDEaJ6vD7j23LgZ6Ft4UVEyaWcO3BjGyozrIkxaYpyQA2ZcfDcCIvpHVrNeIN16 Yl+kfDjXFUKiAOf8azZGRdyLn4AaXJph846JNqnf683qvjc5yf+V8aX+KvzxinvKPyfl hOaA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=shcKmizxUENtP1Ih2Lsio0RlYzOJFfGzfA5YRFNBKz8=; fh=tAWvjMAEmVD3R8FzmIRYzQIb+yW9J+gWZJ2R8deHkVw=; b=xadpp1nXqTXuIHEmbAG/Rd+g/Jrou5lkh5wM6rDd8ULEgPFUafp0//HvnMAie+bx7S 77oLb9cGePNXSH7l6EOAAJGJC8vAw9LI4gUIT4tFLU+wQ34GmtZc2LP9C/cwc/4tRYT5 I8VsZgkSTcfVDtfX53OH45O/mQh8xm0M8UDFGwBsW4SKo/WTmOTPmSHGlllZFUHAu3p3 hSVKMeYqQXOieSR9sgVcW2UoUCVkAVQM6TczCHutBhBgGSCLdM9CY7H88xH4hTjJMbwC SzvzB2Ez1rjD2vj8BpOUoMyZzSEFCMvyRrtC0vswLBtuNAZg6wVDk8B0bldUds9wJtgp SLdw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=ayouEfh8; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:6 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: from pete.vger.email (pete.vger.email. [2620:137:e000::3:6]) by mx.google.com with ESMTPS id bk13-20020a056a02028d00b00578a28df3e2si3033262pgb.816.2023.10.30.06.23.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Oct 2023 06:23:43 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:6 as permitted sender) client-ip=2620:137:e000::3:6; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=ayouEfh8; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:6 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by pete.vger.email (Postfix) with ESMTP id A93AE80621D7; Mon, 30 Oct 2023 06:23:38 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at pete.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233400AbjJ3NXR (ORCPT + 31 others); Mon, 30 Oct 2023 09:23:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48936 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233384AbjJ3NXL (ORCPT ); Mon, 30 Oct 2023 09:23:11 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A996BD6 for ; Mon, 30 Oct 2023 06:23:08 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id CC49E6607388; Mon, 30 Oct 2023 13:23:06 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1698672187; bh=3dUd841wLvR/syQt4DasoXOByTVGgSmSqikDkfeYRv4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ayouEfh8u3VjZQoJfUNqaL1sbnU0XUvwScA51bRYXidoKUIU/WrrDyTxp2rZzk/LP Lz6bliSbO/x++VGiLXTCQ6ZzPXf3YDlOvkarhJwtIUppx4ey32GL7oOqNi1TOMzNXD xdnxo2z4Eufu3n2Vcn8p63HOxr1zZPjlw6FbbLFRgPQno90w/DyNpCW2rTf5mBCj6p 8jRURbNTgJPcaYq7LiGcCknoQgGcfBP5X46xsGHN32maWsaCVY03uaeyKsHbG/vaRu B3u2Kt3FUjSW/1Bt6Ab9yNw984J1Psqv1J9ea8BC6R50iiYkFSkgYFaKqef0zf1OWs IUzLvoG0fQ7Rg== From: AngeloGioacchino Del Regno To: boris.brezillon@collabora.com Cc: robh@kernel.org, steven.price@arm.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, daniel@ffwll.ch, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, wenst@chromium.org, AngeloGioacchino Del Regno , kernel@collabora.com Subject: [PATCH 3/4] drm/panfrost: Implement ability to turn on/off regulators in suspend Date: Mon, 30 Oct 2023 14:22:56 +0100 Message-ID: <20231030132257.85379-4-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231030132257.85379-1-angelogioacchino.delregno@collabora.com> References: <20231030132257.85379-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on pete.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (pete.vger.email [0.0.0.0]); Mon, 30 Oct 2023 06:23:38 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1781186924786363744 X-GMAIL-MSGID: 1781186924786363744 Some platforms/SoCs can power off the GPU entirely by completely cutting off power, greatly enhancing battery time during system suspend: add a new pm_feature GPU_PM_VREG_OFF to allow turning off the GPU regulators during full suspend only on selected platforms. Signed-off-by: AngeloGioacchino Del Regno --- drivers/gpu/drm/panfrost/panfrost_device.c | 19 ++++++++++++++++++- drivers/gpu/drm/panfrost/panfrost_device.h | 2 ++ 2 files changed, 20 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c b/drivers/gpu/drm/panfrost/panfrost_device.c index 2022ed76a620..51b22eb0971d 100644 --- a/drivers/gpu/drm/panfrost/panfrost_device.c +++ b/drivers/gpu/drm/panfrost/panfrost_device.c @@ -431,10 +431,21 @@ static int panfrost_device_resume(struct device *dev) struct panfrost_device *pfdev = dev_get_drvdata(dev); int ret; + if (pfdev->comp->pm_features & BIT(GPU_PM_VREG_OFF)) { + unsigned long freq = pfdev->pfdevfreq.fast_rate; + struct dev_pm_opp *opp; + + opp = dev_pm_opp_find_freq_ceil(dev, &freq); + if (IS_ERR(opp)) + return PTR_ERR(opp); + dev_pm_opp_put(opp); + dev_pm_opp_set_opp(dev, opp); + } + if (pfdev->comp->pm_features & BIT(GPU_PM_CLK_DIS)) { ret = clk_enable(pfdev->clock); if (ret) - return ret; + goto err_clk; if (pfdev->bus_clock) { ret = clk_enable(pfdev->bus_clock); @@ -455,6 +466,9 @@ static int panfrost_device_resume(struct device *dev) err_bus_clk: if (pfdev->comp->pm_features & BIT(GPU_PM_CLK_DIS)) clk_disable(pfdev->clock); +err_clk: + if (pfdev->comp->pm_features & BIT(GPU_PM_VREG_OFF)) + dev_pm_opp_set_opp(dev, NULL); return ret; } @@ -474,6 +488,9 @@ static int panfrost_device_suspend(struct device *dev) clk_disable(pfdev->bus_clock); } + if (pfdev->comp->pm_features & BIT(GPU_PM_VREG_OFF)) + dev_pm_opp_set_opp(dev, NULL); + return 0; } diff --git a/drivers/gpu/drm/panfrost/panfrost_device.h b/drivers/gpu/drm/panfrost/panfrost_device.h index d7f179eb8ea3..0fc558db6bfd 100644 --- a/drivers/gpu/drm/panfrost/panfrost_device.h +++ b/drivers/gpu/drm/panfrost/panfrost_device.h @@ -28,9 +28,11 @@ struct panfrost_perfcnt; /** * enum panfrost_gpu_pm - Supported kernel power management features * @GPU_PM_CLK_DIS: Allow disabling clocks during system suspend + * @GPU_PM_VREG_OFF: Allow turning off regulators during system suspend */ enum panfrost_gpu_pm { GPU_PM_CLK_DIS, + GPU_PM_VREG_OFF, }; struct panfrost_features { From patchwork Mon Oct 30 13:22:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 159737 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:d641:0:b0:403:3b70:6f57 with SMTP id cy1csp2208696vqb; Mon, 30 Oct 2023 06:23:49 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEDOscBX4CTjxnYAaIHN6zF/nY9yeIAdvAn5t7zLhFkRpLvTEDqRqsFbNyNya9NhsUe+pge X-Received: by 2002:a17:90a:fb81:b0:27c:f016:49a2 with SMTP id cp1-20020a17090afb8100b0027cf01649a2mr6513610pjb.7.1698672228880; Mon, 30 Oct 2023 06:23:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1698672228; cv=none; d=google.com; s=arc-20160816; b=Cvwa7+ed4g8RxsZilEigZb4RK+TG5FatpuAbNAZEX6CZo/1oqFEkdiN4FbzlnI20tq zRIMaQ0sqYSxPZhxWXUkTNPKpraauSMgkA1b+s2lKSWzvvVd7onrJ+h1mOHE45x9noBo X1JF7Z4at2TI/XcaLNaFyaQHlOOJ2O/fX51sCiKu+hKzva3olChWZODYr9iXvA69dp7e GK4wfWH8y+usfsOEzNXi5nAYObFYa9XZky84t4NBY4BQpuq6k2MGz5YyaG/ZHxOhraf8 +JQZ4QxVUtsqPnF6+y/LTL7WO8Sa8CIABWj6BCm/qYaStQrRQ4l20fsaXijzZAPiQ5bU Sirw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=C8RVtvT5BQSCZ86fmLfqAkjzlGvoHgXnPDd7sVvwJ8k=; fh=tAWvjMAEmVD3R8FzmIRYzQIb+yW9J+gWZJ2R8deHkVw=; b=DuvbFAPGy3jtHbqiXTWjt1mRKzTRHB/mM/uw8CiGqhFnJg6cuNK+MtUX+L4I/iHAjJ EhF3aRyJ21sJ4MdnSj2lgmDWz2iJlN/aFPVcO3QQmTS1tG84JcaIXh9z5b2620PakqDO ufxgjaKHcQ8UIJUgY79mnhaMtLQqKksggb4PpB26qupyHzBQq+2zD32i/4eBUXjJtWmv RT4oV7ZJn128rBomT9VS7q+v8jNgq86JyY6Z9UZhkX8F98yWwykjnzohnsQhSiPYXsY+ NrYnKklu3Mpj4wPBEj6yzBpm2KsHoTiUcQUoCablXTtqbWMKy0rQNSHK4LPX84d7LB6J ax1A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=dANsBif0; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.38 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: from fry.vger.email (fry.vger.email. [23.128.96.38]) by mx.google.com with ESMTPS id d4-20020a17090a2a4400b002792c288cc3si4917468pjg.169.2023.10.30.06.23.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Oct 2023 06:23:48 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.38 as permitted sender) client-ip=23.128.96.38; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=dANsBif0; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.38 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by fry.vger.email (Postfix) with ESMTP id DEE5080A0566; Mon, 30 Oct 2023 06:23:45 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at fry.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233423AbjJ3NXT (ORCPT + 31 others); Mon, 30 Oct 2023 09:23:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48942 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233391AbjJ3NXM (ORCPT ); Mon, 30 Oct 2023 09:23:12 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8AE55C9 for ; Mon, 30 Oct 2023 06:23:09 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id A6ED16607389; Mon, 30 Oct 2023 13:23:07 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1698672188; bh=Rs2Tz2duxz0x7ijP2hn/7R66LzyseqbsHizTc5CA0MU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=dANsBif0cystNlFAFmjXOVWt1FQRW4An0MoKDZ1S/uaiNZ4O5spk4rfppG/x8r8ZC w4tfGGx2x5WQi4a+9dOnwBqJ1b2Vz3nC6QLcAytkxYiFN6nxgxMZlqByhd1TAeHVs0 TrXbu20VSWk/KaHTMNAYBuysmkNRFUpkPj6a2IswsVzE9sWSgYsF/CIwMPaFHT7XiO PHYI50bSQtQEaOdnDSjjMsZiLxMYF2sbwCtOuax1v1kTNMZiaPjuomZuID/Sj9NCbH SOoEfMCgmQpGtcAoSHiU8NBzpozL3UJfLmsjFNM5o3m39LeCnYmWJ15/Hh21ERC1BX 7iKtkLTr0vk+g== From: AngeloGioacchino Del Regno To: boris.brezillon@collabora.com Cc: robh@kernel.org, steven.price@arm.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, daniel@ffwll.ch, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, wenst@chromium.org, AngeloGioacchino Del Regno , kernel@collabora.com Subject: [PATCH 4/4] drm/panfrost: Set regulators on/off during system sleep on MediaTek SoCs Date: Mon, 30 Oct 2023 14:22:57 +0100 Message-ID: <20231030132257.85379-5-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231030132257.85379-1-angelogioacchino.delregno@collabora.com> References: <20231030132257.85379-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on fry.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (fry.vger.email [0.0.0.0]); Mon, 30 Oct 2023 06:23:46 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1781186930860002266 X-GMAIL-MSGID: 1781186930860002266 All of the MediaTek SoCs supported by Panfrost can completely cut power to the GPU during full system sleep without any user-noticeable delay in the resume operation, as shown by measurements taken on multiple MediaTek SoCs. As an example, for MT8195 - a "before" with only runtime PM operations (so, without turning on/off regulators), and an "after" executing full system sleep .resume() handler (.resume() -> .runtime_resume() -> done): Average Panfrost-only system sleep resume time, before: 114186ns Average Panfrost-only system sleep resume time, after: 189684ns Keep in mind that this additional ~0,075ms delay happens only in resume from a full system suspend, and not in runtime PM operations, hence it is acceptable. Signed-off-by: AngeloGioacchino Del Regno --- drivers/gpu/drm/panfrost/panfrost_drv.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panfrost/panfrost_drv.c index 82f3c5fe9c58..f63382d9ab04 100644 --- a/drivers/gpu/drm/panfrost/panfrost_drv.c +++ b/drivers/gpu/drm/panfrost/panfrost_drv.c @@ -734,7 +734,7 @@ static const struct panfrost_compatible mediatek_mt8183_b_data = { .supply_names = mediatek_mt8183_b_supplies, .num_pm_domains = ARRAY_SIZE(mediatek_mt8183_pm_domains), .pm_domain_names = mediatek_mt8183_pm_domains, - .pm_features = BIT(GPU_PM_CLK_DIS), + .pm_features = BIT(GPU_PM_CLK_DIS) | BIT(GPU_PM_VREG_OFF), }; static const char * const mediatek_mt8186_pm_domains[] = { "core0", "core1" }; @@ -743,7 +743,7 @@ static const struct panfrost_compatible mediatek_mt8186_data = { .supply_names = mediatek_mt8183_b_supplies, .num_pm_domains = ARRAY_SIZE(mediatek_mt8186_pm_domains), .pm_domain_names = mediatek_mt8186_pm_domains, - .pm_features = BIT(GPU_PM_CLK_DIS), + .pm_features = BIT(GPU_PM_CLK_DIS) | BIT(GPU_PM_VREG_OFF), }; static const char * const mediatek_mt8192_supplies[] = { "mali", NULL }; @@ -754,7 +754,7 @@ static const struct panfrost_compatible mediatek_mt8192_data = { .supply_names = mediatek_mt8192_supplies, .num_pm_domains = ARRAY_SIZE(mediatek_mt8192_pm_domains), .pm_domain_names = mediatek_mt8192_pm_domains, - .pm_features = BIT(GPU_PM_CLK_DIS), + .pm_features = BIT(GPU_PM_CLK_DIS) | BIT(GPU_PM_VREG_OFF), }; static const struct of_device_id dt_match[] = {