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Mon, 30 Oct 2023 06:28:59 +0000 (GMT) Received: from smtpav02.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id CECCD20040; Mon, 30 Oct 2023 06:28:57 +0000 (GMT) Received: from [9.177.67.173] (unknown [9.177.67.173]) by smtpav02.fra02v.mail.ibm.com (Postfix) with ESMTP; Mon, 30 Oct 2023 06:28:57 +0000 (GMT) Message-ID: <68348b26-442f-f0c4-b256-54008531640d@linux.ibm.com> Date: Mon, 30 Oct 2023 14:28:56 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:91.0) Gecko/20100101 Thunderbird/91.6.1 Content-Language: en-US To: GCC Patches Cc: Segher Boessenkool , David Edelsohn , Peter Bergner From: "Kewen.Lin" Subject: [PATCH] rs6000: Consider inline asm as safe if no assembler complains [PR111828] X-TM-AS-GCONF: 00 X-Proofpoint-GUID: z6bohXE-pRQTNgDgbx4sm2jRjqihI5z- X-Proofpoint-ORIG-GUID: uHTt8GscBXHAtQo7tiFy0dJ5MWhUrUv9 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-10-30_04,2023-10-27_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 bulkscore=0 mlxscore=0 mlxlogscore=999 adultscore=0 lowpriorityscore=0 impostorscore=0 malwarescore=0 suspectscore=0 priorityscore=1501 spamscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2310240000 definitions=main-2310300046 X-Spam-Status: No, score=-11.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_MSPIKE_H4, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1781160864583648050 X-GMAIL-MSGID: 1781160864583648050 Hi, As discussed in PR111828, rs6000_update_ipa_fn_target_info is much conservative, currently for any non-empty inline asm, without any parsing, it would take inline asm could have HTM insns. It means for one function attributed with power8 having inline asm, even if it has no HTM insns, we don't make a function attributed with power10 inline it. Peter pointed out an inline asm parser can be a slippery slope, and noticed that the current gnu assembler still allows HTM insns even with power10 machine type, so he suggested that we can aggressively ignore the handling on inline asm, this patch goes for this suggestion. Considering that there are a few assembler alternatives and assembler can update its behaviors (complaining HTM insns at power10 and later cpus sounds reasonable from a certain point of view), this patch also checks assembler complains on HTM insns at power10 or not. For a case that a caller attributed power10 calls a callee attributed power8 having inline asm with HTM insn, without inlining at least the compilation succeeds, but if assembler complains HTM insns at power10, after inlining the compilation would fail. The two associated test cases are fine without and with this patch (effective target takes effect or not). Bootstrapped and regtested on x86_64-redhat-linux, powerpc64-linux-gnu P8/P9 and powerpc64le-linux-gnu P9/P10. I'm going to push this a week later if no objections. BR, Kewen ----- PR target/111828 gcc/ChangeLog: * config.in: Regenerate. * config/rs6000/rs6000.cc (rs6000_update_ipa_fn_target_info): Guard inline asm handling under !HAVE_AS_POWER10_HTM. * configure: Regenerate. * configure.ac: Detect assembler support for HTM insns at power10. gcc/testsuite/ChangeLog: * lib/target-supports.exp (check_effective_target_powerpc_as_p10_htm): New proc. * g++.target/powerpc/pr111828-1.C: New test. * g++.target/powerpc/pr111828-2.C: New test. --- gcc/config.in | 6 +++ gcc/config/rs6000/rs6000.cc | 5 +- gcc/configure | 43 +++++++++++++++ gcc/configure.ac | 17 ++++++ gcc/testsuite/g++.target/powerpc/pr111828-1.C | 49 +++++++++++++++++ gcc/testsuite/g++.target/powerpc/pr111828-2.C | 52 +++++++++++++++++++ gcc/testsuite/lib/target-supports.exp | 40 ++++++++++++++ 7 files changed, 211 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/g++.target/powerpc/pr111828-1.C create mode 100644 gcc/testsuite/g++.target/powerpc/pr111828-2.C -- 2.31.1 diff --git a/gcc/config.in b/gcc/config.in index d04718ad128..c9681351389 100644 --- a/gcc/config.in +++ b/gcc/config.in @@ -682,6 +682,12 @@ #endif +/* Define if your assembler supports htm insns on power10. */ +#ifndef USED_FOR_TARGET +#undef HAVE_AS_POWER10_HTM +#endif + + /* Define if your assembler supports .ref */ #ifndef USED_FOR_TARGET #undef HAVE_AS_REF diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index cc24dd5301e..6d084069014 100644 --- a/gcc/config/rs6000/rs6000.cc +++ b/gcc/config/rs6000/rs6000.cc @@ -25682,6 +25682,7 @@ rs6000_need_ipa_fn_target_info (const_tree decl, static bool rs6000_update_ipa_fn_target_info (unsigned int &info, const gimple *stmt) { +#ifndef HAVE_AS_POWER10_HTM /* Assume inline asm can use any instruction features. */ if (gimple_code (stmt) == GIMPLE_ASM) { @@ -25693,7 +25694,9 @@ rs6000_update_ipa_fn_target_info (unsigned int &info, const gimple *stmt) info |= RS6000_FN_TARGET_INFO_HTM; return false; } - else if (gimple_code (stmt) == GIMPLE_CALL) +#endif + + if (gimple_code (stmt) == GIMPLE_CALL) { tree fndecl = gimple_call_fndecl (stmt); if (fndecl && fndecl_built_in_p (fndecl, BUILT_IN_MD)) diff --git a/gcc/configure b/gcc/configure index c43bde8174b..afad4462dd3 100755 --- a/gcc/configure +++ b/gcc/configure @@ -28218,6 +28218,49 @@ if test $gcc_cv_as_powerpc_mfcrf = yes; then $as_echo "#define HAVE_AS_MFCRF 1" >>confdefs.h +fi + + + case $target in + *-*-aix*) conftest_s=' .machine "pwr10" + .csect .text[PR] + tend. 0';; + *-*-darwin*) conftest_s=' .text + tend. 0';; + *) conftest_s=' .machine power10 + .text + tend. 0';; + esac + + { $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for htm support on Power10" >&5 +$as_echo_n "checking assembler for htm support on Power10... " >&6; } +if ${gcc_cv_as_power10_htm+:} false; then : + $as_echo_n "(cached) " >&6 +else + gcc_cv_as_power10_htm=no + if test x$gcc_cv_as != x; then + $as_echo "$conftest_s" > conftest.s + if { ac_try='$gcc_cv_as $gcc_cv_as_flags -o conftest.o conftest.s >&5' + { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5 + (eval $ac_try) 2>&5 + ac_status=$? + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; }; } + then + gcc_cv_as_power10_htm=yes + else + echo "configure: failed program was" >&5 + cat conftest.s >&5 + fi + rm -f conftest.o conftest.s + fi +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_as_power10_htm" >&5 +$as_echo "$gcc_cv_as_power10_htm" >&6; } +if test $gcc_cv_as_power10_htm = yes; then + +$as_echo "#define HAVE_AS_POWER10_HTM 1" >>confdefs.h + fi diff --git a/gcc/configure.ac b/gcc/configure.ac index fb8e32f8ee5..9984e15e612 100644 --- a/gcc/configure.ac +++ b/gcc/configure.ac @@ -5096,6 +5096,23 @@ gd: [AC_DEFINE(HAVE_AS_MFCRF, 1, [Define if your assembler supports mfcr field.])]) + case $target in + *-*-aix*) conftest_s=' .machine "pwr10" + .csect .text[[PR]] + tend. 0';; + *-*-darwin*) conftest_s=' .text + tend. 0';; + *) conftest_s=' .machine power10 + .text + tend. 0';; + esac + + gcc_GAS_CHECK_FEATURE([htm support on Power10], + gcc_cv_as_power10_htm,, + [$conftest_s],, + [AC_DEFINE(HAVE_AS_POWER10_HTM, 1, + [Define if your assembler supports htm insns on power10.])]) + case $target in *-*-aix*) conftest_s=' .csect .text[[PR]] LCF..0: diff --git a/gcc/testsuite/g++.target/powerpc/pr111828-1.C b/gcc/testsuite/g++.target/powerpc/pr111828-1.C new file mode 100644 index 00000000000..d76a084bdcf --- /dev/null +++ b/gcc/testsuite/g++.target/powerpc/pr111828-1.C @@ -0,0 +1,49 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_as_p10_htm } */ +/* Use -Wno-attributes to suppress the possible warning on always_inline. */ +/* { dg-options "-O2 -mdejagnu-cpu=power9 -Wno-attributes" } */ + +/* Verify it doesn't emit any error messages. */ + +#include +#define HWY_PRAGMA(tokens) _Pragma (#tokens) +#define HWY_PUSH_ATTRIBUTES(targets_str) HWY_PRAGMA (GCC target targets_str) +__attribute__ ((always_inline)) void +PreventElision (int output) +{ + asm("nop" : "+r"(output) : : "memory"); +} +#define HWY_BEFORE_NAMESPACE() HWY_PUSH_ATTRIBUTES (",cpu=power10") +HWY_BEFORE_NAMESPACE () namespace detail +{ + template struct CappedTagChecker + { + }; +} +template +using CappedTag = detail::CappedTagChecker; +template struct ForeachCappedR +{ + static void Do (size_t, size_t) + { + CappedTag d; + Test () (int(), d); + } +}; +template struct ForPartialVectors +{ + template void operator() (T) + { + ForeachCappedR::Do (1, 1); + } +}; +struct TestFloorLog2 +{ + template void operator() (T, DF) { PreventElision (0x10); } +}; +void +TestAllFloorLog2 () +{ + ForPartialVectors () (float()); +} + diff --git a/gcc/testsuite/g++.target/powerpc/pr111828-2.C b/gcc/testsuite/g++.target/powerpc/pr111828-2.C new file mode 100644 index 00000000000..0b7331675f7 --- /dev/null +++ b/gcc/testsuite/g++.target/powerpc/pr111828-2.C @@ -0,0 +1,52 @@ +/* { dg-do compile } */ +/* { dg-skip-if "HTM inline asm supported" { powerpc_as_p10_htm } } */ +/* Use -Wno-attributes to suppress the possible warning on always_inline. */ +/* { dg-options "-O2 -mdejagnu-cpu=power9 -Wno-attributes" } */ + +/* Verify it emits error messages on non-empty inline asm. */ + +#include +#define HWY_PRAGMA(tokens) _Pragma (#tokens) +#define HWY_PUSH_ATTRIBUTES(targets_str) HWY_PRAGMA (GCC target targets_str) +__attribute__ ((always_inline)) void +PreventElision (int output) /* { dg-error "inlining failed in call to .* target specific option mismatch" } */ +{ + asm("nop" : "+r"(output) : : "memory"); +} +#define HWY_BEFORE_NAMESPACE() HWY_PUSH_ATTRIBUTES (",cpu=power10") +HWY_BEFORE_NAMESPACE () namespace detail +{ + template struct CappedTagChecker + { + }; +} +template +using CappedTag = detail::CappedTagChecker; +template struct ForeachCappedR +{ + static void Do (size_t, size_t) + { + CappedTag d; + Test () (int(), d); + } +}; +template struct ForPartialVectors +{ + template void operator() (T) + { + ForeachCappedR::Do (1, 1); + } +}; +struct TestFloorLog2 +{ + template void operator() (T, DF) + { + PreventElision (0x10); /* { dg-message "called from here" } */ + } +}; +void +TestAllFloorLog2 () +{ + ForPartialVectors () (float()); +} + diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index f0b692a2e19..e4c3e3ea24e 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -12806,6 +12806,46 @@ proc check_effective_target_o_flag_in_section { } { }] } +# Return 1 if the given assembler supports hardware transactional memory +# instructions with machine type Power10, 0 otherwise. Cache the result. + +proc check_effective_target_powerpc_as_p10_htm { } { + global tool + global GCC_UNDER_TEST + + # Need auto-host.h to check linker support. + if { ![file exists ../../auto-host.h ] } { + return 0 + } + + return [check_cached_effective_target powerpc_as_p10_htm { + + set src pie[pid].c + set obj pie[pid].o + + set f [open $src "w"] + puts $f "#include \"../../auto-host.h\"" + puts $f "#if HAVE_AS_POWER10_HTM == 0" + puts $f "# error Assembler does not support htm insns with power10." + puts $f "#endif" + close $f + + verbose "check_effective_target_powerpc_as_p10_htm compiling testfile $src" 2 + set lines [${tool}_target_compile $src $obj object ""] + + file delete $src + file delete $obj + + if [string match "" $lines] then { + verbose "check_effective_target_powerpc_as_p10_htm testfile compilation passed" 2 + return 1 + } else { + verbose "check_effective_target_powerpc_as_p10_htm testfile compilation failed" 2 + return 0 + } + }] +} + # return 1 if LRA is supported. proc check_effective_target_lra { } {