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Sun, 29 Oct 2023 09:45:48 -0400 (EDT) From: Jiaxun Yang Date: Sun, 29 Oct 2023 02:53:02 +0000 Subject: [PATCH 1/8] MIPS: asm: Move strings to .rodata.str section MIME-Version: 1.0 Message-Id: <20231029-mips_debug_ll-v1-1-d7a491e8c278@flygoat.com> References: <20231029-mips_debug_ll-v1-0-d7a491e8c278@flygoat.com> In-Reply-To: <20231029-mips_debug_ll-v1-0-d7a491e8c278@flygoat.com> To: Thomas Bogendoerfer Cc: linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, Jiaxun Yang X-Mailer: b4 0.12.4 X-Spam-Status: No, score=0.3 required=5.0 tests=DATE_IN_PAST_06_12,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on groat.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (groat.vger.email [0.0.0.0]); Sun, 29 Oct 2023 06:46:22 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1781097763536454604 X-GMAIL-MSGID: 1781097763536454604 Well, they are read only. Signed-off-by: Jiaxun Yang --- arch/mips/include/asm/asm.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/mips/include/asm/asm.h b/arch/mips/include/asm/asm.h index 2e99450f4228..05a158a8920c 100644 --- a/arch/mips/include/asm/asm.h +++ b/arch/mips/include/asm/asm.h @@ -94,7 +94,7 @@ symbol: .insn symbol = value #define TEXT(msg) \ - .pushsection .data; \ + .pushsection .rodata.str; \ 8: .asciiz msg; \ .popsection; From patchwork Sun Oct 29 02:53:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiaxun Yang X-Patchwork-Id: 159371 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:d641:0:b0:403:3b70:6f57 with SMTP id cy1csp1698929vqb; Sun, 29 Oct 2023 06:58:05 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGw3pZUwga0rhBQDLhcf9Ig6uf/E5EXS2c8QP6SIUpAiIx2o528JPG/s+gG99aP4wyQOegE X-Received: by 2002:a17:90a:d358:b0:280:3a0e:d34f with SMTP id i24-20020a17090ad35800b002803a0ed34fmr1795502pjx.10.1698587885588; Sun, 29 Oct 2023 06:58:05 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1698587885; cv=none; d=google.com; s=arc-20160816; b=rm1FtGSY4W605ypG8rUv0McBE/7UgUUHc4h1P8LpvX5j92Ptqsy8So7yTrnHu8/Waw CopqTdbpAQPQ3G681+iPlkeWEFOoAa9IZ6vizsCn7souhjDv9/PPcv+137HFPtb4MmG3 UqXLXcOQNREmWmLnlD15PESuFWtus2189P9ZWi06CA1qepRUIKKoRWaKqmCREyVrav40 7vPHF+YO1jQVKPahrEBTkqSrQQy4Z9iJQp1+llg5ZAcnZ8G+QfKeNsV27pJgbzuROZ2C PIh4ldCpd6i46pOWiNLnw9XO7vmxm/aXX14TES7+HTq0NmM/D590h3pSIepetwB7vxIo /Ytg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :feedback-id:dkim-signature:dkim-signature; bh=BjhNm0ubpl/jcKdEMNbRDsPIaqKFl+mCdysy2aVA1f8=; fh=Dii/wXcZb/mJUCmsdlZbBl/o0XRcaQ9S/xOY9NGTLc4=; b=OjI5JQCEH+Llrf3J31ZzH0WOYnR+m2mtrcTomcaR9rNaagpxFndscOHGd8CRNWKYWg H7Nq1GixRSZnUT5F6J2PD5ZcsHoGhpmTQGoN2kEpNCI5A4nwKK0VHExktsygariIIaOU /Ms9HE6aSbGp2Cb5+5u0YXDwFiwanCM+Va30mO4uksDiZFp7w9xGx1A/MnB8RRqttoh9 mYS7d4gTfbmyXR+sBSVfs3D5Z2OymS/G/hmUVdGsqt/nt4mGRtFl8KwMBuwixhAQlOxp 8ODhRzBpIgVfUs7YAemxKDhpcYwGuC5nBfedWaqmdAFdxw10ry/Tha+78CrQ9QCilCRM +r4Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@flygoat.com header.s=fm1 header.b=HJXlNYZi; dkim=pass header.i=@messagingengine.com header.s=fm3 header.b=WPlJTfM9; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=flygoat.com Received: from snail.vger.email (snail.vger.email. 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Sun, 29 Oct 2023 09:45:51 -0400 (EDT) From: Jiaxun Yang Date: Sun, 29 Oct 2023 02:53:03 +0000 Subject: [PATCH 2/8] MIPS: debug: Implement low-level debugging functions MIME-Version: 1.0 Message-Id: <20231029-mips_debug_ll-v1-2-d7a491e8c278@flygoat.com> References: <20231029-mips_debug_ll-v1-0-d7a491e8c278@flygoat.com> In-Reply-To: <20231029-mips_debug_ll-v1-0-d7a491e8c278@flygoat.com> To: Thomas Bogendoerfer Cc: linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, Jiaxun Yang X-Mailer: b4 0.12.4 X-Spam-Status: No, score=-0.6 required=5.0 tests=BAYES_00,DATE_IN_PAST_06_12, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_PASS,SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Sun, 29 Oct 2023 06:58:04 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1781098490932661176 X-GMAIL-MSGID: 1781098490932661176 Currently we have three sets of early debugging functions for MIPS: zboot putc/puts, cps-vec-ns16550, and prom_putc. This is a attempt to bring them all to one by providing a interface similar to arm's debug_ll, which is very portable and allows you to support new platforms easily. Two examples of output interfaces are provided, including 8250 uart and MIPS UHI semihosting, which already covered most of the platforms. Signed-off-by: Jiaxun Yang --- arch/mips/Kconfig.debug | 80 +++++++++++++++++++++++++ arch/mips/include/debug/8250.S | 60 +++++++++++++++++++ arch/mips/include/debug/uhi.S | 48 +++++++++++++++ arch/mips/kernel/Makefile | 2 + arch/mips/kernel/debug.S | 130 +++++++++++++++++++++++++++++++++++++++++ 5 files changed, 320 insertions(+) diff --git a/arch/mips/Kconfig.debug b/arch/mips/Kconfig.debug index f4ae7900fcd3..892e31804982 100644 --- a/arch/mips/Kconfig.debug +++ b/arch/mips/Kconfig.debug @@ -164,3 +164,83 @@ config MIPS_CPS_NS16550_WIDTH lb/sb instructions. endif # MIPS_CPS_NS16550_BOOL + +# These options are only for real kernel hackers who want to get their hands dirty. +config DEBUG_LL + bool "Kernel low-level debugging functions (read help!)" + depends on DEBUG_KERNEL + help + Say Y here to include definitions of printascii, printch, printhex + in the kernel. This is helpful if you are debugging code that + executes before the console is initialized. + + Note that selecting this option will limit the kernel to a single + UART or semihosting definition, as specified below. Attempting to + boot the kernel image on a different platform *will not work*, so + this option should not be enabled for kernels that are intended to + be portable. + +choice + prompt "Kernel low-level debugging port" + depends on DEBUG_LL + + config DEBUG_MIPS_UHI + bool "Kernel low-level debugging via UHI semihosting" + help + Say Y here if you want kernel low-level debugging support + via MIPS UHI semihosting. + + config DEBUG_LL_UART_8250 + bool "Kernel low-level debugging via 8250 UART" + select DEBUG_LL_UART + help + Say Y here if you wish the debug print routes to direct + their output to an 8250 UART. You can use this option + to provide the parameters for the 8250 UART rather than + selecting one of the platform specific options below if + you know the parameters for the port. + +endchoice + +config DEBUG_LL_INCLUDE + string + default "debug/8250.S" if DEBUG_LL_UART_8250 || DEBUG_UART_8250 + default "debug/uhi.S" if DEBUG_MIPS_UHI + default "debug-macro.S" + +# Compatibility options for 8250 +config DEBUG_UART_8250 + bool + select DEBUG_LL_UART + +config DEBUG_LL_UART + bool + +config DEBUG_UART_FLOW_CONTROL + bool "Enable flow control (CTS) for the debug UART" + depends on DEBUG_LL_UART + default n + help + Some UART ports are connected to terminals that will use modem + control signals to indicate whether they are ready to receive text. + In practice this means that the terminal is asserting the special + control signal CTS (Clear To Send). If your debug UART supports + this and your debug terminal will require it, enable this option. + +config DEBUG_UART_PHYS + hex "Physical base address of debug UART" + depends on DEBUG_LL_UART + help + This is the physical base address of the debug UART. It must be + accessible from unmapped kernel space (i.e. KSEG1 for 32bit kernels + or XKPHYS for 64bit kernels). + +config DEBUG_UART_8250_SHIFT + int "Register offset shift for the 8250 debug UART" + depends on DEBUG_LL_UART_8250 || DEBUG_UART_8250 + default 2 + +config DEBUG_UART_8250_WIDTH + int "Register width for the 8250 debug UART" + depends on DEBUG_LL_UART_8250 || DEBUG_UART_8250 + default 1 diff --git a/arch/mips/include/debug/8250.S b/arch/mips/include/debug/8250.S new file mode 100644 index 000000000000..f8608d3e271a --- /dev/null +++ b/arch/mips/include/debug/8250.S @@ -0,0 +1,60 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2023, Jiaxun Yang + * MIPS Low level debug include file for 8250 UART + */ + +#include +#include +#include + +#define DEBUG_LL_UART + +#define UART_BASE CKSEG1ADDR(CONFIG_DEBUG_UART_PHYS) + +#define UART_TX_OFS (UART_TX << CONFIG_DEBUG_UART_8250_SHIFT) +#define UART_LSR_OFS (UART_LSR << CONFIG_DEBUG_UART_8250_SHIFT) +#define UART_MSR_OFS (UART_MSR << CONFIG_DEBUG_UART_8250_SHIFT) + +#if CONFIG_DEBUG_UART_8250_WIDTH == 1 +# define UART_L lb +# define UART_S sb +#elif CONFIG_DEBUG_UART_8250_WIDTH == 2 +# define UART_L lh +# define UART_S sh +#elif CONFIG_DEBUG_UART_8250_WIDTH == 4 +# define UART_L lw +# define UART_S sw +#elif defined(CONFIG_64BIT) && CONFIG_DEBUG_UART_8250_WIDTH == 8 +# define UART_L ld +# define UART_S sd +#else +# define UART_L lb +# define UART_S sb +#endif + + .macro addruart,rd,rx + PTR_LA \rd, UART_BASE + .endm + + .macro senduart,rd,rx + UART_S \rd, UART_TX_OFS(\rx) + .endm + + .macro busyuart,rd,rx +1002: + UART_L \rd, UART_LSR_OFS(\rx) + andi \rd, \rd, (UART_LSR_TEMT | UART_LSR_THRE) + xori \rd, (UART_LSR_TEMT | UART_LSR_THRE) + bnez \rd, 1002b + .endm + + .macro waituarttxrdy,rd,rx + .endm + + .macro waituartcts,rd,rx +1001: + UART_L \rd, UART_MSR_OFS(\rx) + andi \rd, UART_MSR_CTS + beqz \rd, 1001b + .endm diff --git a/arch/mips/include/debug/uhi.S b/arch/mips/include/debug/uhi.S new file mode 100644 index 000000000000..20554523e151 --- /dev/null +++ b/arch/mips/include/debug/uhi.S @@ -0,0 +1,48 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2023, Jiaxun Yang + * MIPS Low level debug include file for UHI semihosting + */ + +#include + +/** + * printch() - write a character to UHI Plog + * @a0: ASCII character to write + * + * clobbers v0, t9 + * UHI may clobber k0, k1 + */ + .pushsection .bss +charbuf_addr: .space 8 + .popsection +NESTED(printch, 0, ra) + PTR_LI t9, charbuf_addr + sb a0, 0(t9) + sb zero, 1(t9) + move a0, t9 + li v0, 0x1 + li t9, 13 /* plog */ + .set push + .set MIPS_ISA_LEVEL_RAW + sdbbp 1 + .set pop + jr ra + END(printch) + +/** + * printascii() - write a string to UHI Plog + * @a0: pointer to NULL-terminated ASCII string + * + * clobbers v0 + * UHI may clobber k0, k1 + */ +NESTED(printascii, 0, ra) + li v0, 0x1 + li t9, 13 /* plog */ + .set push + .set MIPS_ISA_LEVEL_RAW + sdbbp 1 + .set pop + jr ra + END(printascii) diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile index 853a43ee4b44..10c0a224efe4 100644 --- a/arch/mips/kernel/Makefile +++ b/arch/mips/kernel/Makefile @@ -78,6 +78,8 @@ obj-$(CONFIG_MIPS32_COMPAT) += linux32.o ptrace32.o signal32.o obj-$(CONFIG_MIPS32_N32) += scall64-n32.o signal_n32.o obj-$(CONFIG_MIPS32_O32) += scall64-o32.o signal_o32.o +obj-$(CONFIG_DEBUG_LL) += debug.o + obj-$(CONFIG_KGDB) += kgdb.o obj-$(CONFIG_PROC_FS) += proc.o obj-$(CONFIG_MAGIC_SYSRQ) += sysrq.o diff --git a/arch/mips/kernel/debug.S b/arch/mips/kernel/debug.S new file mode 100644 index 000000000000..f71c6c969ef6 --- /dev/null +++ b/arch/mips/kernel/debug.S @@ -0,0 +1,130 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2023, Jiaxun Yang + * MIPS Low level debug routines + * + * Note: Those functions are designed carefully to only clobber + * t0, t1, t9, so they can be used without stack. Also they are + * position independent to be called from any place. + */ + +#include + +#include +#include +#include +#include +#include + +#include CONFIG_DEBUG_LL_INCLUDE + +#ifdef DEBUG_LL_UART +/** + * printch() - write a character to the UART + * @a0: ASCII character to write + * + * clobbers t0, t9 + */ +NESTED(printch, 0, ra) + addruart t9, t0 +#ifdef CONFIG_DEBUG_UART_FLOW_CONTROL + waituartcts t0, t9 +#endif + waituarttxrdy t0, t9 + senduart a0, t9 + busyuart t0, t9 + jr ra + END(printch) + +/** + * printascii() - write a string to the UART + * @a0: pointer to NULL-terminated ASCII string + * + * clobbers t0, t1, t9 + * + * Write a null-terminated ASCII string to the UART. + */ +NESTED(printascii, 0, ra) + addruart t9, t0 + move t1, a0 + +1: lb a0, 0(t1) + beqz a0, 2f +#ifdef CONFIG_DEBUG_UART_FLOW_CONTROL + waituartcts t0, t9 +#endif + waituarttxrdy t0, t9 + senduart a0, t9 + busyuart t0, t9 + PTR_ADDIU t1, t1, 1 + b 1b + +2: jr ra + END(printascii) +#endif /* DEBUG_LL_UART */ + +/** + * printhex() - write n byte hex value to the UART + * @a0: Hex value to write to the UART + * @a1: number of bytes to write to the UART + * + * clobbers: t0, t1, t9 + */ + + .pushsection .bss +hexbuf_addr: .space 32 + .popsection + +NESTED(printhex, 0, ra) + PTR_LA t9, hexbuf_addr + sll a1, a1, 1 +1: + subu t0, a1, 1 + sll t0, t0, 2 + LONG_SRLV t0, a0, t0 + andi t0, t0, 0xf + li t1, '0' + blt t0, 10, 2f + li t1, 'a' + addiu t0, t0, -10 +2: + addu t1, t1, t0 + sb t1, 0(t9) + PTR_ADDIU t9, t9, 1 + addiu a1, a1, -1 + bnez a1, 1b + sb zero, 0(t9) + + move a1, ra + PTR_LA a0, hexbuf_addr + bal printascii + + jr a1 + END(printhex) + +NESTED(printhex1, 0, ra) + li a1, 1 + b printhex + END(printhex1) + +NESTED(printhex2, 0, ra) + li a1, 2 + b printhex + END(printhex2) + +NESTED(printhex4, 0, ra) + li a1, 4 + b printhex + END(printhex4) + +#ifdef CONFIG_64BIT +NESTED(printhex8, 0, ra) + li a1, 8 + b printhex + END(printhex8) +#endif + +NESTED(printhexl, 0, ra) + li a1, PTRSIZE + b printhex + END(printhexl) From patchwork Sun Oct 29 02:53:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiaxun Yang X-Patchwork-Id: 159367 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:d641:0:b0:403:3b70:6f57 with SMTP id cy1csp1695294vqb; Sun, 29 Oct 2023 06:47:08 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGPTmOZGltAyM8on9FB8Mh9OWLA+RF8ch1lSKkPIFW/MvBgBpkpCA6ltWSY/4bVguoVhhT2 X-Received: by 2002:a05:6871:a817:b0:1e9:b2e2:8754 with SMTP id wl23-20020a056871a81700b001e9b2e28754mr7077698oab.2.1698587227970; Sun, 29 Oct 2023 06:47:07 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1698587227; cv=none; d=google.com; s=arc-20160816; b=QfgUhksVosJiqnPatLxyBtp8RYN9N8nsToVaMJYoEF1isgcTDhSRaXH3t3mTHvh7LG Nrh35dBLykyiUyamulF9YSsY14SIKBrgVVeQ2JTML+Nxc6cCvToemGDrSjtGnHPCKipp BxTyPRV/kTrRzBnY3IRDGOMdFg7tudvpzxO4zFdbRRcdYmVkuLRkG6v5M00m84oqjBGu 7kttlrTkwALUPk0wGqg9lY2zRE52LjMtppw46VhyhM3IeTybpyq4zvPKXfi4r8NBZipk UYPduIMILPujNDPxMSGv3F/2JUo2ijQbVQROa4m6C6ZH76RUTSaENtZh+rU3DZAxdICx iZMw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :feedback-id:dkim-signature:dkim-signature; bh=nkW4taJQaUsRU866lha58WkbM4sO1ApMx1WOQCLwoj4=; fh=Dii/wXcZb/mJUCmsdlZbBl/o0XRcaQ9S/xOY9NGTLc4=; b=BXRHVwDi+VZquQFioBe7b/zHVwOMlzYDj3BfW+E3Wy+cWgsw+FN2D1OEIsWrggcDPM 6tipE8l5uYWQRFLNPBlwW7eG3THlrTZxN5j3pDXOLI8Q6WQGRvukvk1cKwFVKZ5xPORv Y64QuMMVwp0Y5Ksc68JGZk8RbJCnhCo1T8qnYnNp9jFupO5PIFDs8jtDiKi5G2bhYqUa mq4YllNoO3c197IvJkio25dFcKX3ogxbNBovgBsEwK//g1yBH+jX6ehrOZEKRc/GPWSN DQx9lkgirvcGcV0tQqJ0Dckg/+o9GSKKXc55urCjTsAPPK3INBfFkaANc5ufPYxvj5eR PTFA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@flygoat.com header.s=fm1 header.b=W70be8GJ; dkim=pass header.i=@messagingengine.com header.s=fm3 header.b=P2vGki3X; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=flygoat.com Received: from snail.vger.email (snail.vger.email. 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Sun, 29 Oct 2023 09:45:53 -0400 (EDT) From: Jiaxun Yang Date: Sun, 29 Oct 2023 02:53:04 +0000 Subject: [PATCH 3/8] MIPS: debug: Hook up DEBUG_LL with early printk MIME-Version: 1.0 Message-Id: <20231029-mips_debug_ll-v1-3-d7a491e8c278@flygoat.com> References: <20231029-mips_debug_ll-v1-0-d7a491e8c278@flygoat.com> In-Reply-To: <20231029-mips_debug_ll-v1-0-d7a491e8c278@flygoat.com> To: Thomas Bogendoerfer Cc: linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, Jiaxun Yang X-Mailer: b4 0.12.4 X-Spam-Status: No, score=-0.6 required=5.0 tests=BAYES_00,DATE_IN_PAST_06_12, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_PASS,SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Sun, 29 Oct 2023 06:46:13 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1781097801207779170 X-GMAIL-MSGID: 1781097801207779170 Output earlyprintk to low-level debug functions when it's available. DEBUG_LL takes priority over platform earlyprintk because people must know what are they doing when they are trying to enable DEBUG_LL. Signed-off-by: Jiaxun Yang --- arch/mips/Kconfig.debug | 2 +- arch/mips/kernel/early_printk.c | 19 +++++++++++++++++++ 2 files changed, 20 insertions(+), 1 deletion(-) diff --git a/arch/mips/Kconfig.debug b/arch/mips/Kconfig.debug index 892e31804982..6ef42edc7d67 100644 --- a/arch/mips/Kconfig.debug +++ b/arch/mips/Kconfig.debug @@ -2,7 +2,7 @@ config EARLY_PRINTK bool "Early printk" if EXPERT - depends on SYS_HAS_EARLY_PRINTK + depends on SYS_HAS_EARLY_PRINTK || DEBUG_LL default y help This option enables special console drivers which allow the kernel diff --git a/arch/mips/kernel/early_printk.c b/arch/mips/kernel/early_printk.c index 4a1647ddfbd9..c3f3b0a930f0 100644 --- a/arch/mips/kernel/early_printk.c +++ b/arch/mips/kernel/early_printk.c @@ -14,6 +14,24 @@ #include +#ifdef CONFIG_DEBUG_LL +extern void printascii(const char *); + +static void early_console_write(struct console *con, const char *s, unsigned n) +{ + char buf[128]; + + while (n) { + unsigned int l = min(n, sizeof(buf)-1); + + memcpy(buf, s, l); + buf[l] = 0; + s += l; + n -= l; + printascii(buf); + } +} +#else static void early_console_write(struct console *con, const char *s, unsigned n) { while (n-- && *s) { @@ -23,6 +41,7 @@ static void early_console_write(struct console *con, const char *s, unsigned n) s++; } } +#endif static struct console early_console_prom = { .name = "early", From patchwork Sun Oct 29 02:53:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiaxun Yang X-Patchwork-Id: 159372 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:d641:0:b0:403:3b70:6f57 with SMTP id cy1csp1698958vqb; Sun, 29 Oct 2023 06:58:09 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEUG1KIRc+lbVN1fN4yrFqw+zMN48vxbCBHdYIUBswN1unDPYHNoY+E/hAEo0bMN5Lzdj+K X-Received: by 2002:a05:6a20:729e:b0:15e:bb88:b771 with SMTP id o30-20020a056a20729e00b0015ebb88b771mr6754831pzk.37.1698587888800; Sun, 29 Oct 2023 06:58:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1698587888; cv=none; d=google.com; s=arc-20160816; b=XYCXGG640/w1H8owD3Ex0eXgFU99nj2HKpvC9Yv+BHhUQpnSBAygDQhzaVq41Wvla7 ogEqktghTEDhDz0L2RYtJ7LnB9oYAubz0hBNNndZgM2dbjMWROMch48SvUy8OH/BYFkU epBKDggRCPiok0vv+Mdxjjj81oEMhYHfYQ+cKvthvcyi9dwJKFQtO8maGdtdRn1DXeGs 2sTUHgqu70A1aweSm5Dp4PuoHCea7vJxWjy8mQFefBPF/jWCJzaPIFYq9tsdBRDYJf5M D69tq7GOvQABHKBglLXTsennJezFbZZJ1J9jQ/kHCCpFq7AdC48AMGpdTljXjcWg9g+C e0ew== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :feedback-id:dkim-signature:dkim-signature; bh=jYhHcxouhYM9tIGaxyoEYXSEAO4S1yV0g4KJ6UP/5LE=; fh=Dii/wXcZb/mJUCmsdlZbBl/o0XRcaQ9S/xOY9NGTLc4=; b=fxSbOI1jlb/GDVQoY6XVPyrIH3bkxPqVUVExL/eMBI8LzViKL7wZkY0tLcBVoSeVS8 erONtCYh7Z5fTAV+ezv3UUxp7ybM20AxsdnI+pmc5Y6hXnBcWIC26jI4CKrt0piS5s/5 H6/ETUUNeLlQiW9/qj1M4heL9NZX5SvLsR0NQYkKD1dlBAXnZNlM5q/ffQpEFklOc9tw eTzwJmdno3Nit5t+n6HJ/gcOEnvzW1F7t8qxf3VJdLJGt/W9uW4vg261O0IxHn1qDGZO DZbkJUGCxhZ9GVsEQ1zWyGkwGrG3879d25SjYYKM360lpJXJfOluPxZaRAyv7unCJTZf AxpQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@flygoat.com header.s=fm1 header.b=nZfuiwP+; dkim=pass header.i=@messagingengine.com header.s=fm3 header.b=ZabQEQ8l; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=flygoat.com Received: from snail.vger.email (snail.vger.email. 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Sun, 29 Oct 2023 09:45:55 -0400 (EDT) From: Jiaxun Yang Date: Sun, 29 Oct 2023 02:53:05 +0000 Subject: [PATCH 4/8] MIPS: debug: Provide an early exception vector for low-level debugging MIME-Version: 1.0 Message-Id: <20231029-mips_debug_ll-v1-4-d7a491e8c278@flygoat.com> References: <20231029-mips_debug_ll-v1-0-d7a491e8c278@flygoat.com> In-Reply-To: <20231029-mips_debug_ll-v1-0-d7a491e8c278@flygoat.com> To: Thomas Bogendoerfer Cc: linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, Jiaxun Yang X-Mailer: b4 0.12.4 X-Spam-Status: No, score=-0.6 required=5.0 tests=BAYES_00,DATE_IN_PAST_06_12, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_PASS,SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Sun, 29 Oct 2023 06:58:08 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1781098493927439129 X-GMAIL-MSGID: 1781098493927439129 This is helpful for debugging of early boot crash when exceptions happens before trap_init(), or for debugging SMP bringup code. It will install exception handler very early on kernel_entry by setting ebase or copy itself to start of CKSEG0, and print off exception vectors and other status registers like: Low level exception: ffffffff8011e180 GlobalNumber: 0x00000000 EBase: 0xffffffff8011e000 Xcontext: 0x0000000000000000 Cause: 0x0000000c Status: 0x14000082 EPC: 0xffffffff80d324e0 BadVAddr: 0x0000000000000000 BadInstr: 0xac000000 Signed-off-by: Jiaxun Yang --- arch/mips/Kconfig.debug | 9 ++ arch/mips/kernel/Makefile | 1 + arch/mips/kernel/debug-vec.S | 194 +++++++++++++++++++++++++++++++++++++++++++ arch/mips/kernel/head.S | 4 + 4 files changed, 208 insertions(+) diff --git a/arch/mips/Kconfig.debug b/arch/mips/Kconfig.debug index 6ef42edc7d67..323ad3ec643b 100644 --- a/arch/mips/Kconfig.debug +++ b/arch/mips/Kconfig.debug @@ -180,6 +180,15 @@ config DEBUG_LL this option should not be enabled for kernels that are intended to be portable. +config DEBUG_LL_EXCEPT + bool "Kernel low-level debugging of exceptions" + depends on DEBUG_LL + help + Say Y here to enable debugging prints for low-level exceptions. + This is helpful if you are debugging a early boot crash when + exceptions happens before trap_init(), or if you are debugging + SMP bringup code. + choice prompt "Kernel low-level debugging port" depends on DEBUG_LL diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile index 10c0a224efe4..400e35f9f82f 100644 --- a/arch/mips/kernel/Makefile +++ b/arch/mips/kernel/Makefile @@ -79,6 +79,7 @@ obj-$(CONFIG_MIPS32_N32) += scall64-n32.o signal_n32.o obj-$(CONFIG_MIPS32_O32) += scall64-o32.o signal_o32.o obj-$(CONFIG_DEBUG_LL) += debug.o +obj-$(CONFIG_DEBUG_LL_EXCEPT) += debug-vec.o obj-$(CONFIG_KGDB) += kgdb.o obj-$(CONFIG_PROC_FS) += proc.o diff --git a/arch/mips/kernel/debug-vec.S b/arch/mips/kernel/debug-vec.S new file mode 100644 index 000000000000..4530bf3d5b75 --- /dev/null +++ b/arch/mips/kernel/debug-vec.S @@ -0,0 +1,194 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2023, Jiaxun Yang + * MIPS Low level exception vectors and handler + */ + +#include +#include +#include +#include + + +.balign 0x1000 +LEAF(debug_ll_vecs) + .set push + .set noreorder + move a0, zero + PTR_LA t9, debug_ll_exception + jalr t9 + nop + b . + nop + +.org 0x80 + move a0, zero + PTR_LA t9, debug_ll_exception + jalr t9 + nop + b . + nop + +.org 0x100 + move a0, zero + PTR_LA t9, debug_ll_exception + jalr t9 + nop + b . + nop + +.org 0x180 + move a0, zero + PTR_LA t9, debug_ll_exception + jalr t9 + nop + b . + nop + +.org 0x200 + move a0, zero + PTR_LA t9, debug_ll_exception + jalr t9 + nop + b . + nop + +.org 0x280 + move a0, zero + PTR_LA t9, debug_ll_exception + jalr t9 + nop + b . + nop + +.org 0x300 + move a0, zero + PTR_LA t9, debug_ll_exception + jalr t9 + nop + b . + nop + +.org 0x380 + move a0, zero + PTR_LA t9, debug_ll_exception + jalr t9 + nop + b . + nop + +.org 0x400 + move a0, zero + PTR_LA t9, debug_ll_exception + jalr t9 + nop + b . + nop + +.org 0x480 + move a0, zero + PTR_LA t9, debug_ll_exception + jalr t9 + nop + b . + nop + + .set pop +END(debug_ll_vecs) + + +/** + * debug_ll_exception() - dump relevant exception state to LL outputs + * @a0: pointer to NULL-terminated ASCII string naming the exception + * + * If a0 is NULL, it will print out exception vector number calculated + * from the ra insted. This is useful for debugging exceptions that + * happen before the exception handler is set up, or routed from BEV. + */ +LEAF(debug_ll_exception) + move k0, ra + move k1, a0 + PTR_LA t3, printascii + + PTR_LA a0, str_newline + jalr t3 /* Call printascii */ + PTR_LA a0, str_exp + jalr t3 /* Call printascii */ + beqz k1, 1f + move a0, k1 + jalr t3 /* Call printascii */ + b 2f +1: + PTR_SRL a0, k0, 7 + PTR_SLL a0, a0, 7 + PTR_LA t2, printhexl + jalr t2 +2: + PTR_LA a0, str_newline + jalr t3 /* Call printascii */ + PTR_LA a0, str_newline + jalr t3 /* Call printascii */ + +#define DUMP_COP0_REG(reg, name, sz, _mfc0) \ + PTR_LA a0, 8f; \ + jalr t3; \ + _mfc0 a0, reg; \ + PTR_LA t2, printhex##sz; \ + jalr t2; \ + PTR_LA a0, str_newline; \ + jalr t3; \ + TEXT(name) + +#if defined(CONFIG_SMP) && defined(CONFIG_CPU_MIPSR6) + DUMP_COP0_REG(CP0_GLOBALNUMBER, "GlobalNumber: 0x", 4, mfc0) +#endif +#if MIPS_ISA_REV >= 2 + DUMP_COP0_REG(CP0_EBASE, "EBase: 0x", l, MFC0) +#endif +#ifdef CONFIG_64BIT + DUMP_COP0_REG(CP0_XCONTEXT, "Xcontext: 0x", 8, dmfc0) +#else + DUMP_COP0_REG(CP0_CONTEXT, "Context: 0x", 4, mfc0) +#endif + DUMP_COP0_REG(CP0_CAUSE, "Cause: 0x", 4, mfc0) + DUMP_COP0_REG(CP0_STATUS, "Status: 0x", 4, mfc0) + DUMP_COP0_REG(CP0_EPC, "EPC: 0x", l, MFC0) + DUMP_COP0_REG(CP0_BADVADDR, "BadVAddr: 0x", l, MFC0) +#if MIPS_ISA_REV >= 6 + DUMP_COP0_REG(CP0_BADINSTR, "BadInstr: 0x", 4, mfc0) +#endif + PTR_LA a0, str_newline + jalr t3 /* Call printascii */ + jr k0 + END(debug_ll_exception) + +.pushsection .rodata.str +str_exp: .asciiz "Low level exception: " +str_newline: .asciiz "\r\n" +.popsection + +NESTED(setup_debug_ll_exception, 0, ra) + PTR_LA t0, debug_ll_vecs +#if MIPS_ISA_REV >= 2 + /* Set ebase to debug_ll_vecs */ +#if defined (CONFIG_64BIT) && !defined(KBUILD_64BIT_SYM32) + ori t0, MIPS_EBASE_WG +#endif + MTC0 t0, CP0_EBASE +#else + /* Copy debug_ll_vecs to start of KSEG0 */ + PTR_LI t1, CKSEG0 + PTR_ADDIU t2, t0, 0x400 /* Only copy 0x400 as that is what reserved on old systems */ +copy_word: + PTR_LW t3, 0(t0) + PTR_SW t3, 0(t1) + PTR_ADDIU t0, t0, PTRSIZE + PTR_ADDIU t1, t1, PTRSIZE + PTR_BNE t0, t2, copy_word +#endif + /* Clear BEV bit in status register */ + mfc0 t0, CP0_STATUS + and t0, t0, ~ST0_BEV + mtc0 t0, CP0_STATUS + jr ra + END(setup_debug_ll_exception) diff --git a/arch/mips/kernel/head.S b/arch/mips/kernel/head.S index b825ed4476c7..9be1c4ce6324 100644 --- a/arch/mips/kernel/head.S +++ b/arch/mips/kernel/head.S @@ -106,6 +106,10 @@ NESTED(kernel_entry, 16, sp) # kernel entry point LONG_S a2, fw_arg2 LONG_S a3, fw_arg3 +#ifdef CONFIG_DEBUG_LL_EXCEPT + jal setup_debug_ll_exception +#endif + MTC0 zero, CP0_CONTEXT # clear context register #ifdef CONFIG_64BIT MTC0 zero, CP0_XCONTEXT From patchwork Sun Oct 29 02:53:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiaxun Yang X-Patchwork-Id: 159366 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:d641:0:b0:403:3b70:6f57 with SMTP id cy1csp1695132vqb; Sun, 29 Oct 2023 06:46:45 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEO92w1aLL95IvKLXT7iXKUQZFa6F9dCsoBFXrpFPjqrbftxUacNbBALpiw8NqLMCy1Iv3D X-Received: by 2002:a05:6e02:148e:b0:357:a23b:ab96 with SMTP id n14-20020a056e02148e00b00357a23bab96mr11907535ilk.4.1698587204883; Sun, 29 Oct 2023 06:46:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1698587204; cv=none; d=google.com; s=arc-20160816; b=bUWjFTaPT+JvDkU4tXC8ik6GZakqsBposKI3eYJh4H+Bx/09+Vq2zs0HpHJRRIo5Hc Iln+KyVqetiDoGwd6cgUxteqxfvvezzyLHctj8NaURUQQQarvU8OA2wUU8kt7TNAB4td fsP2+CnL58NIIb/Maijt8N94hjC0uzmmx2RBiquQ0IIW3g9YTSeFhpad4OLw6YVUVchd 2Vk4PQPnUDqEWdcMpbKswjYvwhhX+QQKc07Dpk2cvbw6TIHrhsIzIr32IRbZkxdUqz9S LZLZf+JYI/nFpWVtQ/Tu1qS2/DB6Lg1W7TT/MpcL4sVN/mzxloBocAQxmPYK5DedOxPK G0iQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :feedback-id:dkim-signature:dkim-signature; bh=nwDi7G8YoCLKQtKQNySfnFuMFDqBzeBBPzRHijBNdnI=; fh=Dii/wXcZb/mJUCmsdlZbBl/o0XRcaQ9S/xOY9NGTLc4=; b=kCP7597KraKQoQr7TdD8UFpqiW6oGsoE9l8i2XbWbeSCLJBucODoPqxUvt29Iv8npS LQmzn++x0L70VEXvuGtJrq7VolX59DMBxMRRYU/dQzsDU+l1L5RUuwLK4dDUgyl7k3dX TcTUjJBmwk7ZyNfFpLI37zJdNVXtuQW55JZ8LmHibmJhO3KAIJzR11RRKCsY8z8tkOFG ucHnaKjZfN8KJ4T0ynQk4mgEsjSsf2tRTVriU/J02lqK1V+XIO+K9VEOFEOO+ADEWExk Yavo+zBqxuA82AvRwZKB2Fy5xEXjvrkuwedQ+YQ8xcr7/E8T7VpdYw9f0LZQCNzKrnr4 xoiw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@flygoat.com header.s=fm1 header.b=yvHc5lKk; dkim=pass header.i=@messagingengine.com header.s=fm3 header.b=tGuQM+Sk; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:4 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=flygoat.com Received: from howler.vger.email (howler.vger.email. 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Sun, 29 Oct 2023 09:45:57 -0400 (EDT) From: Jiaxun Yang Date: Sun, 29 Oct 2023 02:53:06 +0000 Subject: [PATCH 5/8] MIPS: debug_ll: Add Kconfig symbols for some 8250 uarts MIME-Version: 1.0 Message-Id: <20231029-mips_debug_ll-v1-5-d7a491e8c278@flygoat.com> References: <20231029-mips_debug_ll-v1-0-d7a491e8c278@flygoat.com> In-Reply-To: <20231029-mips_debug_ll-v1-0-d7a491e8c278@flygoat.com> To: Thomas Bogendoerfer Cc: linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, Jiaxun Yang X-Mailer: b4 0.12.4 X-Spam-Status: No, score=0.3 required=5.0 tests=DATE_IN_PAST_06_12,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on howler.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (howler.vger.email [0.0.0.0]); Sun, 29 Oct 2023 06:46:33 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1781097776792804882 X-GMAIL-MSGID: 1781097776792804882 Define platform symbols for all 8250 style uart type supported by zboot, plus Loongson-2K and boston. Signed-off-by: Jiaxun Yang --- arch/mips/Kconfig.debug | 56 +++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 56 insertions(+) diff --git a/arch/mips/Kconfig.debug b/arch/mips/Kconfig.debug index 323ad3ec643b..3609d298a9eb 100644 --- a/arch/mips/Kconfig.debug +++ b/arch/mips/Kconfig.debug @@ -209,6 +209,54 @@ choice selecting one of the platform specific options below if you know the parameters for the port. + config DEBUG_BOSTON_UART + bool "Kernel low-level debugging messages via Boston UART" + depends on MIPS_GENERIC_KERNEL + select DEBUG_UART_8250 + help + Say Y here if you want kernel low-level debugging support + on IMG Boston board. + + config DEBUG_MALTA_UART + bool "Kernel low-level debugging messages via malta UART" + depends on MIPS_MALTA + select DEBUG_UART_8250 + help + Say Y here if you want kernel low-level debugging support + on MTI malta board. + + config DEBUG_AR71XX_UART + bool "Kernel low-level debugging messages via AR71XX UART" + depends on ATH79 + select DEBUG_UART_8250 + help + Say Y here if you want kernel low-level debugging support + on AR71xx based platforms. + + config DEBUG_LOONGSON3_UART + bool "Kernel low-level debugging messages via Loongson-3 UART" + depends on MACH_LOONGSON64 + select DEBUG_UART_8250 + help + Say Y here if you want kernel low-level debugging support + on Loongson-3 systems. + + config DEBUG_LOONGSON2K_UART + bool "Kernel low-level debugging messages via Loongson 2K UART" + depends on MACH_LOONGSON64 + select DEBUG_UART_8250 + help + Say Y here if you want kernel low-level debugging support + on Loongson-2K SoCs. + + config DEBUG_INGENIC_UART + bool "Kernel low-level debugging messages via Ingenic UART" + depends on MACH_INGENIC_SOC + select DEBUG_UART_8250 + help + Say Y here if you want kernel low-level debugging support + on uart0 of Ingenic SoCs. + endchoice config DEBUG_LL_INCLUDE @@ -239,6 +287,12 @@ config DEBUG_UART_FLOW_CONTROL config DEBUG_UART_PHYS hex "Physical base address of debug UART" depends on DEBUG_LL_UART + default 0x17ffe000 if DEBUG_BOSTON_UART + default 0x1fd003f8 if DEBUG_MALTA_UART + default 0x18020000 if DEBUG_AR71XX_UART + default 0x1fd003f8 if DEBUG_LOONGSON3_UART + default 0x1fe00000 if DEBUG_LOONGSON2K_UART + default 0x10030000 if DEBUG_INGENIC_UART help This is the physical base address of the debug UART. It must be accessible from unmapped kernel space (i.e. KSEG1 for 32bit kernels @@ -247,6 +301,8 @@ config DEBUG_UART_PHYS config DEBUG_UART_8250_SHIFT int "Register offset shift for the 8250 debug UART" depends on DEBUG_LL_UART_8250 || DEBUG_UART_8250 + default 1 if DEBUG_MALTA_UART || DEBUG_LOONGSON3_UART || \ + DEBUG_LOONGSON2K_UART default 2 config DEBUG_UART_8250_WIDTH From patchwork Sun Oct 29 02:53:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiaxun Yang X-Patchwork-Id: 159369 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:d641:0:b0:403:3b70:6f57 with SMTP id cy1csp1695321vqb; Sun, 29 Oct 2023 06:47:11 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGqp53CC0iYjMdIV30NIF3ezRRWUjkeKoZc1QFPxFuNSRJKvwTLFaUJDjcIYj8GP2krQL0B X-Received: by 2002:a05:6a21:47c7:b0:16b:f586:3c4 with SMTP id as7-20020a056a2147c700b0016bf58603c4mr9378478pzc.58.1698587231579; Sun, 29 Oct 2023 06:47:11 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1698587231; cv=none; d=google.com; s=arc-20160816; b=JxgnvjhOCvyY/9yaIJftmB+a5S1IG69xLxhJ4nVOvJAhdapF/YlT4bKaVmV5yKpEHu HRiz1WZ412Ott8yb2LNnCaH2Fnaoz2A7TyqhdeFNDNDvRdLNaX+SCBPg1Pn7VwGlsHQP AC+i4Hr3kcUQPVdEuSJPap040iCIFDUp2JIf1EC/zCCWsdn6SazLP0Z7h9LfgX0IGHzt k1SdjTzv1h7RgFtTbfkbpjgLfHffXWDfYRbuOulWKn+L7X4UxajpJtljAQUBfhxsWQ85 rd52m8fyWuP8b8ArqnKl8qdqIrYMGzoYm2Nj2T1G2pXzLaOaBTSvP42WDBe6jNO6d5jv 6HeQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :feedback-id:dkim-signature:dkim-signature; bh=0mxEqLNYpkEtGR4Posnw0M8UDvrKtPSNjSiy1sxuJiA=; fh=Dii/wXcZb/mJUCmsdlZbBl/o0XRcaQ9S/xOY9NGTLc4=; b=Fxi7aub7THVtnWlYbBUh2VWjkdpwiLcyxxdZItunCO/jvIMStJ2HWvdKU2QB5MM7LX qn39+7FyaYsVbBVsoWQy4q/DnqUH2ApkVXZ/1CgdN7hTfNgYSGVahP7kGYvUSS1uqQsh ERsbCTBt8O6OcD/K9InpGniwLdeIAJWgeRkVfzIBZYm+aGa7Yy0uGEIig2+PtOpdxilk G4jhDIKPKDSBuvckfeqSUJfdlOm1uotTYt80e2VtRWD7GjURSkuQsqWqGXppDGwdeqsP M8AfuFtaNt8nU70K+HZ8s4SxhFueuv/EBIQjEmvxhKyX1CXR/ygPmM/BPtMuW5mlOwse qfVA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@flygoat.com header.s=fm1 header.b=qcHTygir; dkim=pass header.i=@messagingengine.com header.s=fm3 header.b=bJ55o6IR; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=flygoat.com Received: from snail.vger.email (snail.vger.email. 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Sun, 29 Oct 2023 09:45:59 -0400 (EDT) From: Jiaxun Yang Date: Sun, 29 Oct 2023 02:53:07 +0000 Subject: [PATCH 6/8] MIPS: debug_ll: Implement support for Alchemy uarts MIME-Version: 1.0 Message-Id: <20231029-mips_debug_ll-v1-6-d7a491e8c278@flygoat.com> References: <20231029-mips_debug_ll-v1-0-d7a491e8c278@flygoat.com> In-Reply-To: <20231029-mips_debug_ll-v1-0-d7a491e8c278@flygoat.com> To: Thomas Bogendoerfer Cc: linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, Jiaxun Yang X-Mailer: b4 0.12.4 X-Spam-Status: No, score=-0.6 required=5.0 tests=BAYES_00,DATE_IN_PAST_06_12, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_PASS,SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Sun, 29 Oct 2023 06:46:31 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1781097804748650712 X-GMAIL-MSGID: 1781097804748650712 Alchemy uart is a 8250 derivative that requires some special care on barriers and readys, also they have a wired register layout. Implement it as a special include. Signed-off-by: Jiaxun Yang --- arch/mips/Kconfig.debug | 10 +++++++++ arch/mips/include/debug/alchemy.S | 46 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 56 insertions(+) diff --git a/arch/mips/Kconfig.debug b/arch/mips/Kconfig.debug index 3609d298a9eb..aef116058654 100644 --- a/arch/mips/Kconfig.debug +++ b/arch/mips/Kconfig.debug @@ -257,11 +257,20 @@ choice Say Y here if you want kernel low-level debugging support on uart0 of Ingenic SoCs. + config DEBUG_ALCHEMY_UART + bool "Kernel low-level debugging messages via Alchemy UART" + depends on MIPS_ALCHEMY + select DEBUG_LL_UART + help + Say Y here if you want kernel low-level debugging support + on uart of alchemy SoCs. + endchoice config DEBUG_LL_INCLUDE string default "debug/8250.S" if DEBUG_LL_UART_8250 || DEBUG_UART_8250 + default "debug/alchemy.S" if DEBUG_ALCHEMY_UART default "debug/uhi.S" if DEBUG_MIPS_UHI default "debug-macro.S" @@ -293,6 +302,7 @@ config DEBUG_UART_PHYS default 0x1fd003f8 if DEBUG_LOONGSON3_UART default 0x1fe00000 if DEBUG_LOONGSON2K_UART default 0x10030000 if DEBUG_INGENIC_UART + default 0x11100000 if DEBUG_ALCHEMY_UART help This is the physical base address of the debug UART. It must be accessible from unmapped kernel space (i.e. KSEG1 for 32bit kernels diff --git a/arch/mips/include/debug/alchemy.S b/arch/mips/include/debug/alchemy.S new file mode 100644 index 000000000000..933efc6e828c --- /dev/null +++ b/arch/mips/include/debug/alchemy.S @@ -0,0 +1,46 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2023, Jiaxun Yang + * MIPS Low level debug include file for Au1xxx UART + * Dereived from drivers/tty/serial/8250/8250_rt288x.c + */ + +#include +#include +#include + +#define DEBUG_LL_UART + +#define UART_BASE CKSEG1ADDR(CONFIG_DEBUG_UART_PHYS) + +#define UART_TX_OFS (1 << 2) +#define UART_LSR_OFS (7 << 2) + +# define UART_L lw +# define UART_S sw + + .macro addruart,rd,rx + PTR_LA \rd, UART_BASE + .endm + + .macro senduart,rd,rx + UART_S \rd, UART_TX_OFS(\rx) + sync /* wmb */ + .endm + + .macro busyuart,rd,rx +1002: + UART_L \rd, UART_LSR_OFS(\rx) + andi \rd, \rd, (UART_LSR_TEMT | UART_LSR_THRE) + xori \rd, (UART_LSR_TEMT | UART_LSR_THRE) + sync /* cpu_relax */ + bnez \rd, 1002b + .endm + + .macro waituarttxrdy,rd,rx + busyuart \rd, \rx + .endm + + /* Au1xxx has no MSR */ + .macro waituartcts,rd,rx + .endm From patchwork Sun Oct 29 02:53:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiaxun Yang X-Patchwork-Id: 159368 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:d641:0:b0:403:3b70:6f57 with SMTP id cy1csp1695307vqb; Sun, 29 Oct 2023 06:47:10 -0700 (PDT) X-Google-Smtp-Source: AGHT+IF2h3T3dlQULyd2uZTj3tB0IeoAwhWdNemokVki6loEYjBAeHvKOVknuNxb2qxebOaeWZ9S X-Received: by 2002:a17:90a:e516:b0:280:1dca:f699 with SMTP id t22-20020a17090ae51600b002801dcaf699mr2569950pjy.42.1698587229523; Sun, 29 Oct 2023 06:47:09 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1698587229; cv=none; d=google.com; s=arc-20160816; b=D0/pWb2JqZ5xzbb+Z3K2Bz7LN9vErf6w2n5EoWfObSRmhYR9h8BKhgdRnFoDgvUZf1 BMlWDPr4hgziVROM9ynOcF0mqJjhEpgRQWGEKJQe5HY5Lp0OL9u02Y2kSbHz8f2ls9lF R/8NZApYHG1yMLpwrWnI3Vd/YO0SLF2o92KgU4+pOm9XUfct5VoRDJmVgjWxG/5O+O32 bY3tdgmF2uPwvZm8Nns42bHXgkYEtBKda29XZuUCsJrmKi5EeIZDh/a/oQnWuhZnoZ2U LzC+5sk2I0xbOC+N/lOgG4p2uyq7zgRXIjO2lc35dwdgk/T9fQNmm4ds7+St5Q4svvSm gseA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :feedback-id:dkim-signature:dkim-signature; bh=XPw34Iav2T+hzoHR6mAbmW6CU2TVaqRpR57TvU3su/0=; fh=Dii/wXcZb/mJUCmsdlZbBl/o0XRcaQ9S/xOY9NGTLc4=; b=bk5FirSiNCkDt/fk1Cl0rP7FWe5vLE6QZaGOQpJ2srVriOg2RTx1ye5iCT6DJkmlRZ jXNjb2EblYid4m6d/bbBU7I+AG9DukQGmB8xs9vGmX74YsHBqCEYcshJLlvLWlNVyoRz eH1x9oaHQ+r8XNTZD4h+jXHrnsriwL/xHnBI5QjnCFV3eKyCs3MWnCBolInKPnfp2Czg gDcFSwHQLpfJ9mncjmGMm2o0N5Tis1m1VM1eWfXrR62V1CJ6NHzJKaE2WSl0eg712M2h 6y7BloCbMSOaPA2K4qLT498078aA+TSnhZg5uMCoAicAI8OnrWOCj0dk1G8zywKRqCLO NGOg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@flygoat.com header.s=fm1 header.b=BwY5WxrQ; dkim=pass header.i=@messagingengine.com header.s=fm3 header.b=KQZE+ZZm; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=flygoat.com Received: from snail.vger.email (snail.vger.email. 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Sun, 29 Oct 2023 09:46:01 -0400 (EDT) From: Jiaxun Yang Date: Sun, 29 Oct 2023 02:53:08 +0000 Subject: [PATCH 7/8] MIPS: debug_ll: Implement support for AR933X uarts MIME-Version: 1.0 Message-Id: <20231029-mips_debug_ll-v1-7-d7a491e8c278@flygoat.com> References: <20231029-mips_debug_ll-v1-0-d7a491e8c278@flygoat.com> In-Reply-To: <20231029-mips_debug_ll-v1-0-d7a491e8c278@flygoat.com> To: Thomas Bogendoerfer Cc: linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, Jiaxun Yang X-Mailer: b4 0.12.4 X-Spam-Status: No, score=-0.6 required=5.0 tests=BAYES_00,DATE_IN_PAST_06_12, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_PASS,SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Sun, 29 Oct 2023 06:46:24 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1781097802737281970 X-GMAIL-MSGID: 1781097802737281970 Implement support for AR933X uarts which has it's own register definition. Signed-off-by: Jiaxun Yang --- arch/mips/Kconfig.debug | 9 +++++++++ arch/mips/include/debug/ar933x.S | 41 ++++++++++++++++++++++++++++++++++++++++ 2 files changed, 50 insertions(+) diff --git a/arch/mips/Kconfig.debug b/arch/mips/Kconfig.debug index aef116058654..a6687c503c34 100644 --- a/arch/mips/Kconfig.debug +++ b/arch/mips/Kconfig.debug @@ -265,6 +265,14 @@ choice Say Y here if you want kernel low-level debugging support on uart of alchemy SoCs. + config DEBUG_AR933X_UART + bool "Kernel low-level debugging messages via Alchemy UART" + depends on MIPS_ALCHEMY + select DEBUG_LL_UART + help + Say Y here if you want kernel low-level debugging support + on uart of AR933X SoCs. + endchoice config DEBUG_LL_INCLUDE @@ -303,6 +311,7 @@ config DEBUG_UART_PHYS default 0x1fe00000 if DEBUG_LOONGSON2K_UART default 0x10030000 if DEBUG_INGENIC_UART default 0x11100000 if DEBUG_ALCHEMY_UART + default 0x18020000 if DEBUG_AR933X_UART help This is the physical base address of the debug UART. It must be accessible from unmapped kernel space (i.e. KSEG1 for 32bit kernels diff --git a/arch/mips/include/debug/ar933x.S b/arch/mips/include/debug/ar933x.S new file mode 100644 index 000000000000..1a0449082080 --- /dev/null +++ b/arch/mips/include/debug/ar933x.S @@ -0,0 +1,41 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2023, Jiaxun Yang + * MIPS Low level debug include file for ar933x UART + */ + +#include +#include +#include + +#define DEBUG_LL_UART + +#define UART_BASE CKSEG1ADDR(CONFIG_DEBUG_UART_PHYS) + +# define UART_L lw +# define UART_S sw + + .macro addruart,rd,rx + PTR_LA \rd, UART_BASE + .endm + + .macro senduart,rd,rx + UART_S \rd, AR933X_UART_DATA_REG(\rx) + .endm + + /* CTS and RDY are handled by AR933X_UART_DATA_TX_CSR as well */ + .macro busyuart,rd,rx +1002: + UART_L \rd, AR933X_UART_DATA_REG(\rx) + andi \rd, \rd, (AR933X_UART_DATA_TX_CSR) + xori \rd, (AR933X_UART_DATA_TX_CSR) + bnez \rd, 1002b + .endm + + .macro waituarttxrdy,rd,rx + busyuart \rd, \rx + .endm + + .macro waituartcts,rd,rx + busyuart \rd, \rx + .endm From patchwork Sun Oct 29 02:53:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiaxun Yang X-Patchwork-Id: 159370 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:d641:0:b0:403:3b70:6f57 with SMTP id cy1csp1695324vqb; Sun, 29 Oct 2023 06:47:12 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFGxpb4Ls7ezA6uqqgSHqn59xNKxrYPgMowySJGRTFg+fiSUed7tj7EcL16UNTc40hLpK5y X-Received: by 2002:a17:902:d4cb:b0:1c4:3294:74ca with SMTP id o11-20020a170902d4cb00b001c4329474camr6782866plg.17.1698587232071; Sun, 29 Oct 2023 06:47:12 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1698587232; cv=none; d=google.com; s=arc-20160816; b=tsO6w1X6InKMEBArBLtLCwgegiROEJEGvx64ogyHqGZ/VNFNlpZW0ncCzHPJzQq3Ya KMqa7e37h8vlxCIaNzsmZuNbbGfJbfIkKJZ7bbRHVy24iHFA6F2usR19zPvws6bcMl0d xH6UGPbPAKf8J8iHiz5qsPAxM9aSiOYiMEKwalMnpHKvzEvT0R9Bkt0SHKEtQAFmMuEZ xpA/wTyhilxsswRbo0q6vw3pTEtvRpu4qnj09QJpIVTJu/Nu7mj2/ECQlZFcDMEnSX7m iXSIWmesFxwEZRaX1reISvD0v1NQY4PO/Kvwvd38F90bW3ltAWALdYVPO02Fgni3cIt6 qTEg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :feedback-id:dkim-signature:dkim-signature; bh=VVYQuKINHnFBqLPFiy0T5mZFPavh5Li6d87JmtCWe1g=; fh=Dii/wXcZb/mJUCmsdlZbBl/o0XRcaQ9S/xOY9NGTLc4=; b=mPmYVBl3Bh2Wj3FwxPcXfbuixSk3upNNUYtDjcuTWF8b+l+hF2kWjEPh6aG4s2RDKj EGVC3F7I6eEDcGE5atkyaBNGrEgk65slFdLm26UNZZTbkdMsHZWqCE7ZMLZN/AAu+7Jn 3s5Cl2qOxMBsuvLPLsomanBDLS9/StAPpfJq6EFsIdP637m7ej+ss1PVHeE1EkpHgRPT 13bT0hu0ODAYv/2rCcXd5danB0h3N9AhzSthWB/XSnjNfEffW2ID7J9bjNVNIhOqcHwC Wbgp6qmK/7dkQ7egsJPikkZPGZqpw/09c+0vJp4zFMcPbd3AhOdNZ201PKsYfCbOCIEc IYeQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@flygoat.com header.s=fm1 header.b="r4/sB/RN"; dkim=pass header.i=@messagingengine.com header.s=fm3 header.b="qLprJQ/c"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=flygoat.com Received: from snail.vger.email (snail.vger.email. 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Sun, 29 Oct 2023 09:46:03 -0400 (EDT) From: Jiaxun Yang Date: Sun, 29 Oct 2023 02:53:09 +0000 Subject: [PATCH 8/8] MIPS: zboot: Convert to use debug_ll facilities MIME-Version: 1.0 Message-Id: <20231029-mips_debug_ll-v1-8-d7a491e8c278@flygoat.com> References: <20231029-mips_debug_ll-v1-0-d7a491e8c278@flygoat.com> In-Reply-To: <20231029-mips_debug_ll-v1-0-d7a491e8c278@flygoat.com> To: Thomas Bogendoerfer Cc: linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, Jiaxun Yang X-Mailer: b4 0.12.4 X-Spam-Status: No, score=-0.6 required=5.0 tests=BAYES_00,DATE_IN_PAST_06_12, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_PASS,SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Sun, 29 Oct 2023 06:46:30 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1781097805192316361 X-GMAIL-MSGID: 1781097805192316361 Since now debug_ll facilities can cover all platforms supported by zboot debug print, and it provides extra capability on debugging exceptions, switch zboot to use those facilities. Signed-off-by: Jiaxun Yang --- arch/mips/Kconfig | 12 ++------ arch/mips/Kconfig.debug | 46 +++++++++++++------------------ arch/mips/boot/compressed/Makefile | 9 ++---- arch/mips/boot/compressed/dbg.c | 37 ------------------------- arch/mips/boot/compressed/debug-vec.S | 3 ++ arch/mips/boot/compressed/debug.S | 3 ++ arch/mips/boot/compressed/decompress.c | 6 ++-- arch/mips/boot/compressed/head.S | 6 ++++ arch/mips/boot/compressed/uart-16550.c | 47 -------------------------------- arch/mips/boot/compressed/uart-alchemy.c | 7 ----- arch/mips/boot/compressed/uart-ath79.c | 2 -- arch/mips/boot/compressed/uart-prom.c | 7 ----- 12 files changed, 39 insertions(+), 146 deletions(-) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 76db82542519..0442b44da32f 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -232,7 +232,7 @@ config ATH79 select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_BIG_ENDIAN select SYS_SUPPORTS_MIPS16 - select SYS_SUPPORTS_ZBOOT_UART_PROM + select SYS_SUPPORTS_ZBOOT select USE_OF select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM help @@ -413,7 +413,7 @@ config MACH_INGENIC_SOC bool "Ingenic SoC based machines" select MIPS_GENERIC select MACH_INGENIC - select SYS_SUPPORTS_ZBOOT_UART16550 + select SYS_SUPPORTS_ZBOOT select CPU_SUPPORTS_CPUFREQ select MIPS_EXTERNAL_TIMER @@ -1727,14 +1727,6 @@ config SYS_SUPPORTS_ZBOOT select HAVE_KERNEL_XZ select HAVE_KERNEL_ZSTD -config SYS_SUPPORTS_ZBOOT_UART16550 - bool - select SYS_SUPPORTS_ZBOOT - -config SYS_SUPPORTS_ZBOOT_UART_PROM - bool - select SYS_SUPPORTS_ZBOOT - config CPU_LOONGSON2EF bool select CPU_SUPPORTS_32BIT_KERNEL diff --git a/arch/mips/Kconfig.debug b/arch/mips/Kconfig.debug index a6687c503c34..0ce6d24d05b3 100644 --- a/arch/mips/Kconfig.debug +++ b/arch/mips/Kconfig.debug @@ -79,33 +79,6 @@ config SB1XXX_CORELIS Select compile flags that produce code that can be processed by the Corelis mksym utility and UDB Emulator. -config DEBUG_ZBOOT - bool "Enable compressed kernel support debugging" - depends on DEBUG_KERNEL && SYS_SUPPORTS_ZBOOT - default n - help - If you want to add compressed kernel support to a new board, and the - board supports uart16550 compatible serial port, please select - SYS_SUPPORTS_ZBOOT_UART16550 for your board and enable this option to - debug it. - - If your board doesn't support uart16550 compatible serial port, you - can try to select SYS_SUPPORTS_ZBOOT and use the other methods to - debug it. for example, add a new serial port support just as - arch/mips/boot/compressed/uart-16550.c does. - - After the compressed kernel support works, please disable this option - to reduce the kernel image size and speed up the booting procedure a - little. - -config ZBOOT_INGENIC_UART - int "UART to use for compressed kernel debugging" - depends on DEBUG_ZBOOT && MACH_INGENIC_SOC - default 0 - range 0 4 - help - Specify the UART that should be used for compressed kernel debugging. - config SPINLOCK_TEST bool "Enable spinlock timing tests in debugfs" depends on DEBUG_FS @@ -328,3 +301,22 @@ config DEBUG_UART_8250_WIDTH int "Register width for the 8250 debug UART" depends on DEBUG_LL_UART_8250 || DEBUG_UART_8250 default 1 + +config DEBUG_ZBOOT + bool "Enable compressed kernel debugging via DEBUG_LL output" + depends on DEBUG_LL && SYS_SUPPORTS_ZBOOT + help + Say Y here if you want to enable debugging of a compressed kernel + via the DEBUG_LL output. This is useful if you are debugging + decompressor issues. + + If unsure, say N. + +config DEBUG_ZBOOT_EXCEPT + bool "Enable compressed kernel debugging of exceptions" + depends on DEBUG_ZBOOT + help + Say Y here if you want to enable debugging of exceptions happen + during decompression of a compressed kernel via the DEBUG_LL output. + + If unsure, say N. diff --git a/arch/mips/boot/compressed/Makefile b/arch/mips/boot/compressed/Makefile index 6cc28173bee8..78c65db8dd04 100644 --- a/arch/mips/boot/compressed/Makefile +++ b/arch/mips/boot/compressed/Makefile @@ -43,13 +43,8 @@ KCSAN_SANITIZE := n # decompressor objects (linked with vmlinuz) vmlinuzobjs-y := $(obj)/head.o $(obj)/decompress.o $(obj)/string.o $(obj)/bswapsi.o -ifdef CONFIG_DEBUG_ZBOOT -vmlinuzobjs-$(CONFIG_DEBUG_ZBOOT) += $(obj)/dbg.o -vmlinuzobjs-$(CONFIG_SYS_SUPPORTS_ZBOOT_UART16550) += $(obj)/uart-16550.o -vmlinuzobjs-$(CONFIG_SYS_SUPPORTS_ZBOOT_UART_PROM) += $(obj)/uart-prom.o -vmlinuzobjs-$(CONFIG_MIPS_ALCHEMY) += $(obj)/uart-alchemy.o -vmlinuzobjs-$(CONFIG_ATH79) += $(obj)/uart-ath79.o -endif +vmlinuzobjs-$(CONFIG_DEBUG_ZBOOT) += $(obj)/debug.o +vmlinuzobjs-$(CONFIG_DEBUG_ZBOOT_EXCEPT) += $(obj)/debug-vec.o vmlinuzobjs-$(CONFIG_KERNEL_XZ) += $(obj)/ashldi3.o diff --git a/arch/mips/boot/compressed/dbg.c b/arch/mips/boot/compressed/dbg.c deleted file mode 100644 index f6728a8fd1c3..000000000000 --- a/arch/mips/boot/compressed/dbg.c +++ /dev/null @@ -1,37 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * MIPS-specific debug support for pre-boot environment - * - * NOTE: putc() is board specific, if your board have a 16550 compatible uart, - * please select SYS_SUPPORTS_ZBOOT_UART16550 for your machine. othewise, you - * need to implement your own putc(). - */ -#include -#include - -void __weak putc(char c) -{ -} - -void puts(const char *s) -{ - char c; - while ((c = *s++) != '\0') { - putc(c); - if (c == '\n') - putc('\r'); - } -} - -void puthex(unsigned long long val) -{ - - unsigned char buf[10]; - int i; - for (i = 7; i >= 0; i--) { - buf[i] = "0123456789ABCDEF"[val & 0x0F]; - val >>= 4; - } - buf[8] = '\0'; - puts(buf); -} diff --git a/arch/mips/boot/compressed/debug-vec.S b/arch/mips/boot/compressed/debug-vec.S new file mode 100644 index 000000000000..e7bedb183da8 --- /dev/null +++ b/arch/mips/boot/compressed/debug-vec.S @@ -0,0 +1,3 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#include "../../kernel/debug-vec.S" diff --git a/arch/mips/boot/compressed/debug.S b/arch/mips/boot/compressed/debug.S new file mode 100644 index 000000000000..0cf3da958f7e --- /dev/null +++ b/arch/mips/boot/compressed/debug.S @@ -0,0 +1,3 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#include "../../kernel/debug.S" diff --git a/arch/mips/boot/compressed/decompress.c b/arch/mips/boot/compressed/decompress.c index c5dd415254d3..2317f44307e1 100644 --- a/arch/mips/boot/compressed/decompress.c +++ b/arch/mips/boot/compressed/decompress.c @@ -31,8 +31,10 @@ extern unsigned char __image_begin[], __image_end[]; /* debug interfaces */ #ifdef CONFIG_DEBUG_ZBOOT -extern void puts(const char *s); -extern void puthex(unsigned long long val); +extern void printascii(const char *s); +extern void printhexl(unsigned long val); +#define puts(s) printascii(s) +#define puthex(val) printhexl(val) #else #define puts(s) do {} while (0) #define puthex(val) do {} while (0) diff --git a/arch/mips/boot/compressed/head.S b/arch/mips/boot/compressed/head.S index 5795d0af1e1b..c347d2273ae8 100644 --- a/arch/mips/boot/compressed/head.S +++ b/arch/mips/boot/compressed/head.S @@ -22,6 +22,12 @@ move s2, a2 move s3, a3 +#ifdef CONFIG_DEBUG_ZBOOT_EXCEP + /* Set up the exception vector */ + PTR_LA t9, setup_debug_ll_exception + jalr t9 +#endif + /* Clear BSS */ PTR_LA a0, _edata PTR_LA a2, _end diff --git a/arch/mips/boot/compressed/uart-16550.c b/arch/mips/boot/compressed/uart-16550.c deleted file mode 100644 index 09dcd2c561d9..000000000000 --- a/arch/mips/boot/compressed/uart-16550.c +++ /dev/null @@ -1,47 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * 16550 compatible uart based serial debug support for zboot - */ - -#include -#include - -#include - -#if defined(CONFIG_MACH_LOONGSON64) || defined(CONFIG_MIPS_MALTA) -#define UART_BASE 0x1fd003f8 -#define PORT(offset) (CKSEG1ADDR(UART_BASE) + (offset)) -#endif - -#ifdef CONFIG_MACH_INGENIC -#define INGENIC_UART_BASE_ADDR (0x10030000 + 0x1000 * CONFIG_ZBOOT_INGENIC_UART) -#define PORT(offset) (CKSEG1ADDR(INGENIC_UART_BASE_ADDR) + (4 * offset)) -#endif - -#ifndef IOTYPE -#define IOTYPE char -#endif - -#ifndef PORT -#error please define the serial port address for your own machine -#endif - -static inline unsigned int serial_in(int offset) -{ - return *((volatile IOTYPE *)PORT(offset)) & 0xFF; -} - -static inline void serial_out(int offset, int value) -{ - *((volatile IOTYPE *)PORT(offset)) = value & 0xFF; -} - -void putc(char c) -{ - int timeout = 1000000; - - while (((serial_in(UART_LSR) & UART_LSR_THRE) == 0) && (timeout-- > 0)) - ; - - serial_out(UART_TX, c); -} diff --git a/arch/mips/boot/compressed/uart-alchemy.c b/arch/mips/boot/compressed/uart-alchemy.c deleted file mode 100644 index 8ec63011e7dc..000000000000 --- a/arch/mips/boot/compressed/uart-alchemy.c +++ /dev/null @@ -1,7 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -#include - -void putc(char c) -{ - alchemy_uart_putchar(AU1000_UART0_PHYS_ADDR, c); -} diff --git a/arch/mips/boot/compressed/uart-ath79.c b/arch/mips/boot/compressed/uart-ath79.c deleted file mode 100644 index d686820921be..000000000000 --- a/arch/mips/boot/compressed/uart-ath79.c +++ /dev/null @@ -1,2 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -#include "../../ath79/early_printk.c" diff --git a/arch/mips/boot/compressed/uart-prom.c b/arch/mips/boot/compressed/uart-prom.c deleted file mode 100644 index a8a0a32e05d1..000000000000 --- a/arch/mips/boot/compressed/uart-prom.c +++ /dev/null @@ -1,7 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -#include - -void putc(char c) -{ - prom_putchar(c); -}