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[87.147.86.199]) by smtp.gmail.com with ESMTPSA id bm11-20020a170906c04b00b009a193a5acffsm6061090ejb.121.2023.10.22.23.39.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 22 Oct 2023 23:39:34 -0700 (PDT) Date: Mon, 23 Oct 2023 08:39:33 +0200 From: Philipp Hortmann To: Greg Kroah-Hartman , linux-staging@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH 01/11] staging: rtl8192e: Replace BIT0 to BIT9 with BIT(0) to BIT(9) Message-ID: <07e7de26d364d0781e41892d5738e1b6b93faf53.1698042685.git.philipp.g.hortmann@gmail.com> References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Sun, 22 Oct 2023 23:39:45 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1780527330979034612 X-GMAIL-MSGID: 1780527330979034612 Replace custom macros BIT0 to BIT9 with standard kernel macros BIT(0) to BIT(9) to shorten code. Signed-off-by: Philipp Hortmann --- drivers/staging/rtl8192e/rtl8192e/r8192E_hw.h | 70 +++++++++---------- .../staging/rtl8192e/rtl8192e/r8192E_phy.c | 4 +- drivers/staging/rtl8192e/rtl8192e/rtl_dm.c | 2 +- drivers/staging/rtl8192e/rtl8192e/rtl_pci.c | 2 +- drivers/staging/rtl8192e/rtl819x_Qos.h | 10 --- drivers/staging/rtl8192e/rtllib.h | 4 +- 6 files changed, 41 insertions(+), 51 deletions(-) diff --git a/drivers/staging/rtl8192e/rtl8192e/r8192E_hw.h b/drivers/staging/rtl8192e/rtl8192e/r8192E_hw.h index 09f8c76b7e65..80f44ffe00e6 100644 --- a/drivers/staging/rtl8192e/rtl8192e/r8192E_hw.h +++ b/drivers/staging/rtl8192e/rtl8192e/r8192E_hw.h @@ -43,7 +43,7 @@ enum _RTL8192PCI_HW { PMR = 0x00c, EPROM_CMD = 0x00e, -#define EPROM_CMD_9356SEL BIT4 +#define EPROM_CMD_9356SEL BIT(4) #define EPROM_CMD_OPERATING_MODE_SHIFT 6 #define EPROM_CMD_NORMAL 0 #define EPROM_CMD_PROGRAM 2 @@ -67,10 +67,10 @@ enum _RTL8192PCI_HW { #define RCR_AMF BIT20 #define RCR_ADF BIT18 #define RCR_AICV BIT12 -#define RCR_AB BIT3 -#define RCR_AM BIT2 -#define RCR_APM BIT1 -#define RCR_AAP BIT0 +#define RCR_AB BIT(3) +#define RCR_AM BIT(2) +#define RCR_APM BIT(1) +#define RCR_AAP BIT(0) #define RCR_MXDMA_OFFSET 8 #define RCR_FIFO_OFFSET 13 SLOT_TIME = 0x049, @@ -95,11 +95,11 @@ enum _RTL8192PCI_HW { #define TOTAL_CAM_ENTRY 32 WCAMI = 0x0A4, SECR = 0x0B0, -#define SCR_TxUseDK BIT0 -#define SCR_RxUseDK BIT1 -#define SCR_TxEncEnable BIT2 -#define SCR_RxDecEnable BIT3 -#define SCR_NoSKMC BIT5 +#define SCR_TxUseDK BIT(0) +#define SCR_RxUseDK BIT(1) +#define SCR_TxEncEnable BIT(2) +#define SCR_RxDecEnable BIT(3) +#define SCR_NoSKMC BIT(5) SWREGULATOR = 0x0BD, INTA_MASK = 0x0f4, #define IMR_TBDOK BIT27 @@ -110,19 +110,19 @@ enum _RTL8192PCI_HW { #define IMR_RXFOVW BIT12 #define IMR_RDU BIT11 #define IMR_RXCMDOK BIT10 -#define IMR_BDOK BIT9 -#define IMR_HIGHDOK BIT8 -#define IMR_COMDOK BIT7 -#define IMR_MGNTDOK BIT6 -#define IMR_HCCADOK BIT5 -#define IMR_BKDOK BIT4 -#define IMR_BEDOK BIT3 -#define IMR_VIDOK BIT2 -#define IMR_VODOK BIT1 -#define IMR_ROK BIT0 +#define IMR_BDOK BIT(9) +#define IMR_HIGHDOK BIT(8) +#define IMR_COMDOK BIT(7) +#define IMR_MGNTDOK BIT(6) +#define IMR_HCCADOK BIT(5) +#define IMR_BKDOK BIT(4) +#define IMR_BEDOK BIT(3) +#define IMR_VIDOK BIT(2) +#define IMR_VODOK BIT(1) +#define IMR_ROK BIT(0) ISR = 0x0f8, TP_POLL = 0x0fd, -#define TP_POLL_CQ BIT5 +#define TP_POLL_CQ BIT(5) PSR = 0x0ff, CPU_GEN = 0x100, #define CPU_CCK_LOOPBACK 0x00030000 @@ -136,9 +136,9 @@ enum _RTL8192PCI_HW { #define CPU_GEN_NO_LOOPBACK_MSK 0xFFF8FFFF #define CPU_GEN_NO_LOOPBACK_SET 0x00080000 ACM_HW_CTRL = 0x171, -#define ACM_HW_BEQ_EN BIT1 -#define ACM_HW_VIQ_EN BIT2 -#define ACM_HW_VOQ_EN BIT3 +#define ACM_HW_BEQ_EN BIT(1) +#define ACM_HW_VIQ_EN BIT(2) +#define ACM_HW_VOQ_EN BIT(3) RQPN1 = 0x180, RQPN2 = 0x184, RQPN3 = 0x188, @@ -159,7 +159,7 @@ enum _RTL8192PCI_HW { WFCRC2 = 0x2f8, BW_OPMODE = 0x300, -#define BW_OPMODE_20MHZ BIT2 +#define BW_OPMODE_20MHZ BIT(2) IC_VERRSION = 0x301, MSR = 0x303, #define MSR_LINK_MASK (BIT(1) | BIT(0)) @@ -178,16 +178,16 @@ enum _RTL8192PCI_HW { TSFR = 0x308, RRSR = 0x310, #define RRSR_SHORT_OFFSET 23 -#define RRSR_1M BIT0 -#define RRSR_2M BIT1 -#define RRSR_5_5M BIT2 -#define RRSR_11M BIT3 -#define RRSR_6M BIT4 -#define RRSR_9M BIT5 -#define RRSR_12M BIT6 -#define RRSR_18M BIT7 -#define RRSR_24M BIT8 -#define RRSR_36M BIT9 +#define RRSR_1M BIT(0) +#define RRSR_2M BIT(1) +#define RRSR_5_5M BIT(2) +#define RRSR_11M BIT(3) +#define RRSR_6M BIT(4) +#define RRSR_9M BIT(5) +#define RRSR_12M BIT(6) +#define RRSR_18M BIT(7) +#define RRSR_24M BIT(8) +#define RRSR_36M BIT(9) #define RRSR_48M BIT10 #define RRSR_54M BIT11 #define BRSR_AckShortPmb BIT23 diff --git a/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c b/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c index a5e16bf99cd6..4d12d7385041 100644 --- a/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c +++ b/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c @@ -965,7 +965,7 @@ void rtl92e_init_gain(struct net_device *dev, u8 Operation) void rtl92e_set_rf_off(struct net_device *dev) { - rtl92e_set_bb_reg(dev, rFPGA0_XA_RFInterfaceOE, BIT4, 0x0); + rtl92e_set_bb_reg(dev, rFPGA0_XA_RFInterfaceOE, BIT(4), 0x0); rtl92e_set_bb_reg(dev, rFPGA0_AnalogParameter4, 0x300, 0x0); rtl92e_set_bb_reg(dev, rFPGA0_AnalogParameter1, 0x18, 0x0); rtl92e_set_bb_reg(dev, rOFDM0_TRxPathEnable, 0xf, 0x0); @@ -1016,7 +1016,7 @@ static bool _rtl92e_set_rf_power_state(struct net_device *dev, 0x4, 0x1); priv->hw_rf_off_action = 0; rtl92e_set_bb_reg(dev, rFPGA0_XA_RFInterfaceOE, - BIT4, 0x1); + BIT(4), 0x1); rtl92e_set_bb_reg(dev, rFPGA0_AnalogParameter4, 0x300, 0x3); rtl92e_set_bb_reg(dev, rFPGA0_AnalogParameter1, diff --git a/drivers/staging/rtl8192e/rtl8192e/rtl_dm.c b/drivers/staging/rtl8192e/rtl8192e/rtl_dm.c index 97de404840df..e88963a4b1f1 100644 --- a/drivers/staging/rtl8192e/rtl8192e/rtl_dm.c +++ b/drivers/staging/rtl8192e/rtl8192e/rtl_dm.c @@ -1247,7 +1247,7 @@ static void _rtl92e_dm_check_rf_ctrl_gpio(void *data) tmp1byte = rtl92e_readb(dev, GPI); - rf_power_state_to_set = (tmp1byte & BIT1) ? rf_on : rf_off; + rf_power_state_to_set = (tmp1byte & BIT(1)) ? rf_on : rf_off; if (priv->hw_radio_off && (rf_power_state_to_set == rf_on)) { netdev_info(dev, "gpiochangeRF - HW Radio ON\n"); diff --git a/drivers/staging/rtl8192e/rtl8192e/rtl_pci.c b/drivers/staging/rtl8192e/rtl8192e/rtl_pci.c index 0bc3e013001e..1aa73561581b 100644 --- a/drivers/staging/rtl8192e/rtl8192e/rtl_pci.c +++ b/drivers/staging/rtl8192e/rtl8192e/rtl_pci.c @@ -21,7 +21,7 @@ static void _rtl92e_parse_pci_configuration(struct pci_dev *pdev, pcie_capability_read_word(priv->pdev, PCI_EXP_LNKCTL, &link_ctrl_reg); pci_read_config_byte(pdev, 0x98, &tmp); - tmp |= BIT4; + tmp |= BIT(4); pci_write_config_byte(pdev, 0x98, tmp); tmp = 0x17; diff --git a/drivers/staging/rtl8192e/rtl819x_Qos.h b/drivers/staging/rtl8192e/rtl819x_Qos.h index 37677366c397..519a3160933b 100644 --- a/drivers/staging/rtl8192e/rtl819x_Qos.h +++ b/drivers/staging/rtl8192e/rtl819x_Qos.h @@ -7,16 +7,6 @@ #ifndef __INC_QOS_TYPE_H #define __INC_QOS_TYPE_H -#define BIT0 0x00000001 -#define BIT1 0x00000002 -#define BIT2 0x00000004 -#define BIT3 0x00000008 -#define BIT4 0x00000010 -#define BIT5 0x00000020 -#define BIT6 0x00000040 -#define BIT7 0x00000080 -#define BIT8 0x00000100 -#define BIT9 0x00000200 #define BIT10 0x00000400 #define BIT11 0x00000800 #define BIT12 0x00001000 diff --git a/drivers/staging/rtl8192e/rtllib.h b/drivers/staging/rtl8192e/rtllib.h index 9d141aad8cd5..7f0aa0779c78 100644 --- a/drivers/staging/rtl8192e/rtllib.h +++ b/drivers/staging/rtl8192e/rtllib.h @@ -91,7 +91,7 @@ static inline void *netdev_priv_rsl(struct net_device *dev) #define IE_CISCO_FLAG_POSITION 0x08 #define SUPPORT_CKIP_MIC 0x08 #define SUPPORT_CKIP_PK 0x10 -#define RT_RF_OFF_LEVL_HALT_NIC BIT3 +#define RT_RF_OFF_LEVL_HALT_NIC BIT(3) #define RT_IN_PS_LEVEL(psc, _PS_FLAG) \ ((psc->CurPsLevel & _PS_FLAG) ? true : false) #define RT_CLEAR_PS_LEVEL(psc, _PS_FLAG) \ @@ -341,7 +341,7 @@ enum rt_op_mode { /* QOS control */ #define RTLLIB_QCTL_TID 0x000F -#define FC_QOS_BIT BIT7 +#define FC_QOS_BIT BIT(7) #define IsDataFrame(pdu) (((pdu[0] & 0x0C) == 0x08) ? true : false) #define IsLegacyDataFrame(pdu) (IsDataFrame(pdu) && (!(pdu[0]&FC_QOS_BIT))) #define IsQoSDataFrame(pframe) \ From patchwork Mon Oct 23 06:39:41 2023 Content-Type: text/plain; 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[87.147.86.199]) by smtp.gmail.com with ESMTPSA id ss17-20020a170907039100b0099cb349d570sm6131450ejb.185.2023.10.22.23.39.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 22 Oct 2023 23:39:43 -0700 (PDT) Date: Mon, 23 Oct 2023 08:39:41 +0200 From: Philipp Hortmann To: Greg Kroah-Hartman , linux-staging@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH 02/11] staging: rtl8192e: Replace BIT10 to BIT31 with BIT(10) to BIT(31) Message-ID: <294ff1d0b92a474a9ae0d48a54a9f99f14008053.1698042685.git.philipp.g.hortmann@gmail.com> References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Sun, 22 Oct 2023 23:39:58 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1780527346282024517 X-GMAIL-MSGID: 1780527346282024517 Replace custom macros BIT10 to BIT31 with standard kernel macros BIT(10) to BIT(31) to shorten code. Signed-off-by: Philipp Hortmann --- drivers/staging/rtl8192e/rtl8192e/r8192E_hw.h | 34 +++++++++---------- drivers/staging/rtl8192e/rtl8192e/rtl_cam.c | 8 ++--- drivers/staging/rtl8192e/rtl8192e/rtl_dm.c | 20 +++++------ drivers/staging/rtl8192e/rtl819x_Qos.h | 23 ------------- drivers/staging/rtl8192e/rtllib.h | 8 ++--- 5 files changed, 35 insertions(+), 58 deletions(-) diff --git a/drivers/staging/rtl8192e/rtl8192e/r8192E_hw.h b/drivers/staging/rtl8192e/rtl8192e/r8192E_hw.h index 80f44ffe00e6..1b444529b59c 100644 --- a/drivers/staging/rtl8192e/rtl8192e/r8192E_hw.h +++ b/drivers/staging/rtl8192e/rtl8192e/r8192E_hw.h @@ -61,12 +61,12 @@ enum _RTL8192PCI_HW { #define CR_TE 0x04 SIFS = 0x03E, RCR = 0x044, -#define RCR_ONLYERLPKT BIT31 -#define RCR_CBSSID BIT23 -#define RCR_ADD3 BIT21 -#define RCR_AMF BIT20 -#define RCR_ADF BIT18 -#define RCR_AICV BIT12 +#define RCR_ONLYERLPKT BIT(31) +#define RCR_CBSSID BIT(23) +#define RCR_ADD3 BIT(21) +#define RCR_AMF BIT(20) +#define RCR_ADF BIT(18) +#define RCR_AICV BIT(12) #define RCR_AB BIT(3) #define RCR_AM BIT(2) #define RCR_APM BIT(1) @@ -102,14 +102,14 @@ enum _RTL8192PCI_HW { #define SCR_NoSKMC BIT(5) SWREGULATOR = 0x0BD, INTA_MASK = 0x0f4, -#define IMR_TBDOK BIT27 -#define IMR_TBDER BIT26 -#define IMR_TXFOVW BIT15 -#define IMR_TIMEOUT0 BIT14 -#define IMR_BcnInt BIT13 -#define IMR_RXFOVW BIT12 -#define IMR_RDU BIT11 -#define IMR_RXCMDOK BIT10 +#define IMR_TBDOK BIT(27) +#define IMR_TBDER BIT(26) +#define IMR_TXFOVW BIT(15) +#define IMR_TIMEOUT0 BIT(14) +#define IMR_BcnInt BIT(13) +#define IMR_RXFOVW BIT(12) +#define IMR_RDU BIT(11) +#define IMR_RXCMDOK BIT(10) #define IMR_BDOK BIT(9) #define IMR_HIGHDOK BIT(8) #define IMR_COMDOK BIT(7) @@ -188,9 +188,9 @@ enum _RTL8192PCI_HW { #define RRSR_18M BIT(7) #define RRSR_24M BIT(8) #define RRSR_36M BIT(9) -#define RRSR_48M BIT10 -#define RRSR_54M BIT11 -#define BRSR_AckShortPmb BIT23 +#define RRSR_48M BIT(10) +#define RRSR_54M BIT(11) +#define BRSR_AckShortPmb BIT(23) UFWP = 0x318, RATR0 = 0x320, #define RATR_1M 0x00000001 diff --git a/drivers/staging/rtl8192e/rtl8192e/rtl_cam.c b/drivers/staging/rtl8192e/rtl8192e/rtl_cam.c index 76ec4ed967c4..69298c7c129a 100644 --- a/drivers/staging/rtl8192e/rtl8192e/rtl_cam.c +++ b/drivers/staging/rtl8192e/rtl8192e/rtl_cam.c @@ -17,7 +17,7 @@ void rtl92e_cam_reset(struct net_device *dev) { u32 ulcommand = 0; - ulcommand |= BIT31 | BIT30; + ulcommand |= BIT(31) | BIT(30); rtl92e_writel(dev, RWCAM, ulcommand); } @@ -89,13 +89,13 @@ void rtl92e_set_key(struct net_device *dev, u8 EntryNo, u8 KeyIndex, } if (DefaultKey) - usConfig |= BIT15 | (KeyType << 2); + usConfig |= BIT(15) | (KeyType << 2); else - usConfig |= BIT15 | (KeyType << 2) | KeyIndex; + usConfig |= BIT(15) | (KeyType << 2) | KeyIndex; for (i = 0; i < CAM_CONTENT_COUNT; i++) { TargetCommand = i + CAM_CONTENT_COUNT * EntryNo; - TargetCommand |= BIT31 | BIT16; + TargetCommand |= BIT(31) | BIT(16); if (i == 0) { TargetContent = (u32)(*(MacAddr + 0)) << 16 | diff --git a/drivers/staging/rtl8192e/rtl8192e/rtl_dm.c b/drivers/staging/rtl8192e/rtl8192e/rtl_dm.c index e88963a4b1f1..330dafd62656 100644 --- a/drivers/staging/rtl8192e/rtl8192e/rtl_dm.c +++ b/drivers/staging/rtl8192e/rtl8192e/rtl_dm.c @@ -292,25 +292,25 @@ static void _rtl92e_dm_check_rate_adaptive(struct net_device *dev) ht_info->bCurShortGI20MHz); pra->upper_rssi_threshold_ratr = - (pra->upper_rssi_threshold_ratr & (~BIT31)) | - ((bshort_gi_enabled) ? BIT31 : 0); + (pra->upper_rssi_threshold_ratr & (~BIT(31))) | + ((bshort_gi_enabled) ? BIT(31) : 0); pra->middle_rssi_threshold_ratr = - (pra->middle_rssi_threshold_ratr & (~BIT31)) | - ((bshort_gi_enabled) ? BIT31 : 0); + (pra->middle_rssi_threshold_ratr & (~BIT(31))) | + ((bshort_gi_enabled) ? BIT(31) : 0); if (priv->current_chnl_bw != HT_CHANNEL_WIDTH_20) { pra->low_rssi_threshold_ratr = - (pra->low_rssi_threshold_ratr_40M & (~BIT31)) | - ((bshort_gi_enabled) ? BIT31 : 0); + (pra->low_rssi_threshold_ratr_40M & (~BIT(31))) | + ((bshort_gi_enabled) ? BIT(31) : 0); } else { pra->low_rssi_threshold_ratr = - (pra->low_rssi_threshold_ratr_20M & (~BIT31)) | - ((bshort_gi_enabled) ? BIT31 : 0); + (pra->low_rssi_threshold_ratr_20M & (~BIT(31))) | + ((bshort_gi_enabled) ? BIT(31) : 0); } pra->ping_rssi_ratr = - (pra->ping_rssi_ratr & (~BIT31)) | - ((bshort_gi_enabled) ? BIT31 : 0); + (pra->ping_rssi_ratr & (~BIT(31))) | + ((bshort_gi_enabled) ? BIT(31) : 0); if (pra->ratr_state == DM_RATR_STA_HIGH) { high_rssi_thresh_for_ra = pra->high2low_rssi_thresh_for_ra; diff --git a/drivers/staging/rtl8192e/rtl819x_Qos.h b/drivers/staging/rtl8192e/rtl819x_Qos.h index 519a3160933b..a43a5142e96f 100644 --- a/drivers/staging/rtl8192e/rtl819x_Qos.h +++ b/drivers/staging/rtl8192e/rtl819x_Qos.h @@ -7,29 +7,6 @@ #ifndef __INC_QOS_TYPE_H #define __INC_QOS_TYPE_H -#define BIT10 0x00000400 -#define BIT11 0x00000800 -#define BIT12 0x00001000 -#define BIT13 0x00002000 -#define BIT14 0x00004000 -#define BIT15 0x00008000 -#define BIT16 0x00010000 -#define BIT17 0x00020000 -#define BIT18 0x00040000 -#define BIT19 0x00080000 -#define BIT20 0x00100000 -#define BIT21 0x00200000 -#define BIT22 0x00400000 -#define BIT23 0x00800000 -#define BIT24 0x01000000 -#define BIT25 0x02000000 -#define BIT26 0x04000000 -#define BIT27 0x08000000 -#define BIT28 0x10000000 -#define BIT29 0x20000000 -#define BIT30 0x40000000 -#define BIT31 0x80000000 - union qos_tsinfo { u8 charData[3]; struct { diff --git a/drivers/staging/rtl8192e/rtllib.h b/drivers/staging/rtl8192e/rtllib.h index 7f0aa0779c78..dc3488d9693f 100644 --- a/drivers/staging/rtl8192e/rtllib.h +++ b/drivers/staging/rtl8192e/rtllib.h @@ -1085,10 +1085,10 @@ struct rt_pwr_save_ctrl { #define RT_RF_CHANGE_SOURCE u32 -#define RF_CHANGE_BY_SW BIT31 -#define RF_CHANGE_BY_HW BIT30 -#define RF_CHANGE_BY_PS BIT29 -#define RF_CHANGE_BY_IPS BIT28 +#define RF_CHANGE_BY_SW BIT(31) +#define RF_CHANGE_BY_HW BIT(30) +#define RF_CHANGE_BY_PS BIT(29) +#define RF_CHANGE_BY_IPS BIT(28) #define RF_CHANGE_BY_INIT 0 enum country_code_type { From patchwork Mon Oct 23 06:40:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Philipp Hortmann X-Patchwork-Id: 156683 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:ce89:0:b0:403:3b70:6f57 with SMTP id p9csp1112922vqx; Sun, 22 Oct 2023 23:41:30 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEeKhXnuAn29heUc+/IV4hgWIe7qE+IFQSY1gIe8qJ01lsuwa53qVNpSCAnWmeUI3UmuwI5 X-Received: by 2002:a05:6830:4c4:b0:6c6:1e39:e5c6 with SMTP id s4-20020a05683004c400b006c61e39e5c6mr6921964otd.36.1698043289954; Sun, 22 Oct 2023 23:41:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1698043289; cv=none; d=google.com; s=arc-20160816; b=KOaTjfQgQKy7zHSDkxvvHf8De52vtP3dILE+P8KGhsyNWvLgUkAKM1vhkQ8/70C1EC FDZdjBkp8ffcs2ATQVtAfn70kInclkIAXTcK7S0aYGcYjREYAPn5NPyn+FBBzBYt2kpn gNcrc4K+XFCUtWrT1eCpBSSrX5uaiqRW4HjZeTVUGDWV/K2sopU3csYK6nZgjgIYlyBe 1ldKJ4oAX5fy0DfWURHQD4F5JhN5TH1JUi5N9oFSKkH1HQHly9L6qqVcbFBmyIi1rqRr wXvPYCm3AYrOc7TECqS0MvCIBkefmiAAYnOuizDDyqdMjaI3zBZxnJ7T49AkjxzjZtoy YKzA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:in-reply-to:content-disposition:mime-version :references:message-id:subject:to:from:date:dkim-signature; bh=IAg5aOPrhHSpwz3YYSAWUDYY5nI8Lv/rAsYemdyOjfQ=; fh=Sw1rtAM+hKyOoOQVYiiLzcdjc4spg79Z/tN6UmWUAKs=; b=RMwLzOtYS4IMAQkqtTpYi0Fxtz2LYYUUFy1jvETzQPC0Pe+4hzqvZe4EmBS2Xh5+JP s43Cl1kY+ZTuwv3bs+uSPRSv0wlkdVyawHmFZ0V32CZKJXGUx4/Fo19kq8omNm2pqgbG IGQ75CrKLlrkYSZEUeaDIE0fzZDp+Nti/XY+L0+W2+2/uIZRs/mDdoXqKIp7i2n+Yamn qVk2xaEirMzIfxAXR6+ZLrfYF5OfZW/H+wwjn4bsRBzPvQhlGzUKjpLnHTpYtWgPEEVz 3ZLCoXsnN9YWxWZNjVlJ0MCYH7CgFtSmYefC1/Pw0IDbmxFyNBhLnCpjVTxIcDrpD7I2 n1gw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20230601 header.b=UXOEE0os; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.32 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: from agentk.vger.email (agentk.vger.email. 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[87.147.86.199]) by smtp.gmail.com with ESMTPSA id dm28-20020a05640222dc00b0053def18ee8bsm5766997edb.20.2023.10.22.23.40.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 22 Oct 2023 23:40:12 -0700 (PDT) Date: Mon, 23 Oct 2023 08:40:10 +0200 From: Philipp Hortmann To: Greg Kroah-Hartman , linux-staging@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH 06/11] staging: rtl8192e: Replace union tspec_body including embedded struct Message-ID: References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-Spam-Status: No, score=-0.6 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on agentk.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (agentk.vger.email [0.0.0.0]); Sun, 22 Oct 2023 23:40:42 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1780527440562103480 X-GMAIL-MSGID: 1780527440562103480 Replace union tspec_body including embedded struct with embedded union as it has only one element. This will increase readability of the code. Signed-off-by: Philipp Hortmann --- drivers/staging/rtl8192e/rtl819x_BAProc.c | 2 +- drivers/staging/rtl8192e/rtl819x_Qos.h | 6 ------ drivers/staging/rtl8192e/rtl819x_TS.h | 2 +- drivers/staging/rtl8192e/rtl819x_TSProc.c | 14 +++++++------- 4 files changed, 9 insertions(+), 15 deletions(-) diff --git a/drivers/staging/rtl8192e/rtl819x_BAProc.c b/drivers/staging/rtl8192e/rtl819x_BAProc.c index 93b566482149..f01fb7131c7e 100644 --- a/drivers/staging/rtl8192e/rtl819x_BAProc.c +++ b/drivers/staging/rtl8192e/rtl819x_BAProc.c @@ -474,7 +474,7 @@ void rtllib_ts_init_add_ba(struct rtllib_device *ieee, struct tx_ts_record *ts, ba->dialog_token++; ba->ba_param_set.field.amsdu_support = 0; ba->ba_param_set.field.ba_policy = policy; - ba->ba_param_set.field.tid = ts->TsCommonInfo.TSpec.f.ts_info.field.ucTSID; + ba->ba_param_set.field.tid = ts->TsCommonInfo.TSpec.field.ucTSID; ba->ba_param_set.field.buffer_size = 32; ba->ba_timeout_value = 0; ba->ba_start_seq_ctrl.field.seq_num = (ts->TxCurSeq + 3) % 4096; diff --git a/drivers/staging/rtl8192e/rtl819x_Qos.h b/drivers/staging/rtl8192e/rtl819x_Qos.h index ac321952f7b3..73fdf6aaed67 100644 --- a/drivers/staging/rtl8192e/rtl819x_Qos.h +++ b/drivers/staging/rtl8192e/rtl819x_Qos.h @@ -14,12 +14,6 @@ union qos_tsinfo { } field; }; -union tspec_body { - struct { - union qos_tsinfo ts_info; - } f; -}; - struct octet_string { u8 *Octet; u16 Length; diff --git a/drivers/staging/rtl8192e/rtl819x_TS.h b/drivers/staging/rtl8192e/rtl819x_TS.h index a9770592a8c9..ed77763bb1fc 100644 --- a/drivers/staging/rtl8192e/rtl819x_TS.h +++ b/drivers/staging/rtl8192e/rtl819x_TS.h @@ -20,7 +20,7 @@ enum tr_select { struct ts_common_info { struct list_head List; u8 addr[ETH_ALEN]; - union tspec_body TSpec; + union qos_tsinfo TSpec; union qos_tclas TClass[TCLAS_NUM]; u8 TClasProc; u8 TClasNum; diff --git a/drivers/staging/rtl8192e/rtl819x_TSProc.c b/drivers/staging/rtl8192e/rtl819x_TSProc.c index 879e169539c8..969418031f5f 100644 --- a/drivers/staging/rtl8192e/rtl819x_TSProc.c +++ b/drivers/staging/rtl8192e/rtl819x_TSProc.c @@ -94,7 +94,7 @@ static void TsAddBaProcess(struct timer_list *t) static void ResetTsCommonInfo(struct ts_common_info *pTsCommonInfo) { eth_zero_addr(pTsCommonInfo->addr); - memset(&pTsCommonInfo->TSpec, 0, sizeof(union tspec_body)); + memset(&pTsCommonInfo->TSpec, 0, sizeof(union qos_tsinfo)); memset(&pTsCommonInfo->TClass, 0, sizeof(union qos_tclas) * TCLAS_NUM); pTsCommonInfo->TClasProc = 0; pTsCommonInfo->TClasNum = 0; @@ -201,8 +201,8 @@ static struct ts_common_info *SearchAdmitTRStream(struct rtllib_device *ieee, continue; list_for_each_entry(pRet, psearch_list, List) { if (memcmp(pRet->addr, addr, 6) == 0 && - pRet->TSpec.f.ts_info.field.ucTSID == TID && - pRet->TSpec.f.ts_info.field.ucDirection == dir) + pRet->TSpec.field.ucTSID == TID && + pRet->TSpec.field.ucDirection == dir) break; } if (&pRet->List != psearch_list) @@ -215,7 +215,7 @@ static struct ts_common_info *SearchAdmitTRStream(struct rtllib_device *ieee, } static void MakeTSEntry(struct ts_common_info *pTsCommonInfo, u8 *addr, - union tspec_body *pTSPEC, union qos_tclas *pTCLAS, + union qos_tsinfo *pTSPEC, union qos_tclas *pTCLAS, u8 TCLAS_Num, u8 TCLAS_Proc) { u8 count; @@ -227,7 +227,7 @@ static void MakeTSEntry(struct ts_common_info *pTsCommonInfo, u8 *addr, if (pTSPEC) memcpy((u8 *)(&(pTsCommonInfo->TSpec)), (u8 *)pTSPEC, - sizeof(union tspec_body)); + sizeof(union qos_tsinfo)); for (count = 0; count < TCLAS_Num; count++) memcpy((u8 *)(&(pTsCommonInfo->TClass[count])), @@ -241,8 +241,8 @@ bool rtllib_get_ts(struct rtllib_device *ieee, struct ts_common_info **ppTS, u8 *addr, u8 TID, enum tr_select TxRxSelect, bool bAddNewTs) { u8 UP = 0; - union tspec_body TSpec; - union qos_tsinfo *ts_info = &TSpec.f.ts_info; + union qos_tsinfo TSpec; + union qos_tsinfo *ts_info = &TSpec; struct list_head *pUnusedList; struct list_head *pAddmitList; enum direction_value Dir;