From patchwork Fri Oct 20 03:16:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Oliva X-Patchwork-Id: 155775 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2010:b0:403:3b70:6f57 with SMTP id fe16csp795444vqb; Thu, 19 Oct 2023 20:17:20 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFYtnhhoiUaJEnwGEj7TcnPmy31pwnw7Qs5oFP7gloXgZLlLIwbaVgUZpnXqHFFBJ72hlab X-Received: by 2002:ad4:5ec9:0:b0:66d:178e:36d3 with SMTP id jm9-20020ad45ec9000000b0066d178e36d3mr1126686qvb.53.1697771840285; Thu, 19 Oct 2023 20:17:20 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1697771840; cv=pass; d=google.com; s=arc-20160816; b=rXrFxDqp97Pr7kl4YOllM2PKnAxMlKvLdSVuPwQbA3rnxNvNWTMNz9Hk7wP7X35HPW T3Whqk5WLp9LBsf8Z/8oKQ5L7NzjZqrW9NRH8v3V2CcLTM1uFz4IweUpAZMRN8vynmzN gWXluKCyF6XOIIegMyx1VjuaXLeszHp68oBjm6KaTUVvGZ2UYD5zoZcos00S01z07fqJ 6snOJYJR3g35FMKcW6KE4lQ4Cas2Bc00/izp982b7xEoWefUGMpqkdarsn/iWp9aCwJ9 wkNO66HbWte60+wtR86lsKqZZ3VToXvx5pLGZztDjhVuJpSf8ogelwJ0/id6ve5nG4C+ w25A== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:mime-version:user-agent :message-id:in-reply-to:date:references:organization:subject:cc:to :from:dkim-signature:arc-filter:dmarc-filter:delivered-to; bh=qh+SES5jHOEqihI/1Hx3Q1hzpErCf80qV48eFxgYpxw=; fh=Jpea52YwhtuNIX07YFpoPax6XLTYOTC8OHFdA9VDb4k=; b=UdsnHL2SEsK4laf5bdnCQq7/Ws8y0xIt37ZciIA/3w0Vp7HcKLK5+WbpdFUlPSrPr+ x7ihyMl2cgSbk+1H3C8ZCtrUC2h7yqCSzLCJdFna+10jyBYuo2Qqtu/xPP/TBrut+GFA e+eDcZooOvF/29r9DzuD/qaK67Y7s/DI015NPfXc0bstfWWZUPo6gjdRgoXdJnZRJ6sy BERTQN4QbqOl8C27nEp5k9skmMDleEHoQnhyhjMR79RmADxJNOMKrXK/r6OyDYEkGodb lTsfaLL8wuL/EX75t4Sk4bhXcvTdYc5ddPTYd4R5lVzB8ntDuXaqNBzBy/zBrLECwt4G 8cLg== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@adacore.com header.s=google header.b=KEAq4UJ1; arc=pass (i=1); spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=adacore.com Received: from server2.sourceware.org (server2.sourceware.org. [2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id cy6-20020a05621418c600b006587311f7d6si709125qvb.586.2023.10.19.20.17.20 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Oct 2023 20:17:20 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; dkim=pass header.i=@adacore.com header.s=google header.b=KEAq4UJ1; arc=pass (i=1); spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=adacore.com Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 052403858004 for ; Fri, 20 Oct 2023 03:17:20 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-pl1-x635.google.com (mail-pl1-x635.google.com [IPv6:2607:f8b0:4864:20::635]) by sourceware.org (Postfix) with ESMTPS id CCB203858D33 for ; Fri, 20 Oct 2023 03:16:52 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org CCB203858D33 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=adacore.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=adacore.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org CCB203858D33 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=2607:f8b0:4864:20::635 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1697771817; cv=none; b=qMkmsCzq/h1iHKPzbeo0DA4cQFhi4RzOKFMq2zCJhcUGIA8MOrvNJYCQEF8Fw2j5u+Wx785k520jpEbXbmT554s/SxAn9Wd+e14V3hPQgXOAEHa37WXKWXvnrIEMsHX3VCy79vkwVFjqpViJXgaAo7927bT+zFlaSkPziiUn2sY= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1697771817; c=relaxed/simple; bh=nH1TcBkBZIf3pXwc9n5SwkggUFlghikCEtWAtd0bnS8=; h=DKIM-Signature:From:To:Subject:Date:Message-ID:MIME-Version; b=dBoyDrhwCSL/FJ+J19bXVFoh3kLsO26M1TH4XHzNGUBzKeJEvWHa2j9k7k45+zsS13imd1+Udn2IZd1h33NGpPd7619YQoQoASUKWw3ZRjWZjPqeSZcBmlpk7XhtBfQQBg4ZjVKmwFtojnD50+Gebe1BXHIcHwb2v9Hd+HBZ/m0= ARC-Authentication-Results: i=1; server2.sourceware.org Received: by mail-pl1-x635.google.com with SMTP id d9443c01a7336-1c9d3a21f7aso2901435ad.2 for ; Thu, 19 Oct 2023 20:16:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=adacore.com; s=google; t=1697771812; x=1698376612; darn=gcc.gnu.org; h=mime-version:user-agent:message-id:in-reply-to:date:references :organization:subject:cc:to:from:from:to:cc:subject:date:message-id :reply-to; bh=qh+SES5jHOEqihI/1Hx3Q1hzpErCf80qV48eFxgYpxw=; b=KEAq4UJ1oUWF5qgW2eU0tCBtBTUWvs0ZREn3H4ySNkECUI7I+MPD7FwS5U9RexpUtM VBFFh3E72IPeanbdI7NU8RxCyG1qakJqwhuNcQMbHMO0pKgvLXmH5rwDOYBOMDmjLeni aTBmcJVj58geGZuGG4nSPSEC6BT1aaW5GyClVxyPU2VnX/w54AFXbzIybKQiTJdhMA3x cdrzqGVpnFPgX2TWLxonHnIwFJA6thRdNg2KX7cx6LwSjoHSZDTp+VPIMZza7iDsInkr sGCd+UGqCA1fBLxT7tDv0XHVsmUiTKLq8YkwiS1XLQwTc2+osDOS2on4K2EVjyi1mnXG ApIQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697771812; x=1698376612; h=mime-version:user-agent:message-id:in-reply-to:date:references :organization:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=qh+SES5jHOEqihI/1Hx3Q1hzpErCf80qV48eFxgYpxw=; b=oln1wipc7U5N+vqqLukzwdV/FbQg93Za+RY8qKIdtQhp/jnvuiUte1PqoBOU9+6cho Om0H6Xi1Rm1KKq4q4D/GNH2Rq5jqF+QBHE3fx3qsTDMuf7KNgfsUfoLPmYsGNkgcKAzn F1WfCPl9ZtmfnK1Q3qYqgZU7jrJ+YBPsIF/7B3kGKNe2kGjCj43drDMbhkAr3pdj5r0U pmpX2ybtgW4SflRiLg8JM1XNW1HYm+djtVjIHXBjyhGn83LbGAIignP3vO6EUSeUFe8B 1n+ZFik9I5F4VxrwG+KLr2a/otdxRU1Sse0CuG69IgHB8fdjMaqlxYOTUru1Gkk/xOcp rPsQ== X-Gm-Message-State: AOJu0Yz0Trir2zsSk5xiWKOEfaZiH9vTj8YIDDrAT3fTl2AMDKP5A5J4 sREa7a4mMMmd2TEb9dOiTZJ7seR3UL5zGymRE85WVW8c X-Received: by 2002:a17:902:c1ca:b0:1ca:8419:1857 with SMTP id c10-20020a170902c1ca00b001ca84191857mr678452plc.47.1697771811411; Thu, 19 Oct 2023 20:16:51 -0700 (PDT) Received: from free.home ([2804:7f1:2080:7ba0:18cb:7459:1c6c:8dbf]) by smtp.gmail.com with ESMTPSA id ji18-20020a170903325200b001c99b3a1e45sm441550plb.84.2023.10.19.20.16.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Oct 2023 20:16:50 -0700 (PDT) Received: from livre (livre.home [172.31.160.2]) by free.home (8.15.2/8.15.2) with ESMTPS id 39K3GQTm1526436 (version=TLSv1.3 cipher=TLS_AES_256_GCM_SHA384 bits=256 verify=NOT); Fri, 20 Oct 2023 00:16:27 -0300 From: Alexandre Oliva To: gcc-patches@gcc.gnu.org Cc: Rainer Orth , Mike Stump , Segher Boessenkool , David Edelsohn Subject: [PATCH] testsuite: check for and use -mno-strict-align where needed Organization: Free thinker, does not speak for AdaCore References: Date: Fri, 20 Oct 2023 00:16:26 -0300 In-Reply-To: (Alexandre Oliva's message of "Wed, 10 Mar 2021 02:41:50 -0300") Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/27.1 (gnu/linux) MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 X-Spam-Status: No, score=-12.3 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, WEIRD_QUOTING autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1780242805000851931 X-GMAIL-MSGID: 1780242805000851931 On Mar 10, 2021, Alexandre Oliva wrote: > ppc configurations that have -mstrict-align enabled by default fail > gcc.dg/strlenopt-80.c, because some memcpy calls don't get turned into > MEM_REFs, which defeats the tested-for strlen optimization. I've combined this patch with other patches that added -mno-strict-align to tests that needed it on targets configured with -mstrict-align enabled by default, and conditioned the use of the flag to targets that support it. Regstrapped on x86_64-linux-gnu, ppc64le-linux-gnu, also tested on a ppc-vx7r2 configured with -mstrict-align. Ok to install? ---- Various tests fail on powerpc if the toolchain is configured to enable -mstrict-align by default. This patch introduces -mno-strict-align on tests found to fail that way, when the target supports this option. I suppose !non_strict_align could be used to skip tests, instead of or in addition to this tweak, and that might be desirable if they still fail on targets that do no support -mno-strict-align, but I haven't observed such scenarios. The p9-vec-length tests expect vectorization on loop bodies and epilogues that reference arrays that are not known to be more aligned than their small element types. Though VSX vectors work best with 32- or 64-bit alignment, unaligned vector loads and stores are expected by the tests. However, with -mstrict-align by default, vector loads and stores not known to be aligned end up open coded, which doesn't match the asm output expectations coded in the tests. for gcc/ChangeLog * doc/sourcebuild.texi (opt_mstrict_align): New target. for gcc/testsuite/ChangeLog * lib/target-supports.exp (check_effective_target_opt_mstrict_align): New. * gcc.dg/strlenopt-80.c: Add -mno-strict-align if supported. * gcc.target/powerpc/prefix-ds-dq.c: Likewise. * gcc.target/powerpc/p9-vec-length-epil-1.c: Likewise. * gcc.target/powerpc/p9-vec-length-epil-2.c: Likewise. * gcc.target/powerpc/p9-vec-length-epil-3.c: Likewise. * gcc.target/powerpc/p9-vec-length-epil-4.c: Likewise. * gcc.target/powerpc/p9-vec-length-epil-5.c: Likewise. * gcc.target/powerpc/p9-vec-length-epil-6.c: Likewise. * gcc.target/powerpc/p9-vec-length-epil-7.c: Likewise. * gcc.target/powerpc/p9-vec-length-epil-8.c: Likewise. * gcc.target/powerpc/p9-vec-length-epil-run-1.c: Likewise. * gcc.target/powerpc/p9-vec-length-epil-run-2.c: Likewise. * gcc.target/powerpc/p9-vec-length-epil-run-3.c: Likewise. * gcc.target/powerpc/p9-vec-length-epil-run-4.c: Likewise. * gcc.target/powerpc/p9-vec-length-epil-run-5.c: Likewise. * gcc.target/powerpc/p9-vec-length-epil-run-6.c: Likewise. * gcc.target/powerpc/p9-vec-length-epil-run-7.c: Likewise. * gcc.target/powerpc/p9-vec-length-epil-run-8.c: Likewise. * gcc.target/powerpc/p9-vec-length-full-1.c: Likewise. * gcc.target/powerpc/p9-vec-length-full-2.c: Likewise. * gcc.target/powerpc/p9-vec-length-full-3.c: Likewise. * gcc.target/powerpc/p9-vec-length-full-4.c: Likewise. * gcc.target/powerpc/p9-vec-length-full-5.c: Likewise. * gcc.target/powerpc/p9-vec-length-full-6.c: Likewise. * gcc.target/powerpc/p9-vec-length-full-7.c: Likewise. * gcc.target/powerpc/p9-vec-length-full-8.c: Likewise. * gcc.target/powerpc/p9-vec-length-full-run-1.c: Likewise. * gcc.target/powerpc/p9-vec-length-full-run-2.c: Likewise. * gcc.target/powerpc/p9-vec-length-full-run-3.c: Likewise. * gcc.target/powerpc/p9-vec-length-full-run-4.c: Likewise. * gcc.target/powerpc/p9-vec-length-full-run-5.c: Likewise. * gcc.target/powerpc/p9-vec-length-full-run-6.c: Likewise. * gcc.target/powerpc/p9-vec-length-full-run-7.c: Likewise. * gcc.target/powerpc/p9-vec-length-full-run-8.c: Likewise. --- gcc/doc/sourcebuild.texi | 3 +++ gcc/testsuite/gcc.dg/strlenopt-80.c | 4 ++++ .../gcc.target/powerpc/p9-vec-length-epil-1.c | 2 ++ .../gcc.target/powerpc/p9-vec-length-epil-2.c | 2 ++ .../gcc.target/powerpc/p9-vec-length-epil-3.c | 2 ++ .../gcc.target/powerpc/p9-vec-length-epil-4.c | 2 ++ .../gcc.target/powerpc/p9-vec-length-epil-5.c | 2 ++ .../gcc.target/powerpc/p9-vec-length-epil-6.c | 2 ++ .../gcc.target/powerpc/p9-vec-length-epil-7.c | 2 ++ .../gcc.target/powerpc/p9-vec-length-epil-8.c | 2 ++ .../gcc.target/powerpc/p9-vec-length-epil-run-1.c | 2 ++ .../gcc.target/powerpc/p9-vec-length-epil-run-2.c | 2 ++ .../gcc.target/powerpc/p9-vec-length-epil-run-3.c | 2 ++ .../gcc.target/powerpc/p9-vec-length-epil-run-4.c | 2 ++ .../gcc.target/powerpc/p9-vec-length-epil-run-5.c | 2 ++ .../gcc.target/powerpc/p9-vec-length-epil-run-6.c | 2 ++ .../gcc.target/powerpc/p9-vec-length-epil-run-7.c | 2 ++ .../gcc.target/powerpc/p9-vec-length-epil-run-8.c | 2 ++ .../gcc.target/powerpc/p9-vec-length-full-1.c | 2 ++ .../gcc.target/powerpc/p9-vec-length-full-2.c | 2 ++ .../gcc.target/powerpc/p9-vec-length-full-3.c | 2 ++ .../gcc.target/powerpc/p9-vec-length-full-4.c | 2 ++ .../gcc.target/powerpc/p9-vec-length-full-5.c | 2 ++ .../gcc.target/powerpc/p9-vec-length-full-6.c | 2 ++ .../gcc.target/powerpc/p9-vec-length-full-7.c | 2 ++ .../gcc.target/powerpc/p9-vec-length-full-8.c | 2 ++ .../gcc.target/powerpc/p9-vec-length-full-run-1.c | 2 ++ .../gcc.target/powerpc/p9-vec-length-full-run-2.c | 2 ++ .../gcc.target/powerpc/p9-vec-length-full-run-3.c | 2 ++ .../gcc.target/powerpc/p9-vec-length-full-run-4.c | 2 ++ .../gcc.target/powerpc/p9-vec-length-full-run-5.c | 2 ++ .../gcc.target/powerpc/p9-vec-length-full-run-6.c | 2 ++ .../gcc.target/powerpc/p9-vec-length-full-run-7.c | 2 ++ .../gcc.target/powerpc/p9-vec-length-full-run-8.c | 2 ++ gcc/testsuite/gcc.target/powerpc/prefix-ds-dq.c | 2 ++ gcc/testsuite/lib/target-supports.exp | 8 ++++++++ 36 files changed, 81 insertions(+) diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi index c20af31c64237..d6c7a2f93102d 100644 --- a/gcc/doc/sourcebuild.texi +++ b/gcc/doc/sourcebuild.texi @@ -2580,6 +2580,9 @@ Target supports FPU instructions. @item non_strict_align Target does not require strict alignment. +@item opt_mstrict_align +Target supports @option{-mstrict-align} and @option{-mno-strict-align}. + @item pie_copyreloc The x86-64 target linker supports PIE with copy reloc. diff --git a/gcc/testsuite/gcc.dg/strlenopt-80.c b/gcc/testsuite/gcc.dg/strlenopt-80.c index a8adbf1eed549..63d4eb17e4c3f 100644 --- a/gcc/testsuite/gcc.dg/strlenopt-80.c +++ b/gcc/testsuite/gcc.dg/strlenopt-80.c @@ -8,6 +8,10 @@ { dg-options "-O2 -Wall -fdump-tree-optimized" } { dg-additional-options "-msse" { target i?86-*-* x86_64-*-* } } */ +/* On powerpc configurations that have -mstrict-align by default, + the memcpy calls for ncpylog >= 3 are not turned into MEM_REFs. + { dg-additional-options "-mno-strict-align" { target opt_mstrict_align } } */ + #define CHAR_BIT __CHAR_BIT__ #define SIZE_MAX __SIZE_MAX__ #define LEN_MAX (__PTRDIFF_MAX__ - 2) diff --git a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-1.c b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-1.c index dfcc0e9532058..f57d9457bd94c 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-1.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-1.c @@ -3,6 +3,8 @@ /* { dg-additional-options "--param=vect-partial-vector-usage=1" } */ +/* { dg-additional-options "-mno-strict-align" { target opt_mstrict_align } } */ + /* Test for that only vectorize the epilogue with vector access with length, the main body still use normal vector load/store. */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-2.c b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-2.c index e63f1bf23722e..19856407d277e 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-2.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-2.c @@ -3,6 +3,8 @@ /* { dg-additional-options "--param=vect-partial-vector-usage=1" } */ +/* { dg-additional-options "-mno-strict-align" { target opt_mstrict_align } } */ + /* Test for that only vectorize the epilogue with vector access with length, the main body still use normal vector load/store. */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-3.c b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-3.c index 4a99e3a326549..eaea96d1eadd1 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-3.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-3.c @@ -3,6 +3,8 @@ /* { dg-additional-options "--param=vect-partial-vector-usage=1" } */ +/* { dg-additional-options "-mno-strict-align" { target opt_mstrict_align } } */ + /* Test for that only vectorize the epilogue with vector access with length, the main body still use normal vector load/store. */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-4.c b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-4.c index 9fbee6a4324b5..01991325ca8b6 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-4.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-4.c @@ -3,6 +3,8 @@ /* { dg-additional-options "--param=vect-partial-vector-usage=1" } */ +/* { dg-additional-options "-mno-strict-align" { target opt_mstrict_align } } */ + /* Test for that only vectorize the epilogue with vector access with length, the main body still use normal vector load/store. */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-5.c b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-5.c index d023a998c3ba3..c68faa8c557a9 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-5.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-5.c @@ -3,6 +3,8 @@ /* { dg-additional-options "--param=vect-partial-vector-usage=1" } */ +/* { dg-additional-options "-mno-strict-align" { target opt_mstrict_align } } */ + /* Test for that only vectorize the epilogue with vector access with length, the main body still use normal vector load/store. */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-6.c b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-6.c index dbce90757e362..18076cc8218cf 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-6.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-6.c @@ -3,6 +3,8 @@ /* { dg-additional-options "--param=vect-partial-vector-usage=1" } */ +/* { dg-additional-options "-mno-strict-align" { target opt_mstrict_align } } */ + /* Test for that only vectorize the epilogue with vector access with length, the main body still use normal vector load/store. */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-7.c b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-7.c index 011b731f7c5a0..4e37c0a0095d3 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-7.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-7.c @@ -5,6 +5,8 @@ /* { dg-additional-options "--param=vect-partial-vector-usage=1" } */ +/* { dg-additional-options "-mno-strict-align" { target opt_mstrict_align } } */ + /* Test for that only vectorize the epilogue with vector access with length, the main body still use normal vector load/store. */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-8.c b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-8.c index e56fd55f623f3..0f3cd07226829 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-8.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-8.c @@ -3,6 +3,8 @@ /* { dg-additional-options "--param=vect-partial-vector-usage=1" } */ +/* { dg-additional-options "-mno-strict-align" { target opt_mstrict_align } } */ + /* Test for that only vectorize the epilogue with vector access with length, the main body still use normal vector load/store. */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-run-1.c b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-run-1.c index d1cd67f0c4d96..2f091a3114708 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-run-1.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-run-1.c @@ -3,6 +3,8 @@ /* { dg-additional-options "--param=vect-partial-vector-usage=1" } */ +/* { dg-additional-options "-mno-strict-align" { target opt_mstrict_align } } */ + /* Check whether it runs successfully if we only vectorize the epilogue with vector access with length. */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-run-2.c b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-run-2.c index 815867b51d05d..03b172521a8fd 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-run-2.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-run-2.c @@ -3,6 +3,8 @@ /* { dg-additional-options "--param=vect-partial-vector-usage=1" } */ +/* { dg-additional-options "-mno-strict-align" { target opt_mstrict_align } } */ + /* Check whether it runs successfully if we only vectorize the epilogue with vector access with length. */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-run-3.c b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-run-3.c index 5378d02c26975..5329422cd3aa0 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-run-3.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-run-3.c @@ -3,6 +3,8 @@ /* { dg-additional-options "--param=vect-partial-vector-usage=1" } */ +/* { dg-additional-options "-mno-strict-align" { target opt_mstrict_align } } */ + /* Check whether it runs successfully if we only vectorize the epilogue with vector access with length. */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-run-4.c b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-run-4.c index daed9a7774ee0..2021372c68b6f 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-run-4.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-run-4.c @@ -3,6 +3,8 @@ /* { dg-additional-options "--param=vect-partial-vector-usage=1" } */ +/* { dg-additional-options "-mno-strict-align" { target opt_mstrict_align } } */ + /* Check whether it runs successfully if we only vectorize the epilogue with vector access with length. */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-run-5.c b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-run-5.c index b5f24e68d8461..00ed61a5df167 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-run-5.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-run-5.c @@ -3,6 +3,8 @@ /* { dg-additional-options "--param=vect-partial-vector-usage=1" } */ +/* { dg-additional-options "-mno-strict-align" { target opt_mstrict_align } } */ + /* Check whether it runs successfully if we only vectorize the epilogue with vector access with length. */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-run-6.c b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-run-6.c index a3e6367384711..adbfd080c94e9 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-run-6.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-run-6.c @@ -3,6 +3,8 @@ /* { dg-additional-options "--param=vect-partial-vector-usage=1" } */ +/* { dg-additional-options "-mno-strict-align" { target opt_mstrict_align } } */ + /* Check whether it runs successfully if we only vectorize the epilogue with vector access with length. */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-run-7.c b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-run-7.c index f0b69d462a19f..79ba4a1757987 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-run-7.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-run-7.c @@ -3,6 +3,8 @@ /* { dg-additional-options "--param=vect-partial-vector-usage=1" } */ +/* { dg-additional-options "-mno-strict-align" { target opt_mstrict_align } } */ + /* Check whether it runs successfully if we only vectorize the epilogue with vector access with length. */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-run-8.c b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-run-8.c index 84abecf3f692a..6e09b07d41019 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-run-8.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-epil-run-8.c @@ -3,6 +3,8 @@ /* { dg-additional-options "--param=vect-partial-vector-usage=1" } */ +/* { dg-additional-options "-mno-strict-align" { target opt_mstrict_align } } */ + /* Check whether it runs successfully if we only vectorize the epilogue with vector access with length. */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-1.c b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-1.c index f01f1c54fa566..2818bac36a2f6 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-1.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-1.c @@ -3,6 +3,8 @@ /* { dg-additional-options "--param=vect-partial-vector-usage=2" } */ +/* { dg-additional-options "-mno-strict-align" { target opt_mstrict_align } } */ + /* Test for fully with length, the loop body uses vector access with length, there should not be any epilogues. */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-2.c b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-2.c index f546e97fa7df4..b476910753f58 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-2.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-2.c @@ -3,6 +3,8 @@ /* { dg-additional-options "--param=vect-partial-vector-usage=2" } */ +/* { dg-additional-options "-mno-strict-align" { target opt_mstrict_align } } */ + /* Test for fully with length, the loop body uses vector access with length, there should not be any epilogues. */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-3.c b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-3.c index 65142b3fecd0b..0f502423c88ae 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-3.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-3.c @@ -3,6 +3,8 @@ /* { dg-additional-options "--param=vect-partial-vector-usage=2" } */ +/* { dg-additional-options "-mno-strict-align" { target opt_mstrict_align } } */ + /* Test for fully with length, the loop body uses vector access with length, there should not be any epilogues. */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-4.c b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-4.c index a4cc7aafaebb2..20ddfb392e11e 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-4.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-4.c @@ -3,6 +3,8 @@ /* { dg-additional-options "--param=vect-partial-vector-usage=2" } */ +/* { dg-additional-options "-mno-strict-align" { target opt_mstrict_align } } */ + /* Test for fully with length, the loop body uses vector access with length, there should not be any epilogues. */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-5.c b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-5.c index 4b0b9070c84d7..0bad6938bf8c5 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-5.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-5.c @@ -3,6 +3,8 @@ /* { dg-additional-options "--param=vect-partial-vector-usage=2" } */ +/* { dg-additional-options "-mno-strict-align" { target opt_mstrict_align } } */ + /* Test for fully with length, the loop body uses vector access with length, there should not be any epilogues. */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-6.c b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-6.c index 65ddf2b098a69..a73178e3ad394 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-6.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-6.c @@ -3,6 +3,8 @@ /* { dg-additional-options "--param=vect-partial-vector-usage=2" } */ +/* { dg-additional-options "-mno-strict-align" { target opt_mstrict_align } } */ + /* Test for fully with length, the loop body uses vector access with length, there should not be any epilogues. */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-7.c b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-7.c index e0e51d9a9724c..b50ff3cf6ef22 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-7.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-7.c @@ -5,6 +5,8 @@ /* { dg-additional-options "--param=vect-partial-vector-usage=2" } */ +/* { dg-additional-options "-mno-strict-align" { target opt_mstrict_align } } */ + /* Test for fully with length, the loop body uses vector access with length, there should not be any epilogues. */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-8.c b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-8.c index 7fe0dd0043181..94f2aa48f57fc 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-8.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-8.c @@ -3,6 +3,8 @@ /* { dg-additional-options "--param=vect-partial-vector-usage=2" } */ +/* { dg-additional-options "-mno-strict-align" { target opt_mstrict_align } } */ + /* Test for fully with length, the loop body uses vector access with length, there should not be any epilogues. */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-run-1.c b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-run-1.c index 4e9bd0fbad303..8950392d29b6c 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-run-1.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-run-1.c @@ -3,6 +3,8 @@ /* { dg-additional-options "--param=vect-partial-vector-usage=2" } */ +/* { dg-additional-options "-mno-strict-align" { target opt_mstrict_align } } */ + /* Check whether it runs successfully if we vectorize the loop fully with vector access with length. */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-run-2.c b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-run-2.c index 8e06b1b9304a8..1f295ae9d696b 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-run-2.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-run-2.c @@ -3,6 +3,8 @@ /* { dg-additional-options "--param=vect-partial-vector-usage=2" } */ +/* { dg-additional-options "-mno-strict-align" { target opt_mstrict_align } } */ + /* Check whether it runs successfully if we vectorize the loop fully with vector access with length. */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-run-3.c b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-run-3.c index 0b86f62834fb4..1cb9b8f97c210 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-run-3.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-run-3.c @@ -3,6 +3,8 @@ /* { dg-additional-options "--param=vect-partial-vector-usage=2" } */ +/* { dg-additional-options "-mno-strict-align" { target opt_mstrict_align } } */ + /* Check whether it runs successfully if we vectorize the loop fully with vector access with length. */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-run-4.c b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-run-4.c index 359f31c9ed5ec..029454afd27bf 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-run-4.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-run-4.c @@ -3,6 +3,8 @@ /* { dg-additional-options "--param=vect-partial-vector-usage=2" } */ +/* { dg-additional-options "-mno-strict-align" { target opt_mstrict_align } } */ + /* Check whether it runs successfully if we vectorize the loop fully with vector access with length. */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-run-5.c b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-run-5.c index 7aa468e5b4e4b..02bb0a8964b87 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-run-5.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-run-5.c @@ -3,6 +3,8 @@ /* { dg-additional-options "--param=vect-partial-vector-usage=2" } */ +/* { dg-additional-options "-mno-strict-align" { target opt_mstrict_align } } */ + /* Check whether it runs successfully if we vectorize the loop fully with vector access with length. */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-run-6.c b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-run-6.c index 53a2ad07fb324..9839ad9e1d918 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-run-6.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-run-6.c @@ -3,6 +3,8 @@ /* { dg-additional-options "--param=vect-partial-vector-usage=2" } */ +/* { dg-additional-options "-mno-strict-align" { target opt_mstrict_align } } */ + /* Check whether it runs successfully if we vectorize the loop fully with vector access with length. */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-run-7.c b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-run-7.c index 0c21d137b9d58..10ce7740fa789 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-run-7.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-run-7.c @@ -3,6 +3,8 @@ /* { dg-additional-options "--param=vect-partial-vector-usage=2" } */ +/* { dg-additional-options "-mno-strict-align" { target opt_mstrict_align } } */ + /* Check whether it runs successfully if we vectorize the loop fully with vector access with length. */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-run-8.c b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-run-8.c index 910784260677d..163bfb2f9bc12 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-run-8.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-run-8.c @@ -3,6 +3,8 @@ /* { dg-additional-options "--param=vect-partial-vector-usage=2" } */ +/* { dg-additional-options "-mno-strict-align" { target opt_mstrict_align } } */ + /* Check whether it runs successfully if we vectorize the loop fully with vector access with length. */ diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-ds-dq.c b/gcc/testsuite/gcc.target/powerpc/prefix-ds-dq.c index 554cd0c1beac0..3f477a07cb326 100644 --- a/gcc/testsuite/gcc.target/powerpc/prefix-ds-dq.c +++ b/gcc/testsuite/gcc.target/powerpc/prefix-ds-dq.c @@ -2,6 +2,8 @@ /* { dg-require-effective-target powerpc_prefixed_addr } */ /* { dg-require-effective-target lp64 } */ /* { dg-options "-O2 -mdejagnu-cpu=power10" } */ +/* If -mstrict-align is enabled by default, we don't get the expected opcodes. + { dg-additional-options "-mno-strict-align" { target opt_mstrict_align } } */ /* Tests whether we generate a prefixed load/store operation for addresses that don't meet DS/DQ offset constraints. 64-bit is needed for testing the use diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index f0b692a2e19ba..1a563cacfb239 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -11468,6 +11468,14 @@ proc check_effective_target_non_strict_align {} { } "-Wcast-align"] } +# Return 1 if the target supports -mstrict-align (and -mno-strict-align). + +proc check_effective_target_opt_mstrict_align {} { + return [check_no_compiler_messages opt_mstrict_align assembly { + void foo(void) {} + } "-mstrict-align -mno-strict-align"] +} + # Return 1 if the target has . proc check_effective_target_ucontext_h { } {