From patchwork Mon Nov 7 15:56:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierre Gondois X-Patchwork-Id: 16521 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2143971wru; Mon, 7 Nov 2022 08:08:46 -0800 (PST) X-Google-Smtp-Source: AMsMyM6se+8kib4kac9XW5jiYpQuZw6nnkkTQ36DUT5NOrY6gOIWOSCvZf0eQpxxyCKmX99mED10 X-Received: by 2002:a63:4f20:0:b0:46f:b887:4cc9 with SMTP id d32-20020a634f20000000b0046fb8874cc9mr36390910pgb.306.1667837325693; Mon, 07 Nov 2022 08:08:45 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1667837325; cv=none; d=google.com; s=arc-20160816; b=Lkn3MRgOxq91OBjmo9ZaowJgsjzhjzcxyXj/yaP4LkyXD5b6m24Tom/aaap/k4Vfum NPuKtm1EYpJBx8s1qRWGLaONzSSYDsMKqlexDkW+dg8nv+2Onh+sI8Ztsqb2oFHdAurB gQQJ86d9Mh4WAub1TOyyXcuHGwEw3+pzPbmz2Ho/bNZBqizokPUBQ63qLQpHPs5bUCKT iIrpg2vi/FXl2TNBVb+DSLasLyAQ3VyfegiCVRtwN/jUx9JZICCEcXbRSUjjpxn4fWZS Fp/drkW+uG7Xd0ToZxEFgafydMugLqh909R6B5JRnjlOpDPXIn3KbrSC1AbRDDvDGegT KcWQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=zXcomT1gA+TDoTaor44sLB0g4hLE8aVQx+szeqco3Tk=; b=A7+Fxqj5QkMOKVSMO9SVLWAjR9r1XBhFiFpUKNeQ5FJs4Upv/lXWKx8UzHKAueBSWn hmGKLktSUahNehD9XwaUg3kWQ/SWYkYAyrV4RLMlDqXe+LDsH1SJWsZwAmXPeqo+j1T+ +q0fJC8I/bGr1D14EQ3iNrbus4AQdv47RQmPLQfzF+fcjn59G4ZLuaPDtBrvVu5Hws8X 35sd+DJh7UNostdfNz0NUY8nVorzS00AWPPSftU4Ii6+impK1sVyaePeXlozy0RvutOs 3tIdc8cBb1DU/g/1uiAJ4hfDzzhdDLNlRe3/NWEN+z5OuvB3NHiYtreakhXSrCxeISLO KtcA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id w18-20020a170902c79200b00187075ae5f6si9340996pla.461.2022.11.07.08.08.20; Mon, 07 Nov 2022 08:08:45 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232742AbiKGQGa (ORCPT + 99 others); Mon, 7 Nov 2022 11:06:30 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57580 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232953AbiKGQGG (ORCPT ); Mon, 7 Nov 2022 11:06:06 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id C73D2205D4; Mon, 7 Nov 2022 08:05:54 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B664A113E; Mon, 7 Nov 2022 08:06:00 -0800 (PST) Received: from pierre123.arm.com (pierre123.nice.arm.com [10.34.100.128]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 896EF3F534; Mon, 7 Nov 2022 08:05:39 -0800 (PST) From: Pierre Gondois To: linux-kernel@vger.kernel.org Cc: Pierre Gondois , Rob Herring , Krzysztof Kozlowski , Florian Fainelli , Broadcom internal kernel review list , Ray Jui , Scott Branden , Tsahee Zidenberg , Antoine Tenart , Brijesh Singh , Suravee Suthikulpanit , Tom Lendacky , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Khuong Dinh , Liviu Dudau , Sudeep Holla , Lorenzo Pieralisi , William Zhang , Anand Gore , Kursad Oney , =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= , Alim Akhtar , Shawn Guo , Li Yang , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Chester Lin , =?utf-8?q?Andreas_F=C3=A4rber?= , Matthias Brugger , NXP S32 Linux Team , Wei Xu , Chanho Min , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Lars Povlsen , Steen Hegelund , Daniel Machon , UNGLinuxDriver@microchip.com, Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Thierry Reding , Jonathan Hunter , Andy Gross , Bjorn Andersson , Konrad Dybcio , Geert Uytterhoeven , Magnus Damm , Heiko Stuebner , Kunihiko Hayashi , Masami Hiramatsu , Jisheng Zhang , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Viorel Suman , Abel Vesa , Peng Fan , Ming Qian , Shenwei Wang , Adam Ford , Tim Harvey , Lucas Stach , Richard Zhu , Li Jun , Markus Niebel , Marco Felsch , Joakim Zhang , Marek Vasut , Laurent Pinchart , Alexander Stein , Paul Elder , Martin Kepplinger , David Heidelberg , Liu Ying , Oliver Graute , Dong Aisheng , Clark Wang , Jacky Bai , Chris Packham , Vadym Kochan , Sameer Pujar , Mikko Perttunen , Akhil R , Sumit Gupta , Prathamesh Shete , Diogo Ivo , Vidya Sagar , Ashish Mhetre , Johan Jonker , Christopher Obbard , Ezequiel Garcia , Aswani Reddy , Shashank Prashar , Arnd Bergmann , devicetree@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-mediatek@lists.infradead.org, openbmc@lists.ozlabs.org, linux-tegra@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-realtek-soc@lists.infradead.org, linux-renesas-soc@vger.kernel.org, linux-rockchip@lists.infradead.org Subject: [PATCH v2 01/23] arm64: dts: Update cache properties for amazon Date: Mon, 7 Nov 2022 16:56:54 +0100 Message-Id: <20221107155825.1644604-2-pierre.gondois@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221107155825.1644604-1-pierre.gondois@arm.com> References: <20221107155825.1644604-1-pierre.gondois@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748854191427405714?= X-GMAIL-MSGID: =?utf-8?q?1748854191427405714?= The DeviceTree Specification v0.3 specifies that the cache node 'compatible' and 'cache-level' properties are 'required'. Cf. s3.8 Multi-level and Shared Cache Nodes The 'cache-unified' property should be present if one of the properties for unified cache is present ('cache-size', ...). Update the Device Trees accordingly. Signed-off-by: Pierre Gondois --- arch/arm64/boot/dts/amazon/alpine-v3.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/amazon/alpine-v3.dtsi b/arch/arm64/boot/dts/amazon/alpine-v3.dtsi index 73a352ea8fd5..ba7e56dc85db 100644 --- a/arch/arm64/boot/dts/amazon/alpine-v3.dtsi +++ b/arch/arm64/boot/dts/amazon/alpine-v3.dtsi @@ -246,6 +246,7 @@ cpu@303 { cluster0_l2: cache@0 { compatible = "cache"; + cache-unified; cache-size = <0x200000>; cache-line-size = <64>; cache-sets = <2048>; @@ -254,6 +255,7 @@ cluster0_l2: cache@0 { cluster1_l2: cache@100 { compatible = "cache"; + cache-unified; cache-size = <0x200000>; cache-line-size = <64>; cache-sets = <2048>; @@ -262,6 +264,7 @@ cluster1_l2: cache@100 { cluster2_l2: cache@200 { compatible = "cache"; + cache-unified; cache-size = <0x200000>; cache-line-size = <64>; cache-sets = <2048>; @@ -270,6 +273,7 @@ cluster2_l2: cache@200 { cluster3_l2: cache@300 { compatible = "cache"; + cache-unified; cache-size = <0x200000>; cache-line-size = <64>; cache-sets = <2048>; From patchwork Mon Nov 7 15:56:55 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierre Gondois X-Patchwork-Id: 16527 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2145061wru; Mon, 7 Nov 2022 08:10:27 -0800 (PST) X-Google-Smtp-Source: AMsMyM54+6ysnvxtj7dOmP+e8MJoELSPPpMd7nOVNrOPDkkn4tYHFWT0TYn0oh2BuxmBs4zLHVPH X-Received: by 2002:a17:906:eb09:b0:7ad:d271:e5aa with SMTP id mb9-20020a170906eb0900b007add271e5aamr41536385ejb.182.1667837427594; Mon, 07 Nov 2022 08:10:27 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1667837427; cv=none; d=google.com; s=arc-20160816; b=nOsMGYWx79q3w8e1OTNzy4HM+Bc/xOon5oaS4UjGNyx6KxyAUyVc0BZQ9f+XW9G2+9 FR6KVN3YwQ5/zTQattHTuQ6Ia7dBJ/C5F+rdJHJgFIiqo/f78d6NYVlnXEbasId9Gey9 R1lZw3PlM9h+IwYTrL/2cB1eJ2b/O8j0x3weU0JuKC4WFMPMFEGbDpO5DkaZCJmsKU0C ZEmN59jUuXf7zpAjHCfqyqUM2trD6LFqSPjH7RFpxGAiHf3bl4YM4blETsJ4SAxUbQ3E oH+357tdcMJxNYd8m8+waLxxqXNNZBrvMr+KFYOTkgJUGin5+4K9M1rIEjgE3417Vh3Y KdCw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=FZWehfz3AzfHYG3f2z1igpZ9CifccWETd0pnt4vw/wA=; b=y7xWwiZlaGM9pfCsBS+gQswEVp9w/YptEn/9ZYbbPCNVhebeDhFCK3rATJk5uy6R1g 8eO/IVDaAfjWveVEqtkmNtVeaG22zdCHB6zREFgzKLBmXhqsyblmpBMjUqNT0ZVUD30U dfL8lQ//leW7WQtxBo4T0GrY5kdBHDvJhMQC0/cOnS803gUD7JI8nduceRWjFwufUC7y sxUFoM46cKZfPH96tTh6ZtGYgcUetl+1cONK6B2VvpoziXGIBdnmlgd5sUO0nrAuUjFc 2+6rTThYzL2eOGYwVPGMCr7Km1j/rQYTi2T7NuQEjxne1vu1QqZJXMk+0UsflTib3e9o b9wQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id b8-20020a056402278800b0045928479b71si11843289ede.405.2022.11.07.08.10.02; Mon, 07 Nov 2022 08:10:27 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232787AbiKGQH5 (ORCPT + 99 others); Mon, 7 Nov 2022 11:07:57 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57480 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232766AbiKGQHg (ORCPT ); Mon, 7 Nov 2022 11:07:36 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 24EC220BEC; Mon, 7 Nov 2022 08:07:17 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 14AAC139F; Mon, 7 Nov 2022 08:07:23 -0800 (PST) Received: from pierre123.arm.com (pierre123.nice.arm.com [10.34.100.128]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id DE0053F534; Mon, 7 Nov 2022 08:07:01 -0800 (PST) From: Pierre Gondois To: linux-kernel@vger.kernel.org Cc: Pierre Gondois , Rob Herring , Krzysztof Kozlowski , Florian Fainelli , Broadcom internal kernel review list , Ray Jui , Scott Branden , Tsahee Zidenberg , Antoine Tenart , Brijesh Singh , Suravee Suthikulpanit , Tom Lendacky , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Khuong Dinh , Liviu Dudau , Sudeep Holla , Lorenzo Pieralisi , William Zhang , Anand Gore , Kursad Oney , =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= , Alim Akhtar , Shawn Guo , Li Yang , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Chester Lin , =?utf-8?q?Andreas_F=C3=A4rber?= , Matthias Brugger , NXP S32 Linux Team , Wei Xu , Chanho Min , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Lars Povlsen , Steen Hegelund , Daniel Machon , UNGLinuxDriver@microchip.com, Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Thierry Reding , Jonathan Hunter , Andy Gross , Bjorn Andersson , Konrad Dybcio , Geert Uytterhoeven , Magnus Damm , Heiko Stuebner , Kunihiko Hayashi , Masami Hiramatsu , Jisheng Zhang , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Viorel Suman , Abel Vesa , Zhou Peng , Shenwei Wang , Ming Qian , Peng Fan , Tim Harvey , Adam Ford , Lucas Stach , Richard Zhu , Li Jun , Markus Niebel , Joakim Zhang , Marek Vasut , Laurent Pinchart , Paul Elder , Alexander Stein , Martin Kepplinger , David Heidelberg , Liu Ying , Oliver Graute , Dong Aisheng , Wei Fang , Clark Wang , Jacky Bai , Chris Packham , Vadym Kochan , Sameer Pujar , Prathamesh Shete , Mikko Perttunen , Akhil R , Sumit Gupta , Diogo Ivo , Vidya Sagar , Ashish Mhetre , Johan Jonker , Christopher Obbard , Ezequiel Garcia , Aswani Reddy , Shashank Prashar , devicetree@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-mediatek@lists.infradead.org, openbmc@lists.ozlabs.org, linux-tegra@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-realtek-soc@lists.infradead.org, linux-renesas-soc@vger.kernel.org, linux-rockchip@lists.infradead.org Subject: [PATCH v2 02/23] arm64: dts: Update cache properties for amd Date: Mon, 7 Nov 2022 16:56:55 +0100 Message-Id: <20221107155825.1644604-3-pierre.gondois@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221107155825.1644604-1-pierre.gondois@arm.com> References: <20221107155825.1644604-1-pierre.gondois@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748854298494259673?= X-GMAIL-MSGID: =?utf-8?q?1748854298494259673?= The DeviceTree Specification v0.3 specifies that the cache node 'compatible' and 'cache-level' properties are 'required'. Cf. s3.8 Multi-level and Shared Cache Nodes The 'cache-unified' property should be present if one of the properties for unified cache is present ('cache-size', ...). Update the Device Trees accordingly. Signed-off-by: Pierre Gondois Acked-by: Tom Lendacky --- arch/arm64/boot/dts/amd/amd-seattle-cpus.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/amd/amd-seattle-cpus.dtsi b/arch/arm64/boot/dts/amd/amd-seattle-cpus.dtsi index 93688a0b6820..9f2d983e082d 100644 --- a/arch/arm64/boot/dts/amd/amd-seattle-cpus.dtsi +++ b/arch/arm64/boot/dts/amd/amd-seattle-cpus.dtsi @@ -163,38 +163,47 @@ CPU7: cpu@301 { }; L2_0: l2-cache0 { + compatible = "cache"; cache-size = <0x100000>; cache-line-size = <64>; cache-sets = <1024>; cache-unified; + cache-level = <2>; next-level-cache = <&L3>; }; L2_1: l2-cache1 { + compatible = "cache"; cache-size = <0x100000>; cache-line-size = <64>; cache-sets = <1024>; cache-unified; + cache-level = <2>; next-level-cache = <&L3>; }; L2_2: l2-cache2 { + compatible = "cache"; cache-size = <0x100000>; cache-line-size = <64>; cache-sets = <1024>; cache-unified; + cache-level = <2>; next-level-cache = <&L3>; }; L2_3: l2-cache3 { + compatible = "cache"; cache-size = <0x100000>; cache-line-size = <64>; cache-sets = <1024>; cache-unified; + cache-level = <2>; next-level-cache = <&L3>; }; L3: l3-cache { + compatible = "cache"; cache-level = <3>; cache-size = <0x800000>; cache-line-size = <64>; From patchwork Mon Nov 7 15:56:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierre Gondois X-Patchwork-Id: 16531 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2146467wru; Mon, 7 Nov 2022 08:12:40 -0800 (PST) X-Google-Smtp-Source: AMsMyM7KStmHgryeTzKF6kvnIwBvDNX3olPJflL07zYOaP80dbOpDwTUQlZ78PcoJ9+X2ywOYNxn X-Received: by 2002:a05:6402:428f:b0:454:c988:4bb1 with SMTP id g15-20020a056402428f00b00454c9884bb1mr50264550edc.196.1667837560005; Mon, 07 Nov 2022 08:12:40 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1667837559; cv=none; d=google.com; s=arc-20160816; b=FQ86O+V+PBFTE2DGmkXWSJgO/oWUmdkPxN7AObCX/6Tz/FE8uNcft5KPu7FbNjYA0p ppGo2vXFHxRotYI2f4v7pZNXTWUYJVasUm/LRETx1LYTS4NitHbpl+QWzq17J9fueUA7 I+UUUD4MQTYxPIOrvlEATAGCTQ28Cpr+rTYKS8hPZ+mkSw7E+hMRAPx6jiRwwcdqsT5P G0+bI+qBUzG6eHN36c2Xt+6KDIgeD4we1MuKj/9tGfPOLYjk6u0nPM+DRacGil8+D34S 2lZHunGK9x5c4ELUiv38E9xX705QlUREt4d22UqK2TWicO6w0FCbndMShIEVIVCiG1Ym 9FGg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=rVyV7FBnqiLqZS5w43WBg38WhskGtDgDHFPB4MK4NdY=; b=KNaCgl/CGb/BUIMwR0ZyZaFfg9r5xgqEVGFIO4j2BNJxN2AwveZVy7TxxXEWM48p8A latevkF0KRnlETBEmR6T2ENm7xPqYhdqpTeQiuBXMvtcV5HzSBfbesUxp1HfOdTjNCBB hXL3iBA3PJqqPesMly+ysZAOzbSbsujPQrMZCLAA0Lh+fznMaYyuk5GYKQ60t6khW5Vu 2uIHvGFC6wVT1ss/j5SdKMGmx3Blrd6CQPEs2SL1B1YwVpGP8L/YkQ5/QbP9qhX/d+QQ cUhMse27pUgZgUDKeFjIuRN+OFWy/bvQrs5ff/TLO1ln/M6+YWE1sW8ezVkbQKyXT7QC dfCA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id bb6-20020a1709070a0600b00782c6ab6f01si10237871ejc.410.2022.11.07.08.12.16; Mon, 07 Nov 2022 08:12:39 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232315AbiKGQJb (ORCPT + 99 others); Mon, 7 Nov 2022 11:09:31 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57410 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232672AbiKGQJA (ORCPT ); Mon, 7 Nov 2022 11:09:00 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 1930F1BEB6; Mon, 7 Nov 2022 08:08:41 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id EDB4A139F; Mon, 7 Nov 2022 08:08:46 -0800 (PST) Received: from pierre123.arm.com (pierre123.nice.arm.com [10.34.100.128]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id C1D153F534; Mon, 7 Nov 2022 08:08:25 -0800 (PST) From: Pierre Gondois To: linux-kernel@vger.kernel.org Cc: Pierre Gondois , Martin Blumenstingl , Rob Herring , Krzysztof Kozlowski , Florian Fainelli , Broadcom internal kernel review list , Ray Jui , Scott Branden , Tsahee Zidenberg , Antoine Tenart , Brijesh Singh , Suravee Suthikulpanit , Tom Lendacky , Neil Armstrong , Kevin Hilman , Jerome Brunet , Khuong Dinh , Liviu Dudau , Sudeep Holla , Lorenzo Pieralisi , William Zhang , Anand Gore , Kursad Oney , =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= , Alim Akhtar , Shawn Guo , Li Yang , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Chester Lin , =?utf-8?q?Andreas_F=C3=A4rber?= , Matthias Brugger , NXP S32 Linux Team , Wei Xu , Chanho Min , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Lars Povlsen , Steen Hegelund , Daniel Machon , UNGLinuxDriver@microchip.com, Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Thierry Reding , Jonathan Hunter , Andy Gross , Bjorn Andersson , Konrad Dybcio , Geert Uytterhoeven , Magnus Damm , Heiko Stuebner , Kunihiko Hayashi , Masami Hiramatsu , Jisheng Zhang , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Viorel Suman , Abel Vesa , Shenwei Wang , Ming Qian , Peng Fan , Tim Harvey , Lucas Stach , Adam Ford , Richard Zhu , Li Jun , Joakim Zhang , Markus Niebel , Marek Vasut , Laurent Pinchart , Alexander Stein , Paul Elder , Martin Kepplinger , David Heidelberg , Liu Ying , Oliver Graute , Zhou Peng , Wei Fang , Jacky Bai , Clark Wang , Chris Packham , Vadym Kochan , Sameer Pujar , Prathamesh Shete , Akhil R , Mikko Perttunen , Sumit Gupta , Diogo Ivo , Vidya Sagar , Ashish Mhetre , Johan Jonker , Christopher Obbard , Ezequiel Garcia , Aswani Reddy , Shashank Prashar , Arjun K V , devicetree@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-mediatek@lists.infradead.org, openbmc@lists.ozlabs.org, linux-tegra@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-realtek-soc@lists.infradead.org, linux-renesas-soc@vger.kernel.org, linux-rockchip@lists.infradead.org Subject: [PATCH v2 03/23] arm64: dts: Update cache properties for amlogic Date: Mon, 7 Nov 2022 16:56:56 +0100 Message-Id: <20221107155825.1644604-4-pierre.gondois@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221107155825.1644604-1-pierre.gondois@arm.com> References: <20221107155825.1644604-1-pierre.gondois@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748854437620198758?= X-GMAIL-MSGID: =?utf-8?q?1748854437620198758?= The DeviceTree Specification v0.3 specifies that the cache node 'compatible' and 'cache-level' properties are 'required'. Cf. s3.8 Multi-level and Shared Cache Nodes The 'cache-unified' property should be present if one of the properties for unified cache is present ('cache-size', ...). Update the Device Trees accordingly. Signed-off-by: Pierre Gondois Reviewed-by: Martin Blumenstingl --- arch/arm64/boot/dts/amlogic/meson-a1.dtsi | 1 + arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 1 + arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 1 + arch/arm64/boot/dts/amlogic/meson-g12b.dtsi | 1 + arch/arm64/boot/dts/amlogic/meson-gx.dtsi | 1 + arch/arm64/boot/dts/amlogic/meson-sm1.dtsi | 1 + 6 files changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi index b4000cf65a9a..d2f7cb4e5375 100644 --- a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi @@ -36,6 +36,7 @@ cpu1: cpu@1 { l2: l2-cache0 { compatible = "cache"; + cache-level = <2>; }; }; diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi index 04f797b5a012..1648e67afbb6 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi @@ -105,6 +105,7 @@ cpu3: cpu@3 { l2: l2-cache0 { compatible = "cache"; + cache-level = <2>; }; }; diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi index fb0ab27d1f64..af23d7968181 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi @@ -50,6 +50,7 @@ cpu3: cpu@3 { l2: l2-cache0 { compatible = "cache"; + cache-level = <2>; }; }; diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi index ee8fcae9f9f0..9978e619accc 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi @@ -105,6 +105,7 @@ cpu103: cpu@103 { l2: l2-cache0 { compatible = "cache"; + cache-level = <2>; }; }; }; diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi index 023a52005494..e3c12e0be99d 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi @@ -132,6 +132,7 @@ cpu3: cpu@3 { l2: l2-cache0 { compatible = "cache"; + cache-level = <2>; }; }; diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi b/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi index 80737731af3f..d845eb19d93d 100644 --- a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi @@ -88,6 +88,7 @@ cpu3: cpu@3 { l2: l2-cache0 { compatible = "cache"; + cache-level = <2>; }; }; From patchwork Mon Nov 7 15:56:57 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierre Gondois X-Patchwork-Id: 16528 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2145706wru; Mon, 7 Nov 2022 08:11:31 -0800 (PST) X-Google-Smtp-Source: AMsMyM7ubOpWXocmSHATEjhWzda+XnXwJYIg7kIdM9NsXgICBneuhd/Z9af4RXgr5uVL0FdYzK4l X-Received: by 2002:a05:6402:1219:b0:462:e788:723f with SMTP id c25-20020a056402121900b00462e788723fmr51181746edw.319.1667837491173; Mon, 07 Nov 2022 08:11:31 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1667837491; cv=none; d=google.com; s=arc-20160816; b=pmDfH0tD2NgYbAUV6YPxJhvanlkAx7U1tXaZBvPTgPbcTy0OCM4vaz3tGU+C+oMk22 yFpk15qf39ofg9JpG6xInt59ZSAwJGfd7kdWpkb5m4RL1A9Pxg0APcbTVExBHvT2a8v5 Vzmc0OdevF9DvITIE+4h/C22euAE+fS2f22HOc8vv0IKF6pai2ZCECnxZd5SI4q3TKYq ySPqaAE17/TgQX6YHKLDdnV8qf7Cec8/hYLz+jGO9GVlzalnfAwMQbN117e34oshqaiA dTtWovVcxmb/8Qru6XootgexsbjxltDa3OO6wzbqqqc0uw/cfkcgEqEvHcLqdekb21DM C8eQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=2RHi3OnsojvXkjX18UANGfzdBDEKDAPVy948TgEhtMM=; b=MRNHm7AsWX4PwmNmzjJvjA54fYyl++PFglwRDAjW/e62fTEMBPAdxidDGeUHvA2MN/ +BfeofefqEc+vGljHsY5CS3j/XxUr3DM7Zhbk4YsM+2flM5lr8Qzf4gE507RIKllOz43 8FwFdiZ+vI7mRjeIF3ajtm8xnHiBF3/sYlEEEd9DDlmFffNFkjnb3kDfnF+ZN3bYWD4p /KJNA/4lJAbAGNckAjETPww/Ixut6u8d6rSvGsNy6xPHS6nlTj+DgrgI8mn7dEOiiknp JuIljmr0URybcC4wf9lsWv8Awp1HFY/ctsa/R9k/WSSAvnT5p4VhLPR98IWhuhtQUDQa 4nZQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id g15-20020a50ee0f000000b0045782fcb80asi8374930eds.225.2022.11.07.08.11.05; Mon, 07 Nov 2022 08:11:31 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232193AbiKGQKH (ORCPT + 99 others); Mon, 7 Nov 2022 11:10:07 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34250 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231302AbiKGQKF (ORCPT ); Mon, 7 Nov 2022 11:10:05 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 10689A186; Mon, 7 Nov 2022 08:10:04 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 00EA4139F; Mon, 7 Nov 2022 08:10:10 -0800 (PST) Received: from pierre123.arm.com (pierre123.nice.arm.com [10.34.100.128]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id C7D3F3F534; Mon, 7 Nov 2022 08:09:48 -0800 (PST) From: Pierre Gondois To: linux-kernel@vger.kernel.org Cc: Pierre Gondois , Rob Herring , Krzysztof Kozlowski , Florian Fainelli , Broadcom internal kernel review list , Ray Jui , Scott Branden , Tsahee Zidenberg , Antoine Tenart , Brijesh Singh , Suravee Suthikulpanit , Tom Lendacky , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Khuong Dinh , Liviu Dudau , Sudeep Holla , Lorenzo Pieralisi , William Zhang , Anand Gore , Kursad Oney , =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= , Alim Akhtar , Shawn Guo , Li Yang , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Chester Lin , =?utf-8?q?Andreas_F=C3=A4rber?= , Matthias Brugger , NXP S32 Linux Team , Wei Xu , Chanho Min , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Lars Povlsen , Steen Hegelund , Daniel Machon , UNGLinuxDriver@microchip.com, Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Thierry Reding , Jonathan Hunter , Andy Gross , Bjorn Andersson , Konrad Dybcio , Geert Uytterhoeven , Magnus Damm , Heiko Stuebner , Kunihiko Hayashi , Masami Hiramatsu , Jisheng Zhang , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Viorel Suman , Abel Vesa , Shenwei Wang , Ming Qian , Peng Fan , Lucas Stach , Adam Ford , Tim Harvey , Li Jun , Richard Zhu , Marek Vasut , Markus Niebel , Laurent Pinchart , Joakim Zhang , Paul Elder , Alexander Stein , Martin Kepplinger , David Heidelberg , Liu Ying , Oliver Graute , Shijie Qin , Clark Wang , Jacky Bai , Wei Fang , Chris Packham , Vadym Kochan , Sameer Pujar , Mikko Perttunen , Prathamesh Shete , Akhil R , Sumit Gupta , Diogo Ivo , Vidya Sagar , Ashish Mhetre , Johan Jonker , Christopher Obbard , Ezequiel Garcia , Aswani Reddy , Shashank Prashar , Ajay Kumar , devicetree@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-mediatek@lists.infradead.org, openbmc@lists.ozlabs.org, linux-tegra@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-realtek-soc@lists.infradead.org, linux-renesas-soc@vger.kernel.org, linux-rockchip@lists.infradead.org Subject: [PATCH v2 04/23] arm64: dts: Update cache properties for apm Date: Mon, 7 Nov 2022 16:56:57 +0100 Message-Id: <20221107155825.1644604-5-pierre.gondois@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221107155825.1644604-1-pierre.gondois@arm.com> References: <20221107155825.1644604-1-pierre.gondois@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748854364895677203?= X-GMAIL-MSGID: =?utf-8?q?1748854364895677203?= The DeviceTree Specification v0.3 specifies that the cache node 'compatible' and 'cache-level' properties are 'required'. Cf. s3.8 Multi-level and Shared Cache Nodes The 'cache-unified' property should be present if one of the properties for unified cache is present ('cache-size', ...). Update the Device Trees accordingly. Signed-off-by: Pierre Gondois --- arch/arm64/boot/dts/apm/apm-shadowcat.dtsi | 4 ++++ arch/arm64/boot/dts/apm/apm-storm.dtsi | 4 ++++ 2 files changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi b/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi index a8526f8157ec..68ba865fcd58 100644 --- a/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi +++ b/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi @@ -97,15 +97,19 @@ cpu@301 { }; xgene_L2_0: l2-cache-0 { compatible = "cache"; + cache-level = <2>; }; xgene_L2_1: l2-cache-1 { compatible = "cache"; + cache-level = <2>; }; xgene_L2_2: l2-cache-2 { compatible = "cache"; + cache-level = <2>; }; xgene_L2_3: l2-cache-3 { compatible = "cache"; + cache-level = <2>; }; }; diff --git a/arch/arm64/boot/dts/apm/apm-storm.dtsi b/arch/arm64/boot/dts/apm/apm-storm.dtsi index f56d687f772d..9ac7417f65eb 100644 --- a/arch/arm64/boot/dts/apm/apm-storm.dtsi +++ b/arch/arm64/boot/dts/apm/apm-storm.dtsi @@ -81,15 +81,19 @@ cpu@301 { }; xgene_L2_0: l2-cache-0 { compatible = "cache"; + cache-level = <2>; }; xgene_L2_1: l2-cache-1 { compatible = "cache"; + cache-level = <2>; }; xgene_L2_2: l2-cache-2 { compatible = "cache"; + cache-level = <2>; }; xgene_L2_3: l2-cache-3 { compatible = "cache"; + cache-level = <2>; }; }; From patchwork Mon Nov 7 15:56:58 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierre Gondois X-Patchwork-Id: 16532 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2146779wru; Mon, 7 Nov 2022 08:13:11 -0800 (PST) X-Google-Smtp-Source: AMsMyM5BmkFqGQZxqw8jTWxojycR0wQ2zlB6uIOo1JPWg/64QMSv2+KevGlLC1P/5biqtgC2Ah6Z X-Received: by 2002:aa7:c0cf:0:b0:463:8ba0:522f with SMTP id j15-20020aa7c0cf000000b004638ba0522fmr39984585edp.176.1667837591597; Mon, 07 Nov 2022 08:13:11 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1667837591; cv=none; d=google.com; s=arc-20160816; b=y5wZFaJNbc+jQD2ocbgmlzeYASHcjP+KxmJ2+g9L9n1c2e+SB3ig5KlpUH9iwpCJc6 oL7+LeWB9O7/cBcfqCDEdyr7S/nvrULlG2AneRm+XSl02yYs92hu8blcV0NhTdfr5Vjz P5n8nrR+bYqRMupJXGaSrRfM4UT3ZGsw370pBnSwUlA9F0fCxeEsQmMSV5htqn12Okvm uLujO7ORgfXhq1HuuYr9V5rH149CTk2n1q6RO7LXdrU1N6BlALQdUFKPOdaBN1zzUgw6 pPsJ7ZgI7dJcfojJhE6WwmC0VTm7HYnuejKIbd9iJWP4ZQDWbvS+UPTYfweBFIJyGKj8 tzMQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=CtAyLyU4/kp26nIDE/ttLLIt+pGqmSA/n1h8gMAeS7Q=; b=XQwiyr8nhVzKMaUtRPzee5nxBHOwponl/nTwxIB6gUJxSegDKKyI5eHNeyXJXyYwRm Syc0JDhd22/KzYAG13M/viqyiQyGNSygadImOpQPiUPKioepJBwP9JNRZrairUs5jN2K BhIgl7r44hHIxzbGLp8mzsYAjocXYU7z/6pU8Seqm3utu7cyzy9LM87ETFgUncjUv6Ot XdGdCHwfKO5SXilFJ8tCnhkQLTyY90u9zB5kf2iDJhwxLMZWH5oxEGh7vcpY+sMoyKOp /3inEdkyjCcx8/ieBP1b+gtpGKsRAUpFOXEQZ2LWTkVt+kLU2x2APz4jTBGaWOoATrLs 983g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id a5-20020a170906368500b0078dfd7054absi8135357ejc.544.2022.11.07.08.12.44; Mon, 07 Nov 2022 08:13:11 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232672AbiKGQLg (ORCPT + 99 others); Mon, 7 Nov 2022 11:11:36 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35608 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232579AbiKGQLc (ORCPT ); Mon, 7 Nov 2022 11:11:32 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id B4C7B2019C; Mon, 7 Nov 2022 08:11:31 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 7B33D113E; Mon, 7 Nov 2022 08:11:37 -0800 (PST) Received: from pierre123.arm.com (pierre123.nice.arm.com [10.34.100.128]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 105343F534; Mon, 7 Nov 2022 08:11:15 -0800 (PST) From: Pierre Gondois To: linux-kernel@vger.kernel.org Cc: Pierre Gondois , Rob Herring , Krzysztof Kozlowski , Florian Fainelli , Broadcom internal kernel review list , Ray Jui , Scott Branden , Tsahee Zidenberg , Antoine Tenart , Brijesh Singh , Suravee Suthikulpanit , Tom Lendacky , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Khuong Dinh , Liviu Dudau , Sudeep Holla , Lorenzo Pieralisi , William Zhang , Anand Gore , Kursad Oney , =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= , Alim Akhtar , Shawn Guo , Li Yang , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Chester Lin , =?utf-8?q?Andreas_F=C3=A4rber?= , Matthias Brugger , NXP S32 Linux Team , Wei Xu , Chanho Min , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Lars Povlsen , Steen Hegelund , Daniel Machon , UNGLinuxDriver@microchip.com, Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Thierry Reding , Jonathan Hunter , Andy Gross , Bjorn Andersson , Konrad Dybcio , Geert Uytterhoeven , Magnus Damm , Heiko Stuebner , Kunihiko Hayashi , Masami Hiramatsu , Jisheng Zhang , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Viorel Suman , Abel Vesa , Zhou Peng , Shijie Qin , Ming Qian , Peng Fan , Shenwei Wang , Adam Ford , Lucas Stach , Tim Harvey , Li Jun , Richard Zhu , Markus Niebel , Marco Felsch , Marek Vasut , Laurent Pinchart , Alexander Stein , Joakim Zhang , Paul Elder , Martin Kepplinger , David Heidelberg , Liu Ying , Oliver Graute , Ahmad Fatoum , Clark Wang , Jacky Bai , Chris Packham , Vadym Kochan , Sameer Pujar , Prathamesh Shete , Akhil R , Mikko Perttunen , Sumit Gupta , Diogo Ivo , Vidya Sagar , Ashish Mhetre , Johan Jonker , Christopher Obbard , Ezequiel Garcia , Aswani Reddy , Shashank Prashar , Arnd Bergmann , devicetree@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-mediatek@lists.infradead.org, openbmc@lists.ozlabs.org, linux-tegra@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-realtek-soc@lists.infradead.org, linux-renesas-soc@vger.kernel.org, linux-rockchip@lists.infradead.org Subject: [PATCH v2 05/23] arm64: dts: Update cache properties for arm Date: Mon, 7 Nov 2022 16:56:58 +0100 Message-Id: <20221107155825.1644604-6-pierre.gondois@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221107155825.1644604-1-pierre.gondois@arm.com> References: <20221107155825.1644604-1-pierre.gondois@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748854470634613619?= X-GMAIL-MSGID: =?utf-8?q?1748854470634613619?= The DeviceTree Specification v0.3 specifies that the cache node 'compatible' and 'cache-level' properties are 'required'. Cf. s3.8 Multi-level and Shared Cache Nodes The 'cache-unified' property should be present if one of the properties for unified cache is present ('cache-size', ...). Update the Device Trees accordingly. Signed-off-by: Pierre Gondois --- arch/arm64/boot/dts/arm/corstone1000.dtsi | 1 + arch/arm64/boot/dts/arm/foundation-v8.dtsi | 1 + arch/arm64/boot/dts/arm/juno-r1.dts | 2 ++ arch/arm64/boot/dts/arm/juno-r2.dts | 2 ++ arch/arm64/boot/dts/arm/juno.dts | 2 ++ arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts | 1 + arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts | 1 + 7 files changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/arm/corstone1000.dtsi b/arch/arm64/boot/dts/arm/corstone1000.dtsi index 4e46826f883a..21f1f952e985 100644 --- a/arch/arm64/boot/dts/arm/corstone1000.dtsi +++ b/arch/arm64/boot/dts/arm/corstone1000.dtsi @@ -53,6 +53,7 @@ gic: interrupt-controller@1c000000 { L2_0: l2-cache0 { compatible = "cache"; + cache-unified; cache-level = <2>; cache-size = <0x80000>; cache-line-size = <64>; diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dtsi b/arch/arm64/boot/dts/arm/foundation-v8.dtsi index 83e3e7e3984f..c8bd23b1a7ba 100644 --- a/arch/arm64/boot/dts/arm/foundation-v8.dtsi +++ b/arch/arm64/boot/dts/arm/foundation-v8.dtsi @@ -58,6 +58,7 @@ cpu3: cpu@3 { L2_0: l2-cache0 { compatible = "cache"; + cache-level = <2>; }; }; diff --git a/arch/arm64/boot/dts/arm/juno-r1.dts b/arch/arm64/boot/dts/arm/juno-r1.dts index 6451c62146fd..1d90eeebb37d 100644 --- a/arch/arm64/boot/dts/arm/juno-r1.dts +++ b/arch/arm64/boot/dts/arm/juno-r1.dts @@ -189,6 +189,7 @@ A53_3: cpu@103 { A57_L2: l2-cache0 { compatible = "cache"; + cache-unified; cache-size = <0x200000>; cache-line-size = <64>; cache-sets = <2048>; @@ -197,6 +198,7 @@ A57_L2: l2-cache0 { A53_L2: l2-cache1 { compatible = "cache"; + cache-unified; cache-size = <0x100000>; cache-line-size = <64>; cache-sets = <1024>; diff --git a/arch/arm64/boot/dts/arm/juno-r2.dts b/arch/arm64/boot/dts/arm/juno-r2.dts index 438cd1ff4bd0..d2ada69b0a43 100644 --- a/arch/arm64/boot/dts/arm/juno-r2.dts +++ b/arch/arm64/boot/dts/arm/juno-r2.dts @@ -195,6 +195,7 @@ A53_3: cpu@103 { A72_L2: l2-cache0 { compatible = "cache"; + cache-unified; cache-size = <0x200000>; cache-line-size = <64>; cache-sets = <2048>; @@ -203,6 +204,7 @@ A72_L2: l2-cache0 { A53_L2: l2-cache1 { compatible = "cache"; + cache-unified; cache-size = <0x100000>; cache-line-size = <64>; cache-sets = <1024>; diff --git a/arch/arm64/boot/dts/arm/juno.dts b/arch/arm64/boot/dts/arm/juno.dts index cf4a58211399..5e48a01a5b9f 100644 --- a/arch/arm64/boot/dts/arm/juno.dts +++ b/arch/arm64/boot/dts/arm/juno.dts @@ -194,6 +194,7 @@ A53_3: cpu@103 { A57_L2: l2-cache0 { compatible = "cache"; + cache-unified; cache-size = <0x200000>; cache-line-size = <64>; cache-sets = <2048>; @@ -202,6 +203,7 @@ A57_L2: l2-cache0 { A53_L2: l2-cache1 { compatible = "cache"; + cache-unified; cache-size = <0x100000>; cache-line-size = <64>; cache-sets = <1024>; diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts index 258991ad7cc0..ef68f5aae7dd 100644 --- a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts +++ b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts @@ -71,6 +71,7 @@ cpu@3 { L2_0: l2-cache0 { compatible = "cache"; + cache-level = <2>; }; }; diff --git a/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts b/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts index 5b6d9d8e934d..796cd7d02eb5 100644 --- a/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts +++ b/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts @@ -57,6 +57,7 @@ cpu@1 { L2_0: l2-cache0 { compatible = "cache"; + cache-level = <2>; }; }; From patchwork Mon Nov 7 15:56:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierre Gondois X-Patchwork-Id: 16533 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2147308wru; Mon, 7 Nov 2022 08:14:07 -0800 (PST) X-Google-Smtp-Source: AMsMyM7q8P5XSL8hVJX2uosyxTPbZBfsITcBXYfK7+fwZ94x9jfQ3jDSOODFjUemulyQOkviyoCL X-Received: by 2002:a17:907:a4e:b0:77d:94d:8148 with SMTP id be14-20020a1709070a4e00b0077d094d8148mr46728643ejc.607.1667837646821; Mon, 07 Nov 2022 08:14:06 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1667837646; cv=none; d=google.com; s=arc-20160816; b=sdrIAz3j3vonIq7mz6DOD1/Qhymzjovgz/J+ODmD254o196oDLYy83SRcibsKR9rv2 Ixw/NJ1FBGC1jEdJnPgCiRr45o/yZrog8B4LtGSv3ThauKQaeIYYSxEoWAYWEM4anmo3 lyNMU2LFdHslwVnjve0jkO4jFDCwaDWisDtliQHljJEi7cadn1qXPBSvktZxYqylUkvI aen5AEuOvubHDMgFRIzoMHZBDFmJwJoY/SxYXVpoTKhr/Ou6dZQBHvseX+2X/9LJ3vSw TwMiIQ/i7GxJzlQMkBBX+7yXMsX+SrKPXdeeSZnEgAC8GtlNNVECGS2MDLj+dPmHPrTk DNQA== ARC-Message-Signature: i=1; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id c6-20020a05640227c600b0045c42a9f588si10952028ede.408.2022.11.07.08.13.43; Mon, 07 Nov 2022 08:14:06 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232677AbiKGQNM (ORCPT + 99 others); Mon, 7 Nov 2022 11:13:12 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36752 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232441AbiKGQM7 (ORCPT ); Mon, 7 Nov 2022 11:12:59 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 5001820375; Mon, 7 Nov 2022 08:12:56 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 3EFEE139F; Mon, 7 Nov 2022 08:13:02 -0800 (PST) Received: from pierre123.arm.com (pierre123.nice.arm.com [10.34.100.128]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 328D33F534; Mon, 7 Nov 2022 08:12:41 -0800 (PST) From: Pierre Gondois To: linux-kernel@vger.kernel.org Cc: Pierre Gondois , William Zhang , Rob Herring , Krzysztof Kozlowski , Florian Fainelli , Broadcom internal kernel review list , Ray Jui , Scott Branden , Tsahee Zidenberg , Antoine Tenart , Brijesh Singh , Suravee Suthikulpanit , Tom Lendacky , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Khuong Dinh , Liviu Dudau , Sudeep Holla , Lorenzo Pieralisi , Anand Gore , Kursad Oney , =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= , Alim Akhtar , Shawn Guo , Li Yang , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Chester Lin , =?utf-8?q?Andreas_F=C3=A4rber?= , Matthias Brugger , NXP S32 Linux Team , Wei Xu , Chanho Min , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Lars Povlsen , Steen Hegelund , Daniel Machon , UNGLinuxDriver@microchip.com, Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Thierry Reding , Jonathan Hunter , Andy Gross , Bjorn Andersson , Konrad Dybcio , Geert Uytterhoeven , Magnus Damm , Heiko Stuebner , Kunihiko Hayashi , Masami Hiramatsu , Jisheng Zhang , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Viorel Suman , Abel Vesa , Peng Fan , Shenwei Wang , Ming Qian , Tim Harvey , Adam Ford , Lucas Stach , Li Jun , Richard Zhu , Markus Niebel , Marek Vasut , Laurent Pinchart , Joakim Zhang , Alexander Stein , Paul Elder , Martin Kepplinger , David Heidelberg , Liu Ying , Oliver Graute , Wei Fang , Jacky Bai , Clark Wang , Chris Packham , Vadym Kochan , Sameer Pujar , Mikko Perttunen , Akhil R , Prathamesh Shete , Sumit Gupta , Diogo Ivo , Vidya Sagar , Ashish Mhetre , Johan Jonker , Christopher Obbard , Ezequiel Garcia , Aswani Reddy , Shashank Prashar , Andi Shyti , devicetree@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-mediatek@lists.infradead.org, openbmc@lists.ozlabs.org, linux-tegra@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-realtek-soc@lists.infradead.org, linux-renesas-soc@vger.kernel.org, linux-rockchip@lists.infradead.org Subject: [PATCH v2 06/23] arm64: dts: Update cache properties for broadcom Date: Mon, 7 Nov 2022 16:56:59 +0100 Message-Id: <20221107155825.1644604-7-pierre.gondois@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221107155825.1644604-1-pierre.gondois@arm.com> References: <20221107155825.1644604-1-pierre.gondois@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748854528053474651?= X-GMAIL-MSGID: =?utf-8?q?1748854528053474651?= The DeviceTree Specification v0.3 specifies that the cache node 'compatible' and 'cache-level' properties are 'required'. Cf. s3.8 Multi-level and Shared Cache Nodes The 'cache-unified' property should be present if one of the properties for unified cache is present ('cache-size', ...). Update the Device Trees accordingly. Signed-off-by: Pierre Gondois Acked-by: William Zhang --- arch/arm/boot/dts/bcm2711.dtsi | 1 + arch/arm/boot/dts/bcm2837.dtsi | 1 + arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi | 1 + arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi | 1 + arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi | 1 + arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi | 1 + arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi | 1 + arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi | 1 + arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi | 1 + arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi | 1 + arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi | 4 ++++ 11 files changed, 14 insertions(+) diff --git a/arch/arm/boot/dts/bcm2711.dtsi b/arch/arm/boot/dts/bcm2711.dtsi index 941c4d16791b..c6104149f959 100644 --- a/arch/arm/boot/dts/bcm2711.dtsi +++ b/arch/arm/boot/dts/bcm2711.dtsi @@ -536,6 +536,7 @@ cpu3: cpu@3 { */ l2: l2-cache0 { compatible = "cache"; + cache-unified; cache-size = <0x100000>; cache-line-size = <64>; cache-sets = <1024>; // 1MiB(size)/64(line-size)=16384ways/16-way set diff --git a/arch/arm/boot/dts/bcm2837.dtsi b/arch/arm/boot/dts/bcm2837.dtsi index 5dbdebc46259..b352ac784af6 100644 --- a/arch/arm/boot/dts/bcm2837.dtsi +++ b/arch/arm/boot/dts/bcm2837.dtsi @@ -115,6 +115,7 @@ cpu3: cpu@3 { */ l2: l2-cache0 { compatible = "cache"; + cache-unified; cache-size = <0x80000>; cache-line-size = <64>; cache-sets = <512>; // 512KiB(size)/64(line-size)=8192ways/16-way set diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi index dac9d3b4e91d..996412ed52a0 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi @@ -63,6 +63,7 @@ cpu3: cpu@3 { l2: l2-cache0 { compatible = "cache"; + cache-level = <2>; }; }; diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi index 3d016c2ce675..d5bc31980f03 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi @@ -51,6 +51,7 @@ B53_3: cpu@3 { L2_0: l2-cache0 { compatible = "cache"; + cache-level = <2>; }; }; diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi index 04de96bd0a03..6f805266d3c9 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi @@ -35,6 +35,7 @@ B53_1: cpu@1 { L2_0: l2-cache0 { compatible = "cache"; + cache-level = <2>; }; }; diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi index 13629702f70b..b982249b80a2 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi @@ -51,6 +51,7 @@ B53_3: cpu@3 { L2_0: l2-cache0 { compatible = "cache"; + cache-level = <2>; }; }; diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi index c3e6197be808..a996d436e977 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi @@ -51,6 +51,7 @@ B53_3: cpu@3 { L2_0: l2-cache0 { compatible = "cache"; + cache-level = <2>; }; }; diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi index 0bce6497219f..62c530d4b103 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi @@ -35,6 +35,7 @@ B53_1: cpu@1 { L2_0: l2-cache0 { compatible = "cache"; + cache-level = <2>; }; }; diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi index 29a880c6c858..ba3d5a98ccbc 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi @@ -50,6 +50,7 @@ B53_3: cpu@3 { }; L2_0: l2-cache0 { compatible = "cache"; + cache-level = <2>; }; }; diff --git a/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi b/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi index fda97c47f4e9..18cdbc20f03f 100644 --- a/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi +++ b/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi @@ -79,6 +79,7 @@ A57_3: cpu@3 { CLUSTER0_L2: l2-cache@0 { compatible = "cache"; + cache-level = <2>; }; }; diff --git a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi index 8f8c25e51194..e05901abe957 100644 --- a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi +++ b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi @@ -108,18 +108,22 @@ cpu@301 { CLUSTER0_L2: l2-cache@0 { compatible = "cache"; + cache-level = <2>; }; CLUSTER1_L2: l2-cache@100 { compatible = "cache"; + cache-level = <2>; }; CLUSTER2_L2: l2-cache@200 { compatible = "cache"; + cache-level = <2>; }; CLUSTER3_L2: l2-cache@300 { compatible = "cache"; + cache-level = <2>; }; }; From patchwork Mon Nov 7 15:57:00 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierre Gondois X-Patchwork-Id: 16534 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2147923wru; Mon, 7 Nov 2022 08:15:10 -0800 (PST) X-Google-Smtp-Source: AMsMyM5oygXqeA0yvL3+H9JG1MqdALs80ncX4m+sGXMdPKPMdnoZFmDToQHLORdjacKYZg3dvIa0 X-Received: by 2002:a17:906:9be6:b0:7ad:a73b:40c7 with SMTP id de38-20020a1709069be600b007ada73b40c7mr48957904ejc.483.1667837710146; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id hg3-20020a1709072cc300b007ad2d85d753si8039576ejc.495.2022.11.07.08.14.45; Mon, 07 Nov 2022 08:15:10 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232653AbiKGQOW (ORCPT + 99 others); Mon, 7 Nov 2022 11:14:22 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38546 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231419AbiKGQOU (ORCPT ); Mon, 7 Nov 2022 11:14:20 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 0941ED6B; Mon, 7 Nov 2022 08:14:18 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E1923139F; Mon, 7 Nov 2022 08:14:23 -0800 (PST) Received: from pierre123.arm.com (pierre123.nice.arm.com [10.34.100.128]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 7A2E33F534; Mon, 7 Nov 2022 08:14:02 -0800 (PST) From: Pierre Gondois To: linux-kernel@vger.kernel.org Cc: Pierre Gondois , Rob Herring , Krzysztof Kozlowski , Florian Fainelli , Broadcom internal kernel review list , Ray Jui , Scott Branden , Tsahee Zidenberg , Antoine Tenart , Brijesh Singh , Suravee Suthikulpanit , Tom Lendacky , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Khuong Dinh , Liviu Dudau , Sudeep Holla , Lorenzo Pieralisi , William Zhang , Anand Gore , Kursad Oney , =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= , Alim Akhtar , Shawn Guo , Li Yang , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Chester Lin , =?utf-8?q?Andreas_F=C3=A4rber?= , Matthias Brugger , NXP S32 Linux Team , Wei Xu , Chanho Min , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Lars Povlsen , Steen Hegelund , Daniel Machon , UNGLinuxDriver@microchip.com, Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Thierry Reding , Jonathan Hunter , Andy Gross , Bjorn Andersson , Konrad Dybcio , Geert Uytterhoeven , Magnus Damm , Heiko Stuebner , Kunihiko Hayashi , Masami Hiramatsu , Jisheng Zhang , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Viorel Suman , Abel Vesa , Shijie Qin , Peng Fan , Ming Qian , Shenwei Wang , Adam Ford , Tim Harvey , Lucas Stach , Li Jun , Richard Zhu , Markus Niebel , Marek Vasut , Marco Felsch , Laurent Pinchart , Alexander Stein , Paul Elder , Martin Kepplinger , David Heidelberg , Oliver Graute , Liu Ying , Zhou Peng , Haibo Chen , Clark Wang , Jacky Bai , Wei Fang , Chris Packham , Vadym Kochan , Sameer Pujar , Mikko Perttunen , Prathamesh Shete , Akhil R , Sumit Gupta , Diogo Ivo , Vidya Sagar , Ashish Mhetre , Johan Jonker , Christopher Obbard , Ezequiel Garcia , Aswani Reddy , Shashank Prashar , Sriranjani P , devicetree@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-mediatek@lists.infradead.org, openbmc@lists.ozlabs.org, linux-tegra@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-realtek-soc@lists.infradead.org, linux-renesas-soc@vger.kernel.org, linux-rockchip@lists.infradead.org Subject: [PATCH v2 07/23] arm64: dts: Update cache properties for exynos Date: Mon, 7 Nov 2022 16:57:00 +0100 Message-Id: <20221107155825.1644604-8-pierre.gondois@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221107155825.1644604-1-pierre.gondois@arm.com> References: <20221107155825.1644604-1-pierre.gondois@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748854594529047848?= X-GMAIL-MSGID: =?utf-8?q?1748854594529047848?= The DeviceTree Specification v0.3 specifies that the cache node 'compatible' and 'cache-level' properties are 'required'. Cf. s3.8 Multi-level and Shared Cache Nodes The 'cache-unified' property should be present if one of the properties for unified cache is present ('cache-size', ...). Update the Device Trees accordingly. Signed-off-by: Pierre Gondois --- arch/arm64/boot/dts/exynos/exynos5433.dtsi | 4 ++++ arch/arm64/boot/dts/exynos/exynos7.dtsi | 2 ++ 2 files changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi index bd6a354b9cb5..8619920da4b6 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi @@ -226,6 +226,8 @@ cpu7: cpu@3 { cluster_a57_l2: l2-cache0 { compatible = "cache"; + cache-level = <2>; + cache-unified; cache-size = <0x200000>; cache-line-size = <64>; cache-sets = <2048>; @@ -233,6 +235,8 @@ cluster_a57_l2: l2-cache0 { cluster_a53_l2: l2-cache1 { compatible = "cache"; + cache-level = <2>; + cache-unified; cache-size = <0x40000>; cache-line-size = <64>; cache-sets = <256>; diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi b/arch/arm64/boot/dts/exynos/exynos7.dtsi index 1cd771c90b47..f378d8629d88 100644 --- a/arch/arm64/boot/dts/exynos/exynos7.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi @@ -107,6 +107,8 @@ cpu_atlas3: cpu@3 { atlas_l2: l2-cache0 { compatible = "cache"; + cache-level = <2>; + cache-unified; cache-size = <0x200000>; cache-line-size = <64>; cache-sets = <2048>; From patchwork Mon Nov 7 15:57:01 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierre Gondois X-Patchwork-Id: 16535 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2151296wru; Mon, 7 Nov 2022 08:21:11 -0800 (PST) X-Google-Smtp-Source: AMsMyM6y6XEvRKTuMcWI+CupwGOIvHksSr784YvHbFEA7VPIFllqJStGzsUaPAI3Cu92eherK/ji X-Received: by 2002:a17:90b:1d4d:b0:213:98e7:3b3 with SMTP id ok13-20020a17090b1d4d00b0021398e703b3mr51585056pjb.197.1667838071421; Mon, 07 Nov 2022 08:21:11 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1667838071; cv=none; d=google.com; s=arc-20160816; b=ouEXM1EhFEjpJdhIypgFPtBUWKlmU9PeV7PM+e9W1j6CiE1r/whYcxFPIe9UGIAdVX PLYI6gv9aGd8hV0MUziaKc0xGXIl8mZ/NDF+ZTij2zN1WX7Mxuc27VshiBsA+fmd7aCq H00pIDSg6LzeadYaDA1LLF2atg0as30ssz64yBja4seloT6NjB/B2PzMW3rEyZk4Uzgm G20ydc5WNYe8qvYwPK2NjZJR3HMn5OVUpQ+A133a7ARHpe7CTL/cF7kga94Y5xrN/rHi 8O9TfwfMCdE8+fCO2Q/jBhgCfrz/F7UZDoE9HC1ZN6Cp67795V+SGbNAAteBkMjgJQlW Pw6w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=u3eWTnOtwG/MPfeiwzpExvmXdF1ai0XkThyo1H6OZag=; b=vAD7+mXJRL5h7FmIxFdTysPGCvbSwfmi0IwIEJxATuCMJHbgT8XPca+RV6K3sEjdwf AvtKkmKsaic4SHlOoyJew9vmIGwLEjcweHS40P5w6+QCCcBHD/fWxpS/JRqCpY3gSzOU CZ+EV1XsGREZ57GmQ4Gv6PRWTDmAwiwS8Fh6BFiPGzVncR+d0m1B+9OgQPujw+wuw6YD tD7EXA2kAOnV5G+a1tRrw1Jl/+pRS1Hro+agxs3dIgRj8oj4Jk1kj+P6TUs/Tn6vdMWr bvebLhiORO1GDku/DT6VBqsCqkIQadOWENUpbrN+arOROVbmxsoQRIEHQ5WJqo+IvcPb Gx+w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id q6-20020a631f46000000b00437ec09f591si8935424pgm.135.2022.11.07.08.20.54; Mon, 07 Nov 2022 08:21:11 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232540AbiKGQPu (ORCPT + 99 others); Mon, 7 Nov 2022 11:15:50 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39928 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232338AbiKGQPq (ORCPT ); Mon, 7 Nov 2022 11:15:46 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 5AF312737; Mon, 7 Nov 2022 08:15:45 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 49D94ED1; Mon, 7 Nov 2022 08:15:51 -0800 (PST) Received: from pierre123.arm.com (pierre123.nice.arm.com [10.34.100.128]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id D2B393F534; Mon, 7 Nov 2022 08:15:29 -0800 (PST) From: Pierre Gondois To: linux-kernel@vger.kernel.org Cc: Pierre Gondois , Rob Herring , Krzysztof Kozlowski , Florian Fainelli , Broadcom internal kernel review list , Ray Jui , Scott Branden , Tsahee Zidenberg , Antoine Tenart , Brijesh Singh , Suravee Suthikulpanit , Tom Lendacky , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Khuong Dinh , Liviu Dudau , Sudeep Holla , Lorenzo Pieralisi , William Zhang , Anand Gore , Kursad Oney , =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= , Alim Akhtar , Shawn Guo , Li Yang , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Chester Lin , =?utf-8?q?Andreas_F=C3=A4rber?= , Matthias Brugger , NXP S32 Linux Team , Wei Xu , Chanho Min , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Lars Povlsen , Steen Hegelund , Daniel Machon , UNGLinuxDriver@microchip.com, Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Thierry Reding , Jonathan Hunter , Andy Gross , Bjorn Andersson , Konrad Dybcio , Geert Uytterhoeven , Magnus Damm , Heiko Stuebner , Kunihiko Hayashi , Masami Hiramatsu , Jisheng Zhang , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Viorel Suman , Abel Vesa , Shenwei Wang , Shijie Qin , Ming Qian , Peng Fan , Adam Ford , Lucas Stach , Tim Harvey , Li Jun , Richard Zhu , Joakim Zhang , Markus Niebel , Marek Vasut , Laurent Pinchart , Paul Elder , Alexander Stein , Martin Kepplinger , David Heidelberg , Liu Ying , Oliver Graute , Zhou Peng , Haibo Chen , Ahmad Fatoum , Clark Wang , Jacky Bai , Chris Packham , Vadym Kochan , Sameer Pujar , Prathamesh Shete , Mikko Perttunen , Akhil R , Sumit Gupta , Diogo Ivo , Vidya Sagar , Ashish Mhetre , Johan Jonker , Christopher Obbard , Ezequiel Garcia , Aswani Reddy , Shashank Prashar , Ajay Kumar , devicetree@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-mediatek@lists.infradead.org, openbmc@lists.ozlabs.org, linux-tegra@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-realtek-soc@lists.infradead.org, linux-renesas-soc@vger.kernel.org, linux-rockchip@lists.infradead.org Subject: [PATCH v2 08/23] arm64: dts: Update cache properties for freescale Date: Mon, 7 Nov 2022 16:57:01 +0100 Message-Id: <20221107155825.1644604-9-pierre.gondois@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221107155825.1644604-1-pierre.gondois@arm.com> References: <20221107155825.1644604-1-pierre.gondois@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748854973494817471?= X-GMAIL-MSGID: =?utf-8?q?1748854973494817471?= The DeviceTree Specification v0.3 specifies that the cache node 'compatible' and 'cache-level' properties are 'required'. Cf. s3.8 Multi-level and Shared Cache Nodes The 'cache-unified' property should be present if one of the properties for unified cache is present ('cache-size', ...). Update the Device Trees accordingly. Signed-off-by: Pierre Gondois --- arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 1 + arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 1 + arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 1 + arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi | 4 ++++ arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi | 4 ++++ arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 8 ++++++++ arch/arm64/boot/dts/freescale/imx8dxl.dtsi | 1 + arch/arm64/boot/dts/freescale/imx8mm.dtsi | 1 + arch/arm64/boot/dts/freescale/imx8mn.dtsi | 1 + arch/arm64/boot/dts/freescale/imx8mp.dtsi | 1 + arch/arm64/boot/dts/freescale/imx8mq.dtsi | 1 + arch/arm64/boot/dts/freescale/imx8qm.dtsi | 2 ++ arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 1 + arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 1 + arch/arm64/boot/dts/freescale/s32g2.dtsi | 2 ++ arch/arm64/boot/dts/freescale/s32v234.dtsi | 2 ++ 16 files changed, 32 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi index ac1c3a7e5f7a..1b33cabb4e14 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi @@ -46,6 +46,7 @@ cpu1: cpu@1 { l2: l2-cache { compatible = "cache"; + cache-level = <2>; }; }; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi index 704f72caddd3..b9fd24cdc919 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi @@ -84,6 +84,7 @@ cpu3: cpu@3 { l2: l2-cache { compatible = "cache"; + cache-level = <2>; }; }; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi index 3d9e29824bb2..a01e3cfec77f 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi @@ -79,6 +79,7 @@ cpu3: cpu@3 { l2: l2-cache { compatible = "cache"; + cache-level = <2>; }; }; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi index a2cadf757148..1e5d76c4d83d 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi @@ -95,18 +95,22 @@ cpu7: cpu@301 { cluster0_l2: l2-cache0 { compatible = "cache"; + cache-level = <2>; }; cluster1_l2: l2-cache1 { compatible = "cache"; + cache-level = <2>; }; cluster2_l2: l2-cache2 { compatible = "cache"; + cache-level = <2>; }; cluster3_l2: l2-cache3 { compatible = "cache"; + cache-level = <2>; }; CPU_PW20: cpu-pw20 { diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi index c3dc38188c17..c12c86915ec8 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi @@ -95,18 +95,22 @@ cpu7: cpu@301 { cluster0_l2: l2-cache0 { compatible = "cache"; + cache-level = <2>; }; cluster1_l2: l2-cache1 { compatible = "cache"; + cache-level = <2>; }; cluster2_l2: l2-cache2 { compatible = "cache"; + cache-level = <2>; }; cluster3_l2: l2-cache3 { compatible = "cache"; + cache-level = <2>; }; CPU_PW20: cpu-pw20 { diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi index 8c76d86cb756..50c19e8405d5 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi @@ -300,6 +300,7 @@ cpu701: cpu@701 { cluster0_l2: l2-cache0 { compatible = "cache"; + cache-unified; cache-size = <0x100000>; cache-line-size = <64>; cache-sets = <1024>; @@ -308,6 +309,7 @@ cluster0_l2: l2-cache0 { cluster1_l2: l2-cache1 { compatible = "cache"; + cache-unified; cache-size = <0x100000>; cache-line-size = <64>; cache-sets = <1024>; @@ -316,6 +318,7 @@ cluster1_l2: l2-cache1 { cluster2_l2: l2-cache2 { compatible = "cache"; + cache-unified; cache-size = <0x100000>; cache-line-size = <64>; cache-sets = <1024>; @@ -324,6 +327,7 @@ cluster2_l2: l2-cache2 { cluster3_l2: l2-cache3 { compatible = "cache"; + cache-unified; cache-size = <0x100000>; cache-line-size = <64>; cache-sets = <1024>; @@ -332,6 +336,7 @@ cluster3_l2: l2-cache3 { cluster4_l2: l2-cache4 { compatible = "cache"; + cache-unified; cache-size = <0x100000>; cache-line-size = <64>; cache-sets = <1024>; @@ -340,6 +345,7 @@ cluster4_l2: l2-cache4 { cluster5_l2: l2-cache5 { compatible = "cache"; + cache-unified; cache-size = <0x100000>; cache-line-size = <64>; cache-sets = <1024>; @@ -348,6 +354,7 @@ cluster5_l2: l2-cache5 { cluster6_l2: l2-cache6 { compatible = "cache"; + cache-unified; cache-size = <0x100000>; cache-line-size = <64>; cache-sets = <1024>; @@ -356,6 +363,7 @@ cluster6_l2: l2-cache6 { cluster7_l2: l2-cache7 { compatible = "cache"; + cache-unified; cache-size = <0x100000>; cache-line-size = <64>; cache-sets = <1024>; diff --git a/arch/arm64/boot/dts/freescale/imx8dxl.dtsi b/arch/arm64/boot/dts/freescale/imx8dxl.dtsi index 5ddbda0b4def..9a7965a694a2 100644 --- a/arch/arm64/boot/dts/freescale/imx8dxl.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8dxl.dtsi @@ -59,6 +59,7 @@ A35_1: cpu@1 { A35_L2: l2-cache0 { compatible = "cache"; + cache-level = <2>; }; }; diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi index dabd94dc30c4..149b7af5349d 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi @@ -139,6 +139,7 @@ A53_3: cpu@3 { A53_L2: l2-cache0 { compatible = "cache"; cache-level = <2>; + cache-unified; cache-size = <0x80000>; cache-line-size = <64>; cache-sets = <512>; diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi index ad0b99adf691..12cc1a6c50c2 100644 --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi @@ -139,6 +139,7 @@ A53_3: cpu@3 { A53_L2: l2-cache0 { compatible = "cache"; cache-level = <2>; + cache-unified; cache-size = <0x80000>; cache-line-size = <64>; cache-sets = <512>; diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index bb916a0948a8..e2a9ddbe4d40 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -123,6 +123,7 @@ A53_3: cpu@3 { A53_L2: l2-cache0 { compatible = "cache"; + cache-unified; cache-level = <2>; cache-size = <0x80000>; cache-line-size = <64>; diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi index 19eaa523564d..1b7e7ac2750a 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi @@ -179,6 +179,7 @@ A53_3: cpu@3 { A53_L2: l2-cache0 { compatible = "cache"; cache-level = <2>; + cache-unified; cache-size = <0x100000>; cache-line-size = <64>; cache-sets = <1024>; diff --git a/arch/arm64/boot/dts/freescale/imx8qm.dtsi b/arch/arm64/boot/dts/freescale/imx8qm.dtsi index c9c2b6536233..41ce8336f29e 100644 --- a/arch/arm64/boot/dts/freescale/imx8qm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8qm.dtsi @@ -136,6 +136,7 @@ A72_1: cpu@101 { A53_L2: l2-cache0 { compatible = "cache"; cache-level = <2>; + cache-unified; cache-size = <0x100000>; cache-line-size = <64>; cache-sets = <1024>; @@ -144,6 +145,7 @@ A53_L2: l2-cache0 { A72_L2: l2-cache1 { compatible = "cache"; cache-level = <2>; + cache-unified; cache-size = <0x100000>; cache-line-size = <64>; cache-sets = <1024>; diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi index f4ea18bb95ab..85c0b1d2bac5 100644 --- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi @@ -127,6 +127,7 @@ A35_3: cpu@3 { A35_L2: l2-cache0 { compatible = "cache"; cache-level = <2>; + cache-unified; cache-size = <0x80000>; cache-line-size = <64>; cache-sets = <1024>; diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi index 06ce5f19aa8a..32193a43ff49 100644 --- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi @@ -51,6 +51,7 @@ A35_1: cpu@1 { A35_L2: l2-cache0 { compatible = "cache"; + cache-level = <2>; }; }; diff --git a/arch/arm64/boot/dts/freescale/s32g2.dtsi b/arch/arm64/boot/dts/freescale/s32g2.dtsi index 824d401e7a2c..d8c82da88ca0 100644 --- a/arch/arm64/boot/dts/freescale/s32g2.dtsi +++ b/arch/arm64/boot/dts/freescale/s32g2.dtsi @@ -52,10 +52,12 @@ cpu3: cpu@101 { cluster0_l2: l2-cache0 { compatible = "cache"; + cache-level = <2>; }; cluster1_l2: l2-cache1 { compatible = "cache"; + cache-level = <2>; }; }; diff --git a/arch/arm64/boot/dts/freescale/s32v234.dtsi b/arch/arm64/boot/dts/freescale/s32v234.dtsi index ba0b5305d481..3e306218d533 100644 --- a/arch/arm64/boot/dts/freescale/s32v234.dtsi +++ b/arch/arm64/boot/dts/freescale/s32v234.dtsi @@ -61,10 +61,12 @@ cpu3: cpu@101 { cluster0_l2_cache: l2-cache0 { compatible = "cache"; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id c21-20020a63ef55000000b0043a061cc079si10896035pgk.358.2022.11.07.08.21.20; Mon, 07 Nov 2022 08:21:33 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232831AbiKGQRE (ORCPT + 99 others); Mon, 7 Nov 2022 11:17:04 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40836 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231594AbiKGQRC (ORCPT ); Mon, 7 Nov 2022 11:17:02 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 21A532708; Mon, 7 Nov 2022 08:17:01 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 10C6FED1; Mon, 7 Nov 2022 08:17:07 -0800 (PST) Received: from pierre123.arm.com (pierre123.nice.arm.com [10.34.100.128]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id D943E3F534; Mon, 7 Nov 2022 08:16:45 -0800 (PST) From: Pierre Gondois To: linux-kernel@vger.kernel.org Cc: Pierre Gondois , Rob Herring , Krzysztof Kozlowski , Florian Fainelli , Broadcom internal kernel review list , Ray Jui , Scott Branden , Tsahee Zidenberg , Antoine Tenart , Brijesh Singh , Suravee Suthikulpanit , Tom Lendacky , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Khuong Dinh , Liviu Dudau , Sudeep Holla , Lorenzo Pieralisi , William Zhang , Anand Gore , Kursad Oney , =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= , Alim Akhtar , Shawn Guo , Li Yang , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Chester Lin , =?utf-8?q?Andreas_F=C3=A4rber?= , Matthias Brugger , NXP S32 Linux Team , Wei Xu , Chanho Min , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Lars Povlsen , Steen Hegelund , Daniel Machon , UNGLinuxDriver@microchip.com, Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Thierry Reding , Jonathan Hunter , Andy Gross , Bjorn Andersson , Konrad Dybcio , Geert Uytterhoeven , Magnus Damm , Heiko Stuebner , Kunihiko Hayashi , Masami Hiramatsu , Jisheng Zhang , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Viorel Suman , Abel Vesa , Ming Qian , Shijie Qin , Peng Fan , Shenwei Wang , Tim Harvey , Lucas Stach , Adam Ford , Richard Zhu , Li Jun , Markus Niebel , Joakim Zhang , Marek Vasut , Laurent Pinchart , Alexander Stein , Paul Elder , Martin Kepplinger , David Heidelberg , Oliver Graute , Liu Ying , Jacky Bai , Clark Wang , Wei Fang , Chris Packham , Vadym Kochan , Sameer Pujar , Akhil R , Mikko Perttunen , Prathamesh Shete , Sumit Gupta , Diogo Ivo , Vidya Sagar , Ashish Mhetre , Johan Jonker , Christopher Obbard , Ezequiel Garcia , Aswani Reddy , Shashank Prashar , Andi Shyti , devicetree@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-mediatek@lists.infradead.org, openbmc@lists.ozlabs.org, linux-tegra@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-realtek-soc@lists.infradead.org, linux-renesas-soc@vger.kernel.org, linux-rockchip@lists.infradead.org Subject: [PATCH v2 09/23] arm64: dts: Update cache properties for hisilicon Date: Mon, 7 Nov 2022 16:57:02 +0100 Message-Id: <20221107155825.1644604-10-pierre.gondois@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221107155825.1644604-1-pierre.gondois@arm.com> References: <20221107155825.1644604-1-pierre.gondois@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748854996755893063?= X-GMAIL-MSGID: =?utf-8?q?1748854996755893063?= The DeviceTree Specification v0.3 specifies that the cache node 'compatible' and 'cache-level' properties are 'required'. Cf. s3.8 Multi-level and Shared Cache Nodes The 'cache-unified' property should be present if one of the properties for unified cache is present ('cache-size', ...). Update the Device Trees accordingly. Signed-off-by: Pierre Gondois --- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 2 ++ arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 2 ++ arch/arm64/boot/dts/hisilicon/hip05.dtsi | 4 ++++ arch/arm64/boot/dts/hisilicon/hip06.dtsi | 4 ++++ arch/arm64/boot/dts/hisilicon/hip07.dtsi | 16 ++++++++++++++++ 5 files changed, 28 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index 8343d0cedde3..a57f35eb5ef6 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -203,10 +203,12 @@ CLUSTER_SLEEP_1: cluster-sleep-1 { A53_L2: l2-cache0 { compatible = "cache"; + cache-level = <2>; }; A73_L2: l2-cache1 { compatible = "cache"; + cache-level = <2>; }; }; diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi index ae0a7cfeeb47..f6d3202b0d1a 100644 --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi @@ -186,10 +186,12 @@ cpu7: cpu@103 { CLUSTER0_L2: l2-cache0 { compatible = "cache"; + cache-level = <2>; }; CLUSTER1_L2: l2-cache1 { compatible = "cache"; + cache-level = <2>; }; }; diff --git a/arch/arm64/boot/dts/hisilicon/hip05.dtsi b/arch/arm64/boot/dts/hisilicon/hip05.dtsi index 7b2abd10d3d6..5b2b1bfd0d2a 100644 --- a/arch/arm64/boot/dts/hisilicon/hip05.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hip05.dtsi @@ -211,18 +211,22 @@ cpu15: cpu@20303 { cluster0_l2: l2-cache0 { compatible = "cache"; + cache-level = <2>; }; cluster1_l2: l2-cache1 { compatible = "cache"; + cache-level = <2>; }; cluster2_l2: l2-cache2 { compatible = "cache"; + cache-level = <2>; }; cluster3_l2: l2-cache3 { compatible = "cache"; + cache-level = <2>; }; }; diff --git a/arch/arm64/boot/dts/hisilicon/hip06.dtsi b/arch/arm64/boot/dts/hisilicon/hip06.dtsi index 2f8b03b0d365..291c2ee38288 100644 --- a/arch/arm64/boot/dts/hisilicon/hip06.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hip06.dtsi @@ -211,18 +211,22 @@ cpu15: cpu@10303 { cluster0_l2: l2-cache0 { compatible = "cache"; + cache-level = <2>; }; cluster1_l2: l2-cache1 { compatible = "cache"; + cache-level = <2>; }; cluster2_l2: l2-cache2 { compatible = "cache"; + cache-level = <2>; }; cluster3_l2: l2-cache3 { compatible = "cache"; + cache-level = <2>; }; }; diff --git a/arch/arm64/boot/dts/hisilicon/hip07.dtsi b/arch/arm64/boot/dts/hisilicon/hip07.dtsi index 1a16662f8867..b8746fb959b5 100644 --- a/arch/arm64/boot/dts/hisilicon/hip07.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hip07.dtsi @@ -842,66 +842,82 @@ cpu63: cpu@70303 { cluster0_l2: l2-cache0 { compatible = "cache"; + cache-level = <2>; }; cluster1_l2: l2-cache1 { compatible = "cache"; + cache-level = <2>; }; cluster2_l2: l2-cache2 { compatible = "cache"; + cache-level = <2>; }; cluster3_l2: l2-cache3 { compatible = "cache"; + cache-level = <2>; }; cluster4_l2: l2-cache4 { compatible = "cache"; + cache-level = <2>; }; cluster5_l2: l2-cache5 { compatible = "cache"; + cache-level = <2>; }; cluster6_l2: l2-cache6 { compatible = "cache"; + cache-level = <2>; }; cluster7_l2: l2-cache7 { compatible = "cache"; + cache-level = <2>; }; cluster8_l2: l2-cache8 { compatible = "cache"; + cache-level = <2>; }; cluster9_l2: l2-cache9 { compatible = "cache"; + cache-level = <2>; }; cluster10_l2: l2-cache10 { compatible = "cache"; + cache-level = <2>; }; cluster11_l2: l2-cache11 { compatible = "cache"; + cache-level = <2>; }; cluster12_l2: l2-cache12 { compatible = "cache"; + cache-level = <2>; }; cluster13_l2: l2-cache13 { compatible = "cache"; + cache-level = <2>; }; cluster14_l2: l2-cache14 { compatible = "cache"; + cache-level = <2>; }; cluster15_l2: l2-cache15 { compatible = "cache"; + cache-level = <2>; }; }; From patchwork Mon Nov 7 15:57:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierre Gondois X-Patchwork-Id: 16538 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2151592wru; Mon, 7 Nov 2022 08:21:43 -0800 (PST) X-Google-Smtp-Source: AMsMyM40h5ZpW9USUcYrgq8MFYqYfDnyijSjK8513NhxKLht2OsNziXq+5iGgrUBJ4K8LcYy3ln0 X-Received: by 2002:a63:d60b:0:b0:46f:8e44:9ce4 with SMTP id q11-20020a63d60b000000b0046f8e449ce4mr40328701pgg.308.1667838103385; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id b13-20020a63e70d000000b00462ed2102e4si11341635pgi.368.2022.11.07.08.21.29; Mon, 07 Nov 2022 08:21:43 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231922AbiKGQTI (ORCPT + 99 others); Mon, 7 Nov 2022 11:19:08 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41502 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232491AbiKGQTB (ORCPT ); Mon, 7 Nov 2022 11:19:01 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 3F34220BC5; Mon, 7 Nov 2022 08:18:17 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1A6AF1FB; Mon, 7 Nov 2022 08:18:23 -0800 (PST) Received: from pierre123.arm.com (pierre123.nice.arm.com [10.34.100.128]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 6C1C13F534; Mon, 7 Nov 2022 08:18:01 -0800 (PST) From: Pierre Gondois To: linux-kernel@vger.kernel.org Cc: Pierre Gondois , Rob Herring , Krzysztof Kozlowski , Florian Fainelli , Broadcom internal kernel review list , Ray Jui , Scott Branden , Tsahee Zidenberg , Antoine Tenart , Brijesh Singh , Suravee Suthikulpanit , Tom Lendacky , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Khuong Dinh , Liviu Dudau , Sudeep Holla , Lorenzo Pieralisi , William Zhang , Anand Gore , Kursad Oney , =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= , Alim Akhtar , Shawn Guo , Li Yang , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Chester Lin , =?utf-8?q?Andreas_F=C3=A4rber?= , Matthias Brugger , NXP S32 Linux Team , Wei Xu , Chanho Min , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Lars Povlsen , Steen Hegelund , Daniel Machon , UNGLinuxDriver@microchip.com, Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Thierry Reding , Jonathan Hunter , Andy Gross , Bjorn Andersson , Konrad Dybcio , Geert Uytterhoeven , Magnus Damm , Heiko Stuebner , Kunihiko Hayashi , Masami Hiramatsu , Jisheng Zhang , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Viorel Suman , Abel Vesa , Shijie Qin , Zhou Peng , Peng Fan , Ming Qian , Shenwei Wang , Adam Ford , Tim Harvey , Lucas Stach , Richard Zhu , Li Jun , Markus Niebel , Marco Felsch , Marek Vasut , Laurent Pinchart , Alexander Stein , Paul Elder , Martin Kepplinger , Joakim Zhang , Joy Zou , David Heidelberg , Liu Ying , Oliver Graute , Dong Aisheng , Jacky Bai , Wei Fang , Clark Wang , Chris Packham , Vadym Kochan , Sameer Pujar , Akhil R , Mikko Perttunen , Sumit Gupta , Prathamesh Shete , Diogo Ivo , Vidya Sagar , Ashish Mhetre , Johan Jonker , Christopher Obbard , Ezequiel Garcia , Aswani Reddy , Shashank Prashar , Bharat Uppal , devicetree@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-mediatek@lists.infradead.org, openbmc@lists.ozlabs.org, linux-tegra@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-realtek-soc@lists.infradead.org, linux-renesas-soc@vger.kernel.org, linux-rockchip@lists.infradead.org Subject: [PATCH v2 10/23] arm64: dts: Update cache properties for lg Date: Mon, 7 Nov 2022 16:57:03 +0100 Message-Id: <20221107155825.1644604-11-pierre.gondois@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221107155825.1644604-1-pierre.gondois@arm.com> References: <20221107155825.1644604-1-pierre.gondois@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748855006917576545?= X-GMAIL-MSGID: =?utf-8?q?1748855006917576545?= The DeviceTree Specification v0.3 specifies that the cache node 'compatible' and 'cache-level' properties are 'required'. Cf. s3.8 Multi-level and Shared Cache Nodes The 'cache-unified' property should be present if one of the properties for unified cache is present ('cache-size', ...). Update the Device Trees accordingly. Signed-off-by: Pierre Gondois Acked-by: Chanho Min --- arch/arm64/boot/dts/lg/lg1312.dtsi | 1 + arch/arm64/boot/dts/lg/lg1313.dtsi | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/lg/lg1312.dtsi b/arch/arm64/boot/dts/lg/lg1312.dtsi index 78ae73d0cf36..25ed9aeee2dc 100644 --- a/arch/arm64/boot/dts/lg/lg1312.dtsi +++ b/arch/arm64/boot/dts/lg/lg1312.dtsi @@ -48,6 +48,7 @@ cpu3: cpu@3 { }; L2_0: l2-cache0 { compatible = "cache"; + cache-level = <2>; }; }; diff --git a/arch/arm64/boot/dts/lg/lg1313.dtsi b/arch/arm64/boot/dts/lg/lg1313.dtsi index 2173316573be..db82fd4cc759 100644 --- a/arch/arm64/boot/dts/lg/lg1313.dtsi +++ b/arch/arm64/boot/dts/lg/lg1313.dtsi @@ -48,6 +48,7 @@ cpu3: cpu@3 { }; L2_0: l2-cache0 { compatible = "cache"; + cache-level = <2>; }; }; From patchwork Mon Nov 7 15:57:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierre Gondois X-Patchwork-Id: 16541 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2151653wru; Mon, 7 Nov 2022 08:21:53 -0800 (PST) X-Google-Smtp-Source: AMsMyM5IY1K/Nwp/uRqm1ClLECFR1JTx3ldz7yWOWeaFQ7Y+HN7jmHSs5H0ADya3LMuIZswUd+Mn X-Received: by 2002:a17:902:d70e:b0:178:2d9d:ba7b with SMTP id w14-20020a170902d70e00b001782d9dba7bmr51073766ply.90.1667838112780; Mon, 07 Nov 2022 08:21:52 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1667838112; cv=none; d=google.com; s=arc-20160816; b=kGs+ujJG+RUub8S+Nx9w6dydmhe1daIR2BZBEttYOS87IHVegNghlgY71Yh9y8duYH XgrxuSIqgxkMOLtqUcMxYd947yY+M3PUYepihynOtAY0TuqgR6jGjzb+m8FdQB7CEDpB xqpzCS/db78zlR8mWUfRJeiscAGrR25gICtMQAF+wUSF8MpIP3EGsu4hNhLFk8QPXH82 mY0kC1BvAUAQxxrFOqOMduyHGnvay8COQHUScOUGkOiHufC9sbYpSTEBwLpTG1Il+Z8B z7Ww1rF2CZ8Nr4Di0H4pWyTZbFgRAgi6vjPOfqISsvkUS7NNNUtPQuzeRtwOD/Q+iYqm f9Ww== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=IhQIO44y3h94uo7TFBwlYcI8x40r8SNqpmruPqTN2gU=; b=TxMbmT0gopn64jk6qz7cyef26KOyNuUto3+leF9kCjt33ZoHvGaYXR7H/W75VPXa9F MeB7BX54oePXENVD7CJajZa5czQzaPH6oIfWbHdLvCu8C05p7kp4HdQBFukCOOW20uuC p9/3Q/CUPiN1j20qlJnviq8jeN8t1t5TWJzy/1VGNehOeTEVTBdU0n4ZiyP42FvUFKpp Rfx6hXOd7S8cIVPHvKAwyaXea18Pn0bVcC4m3x2Pfg4oIErf35L8Poti1f9dElYv5eO1 fdp+m+X+lrSj2c3bHMQZL5BqyMoH96SC9KAHpXD8K5t282R7rlXMPBLmDvia0dtwK2b1 KSZw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id y12-20020a17090322cc00b0017f77d19d92si12304502plg.127.2022.11.07.08.21.39; Mon, 07 Nov 2022 08:21:52 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232291AbiKGQUQ (ORCPT + 99 others); Mon, 7 Nov 2022 11:20:16 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41476 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231953AbiKGQUC (ORCPT ); Mon, 7 Nov 2022 11:20:02 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id B3844E90; Mon, 7 Nov 2022 08:19:45 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 9698823A; Mon, 7 Nov 2022 08:19:51 -0800 (PST) Received: from pierre123.arm.com (pierre123.nice.arm.com [10.34.100.128]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 4B0CB3F534; Mon, 7 Nov 2022 08:19:30 -0800 (PST) From: Pierre Gondois To: linux-kernel@vger.kernel.org Cc: Pierre Gondois , Chris Packham , Rob Herring , Krzysztof Kozlowski , Florian Fainelli , Broadcom internal kernel review list , Ray Jui , Scott Branden , Tsahee Zidenberg , Antoine Tenart , Brijesh Singh , Suravee Suthikulpanit , Tom Lendacky , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Khuong Dinh , Liviu Dudau , Sudeep Holla , Lorenzo Pieralisi , William Zhang , Anand Gore , Kursad Oney , =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= , Alim Akhtar , Shawn Guo , Li Yang , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Chester Lin , =?utf-8?q?Andreas_F=C3=A4rber?= , Matthias Brugger , NXP S32 Linux Team , Wei Xu , Chanho Min , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Lars Povlsen , Steen Hegelund , Daniel Machon , UNGLinuxDriver@microchip.com, Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Thierry Reding , Jonathan Hunter , Andy Gross , Bjorn Andersson , Konrad Dybcio , Geert Uytterhoeven , Magnus Damm , Heiko Stuebner , Kunihiko Hayashi , Masami Hiramatsu , Jisheng Zhang , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Viorel Suman , Abel Vesa , Peng Fan , Shenwei Wang , Ming Qian , Lucas Stach , Adam Ford , Tim Harvey , Richard Zhu , Li Jun , Markus Niebel , Joakim Zhang , Marek Vasut , Laurent Pinchart , Alexander Stein , Paul Elder , Martin Kepplinger , David Heidelberg , Liu Ying , Oliver Graute , Shijie Qin , Zhou Peng , Wei Fang , Jacky Bai , Clark Wang , Vadym Kochan , Sameer Pujar , Prathamesh Shete , Akhil R , Mikko Perttunen , Sumit Gupta , Diogo Ivo , Vidya Sagar , Ashish Mhetre , Johan Jonker , Christopher Obbard , Ezequiel Garcia , Aswani Reddy , Shashank Prashar , Bharat Uppal , devicetree@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-mediatek@lists.infradead.org, openbmc@lists.ozlabs.org, linux-tegra@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-realtek-soc@lists.infradead.org, linux-renesas-soc@vger.kernel.org, linux-rockchip@lists.infradead.org Subject: [PATCH v2 11/23] arm64: dts: Update cache properties for marvell Date: Mon, 7 Nov 2022 16:57:04 +0100 Message-Id: <20221107155825.1644604-12-pierre.gondois@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221107155825.1644604-1-pierre.gondois@arm.com> References: <20221107155825.1644604-1-pierre.gondois@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748855016962452126?= X-GMAIL-MSGID: =?utf-8?q?1748855016962452126?= The DeviceTree Specification v0.3 specifies that the cache node 'compatible' and 'cache-level' properties are 'required'. Cf. s3.8 Multi-level and Shared Cache Nodes The 'cache-unified' property should be present if one of the properties for unified cache is present ('cache-size', ...). Update the Device Trees accordingly. Signed-off-by: Pierre Gondois For ac5-98dx25xx.dtsi: Reviewed-by: Chris Packham --- arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi | 1 + arch/arm64/boot/dts/marvell/armada-ap806-dual.dtsi | 2 ++ arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi | 4 ++++ arch/arm64/boot/dts/marvell/armada-ap807-quad.dtsi | 4 ++++ 4 files changed, 11 insertions(+) diff --git a/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi b/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi index 44ed6f963b75..7308f7b6b22c 100644 --- a/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi +++ b/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi @@ -49,6 +49,7 @@ cpu1: cpu@1 { l2: l2-cache { compatible = "cache"; + cache-level = <2>; }; }; diff --git a/arch/arm64/boot/dts/marvell/armada-ap806-dual.dtsi b/arch/arm64/boot/dts/marvell/armada-ap806-dual.dtsi index fcab5173fe67..6713b2ee50c9 100644 --- a/arch/arm64/boot/dts/marvell/armada-ap806-dual.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-ap806-dual.dtsi @@ -48,9 +48,11 @@ cpu1: cpu@1 { l2: l2-cache { compatible = "cache"; + cache-unified; cache-size = <0x80000>; cache-line-size = <64>; cache-sets = <512>; + cache-level = <2>; }; }; diff --git a/arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi b/arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi index 3db427122f9e..695c8f070dbc 100644 --- a/arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi @@ -78,16 +78,20 @@ cpu3: cpu@101 { l2_0: l2-cache0 { compatible = "cache"; + cache-unified; cache-size = <0x80000>; cache-line-size = <64>; cache-sets = <512>; + cache-level = <2>; }; l2_1: l2-cache1 { compatible = "cache"; + cache-unified; cache-size = <0x80000>; cache-line-size = <64>; cache-sets = <512>; + cache-level = <2>; }; }; }; diff --git a/arch/arm64/boot/dts/marvell/armada-ap807-quad.dtsi b/arch/arm64/boot/dts/marvell/armada-ap807-quad.dtsi index 68782f161f12..878d82bb1052 100644 --- a/arch/arm64/boot/dts/marvell/armada-ap807-quad.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-ap807-quad.dtsi @@ -78,16 +78,20 @@ cpu3: cpu@101 { l2_0: l2-cache0 { compatible = "cache"; + cache-unified; cache-size = <0x80000>; cache-line-size = <64>; cache-sets = <512>; + cache-level = <2>; }; l2_1: l2-cache1 { compatible = "cache"; + cache-unified; cache-size = <0x80000>; cache-line-size = <64>; cache-sets = <512>; + cache-level = <2>; }; }; }; From patchwork Mon Nov 7 15:57:05 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierre Gondois X-Patchwork-Id: 16558 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2153212wru; Mon, 7 Nov 2022 08:25:03 -0800 (PST) X-Google-Smtp-Source: AMsMyM4JOAHWNOePtk0iig1tOyWG4gSyqM+273LegwTFaJ2JMa/XmQ73Li6kT5bUg/QyYMvLrDSj X-Received: by 2002:a17:90b:264e:b0:212:d06f:35ad with SMTP id pa14-20020a17090b264e00b00212d06f35admr53689480pjb.2.1667838303172; Mon, 07 Nov 2022 08:25:03 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1667838303; cv=none; d=google.com; s=arc-20160816; b=SIVqSFgQTLjUox5v37/c+JrrpZQGwLe97drh3UVv/hBb6KSTst9pqiM4aC0tpfCj5Q TTYPnXnXImtaEtqkREYsq8FzAz7hBg8mvG2W4wvpA6a84MkC4jWeasVpMA36m63cfNuk r0fcyvpI2SZszMuuSHXoqCF+MGNU4AIiAFR3ytvF8lUs+Ikty81gBpLlb2FwJnU96lBi QP9tJDr9Gzw/FyYDvg3PbswCXrCVwno5jjOQuCZDP9B2Vw9cIN8ocx5hIp98gDJWf6az LIJWGlN03RLUDobfi+r7U+KFcLRridotoqR0tqnRNG8F1nBb6S9C76llGdLIMaENmwe/ oDIA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=lVbeVIzcWsBHEvXpUIqWxWV9Pr4GUmBdcHJPygjeNp8=; b=vY2ms44iY6pOJRwnEMo62L4qulPcGStw4XEopmcAF3A0OCkY0lJ5p6z3LSc4w4Er+N rH7gZ5rmJQ90pBnC1ImVkbn1GpXt5Z5dOcxDt5c/BskzMl7T8Ykor4KHN1GPmAD3klBr QuiyAUguTo1LwKpXqw4tZbROoCaxfLVsWxzGn+egVhu8ARn98hBEe2t0C//lO5k57BHf F5wLl3DKLMocK2AToFWMA3A47jqWcqDWFz7pyHgDFm+Rr3p1/RCwcxkw164KVNeiblyH wOdVdN7KatXLkT3qrtTH3YUua5NnMRHXeD9/k2u4W0xzsGEh08EIvgh6MMsyxItKB3PI GDug== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id qe2-20020a17090b4f8200b001fac102fdeesi11576257pjb.95.2022.11.07.08.24.49; Mon, 07 Nov 2022 08:25:03 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232943AbiKGQYh (ORCPT + 99 others); Mon, 7 Nov 2022 11:24:37 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42290 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232744AbiKGQXy (ORCPT ); Mon, 7 Nov 2022 11:23:54 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 63DB624BF8; Mon, 7 Nov 2022 08:21:20 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 531371FB; Mon, 7 Nov 2022 08:21:26 -0800 (PST) Received: from pierre123.arm.com (pierre123.nice.arm.com [10.34.100.128]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 251943F534; Mon, 7 Nov 2022 08:21:05 -0800 (PST) From: Pierre Gondois To: linux-kernel@vger.kernel.org Cc: Pierre Gondois , Rob Herring , Krzysztof Kozlowski , Florian Fainelli , Broadcom internal kernel review list , Ray Jui , Scott Branden , Tsahee Zidenberg , Antoine Tenart , Brijesh Singh , Suravee Suthikulpanit , Tom Lendacky , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Khuong Dinh , Liviu Dudau , Sudeep Holla , Lorenzo Pieralisi , William Zhang , Anand Gore , Kursad Oney , =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= , Alim Akhtar , Shawn Guo , Li Yang , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Chester Lin , =?utf-8?q?Andreas_F=C3=A4rber?= , Matthias Brugger , NXP S32 Linux Team , Wei Xu , Chanho Min , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Lars Povlsen , Steen Hegelund , Daniel Machon , UNGLinuxDriver@microchip.com, Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Thierry Reding , Jonathan Hunter , Andy Gross , Bjorn Andersson , Konrad Dybcio , Geert Uytterhoeven , Magnus Damm , Heiko Stuebner , Kunihiko Hayashi , Masami Hiramatsu , Jisheng Zhang , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Viorel Suman , Abel Vesa , Shenwei Wang , Ming Qian , Peng Fan , Adam Ford , Lucas Stach , Tim Harvey , Li Jun , Richard Zhu , Markus Niebel , Joakim Zhang , Marek Vasut , Laurent Pinchart , Alexander Stein , Paul Elder , Martin Kepplinger , David Heidelberg , Liu Ying , Oliver Graute , Zhou Peng , Wei Fang , Clark Wang , Jacky Bai , Chris Packham , Vadym Kochan , Sameer Pujar , Prathamesh Shete , Akhil R , Mikko Perttunen , Sumit Gupta , Diogo Ivo , Vidya Sagar , Ashish Mhetre , Johan Jonker , Christopher Obbard , Ezequiel Garcia , Aswani Reddy , Shashank Prashar , Bharat Uppal , devicetree@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-mediatek@lists.infradead.org, openbmc@lists.ozlabs.org, linux-tegra@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-realtek-soc@lists.infradead.org, linux-renesas-soc@vger.kernel.org, linux-rockchip@lists.infradead.org Subject: [PATCH v2 12/23] arm64: dts: Update cache properties for mediatek Date: Mon, 7 Nov 2022 16:57:05 +0100 Message-Id: <20221107155825.1644604-13-pierre.gondois@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221107155825.1644604-1-pierre.gondois@arm.com> References: <20221107155825.1644604-1-pierre.gondois@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748855216313994101?= X-GMAIL-MSGID: =?utf-8?q?1748855216313994101?= The DeviceTree Specification v0.3 specifies that the cache node 'compatible' and 'cache-level' properties are 'required'. Cf. s3.8 Multi-level and Shared Cache Nodes The 'cache-unified' property should be present if one of the properties for unified cache is present ('cache-size', ...). Update the Device Trees accordingly. Signed-off-by: Pierre Gondois --- arch/arm64/boot/dts/mediatek/mt8186.dtsi | 3 +++ arch/arm64/boot/dts/mediatek/mt8192.dtsi | 3 +++ arch/arm64/boot/dts/mediatek/mt8195.dtsi | 3 +++ 3 files changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts/mediatek/mt8186.dtsi index 64693c17af9e..c326aeb33a10 100644 --- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi @@ -198,16 +198,19 @@ cluster_off_b: cluster-off-b { l2_0: l2-cache0 { compatible = "cache"; + cache-level = <2>; next-level-cache = <&l3_0>; }; l2_1: l2-cache1 { compatible = "cache"; + cache-level = <2>; next-level-cache = <&l3_0>; }; l3_0: l3-cache { compatible = "cache"; + cache-level = <3>; }; }; diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi index 6b20376191a7..424fc89cc6f7 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -169,16 +169,19 @@ core3 { l2_0: l2-cache0 { compatible = "cache"; + cache-level = <2>; next-level-cache = <&l3_0>; }; l2_1: l2-cache1 { compatible = "cache"; + cache-level = <2>; next-level-cache = <&l3_0>; }; l3_0: l3-cache { compatible = "cache"; + cache-level = <3>; }; idle-states { diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi index 905d1a90b406..cb74905cfbb8 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -213,16 +213,19 @@ cluster_off_b: cluster-off-b { l2_0: l2-cache0 { compatible = "cache"; + cache-level = <2>; next-level-cache = <&l3_0>; }; l2_1: l2-cache1 { compatible = "cache"; + cache-level = <2>; next-level-cache = <&l3_0>; }; l3_0: l3-cache { compatible = "cache"; + cache-level = <3>; }; }; From patchwork Mon Nov 7 15:57:06 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierre Gondois X-Patchwork-Id: 16559 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2156308wru; Mon, 7 Nov 2022 08:31:12 -0800 (PST) X-Google-Smtp-Source: AMsMyM4A3PsONLLRGwStuIDKnXTQMPhTLEZOD3Iawpsf+xRZA1C0lA823T70vnf4a+43co6dbFe/ X-Received: by 2002:aa7:96b6:0:b0:56c:8c22:78f0 with SMTP id g22-20020aa796b6000000b0056c8c2278f0mr50690156pfk.21.1667838672554; Mon, 07 Nov 2022 08:31:12 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1667838672; cv=none; d=google.com; s=arc-20160816; b=UeZgt5bMf+O5q7RIbxg6JgaKMjfiNpq7sgwI8eX0XGaZnvD2XXgc7WiTlS8A0FcmOz gM/VgXPvw2b/xytibFx2xDnnajW6Vg9ihbK+uH0odL8jF/n7wp84sPJ2NZI2x7iU5eRH H9XQHf5V6X33I6bmmHGU4VKPaStG8pHTI/b8kCekRTnKcxc915Rvpx78pzrfaYLcALTb +5q01dDQPS+6jhK3wi3XfOieuMbSF758tY6zrhHb9WT/AdG7wE/avKR17Sp5SJOkfhMI sF1IO5x3MwQ0uI4MPhtMb5kcWNhohfNx5TIinVMjLzO18fO8Es7vEvbKAb9m6zWzSseu YyyQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=KWnRqDyT+6tZwNLBd46g7AakG+xVob/Xyjm77U0bQUc=; b=s2pg9uv0fEFkc0lh7KlX7dW2k5luRPbj+XFWdOp3fK493WPg37Q3PUuH2EmSABFjFv qCeRKQFHaCCjUOPGnFL3uApn7sALV1NT+e8RZhZPPgjeE/CMxOxEdIS/SxG6lRAlc2P4 UfnVIFczXMGJ13cSsPyhJjIxvK1wa/m7uALTS+Oi1681yoMSluTj5uACd9ACq3060a1D OSrVMueBSxO11K1M4oFuO34Rryfy6SbKwpJpc2uL8mxa5DLIdR7RTl8S+RKs3tQQF02n d9wLH2s1qhJ7t2STlM9T/nSroBP8dOOYJorTuMPtAXSHh1tE3Bv+mkS4Fm2XHOf2Lxs9 Um2w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id y22-20020a656c16000000b00434c2c0a834si10317936pgu.734.2022.11.07.08.30.57; Mon, 07 Nov 2022 08:31:12 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232808AbiKGQ0t (ORCPT + 99 others); Mon, 7 Nov 2022 11:26:49 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51138 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232302AbiKGQ0c (ORCPT ); Mon, 7 Nov 2022 11:26:32 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 93F83286E4; Mon, 7 Nov 2022 08:22:47 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id EAD2F1FB; Mon, 7 Nov 2022 08:22:51 -0800 (PST) Received: from pierre123.arm.com (pierre123.nice.arm.com [10.34.100.128]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 811213F534; Mon, 7 Nov 2022 08:22:30 -0800 (PST) From: Pierre Gondois To: linux-kernel@vger.kernel.org Cc: Pierre Gondois , Rob Herring , Krzysztof Kozlowski , Florian Fainelli , Broadcom internal kernel review list , Ray Jui , Scott Branden , Tsahee Zidenberg , Antoine Tenart , Brijesh Singh , Suravee Suthikulpanit , Tom Lendacky , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Khuong Dinh , Liviu Dudau , Sudeep Holla , Lorenzo Pieralisi , William Zhang , Anand Gore , Kursad Oney , =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= , Alim Akhtar , Shawn Guo , Li Yang , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Chester Lin , =?utf-8?q?Andreas_F=C3=A4rber?= , Matthias Brugger , NXP S32 Linux Team , Wei Xu , Chanho Min , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Lars Povlsen , Steen Hegelund , Daniel Machon , UNGLinuxDriver@microchip.com, Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Thierry Reding , Jonathan Hunter , Andy Gross , Bjorn Andersson , Konrad Dybcio , Geert Uytterhoeven , Magnus Damm , Heiko Stuebner , Kunihiko Hayashi , Masami Hiramatsu , Jisheng Zhang , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Viorel Suman , Abel Vesa , Peng Fan , Ming Qian , Shenwei Wang , Adam Ford , Tim Harvey , Lucas Stach , Richard Zhu , Li Jun , Markus Niebel , Joakim Zhang , Marek Vasut , Laurent Pinchart , Alexander Stein , Paul Elder , Martin Kepplinger , David Heidelberg , Joy Zou , Oliver Graute , Liu Ying , Zhou Peng , Shijie Qin , Wei Fang , Jacky Bai , Clark Wang , Chris Packham , Vadym Kochan , Sameer Pujar , Akhil R , Mikko Perttunen , Prathamesh Shete , Sumit Gupta , Diogo Ivo , Vidya Sagar , Ashish Mhetre , Johan Jonker , Christopher Obbard , Ezequiel Garcia , Aswani Reddy , Shashank Prashar , Arnd Bergmann , devicetree@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-mediatek@lists.infradead.org, openbmc@lists.ozlabs.org, linux-tegra@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-realtek-soc@lists.infradead.org, linux-renesas-soc@vger.kernel.org, linux-rockchip@lists.infradead.org Subject: [PATCH v2 13/23] arm64: dts: Update cache properties for microchip Date: Mon, 7 Nov 2022 16:57:06 +0100 Message-Id: <20221107155825.1644604-14-pierre.gondois@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221107155825.1644604-1-pierre.gondois@arm.com> References: <20221107155825.1644604-1-pierre.gondois@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748855603736738849?= X-GMAIL-MSGID: =?utf-8?q?1748855603736738849?= The DeviceTree Specification v0.3 specifies that the cache node 'compatible' and 'cache-level' properties are 'required'. Cf. s3.8 Multi-level and Shared Cache Nodes The 'cache-unified' property should be present if one of the properties for unified cache is present ('cache-size', ...). Update the Device Trees accordingly. Signed-off-by: Pierre Gondois Reviewed-by: Steen Hegelund --- arch/arm64/boot/dts/microchip/sparx5.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/microchip/sparx5.dtsi b/arch/arm64/boot/dts/microchip/sparx5.dtsi index 2dd5e38820b1..c4bca23b96b9 100644 --- a/arch/arm64/boot/dts/microchip/sparx5.dtsi +++ b/arch/arm64/boot/dts/microchip/sparx5.dtsi @@ -52,6 +52,7 @@ cpu1: cpu@1 { }; L2_0: l2-cache0 { compatible = "cache"; + cache-level = <2>; }; }; From patchwork Mon Nov 7 15:57:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierre Gondois X-Patchwork-Id: 16560 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2156768wru; Mon, 7 Nov 2022 08:31:59 -0800 (PST) X-Google-Smtp-Source: AMsMyM7jgsTSBObSdRsITHAIRiTrIfPODcIPSv+/wSwKKdtb5Ldcp3hEekbLGGySmWWfo+9Rk1OW X-Received: by 2002:a65:4084:0:b0:463:aa4:49cf with SMTP id t4-20020a654084000000b004630aa449cfmr43026928pgp.164.1667838719048; Mon, 07 Nov 2022 08:31:59 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1667838719; cv=none; d=google.com; s=arc-20160816; b=FTXeUh29sT4QHqQUjJImrrvItlXLw2K3ximqb+tpKZXN/txtre16/rAPOizDsL3OfH jkjL5RgUhvfeXSSC2i1i2JCr83EaFMPHu7ZV4aF9MmcW4OpE5EZbTlAKEtCVmTDKf85P 38mAywIh+3s1UPedrZyoMUjNIdmVwJlfy1KqxTE64WeO60SqpEbg/Eb29p1ee61wPiAd dmJx7QJK3/mABr8ny/3GXht40/pICTJzjneEjDIO2Zh+MJOjLIwc5fW5jw5fuak+jEIh fOmviGvZKeDm42Nsifq+MTy3Q5Bc09AUpATHVyW16WQt80yuLoVDCosnr3DRWD2LrXRB rBMw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=4OCeO8SnFrRLnz3KutBBdUpJC77pT3ewTHx+IxTubOA=; b=xjhVNf7gkONyL0WqScIV51Pb2mFPtCC8MyG8g7e8Vhi5AktONoU79CNaF9eMGkU41c MVhmGVGv1JBop9a7wf5E0PrjsHV47mhSm+ufX2+nxAf08rcidpZNzukrV7XUQT6mbJHA sCAFUYpGMjrWxpPWZX/wNecYtw7N5xPFzf3W/X0S344guz8XqN+teELJh9JzXFX8yLDP XwPY864qoiRCUGXO1zH5Rous8RjrG3AIPNSIBwzY2naE9Dsx11z1KvCL7ZAy55QmZwlJ S+RaMg0NZfNuwCAVc+q0ZYm0McgNMNcHNeAcsFRDyPA7aJP8lbYQx8CVUWLkZf5QVFHz TXGg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id x16-20020aa78f10000000b0056e109212d8si9182145pfr.287.2022.11.07.08.31.45; Mon, 07 Nov 2022 08:31:59 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232476AbiKGQ1o (ORCPT + 99 others); Mon, 7 Nov 2022 11:27:44 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51138 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233092AbiKGQ1N (ORCPT ); Mon, 7 Nov 2022 11:27:13 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 3E380240A3; Mon, 7 Nov 2022 08:24:11 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 90300113E; Mon, 7 Nov 2022 08:24:17 -0800 (PST) Received: from pierre123.arm.com (pierre123.nice.arm.com [10.34.100.128]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 5AB3E3F534; Mon, 7 Nov 2022 08:23:56 -0800 (PST) From: Pierre Gondois To: linux-kernel@vger.kernel.org Cc: Pierre Gondois , Rob Herring , Krzysztof Kozlowski , Florian Fainelli , Broadcom internal kernel review list , Ray Jui , Scott Branden , Tsahee Zidenberg , Antoine Tenart , Brijesh Singh , Suravee Suthikulpanit , Tom Lendacky , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Khuong Dinh , Liviu Dudau , Sudeep Holla , Lorenzo Pieralisi , William Zhang , Anand Gore , Kursad Oney , =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= , Alim Akhtar , Shawn Guo , Li Yang , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Chester Lin , =?utf-8?q?Andreas_F=C3=A4rber?= , Matthias Brugger , NXP S32 Linux Team , Wei Xu , Chanho Min , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Lars Povlsen , Steen Hegelund , Daniel Machon , UNGLinuxDriver@microchip.com, Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Thierry Reding , Jonathan Hunter , Andy Gross , Bjorn Andersson , Konrad Dybcio , Geert Uytterhoeven , Magnus Damm , Heiko Stuebner , Kunihiko Hayashi , Masami Hiramatsu , Jisheng Zhang , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Viorel Suman , Abel Vesa , Shijie Qin , Zhou Peng , Shenwei Wang , Peng Fan , Ming Qian , Lucas Stach , Adam Ford , Tim Harvey , Richard Zhu , Li Jun , Markus Niebel , Joakim Zhang , Marek Vasut , Laurent Pinchart , Paul Elder , Alexander Stein , Martin Kepplinger , David Heidelberg , Oliver Graute , Liu Ying , Jacky Bai , Clark Wang , Chris Packham , Vadym Kochan , Sameer Pujar , Mikko Perttunen , Prathamesh Shete , Akhil R , Sumit Gupta , Diogo Ivo , Vidya Sagar , Ashish Mhetre , Johan Jonker , Christopher Obbard , Ezequiel Garcia , Aswani Reddy , Shashank Prashar , Bharat Uppal , devicetree@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-mediatek@lists.infradead.org, openbmc@lists.ozlabs.org, linux-tegra@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-realtek-soc@lists.infradead.org, linux-renesas-soc@vger.kernel.org, linux-rockchip@lists.infradead.org Subject: [PATCH v2 14/23] arm64: dts: Update cache properties for nuvoton Date: Mon, 7 Nov 2022 16:57:07 +0100 Message-Id: <20221107155825.1644604-15-pierre.gondois@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221107155825.1644604-1-pierre.gondois@arm.com> References: <20221107155825.1644604-1-pierre.gondois@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748855652658101980?= X-GMAIL-MSGID: =?utf-8?q?1748855652658101980?= The DeviceTree Specification v0.3 specifies that the cache node 'compatible' and 'cache-level' properties are 'required'. Cf. s3.8 Multi-level and Shared Cache Nodes The 'cache-unified' property should be present if one of the properties for unified cache is present ('cache-size', ...). Update the Device Trees accordingly. Signed-off-by: Pierre Gondois --- arch/arm64/boot/dts/nuvoton/nuvoton-npcm845.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/nuvoton/nuvoton-npcm845.dtsi b/arch/arm64/boot/dts/nuvoton/nuvoton-npcm845.dtsi index 12118b75c0e6..4c196140634b 100644 --- a/arch/arm64/boot/dts/nuvoton/nuvoton-npcm845.dtsi +++ b/arch/arm64/boot/dts/nuvoton/nuvoton-npcm845.dtsi @@ -49,6 +49,7 @@ cpu3: cpu@3 { l2: l2-cache { compatible = "cache"; + cache-level = <2>; }; }; From patchwork Mon Nov 7 15:57:08 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierre Gondois X-Patchwork-Id: 16561 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2157215wru; Mon, 7 Nov 2022 08:32:40 -0800 (PST) X-Google-Smtp-Source: AMsMyM5/lzd2SSTlIou2SJ+dXwbvSTAgrl247AUYRMm+stSDKbeF+pp6KpDpcc/RSFGjm4IAwf2i X-Received: by 2002:a63:3fce:0:b0:45a:2bab:6002 with SMTP id m197-20020a633fce000000b0045a2bab6002mr44469869pga.454.1667838760602; Mon, 07 Nov 2022 08:32:40 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1667838760; cv=none; d=google.com; s=arc-20160816; b=x9vqb182X92VD3tQG4xAwavcn8nNBzQdPidlqnNKefcHTTy9oEoJLSkYCZJGNGK326 IEHyg3JGxD6B02SoUd+XUBkiye8GRvKoMJbUVhEfQxaS9okA6LnpvFZ31WXYsgqr+03W JzFBt5i+s7NhpfHNjZlSvc6Xupq2Dyf9VKiyfvX3Yd+NgYaYpzlMy1qaQXRIjZAOuSiO YMmr1uOW/W2fXodipzdclZ64YGiFiRs7C782Zd52OQyQSOyemhgvwic0Q/1CNM8f+Rz5 quN3Cqo7+SGsSDPtkBa9zdBjzSsZzCaA7Wf++6pzXd4LEwYC+YBnqlqPPFM5dT+tNWPq D10g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=tEtlTPugQ2cgwDkuixPBM5p99WoJeP1AREuGDq+Oo+U=; b=zI3fUYwpqoNuzKrOav7IkxVuxuuviCSqLHy2r1H4DBu7prCTcazmkBPS2/t0u+02P4 G+vbf0PQbRwdc+CIJOPfxah0jE2m6NIV87yuR1v49rQQQ0+3tEGqUCfPP4SXYul/jPL8 kbBC7ZuJhAVyeVjkeV2lEnMyXifB3WsYbciVH80GI+x81NduLsMyeImXV3wk9flZVzAK 4ASINEhGYkX63vNSFiwgsy+CnS+da3I0arxiutH1lNxmzVqoxO1jmcg/SZXRx0pnYOP9 FilqfrKObEuVz3k4EVTukIF/G/q4PcUWfDWqUJwzgFFkd47iqBNUDHopOhfy/QOUuCb4 npvA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id nu6-20020a17090b1b0600b0020a47a4c951si13283741pjb.147.2022.11.07.08.32.26; Mon, 07 Nov 2022 08:32:40 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231820AbiKGQ26 (ORCPT + 99 others); Mon, 7 Nov 2022 11:28:58 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51570 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232585AbiKGQ2V (ORCPT ); Mon, 7 Nov 2022 11:28:21 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 0800221E33; Mon, 7 Nov 2022 08:25:44 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E0A5323A; Mon, 7 Nov 2022 08:25:49 -0800 (PST) Received: from pierre123.arm.com (pierre123.nice.arm.com [10.34.100.128]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 768343F534; Mon, 7 Nov 2022 08:25:28 -0800 (PST) From: Pierre Gondois To: linux-kernel@vger.kernel.org Cc: Pierre Gondois , Rob Herring , Krzysztof Kozlowski , Florian Fainelli , Broadcom internal kernel review list , Ray Jui , Scott Branden , Tsahee Zidenberg , Antoine Tenart , Brijesh Singh , Suravee Suthikulpanit , Tom Lendacky , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Khuong Dinh , Liviu Dudau , Sudeep Holla , Lorenzo Pieralisi , William Zhang , Anand Gore , Kursad Oney , =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= , Alim Akhtar , Shawn Guo , Li Yang , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Chester Lin , =?utf-8?q?Andreas_F=C3=A4rber?= , Matthias Brugger , NXP S32 Linux Team , Wei Xu , Chanho Min , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Lars Povlsen , Steen Hegelund , Daniel Machon , UNGLinuxDriver@microchip.com, Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Thierry Reding , Jonathan Hunter , Andy Gross , Bjorn Andersson , Konrad Dybcio , Geert Uytterhoeven , Magnus Damm , Heiko Stuebner , Kunihiko Hayashi , Masami Hiramatsu , Jisheng Zhang , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Viorel Suman , Abel Vesa , Shenwei Wang , Shijie Qin , Ming Qian , Peng Fan , Tim Harvey , Adam Ford , Lucas Stach , Li Jun , Richard Zhu , Markus Niebel , Joakim Zhang , Marek Vasut , Laurent Pinchart , Alexander Stein , Paul Elder , Martin Kepplinger , Joy Zou , David Heidelberg , Oliver Graute , Liu Ying , Ahmad Fatoum , Wei Fang , Clark Wang , Jacky Bai , Chris Packham , Vadym Kochan , Sameer Pujar , Prathamesh Shete , Akhil R , Mikko Perttunen , Sumit Gupta , Diogo Ivo , Vidya Sagar , Ashish Mhetre , Johan Jonker , Christopher Obbard , Ezequiel Garcia , Aswani Reddy , Shashank Prashar , Bharat Uppal , devicetree@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-mediatek@lists.infradead.org, openbmc@lists.ozlabs.org, linux-tegra@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-realtek-soc@lists.infradead.org, linux-renesas-soc@vger.kernel.org, linux-rockchip@lists.infradead.org Subject: [PATCH v2 15/23] arm64: dts: Update cache properties for nvidia Date: Mon, 7 Nov 2022 16:57:08 +0100 Message-Id: <20221107155825.1644604-16-pierre.gondois@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221107155825.1644604-1-pierre.gondois@arm.com> References: <20221107155825.1644604-1-pierre.gondois@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748855696455013984?= X-GMAIL-MSGID: =?utf-8?q?1748855696455013984?= The DeviceTree Specification v0.3 specifies that the cache node 'compatible' and 'cache-level' properties are 'required'. Cf. s3.8 Multi-level and Shared Cache Nodes The 'cache-unified' property should be present if one of the properties for unified cache is present ('cache-size', ...). Update the Device Trees accordingly. Signed-off-by: Pierre Gondois --- arch/arm64/boot/dts/nvidia/tegra194.dtsi | 15 +++++++++++ arch/arm64/boot/dts/nvidia/tegra210.dtsi | 1 + arch/arm64/boot/dts/nvidia/tegra234.dtsi | 33 ++++++++++++++++++++++++ 3 files changed, 49 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi index 41f3a7e188d0..ed2a534dcfd6 100644 --- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi @@ -3029,36 +3029,51 @@ core1 { }; l2c_0: l2-cache0 { + compatible = "cache"; + cache-unified; cache-size = <2097152>; cache-line-size = <64>; cache-sets = <2048>; + cache-level = <2>; next-level-cache = <&l3c>; }; l2c_1: l2-cache1 { + compatible = "cache"; + cache-unified; cache-size = <2097152>; cache-line-size = <64>; cache-sets = <2048>; + cache-level = <2>; next-level-cache = <&l3c>; }; l2c_2: l2-cache2 { + compatible = "cache"; + cache-unified; cache-size = <2097152>; cache-line-size = <64>; cache-sets = <2048>; + cache-level = <2>; next-level-cache = <&l3c>; }; l2c_3: l2-cache3 { + compatible = "cache"; + cache-unified; cache-size = <2097152>; cache-line-size = <64>; cache-sets = <2048>; + cache-level = <2>; next-level-cache = <&l3c>; }; l3c: l3-cache { + compatible = "cache"; + cache-unified; cache-size = <4194304>; cache-line-size = <64>; + cache-level = <3>; cache-sets = <4096>; }; }; diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi index 724e87450605..9474b0da0a3e 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi @@ -2005,6 +2005,7 @@ CPU_SLEEP: cpu-sleep { L2: l2-cache { compatible = "cache"; + cache-level = <2>; }; }; diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi index 0170bfa8a467..583c12444124 100644 --- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi @@ -2905,117 +2905,150 @@ core3 { }; l2c0_0: l2-cache00 { + compatible = "cache"; cache-size = <262144>; cache-line-size = <64>; cache-sets = <512>; cache-unified; + cache-level = <2>; next-level-cache = <&l3c0>; }; l2c0_1: l2-cache01 { + compatible = "cache"; cache-size = <262144>; cache-line-size = <64>; cache-sets = <512>; cache-unified; + cache-level = <2>; next-level-cache = <&l3c0>; }; l2c0_2: l2-cache02 { + compatible = "cache"; cache-size = <262144>; cache-line-size = <64>; cache-sets = <512>; cache-unified; + cache-level = <2>; next-level-cache = <&l3c0>; }; l2c0_3: l2-cache03 { + compatible = "cache"; cache-size = <262144>; cache-line-size = <64>; cache-sets = <512>; cache-unified; + cache-level = <2>; next-level-cache = <&l3c0>; }; l2c1_0: l2-cache10 { + compatible = "cache"; cache-size = <262144>; cache-line-size = <64>; cache-sets = <512>; cache-unified; + cache-level = <2>; next-level-cache = <&l3c1>; }; l2c1_1: l2-cache11 { + compatible = "cache"; cache-size = <262144>; cache-line-size = <64>; cache-sets = <512>; cache-unified; + cache-level = <2>; next-level-cache = <&l3c1>; }; l2c1_2: l2-cache12 { + compatible = "cache"; cache-size = <262144>; cache-line-size = <64>; cache-sets = <512>; cache-unified; + cache-level = <2>; next-level-cache = <&l3c1>; }; l2c1_3: l2-cache13 { + compatible = "cache"; cache-size = <262144>; cache-line-size = <64>; cache-sets = <512>; cache-unified; + cache-level = <2>; next-level-cache = <&l3c1>; }; l2c2_0: l2-cache20 { + compatible = "cache"; cache-size = <262144>; cache-line-size = <64>; cache-sets = <512>; cache-unified; + cache-level = <2>; next-level-cache = <&l3c2>; }; l2c2_1: l2-cache21 { + compatible = "cache"; cache-size = <262144>; cache-line-size = <64>; cache-sets = <512>; cache-unified; + cache-level = <2>; next-level-cache = <&l3c2>; }; l2c2_2: l2-cache22 { + compatible = "cache"; cache-size = <262144>; cache-line-size = <64>; cache-sets = <512>; cache-unified; + cache-level = <2>; next-level-cache = <&l3c2>; }; l2c2_3: l2-cache23 { + compatible = "cache"; cache-size = <262144>; cache-line-size = <64>; cache-sets = <512>; cache-unified; + cache-level = <2>; next-level-cache = <&l3c2>; }; l3c0: l3-cache0 { + compatible = "cache"; + cache-unified; cache-size = <2097152>; cache-line-size = <64>; cache-sets = <2048>; + cache-level = <3>; }; l3c1: l3-cache1 { + compatible = "cache"; + cache-unified; cache-size = <2097152>; cache-line-size = <64>; cache-sets = <2048>; + cache-level = <3>; }; l3c2: l3-cache2 { + compatible = "cache"; + cache-unified; cache-size = <2097152>; cache-line-size = <64>; cache-sets = <2048>; + cache-level = <3>; }; }; From patchwork Mon Nov 7 15:57:09 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierre Gondois X-Patchwork-Id: 16562 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2157369wru; Mon, 7 Nov 2022 08:32:59 -0800 (PST) X-Google-Smtp-Source: AMsMyM7a1avIXKIgX2qxV01XNCxlb3qTXBvmeO8EKC0iy51pCufWrxdxCK+mM5SpeH3QgWjhVHsG X-Received: by 2002:a17:90b:4c8a:b0:214:2ed8:6501 with SMTP id my10-20020a17090b4c8a00b002142ed86501mr30348395pjb.70.1667838779395; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id nb18-20020a17090b35d200b0020900585fa2si15987509pjb.102.2022.11.07.08.32.46; Mon, 07 Nov 2022 08:32:59 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231577AbiKGQ3c (ORCPT + 99 others); Mon, 7 Nov 2022 11:29:32 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51438 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232300AbiKGQ3F (ORCPT ); Mon, 7 Nov 2022 11:29:05 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id B44D91DA65; Mon, 7 Nov 2022 08:27:12 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 99C221FB; Mon, 7 Nov 2022 08:27:18 -0800 (PST) Received: from pierre123.arm.com (pierre123.nice.arm.com [10.34.100.128]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 32B153F534; Mon, 7 Nov 2022 08:26:57 -0800 (PST) From: Pierre Gondois To: linux-kernel@vger.kernel.org Cc: Pierre Gondois , Rob Herring , Krzysztof Kozlowski , Florian Fainelli , Broadcom internal kernel review list , Ray Jui , Scott Branden , Tsahee Zidenberg , Antoine Tenart , Brijesh Singh , Suravee Suthikulpanit , Tom Lendacky , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Khuong Dinh , Liviu Dudau , Sudeep Holla , Lorenzo Pieralisi , William Zhang , Anand Gore , Kursad Oney , =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= , Alim Akhtar , Shawn Guo , Li Yang , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Chester Lin , =?utf-8?q?Andreas_F=C3=A4rber?= , Matthias Brugger , NXP S32 Linux Team , Wei Xu , Chanho Min , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Lars Povlsen , Steen Hegelund , Daniel Machon , UNGLinuxDriver@microchip.com, Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Thierry Reding , Jonathan Hunter , Andy Gross , Bjorn Andersson , Konrad Dybcio , Geert Uytterhoeven , Magnus Damm , Heiko Stuebner , Kunihiko Hayashi , Masami Hiramatsu , Jisheng Zhang , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Viorel Suman , Abel Vesa , Zhou Peng , Shenwei Wang , Ming Qian , Peng Fan , Adam Ford , Tim Harvey , Lucas Stach , Richard Zhu , Li Jun , Markus Niebel , Marco Felsch , Marek Vasut , Laurent Pinchart , Joakim Zhang , Paul Elder , Alexander Stein , Martin Kepplinger , David Heidelberg , Liu Ying , Oliver Graute , Shijie Qin , Clark Wang , Wei Fang , Jacky Bai , Chris Packham , Vadym Kochan , Sameer Pujar , Akhil R , Prathamesh Shete , Sumit Gupta , Diogo Ivo , Mikko Perttunen , Vidya Sagar , Ashish Mhetre , Johan Jonker , Christopher Obbard , Ezequiel Garcia , Aswani Reddy , Shashank Prashar , devicetree@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-mediatek@lists.infradead.org, openbmc@lists.ozlabs.org, linux-tegra@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-realtek-soc@lists.infradead.org, linux-renesas-soc@vger.kernel.org, linux-rockchip@lists.infradead.org Subject: [PATCH v2 16/23] arm64: dts: Update cache properties for qcom Date: Mon, 7 Nov 2022 16:57:09 +0100 Message-Id: <20221107155825.1644604-17-pierre.gondois@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221107155825.1644604-1-pierre.gondois@arm.com> References: <20221107155825.1644604-1-pierre.gondois@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748855715736238503?= X-GMAIL-MSGID: =?utf-8?q?1748855715736238503?= The DeviceTree Specification v0.3 specifies that the cache node 'compatible' and 'cache-level' properties are 'required'. Cf. s3.8 Multi-level and Shared Cache Nodes The 'cache-unified' property should be present if one of the properties for unified cache is present ('cache-size', ...). Update the Device Trees accordingly. About msm8953.dtsi: According to the Devicetree Specification v0.3, s3.7.3 'Internal (L1) Cache Properties', cache-unified: If present, specifies the cache has a unified or- ganization. If not present, specifies that the cache has a Harvard architecture with separate caches for instructions and data. Plus, the 'cache-level' property seems to be reserved to higher cache levels (cf s3.8). To describe a l1 data/instruction cache couple, no cache information should be described. Remove the l1 cache nodes. Signed-off-by: Pierre Gondois --- arch/arm64/boot/dts/qcom/msm8953.dtsi | 56 -------------------------- arch/arm64/boot/dts/qcom/sc7180.dtsi | 9 +++++ arch/arm64/boot/dts/qcom/sc7280.dtsi | 9 +++++ arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 9 +++++ arch/arm64/boot/dts/qcom/sdm845.dtsi | 9 +++++ arch/arm64/boot/dts/qcom/sm6125.dtsi | 2 + arch/arm64/boot/dts/qcom/sm6350.dtsi | 9 +++++ arch/arm64/boot/dts/qcom/sm8150.dtsi | 9 +++++ arch/arm64/boot/dts/qcom/sm8250.dtsi | 9 +++++ arch/arm64/boot/dts/qcom/sm8350.dtsi | 9 +++++ arch/arm64/boot/dts/qcom/sm8450.dtsi | 9 +++++ 11 files changed, 83 insertions(+), 56 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8953.dtsi b/arch/arm64/boot/dts/qcom/msm8953.dtsi index 6b992a6d56c1..a07b7a45b9e5 100644 --- a/arch/arm64/boot/dts/qcom/msm8953.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8953.dtsi @@ -42,13 +42,6 @@ CPU0: cpu@0 { capacity-dmips-mhz = <1024>; next-level-cache = <&L2_0>; #cooling-cells = <2>; - - l1-icache { - compatible = "cache"; - }; - l1-dcache { - compatible = "cache"; - }; }; CPU1: cpu@1 { @@ -59,13 +52,6 @@ CPU1: cpu@1 { capacity-dmips-mhz = <1024>; next-level-cache = <&L2_0>; #cooling-cells = <2>; - - l1-icache { - compatible = "cache"; - }; - l1-dcache { - compatible = "cache"; - }; }; CPU2: cpu@2 { @@ -76,13 +62,6 @@ CPU2: cpu@2 { capacity-dmips-mhz = <1024>; next-level-cache = <&L2_0>; #cooling-cells = <2>; - - l1-icache { - compatible = "cache"; - }; - l1-dcache { - compatible = "cache"; - }; }; CPU3: cpu@3 { @@ -93,13 +72,6 @@ CPU3: cpu@3 { capacity-dmips-mhz = <1024>; next-level-cache = <&L2_0>; #cooling-cells = <2>; - - l1-icache { - compatible = "cache"; - }; - l1-dcache { - compatible = "cache"; - }; }; CPU4: cpu@100 { @@ -110,13 +82,6 @@ CPU4: cpu@100 { capacity-dmips-mhz = <1024>; next-level-cache = <&L2_1>; #cooling-cells = <2>; - - l1-icache { - compatible = "cache"; - }; - l1-dcache { - compatible = "cache"; - }; }; CPU5: cpu@101 { @@ -127,13 +92,6 @@ CPU5: cpu@101 { capacity-dmips-mhz = <1024>; next-level-cache = <&L2_1>; #cooling-cells = <2>; - - l1-icache { - compatible = "cache"; - }; - l1-dcache { - compatible = "cache"; - }; }; CPU6: cpu@102 { @@ -144,13 +102,6 @@ CPU6: cpu@102 { capacity-dmips-mhz = <1024>; next-level-cache = <&L2_1>; #cooling-cells = <2>; - - l1-icache { - compatible = "cache"; - }; - l1-dcache { - compatible = "cache"; - }; }; CPU7: cpu@103 { @@ -161,13 +112,6 @@ CPU7: cpu@103 { capacity-dmips-mhz = <1024>; next-level-cache = <&L2_1>; #cooling-cells = <2>; - - l1-icache { - compatible = "cache"; - }; - l1-dcache { - compatible = "cache"; - }; }; cpu-map { diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index 58976a1ba06b..ecda96d19861 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -146,9 +146,11 @@ &LITTLE_CPU_SLEEP_1 qcom,freq-domain = <&cpufreq_hw 0>; L2_0: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; L3_0: l3-cache { compatible = "cache"; + cache-level = <3>; }; }; }; @@ -171,6 +173,7 @@ &LITTLE_CPU_SLEEP_1 qcom,freq-domain = <&cpufreq_hw 0>; L2_100: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; @@ -193,6 +196,7 @@ &LITTLE_CPU_SLEEP_1 qcom,freq-domain = <&cpufreq_hw 0>; L2_200: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; @@ -215,6 +219,7 @@ &LITTLE_CPU_SLEEP_1 qcom,freq-domain = <&cpufreq_hw 0>; L2_300: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; @@ -237,6 +242,7 @@ &LITTLE_CPU_SLEEP_1 qcom,freq-domain = <&cpufreq_hw 0>; L2_400: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; @@ -259,6 +265,7 @@ &LITTLE_CPU_SLEEP_1 qcom,freq-domain = <&cpufreq_hw 0>; L2_500: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; @@ -281,6 +288,7 @@ &BIG_CPU_SLEEP_1 qcom,freq-domain = <&cpufreq_hw 1>; L2_600: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; @@ -303,6 +311,7 @@ &BIG_CPU_SLEEP_1 qcom,freq-domain = <&cpufreq_hw 1>; L2_700: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index 212580316d3e..2476e494a5a9 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -180,9 +180,11 @@ &LITTLE_CPU_SLEEP_1 #cooling-cells = <2>; L2_0: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; L3_0: l3-cache { compatible = "cache"; + cache-level = <3>; }; }; }; @@ -203,6 +205,7 @@ &LITTLE_CPU_SLEEP_1 #cooling-cells = <2>; L2_100: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; @@ -223,6 +226,7 @@ &LITTLE_CPU_SLEEP_1 #cooling-cells = <2>; L2_200: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; @@ -243,6 +247,7 @@ &LITTLE_CPU_SLEEP_1 #cooling-cells = <2>; L2_300: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; @@ -263,6 +268,7 @@ &BIG_CPU_SLEEP_1 #cooling-cells = <2>; L2_400: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; @@ -283,6 +289,7 @@ &BIG_CPU_SLEEP_1 #cooling-cells = <2>; L2_500: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; @@ -303,6 +310,7 @@ &BIG_CPU_SLEEP_1 #cooling-cells = <2>; L2_600: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; @@ -323,6 +331,7 @@ &BIG_CPU_SLEEP_1 #cooling-cells = <2>; L2_700: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index c32bcded2aef..8acb037d77a2 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -188,9 +188,11 @@ CPU0: cpu@0 { #cooling-cells = <2>; L2_0: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; L3_0: l3-cache { compatible = "cache"; + cache-level = <3>; }; }; }; @@ -209,6 +211,7 @@ CPU1: cpu@100 { #cooling-cells = <2>; L2_100: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; @@ -227,6 +230,7 @@ CPU2: cpu@200 { #cooling-cells = <2>; L2_200: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; @@ -245,6 +249,7 @@ CPU3: cpu@300 { #cooling-cells = <2>; L2_300: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; @@ -263,6 +268,7 @@ CPU4: cpu@400 { #cooling-cells = <2>; L2_400: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; @@ -281,6 +287,7 @@ CPU5: cpu@500 { #cooling-cells = <2>; L2_500: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; @@ -299,6 +306,7 @@ CPU6: cpu@600 { #cooling-cells = <2>; L2_600: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; @@ -317,6 +325,7 @@ CPU7: cpu@700 { #cooling-cells = <2>; L2_700: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index d761da47220d..52bccd705bee 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -209,9 +209,11 @@ CPU0: cpu@0 { next-level-cache = <&L2_0>; L2_0: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; L3_0: l3-cache { compatible = "cache"; + cache-level = <3>; }; }; }; @@ -233,6 +235,7 @@ CPU1: cpu@100 { next-level-cache = <&L2_100>; L2_100: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; @@ -254,6 +257,7 @@ CPU2: cpu@200 { next-level-cache = <&L2_200>; L2_200: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; @@ -275,6 +279,7 @@ CPU3: cpu@300 { next-level-cache = <&L2_300>; L2_300: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; @@ -296,6 +301,7 @@ CPU4: cpu@400 { next-level-cache = <&L2_400>; L2_400: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; @@ -317,6 +323,7 @@ CPU5: cpu@500 { next-level-cache = <&L2_500>; L2_500: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; @@ -338,6 +345,7 @@ CPU6: cpu@600 { next-level-cache = <&L2_600>; L2_600: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; @@ -359,6 +367,7 @@ CPU7: cpu@700 { next-level-cache = <&L2_700>; L2_700: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qcom/sm6125.dtsi index 1fe3fa3ad877..7768db00e698 100644 --- a/arch/arm64/boot/dts/qcom/sm6125.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi @@ -45,6 +45,7 @@ CPU0: cpu@0 { next-level-cache = <&L2_0>; L2_0: l2-cache { compatible = "cache"; + cache-level = <2>; }; }; @@ -84,6 +85,7 @@ CPU4: cpu@100 { next-level-cache = <&L2_1>; L2_1: l2-cache { compatible = "cache"; + cache-level = <2>; }; }; diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi index c39de7d3ace0..b9e5de93bbda 100644 --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi @@ -50,9 +50,11 @@ CPU0: cpu@0 { #cooling-cells = <2>; L2_0: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; L3_0: l3-cache { compatible = "cache"; + cache-level = <3>; }; }; }; @@ -69,6 +71,7 @@ CPU1: cpu@100 { #cooling-cells = <2>; L2_100: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; @@ -85,6 +88,7 @@ CPU2: cpu@200 { #cooling-cells = <2>; L2_200: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; @@ -101,6 +105,7 @@ CPU3: cpu@300 { #cooling-cells = <2>; L2_300: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; @@ -117,6 +122,7 @@ CPU4: cpu@400 { #cooling-cells = <2>; L2_400: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; @@ -133,6 +139,7 @@ CPU5: cpu@500 { #cooling-cells = <2>; L2_500: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; @@ -150,6 +157,7 @@ CPU6: cpu@600 { #cooling-cells = <2>; L2_600: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; @@ -166,6 +174,7 @@ CPU7: cpu@700 { #cooling-cells = <2>; L2_700: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index cef8c4f4f0ff..03168a47d007 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -60,9 +60,11 @@ CPU0: cpu@0 { #cooling-cells = <2>; L2_0: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; L3_0: l3-cache { compatible = "cache"; + cache-level = <3>; }; }; }; @@ -84,6 +86,7 @@ CPU1: cpu@100 { #cooling-cells = <2>; L2_100: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; @@ -106,6 +109,7 @@ CPU2: cpu@200 { #cooling-cells = <2>; L2_200: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; @@ -127,6 +131,7 @@ CPU3: cpu@300 { #cooling-cells = <2>; L2_300: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; @@ -148,6 +153,7 @@ CPU4: cpu@400 { #cooling-cells = <2>; L2_400: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; @@ -169,6 +175,7 @@ CPU5: cpu@500 { #cooling-cells = <2>; L2_500: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; @@ -190,6 +197,7 @@ CPU6: cpu@600 { #cooling-cells = <2>; L2_600: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; @@ -211,6 +219,7 @@ CPU7: cpu@700 { #cooling-cells = <2>; L2_700: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index a5b62cadb129..1cf3a569989d 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -110,9 +110,11 @@ CPU0: cpu@0 { #cooling-cells = <2>; L2_0: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; L3_0: l3-cache { compatible = "cache"; + cache-level = <3>; }; }; }; @@ -134,6 +136,7 @@ CPU1: cpu@100 { #cooling-cells = <2>; L2_100: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; @@ -155,6 +158,7 @@ CPU2: cpu@200 { #cooling-cells = <2>; L2_200: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; @@ -176,6 +180,7 @@ CPU3: cpu@300 { #cooling-cells = <2>; L2_300: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; @@ -197,6 +202,7 @@ CPU4: cpu@400 { #cooling-cells = <2>; L2_400: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; @@ -218,6 +224,7 @@ CPU5: cpu@500 { #cooling-cells = <2>; L2_500: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; @@ -240,6 +247,7 @@ CPU6: cpu@600 { #cooling-cells = <2>; L2_600: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; @@ -261,6 +269,7 @@ CPU7: cpu@700 { #cooling-cells = <2>; L2_700: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi index a86d9ea93b9d..545bc1774f74 100644 --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi @@ -73,9 +73,11 @@ CPU0: cpu@0 { #cooling-cells = <2>; L2_0: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; L3_0: l3-cache { compatible = "cache"; + cache-level = <3>; }; }; }; @@ -92,6 +94,7 @@ CPU1: cpu@100 { #cooling-cells = <2>; L2_100: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; @@ -108,6 +111,7 @@ CPU2: cpu@200 { #cooling-cells = <2>; L2_200: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; @@ -124,6 +128,7 @@ CPU3: cpu@300 { #cooling-cells = <2>; L2_300: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; @@ -140,6 +145,7 @@ CPU4: cpu@400 { #cooling-cells = <2>; L2_400: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; @@ -156,6 +162,7 @@ CPU5: cpu@500 { #cooling-cells = <2>; L2_500: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; @@ -173,6 +180,7 @@ CPU6: cpu@600 { #cooling-cells = <2>; L2_600: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; @@ -189,6 +197,7 @@ CPU7: cpu@700 { #cooling-cells = <2>; L2_700: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi index d32f08df743d..3292f5fbf44d 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -53,9 +53,11 @@ CPU0: cpu@0 { #cooling-cells = <2>; L2_0: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; L3_0: l3-cache { compatible = "cache"; + cache-level = <3>; }; }; }; @@ -72,6 +74,7 @@ CPU1: cpu@100 { #cooling-cells = <2>; L2_100: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; @@ -88,6 +91,7 @@ CPU2: cpu@200 { #cooling-cells = <2>; L2_200: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; @@ -104,6 +108,7 @@ CPU3: cpu@300 { #cooling-cells = <2>; L2_300: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; @@ -120,6 +125,7 @@ CPU4: cpu@400 { #cooling-cells = <2>; L2_400: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; @@ -136,6 +142,7 @@ CPU5: cpu@500 { #cooling-cells = <2>; L2_500: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; @@ -153,6 +160,7 @@ CPU6: cpu@600 { #cooling-cells = <2>; L2_600: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; @@ -169,6 +177,7 @@ CPU7: cpu@700 { #cooling-cells = <2>; L2_700: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; From patchwork Mon Nov 7 15:57:10 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Pierre Gondois X-Patchwork-Id: 16563 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2157713wru; Mon, 7 Nov 2022 08:33:31 -0800 (PST) X-Google-Smtp-Source: AMsMyM4RQs/VFXg5HkQ/5L0g3l4TSmvU2aoRctOaJzhizPS85HCA7KmJVyRssRc/zEktwEeD0yqu X-Received: by 2002:a17:902:b717:b0:188:547d:b142 with SMTP id d23-20020a170902b71700b00188547db142mr663983pls.103.1667838811640; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id p13-20020a170902e74d00b001786b70f913si11839904plf.164.2022.11.07.08.33.18; Mon, 07 Nov 2022 08:33:31 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232267AbiKGQaw (ORCPT + 99 others); Mon, 7 Nov 2022 11:30:52 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56866 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231374AbiKGQa2 (ORCPT ); Mon, 7 Nov 2022 11:30:28 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 7B7EE2181B; Mon, 7 Nov 2022 08:28:36 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 5E570ED1; Mon, 7 Nov 2022 08:28:42 -0800 (PST) Received: from pierre123.arm.com (pierre123.nice.arm.com [10.34.100.128]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 11F933F534; Mon, 7 Nov 2022 08:28:20 -0800 (PST) From: Pierre Gondois To: linux-kernel@vger.kernel.org Cc: Pierre Gondois , Rob Herring , Krzysztof Kozlowski , Florian Fainelli , Broadcom internal kernel review list , Ray Jui , Scott Branden , Tsahee Zidenberg , Antoine Tenart , Brijesh Singh , Suravee Suthikulpanit , Tom Lendacky , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Khuong Dinh , Liviu Dudau , Sudeep Holla , Lorenzo Pieralisi , William Zhang , Anand Gore , Kursad Oney , =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= , Alim Akhtar , Shawn Guo , Li Yang , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Chester Lin , =?utf-8?q?Andreas_F=C3=A4rber?= , Matthias Brugger , NXP S32 Linux Team , Wei Xu , Chanho Min , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Lars Povlsen , Steen Hegelund , Daniel Machon , UNGLinuxDriver@microchip.com, Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Thierry Reding , Jonathan Hunter , Andy Gross , Bjorn Andersson , Konrad Dybcio , Geert Uytterhoeven , Magnus Damm , Heiko Stuebner , Kunihiko Hayashi , Masami Hiramatsu , Jisheng Zhang , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Viorel Suman , Abel Vesa , Shenwei Wang , Peng Fan , Ming Qian , Lucas Stach , Tim Harvey , Adam Ford , Li Jun , Richard Zhu , Marek Vasut , Markus Niebel , Joakim Zhang , Laurent Pinchart , Paul Elder , Alexander Stein , Martin Kepplinger , David Heidelberg , Liu Ying , Oliver Graute , Shijie Qin , Clark Wang , Haibo Chen , Wei Fang , Jacky Bai , Chris Packham , Vadym Kochan , Sameer Pujar , Mikko Perttunen , Akhil R , Prathamesh Shete , Sumit Gupta , Diogo Ivo , Vidya Sagar , Ashish Mhetre , Johan Jonker , Christopher Obbard , Ezequiel Garcia , Aswani Reddy , Shashank Prashar , Arjun K V , devicetree@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-mediatek@lists.infradead.org, openbmc@lists.ozlabs.org, linux-tegra@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-realtek-soc@lists.infradead.org, linux-renesas-soc@vger.kernel.org, linux-rockchip@lists.infradead.org Subject: [PATCH v2 17/23] arm64: dts: Update cache properties for realtek Date: Mon, 7 Nov 2022 16:57:10 +0100 Message-Id: <20221107155825.1644604-18-pierre.gondois@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221107155825.1644604-1-pierre.gondois@arm.com> References: <20221107155825.1644604-1-pierre.gondois@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748855749435381006?= X-GMAIL-MSGID: =?utf-8?q?1748855749435381006?= The DeviceTree Specification v0.3 specifies that the cache node 'compatible' and 'cache-level' properties are 'required'. Cf. s3.8 Multi-level and Shared Cache Nodes The 'cache-unified' property should be present if one of the properties for unified cache is present ('cache-size', ...). Update the Device Trees accordingly. Signed-off-by: Pierre Gondois Acked-by: Andreas Färber --- arch/arm64/boot/dts/realtek/rtd1293.dtsi | 1 + arch/arm64/boot/dts/realtek/rtd1295.dtsi | 1 + arch/arm64/boot/dts/realtek/rtd1296.dtsi | 1 + arch/arm64/boot/dts/realtek/rtd1395.dtsi | 1 + arch/arm64/boot/dts/realtek/rtd16xx.dtsi | 2 ++ 5 files changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/realtek/rtd1293.dtsi b/arch/arm64/boot/dts/realtek/rtd1293.dtsi index 2d92b56ac94d..0696b99fc40d 100644 --- a/arch/arm64/boot/dts/realtek/rtd1293.dtsi +++ b/arch/arm64/boot/dts/realtek/rtd1293.dtsi @@ -30,6 +30,7 @@ cpu1: cpu@1 { l2: l2-cache { compatible = "cache"; + cache-level = <2>; }; }; diff --git a/arch/arm64/boot/dts/realtek/rtd1295.dtsi b/arch/arm64/boot/dts/realtek/rtd1295.dtsi index 1402abe80ea1..4ca322e420e6 100644 --- a/arch/arm64/boot/dts/realtek/rtd1295.dtsi +++ b/arch/arm64/boot/dts/realtek/rtd1295.dtsi @@ -44,6 +44,7 @@ cpu3: cpu@3 { l2: l2-cache { compatible = "cache"; + cache-level = <2>; }; }; diff --git a/arch/arm64/boot/dts/realtek/rtd1296.dtsi b/arch/arm64/boot/dts/realtek/rtd1296.dtsi index fb864a139c97..03fccd48f0c0 100644 --- a/arch/arm64/boot/dts/realtek/rtd1296.dtsi +++ b/arch/arm64/boot/dts/realtek/rtd1296.dtsi @@ -44,6 +44,7 @@ cpu3: cpu@3 { l2: l2-cache { compatible = "cache"; + cache-level = <2>; }; }; diff --git a/arch/arm64/boot/dts/realtek/rtd1395.dtsi b/arch/arm64/boot/dts/realtek/rtd1395.dtsi index 05c9216a87ee..94c0a8cf4953 100644 --- a/arch/arm64/boot/dts/realtek/rtd1395.dtsi +++ b/arch/arm64/boot/dts/realtek/rtd1395.dtsi @@ -44,6 +44,7 @@ cpu3: cpu@3 { l2: l2-cache { compatible = "cache"; + cache-level = <2>; }; }; diff --git a/arch/arm64/boot/dts/realtek/rtd16xx.dtsi b/arch/arm64/boot/dts/realtek/rtd16xx.dtsi index afba5f04c8ec..2ee9ba1ecdc1 100644 --- a/arch/arm64/boot/dts/realtek/rtd16xx.dtsi +++ b/arch/arm64/boot/dts/realtek/rtd16xx.dtsi @@ -87,12 +87,14 @@ cpu5: cpu@500 { l2: l2-cache { compatible = "cache"; + cache-level = <2>; next-level-cache = <&l3>; }; l3: l3-cache { compatible = "cache"; + cache-level = <3>; }; }; From patchwork Mon Nov 7 15:57:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierre Gondois X-Patchwork-Id: 16564 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2158322wru; Mon, 7 Nov 2022 08:34:33 -0800 (PST) X-Google-Smtp-Source: AMsMyM4wxUnXmbDUawDNnPViFd6RQ3Jik7cGY7+5G9UvkmvXr5o28JKhGVVYtROCAc8sY2nRRRu0 X-Received: by 2002:a17:902:f78c:b0:17a:ef1:e902 with SMTP id q12-20020a170902f78c00b0017a0ef1e902mr50760632pln.5.1667838873098; Mon, 07 Nov 2022 08:34:33 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1667838873; cv=none; d=google.com; s=arc-20160816; b=F4dwvg/p8EAKhE9r7TON3WqjTRII/z3D2MyYMJIbK2ouruIc99zBoXCGnzwwecTnKS T1TG90mIcyAJPstKdV1IgHHD7LEmiHeQtLNucuFHrgCHnUJtAVcR6kLLz9Io80Y+hYKe RfzWIoJ6KCslg9uonz3wXanv6+AJWq9gvFp7SqBeRpmTmQ6BsXBhTpDx/dReIqgZGws4 W93WvJN7Kkg/REHcVrUae6CfQcCNLoxYjD7+PadC+f7UWigZfdc8cbrd7OP3NsxHol+C Z3Zms9eDqmCG6xrTI5lJKFGx2WsfCnunQbFbNsfOm125IESrHSgiY1whY2aqYLuzAYdr Rs3Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=/1grlSosDlqsh7JXp4E+q/aiybzRVCpFkWY3KuYlx88=; b=r/kmSKI85vQG2CugCA6jPUEsxklPlQTXu+rl+ML7T6RsDe4J2b+Njvtg8TJ/lBF/Hn mjfqR9Lh/uAualdHnHeRT9I7R2aCUQ9Sq59OPGy8mBXUm/AbEVJK5JtObOg+sYqc39GA n9+Ka+p/o8ODLEPiNdJPoXKO/n6dn61YB2dvb9G706TbozUQY4GmJo2nCmXI8dd/HypL bRlsu2IQFTH0bwpRK+/eGdIQrSbK/zs5V9z8iDJVz7uR/Ysw+bxE+rJxwhgGWL4IFfjO 6hKSg21WI/6QXW/9FWePUuazJQX9tDSQUGTgA1U6X1fmUyj+rGOgX0DBAdIPxrtjiFHT Mi6g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id x2-20020aa79a42000000b0056b86567ce9si8640596pfj.347.2022.11.07.08.34.16; Mon, 07 Nov 2022 08:34:33 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232315AbiKGQc1 (ORCPT + 99 others); Mon, 7 Nov 2022 11:32:27 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54178 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232348AbiKGQcL (ORCPT ); Mon, 7 Nov 2022 11:32:11 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 0018C26121; Mon, 7 Nov 2022 08:30:17 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E3502ED1; Mon, 7 Nov 2022 08:30:23 -0800 (PST) Received: from pierre123.arm.com (pierre123.nice.arm.com [10.34.100.128]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id B80A53F534; Mon, 7 Nov 2022 08:30:02 -0800 (PST) From: Pierre Gondois To: linux-kernel@vger.kernel.org Cc: Pierre Gondois , Rob Herring , Krzysztof Kozlowski , Florian Fainelli , Broadcom internal kernel review list , Ray Jui , Scott Branden , Tsahee Zidenberg , Antoine Tenart , Brijesh Singh , Suravee Suthikulpanit , Tom Lendacky , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Khuong Dinh , Liviu Dudau , Sudeep Holla , Lorenzo Pieralisi , William Zhang , Anand Gore , Kursad Oney , =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= , Alim Akhtar , Shawn Guo , Li Yang , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Chester Lin , =?utf-8?q?Andreas_F=C3=A4rber?= , Matthias Brugger , NXP S32 Linux Team , Wei Xu , Chanho Min , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Lars Povlsen , Steen Hegelund , Daniel Machon , UNGLinuxDriver@microchip.com, Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Thierry Reding , Jonathan Hunter , Andy Gross , Bjorn Andersson , Konrad Dybcio , Geert Uytterhoeven , Magnus Damm , Heiko Stuebner , Kunihiko Hayashi , Masami Hiramatsu , Jisheng Zhang , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Viorel Suman , Abel Vesa , Shenwei Wang , Peng Fan , Ming Qian , Adam Ford , Lucas Stach , Tim Harvey , Richard Zhu , Li Jun , Marek Vasut , Markus Niebel , Joakim Zhang , Laurent Pinchart , Alexander Stein , Paul Elder , Martin Kepplinger , Joy Zou , David Heidelberg , Liu Ying , Oliver Graute , Shijie Qin , Jacky Bai , Wei Fang , Clark Wang , Chris Packham , Vadym Kochan , Sameer Pujar , Prathamesh Shete , Akhil R , Mikko Perttunen , Sumit Gupta , Diogo Ivo , Vidya Sagar , Ashish Mhetre , Johan Jonker , Christopher Obbard , Ezequiel Garcia , Aswani Reddy , Shashank Prashar , devicetree@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-mediatek@lists.infradead.org, openbmc@lists.ozlabs.org, linux-tegra@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-realtek-soc@lists.infradead.org, linux-renesas-soc@vger.kernel.org, linux-rockchip@lists.infradead.org Subject: [PATCH v2 18/23] arm64: dts: Update cache properties for renesas Date: Mon, 7 Nov 2022 16:57:11 +0100 Message-Id: <20221107155825.1644604-19-pierre.gondois@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221107155825.1644604-1-pierre.gondois@arm.com> References: <20221107155825.1644604-1-pierre.gondois@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748855813897922738?= X-GMAIL-MSGID: =?utf-8?q?1748855813897922738?= The DeviceTree Specification v0.3 specifies that the cache node 'compatible' and 'cache-level' properties are 'required'. Cf. s3.8 Multi-level and Shared Cache Nodes The 'cache-unified' property should be present if one of the properties for unified cache is present ('cache-size', ...). Update the Device Trees accordingly. Signed-off-by: Pierre Gondois Reviewed-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r9a07g043.dtsi | 1 + arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 1 + arch/arm64/boot/dts/renesas/r9a07g054.dtsi | 1 + 3 files changed, 3 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi index 689aa4ba416b..18c69a187ecb 100644 --- a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi @@ -88,6 +88,7 @@ L3_CA55: cache-controller-0 { compatible = "cache"; cache-unified; cache-size = <0x40000>; + cache-level = <3>; }; }; diff --git a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi index 2283d4fb8736..86866d9dc7c4 100644 --- a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi @@ -109,6 +109,7 @@ L3_CA55: cache-controller-0 { compatible = "cache"; cache-unified; cache-size = <0x40000>; + cache-level = <3>; }; }; diff --git a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi index 358d4c34465f..b36dd5291e5a 100644 --- a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi @@ -109,6 +109,7 @@ L3_CA55: cache-controller-0 { compatible = "cache"; cache-unified; cache-size = <0x40000>; + cache-level = <3>; }; }; From patchwork Mon Nov 7 15:57:12 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierre Gondois X-Patchwork-Id: 16565 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2158746wru; Mon, 7 Nov 2022 08:35:21 -0800 (PST) X-Google-Smtp-Source: AMsMyM71RedJBHXVQ2uO62JsssRFQ6seRRvrgtV6HJxxgA8dwQWZHaxOFEreReR4TP0XIeySb0T9 X-Received: by 2002:a17:903:240d:b0:183:9bab:9c3 with SMTP id e13-20020a170903240d00b001839bab09c3mr51365724plo.48.1667838921599; Mon, 07 Nov 2022 08:35:21 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1667838921; cv=none; d=google.com; s=arc-20160816; b=DrehAlc4ywLnTO9pvKSMRYCsjH6Sq2NlBA+ua+nr2Y9j25RpGlANss3oAKmJGbyd+T E/WViPX4OVgN3dn9nAf+QI5xuYgtdZfg9qJjdM9tLYOcz9hBCgKM4Wjl/onyTWfXETt1 7yztiQx00krtFvGZJ9w3KcD3n4mglJsPhl0V/1G0HucImN37CLAe6fDM6W1mqG6wrZkS 7mJ8k8Eu2WxRWPSTlFsWg2h/CIOD/Ka8tJg+979zMGoTx77c1dR5ftXKvuK9nrLqytoy vyBxX9BidWPaBbqdRS76R1Rz7z/CzQbzkCEFVGaNDtkNK/rOzq5asU4qBEJXA780Fj/f PwbQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=ly/RiY6mg7DvTRhzwlh35nHRzyaAwSIlUrVS33hi/Oc=; b=t1oxOEBd9fWov3EldJramohwic19dtXQdJHqpQn9mWg8kG8IeQwqJWlFkW9Bd1YSvM R9t8JPMjkzkdUTaII4I2l3je9AVXem6opAUFBIHkEhhn+UoT+s6YMAORgrGk8FyeCBLZ iI3Rg1E23I2TozOmSYlf7suXzZAlgRU7O34a7xwpCiBgUahVlMOiwCWIFHfkYsQkDkzq jv2rPJv5wG1Skjqs1f2nppKL4z27LkoV7bpH3z5QYd6E/45y2svKkFgEIvzJcx5vUYsC S2lxq+eVV1DOT4pVlVnXonHnPmmJf0k9lEk3JIhvgMLBJPuxCz+jaEgVR+X+Uqm5QQl6 ih8w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id c9-20020a17090a8d0900b0020d2286c30csi9438802pjo.134.2022.11.07.08.35.06; Mon, 07 Nov 2022 08:35:21 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232699AbiKGQda (ORCPT + 99 others); Mon, 7 Nov 2022 11:33:30 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54176 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232656AbiKGQdN (ORCPT ); Mon, 7 Nov 2022 11:33:13 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id BDDE521E07; Mon, 7 Nov 2022 08:31:51 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A3673ED1; Mon, 7 Nov 2022 08:31:57 -0800 (PST) Received: from pierre123.arm.com (pierre123.nice.arm.com [10.34.100.128]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 376173F534; Mon, 7 Nov 2022 08:31:36 -0800 (PST) From: Pierre Gondois To: linux-kernel@vger.kernel.org Cc: Pierre Gondois , Rob Herring , Krzysztof Kozlowski , Florian Fainelli , Broadcom internal kernel review list , Ray Jui , Scott Branden , Tsahee Zidenberg , Antoine Tenart , Brijesh Singh , Suravee Suthikulpanit , Tom Lendacky , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Khuong Dinh , Liviu Dudau , Sudeep Holla , Lorenzo Pieralisi , William Zhang , Anand Gore , Kursad Oney , =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= , Alim Akhtar , Shawn Guo , Li Yang , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Chester Lin , =?utf-8?q?Andreas_F=C3=A4rber?= , Matthias Brugger , NXP S32 Linux Team , Wei Xu , Chanho Min , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Lars Povlsen , Steen Hegelund , Daniel Machon , UNGLinuxDriver@microchip.com, Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Thierry Reding , Jonathan Hunter , Andy Gross , Bjorn Andersson , Konrad Dybcio , Geert Uytterhoeven , Magnus Damm , Heiko Stuebner , Kunihiko Hayashi , Masami Hiramatsu , Jisheng Zhang , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Viorel Suman , Abel Vesa , Shijie Qin , Ming Qian , Peng Fan , Shenwei Wang , Adam Ford , Lucas Stach , Tim Harvey , Li Jun , Richard Zhu , Joakim Zhang , Markus Niebel , Marek Vasut , Laurent Pinchart , Paul Elder , Alexander Stein , Martin Kepplinger , David Heidelberg , Oliver Graute , Liu Ying , Dong Aisheng , Ahmad Fatoum , Clark Wang , Wei Fang , Jacky Bai , Chris Packham , Vadym Kochan , Sameer Pujar , Prathamesh Shete , Akhil R , Sumit Gupta , Diogo Ivo , Mikko Perttunen , Vidya Sagar , Ashish Mhetre , Johan Jonker , Christopher Obbard , Ezequiel Garcia , Aswani Reddy , Shashank Prashar , Chandrasekar R , devicetree@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-mediatek@lists.infradead.org, openbmc@lists.ozlabs.org, linux-tegra@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-realtek-soc@lists.infradead.org, linux-renesas-soc@vger.kernel.org, linux-rockchip@lists.infradead.org Subject: [PATCH v2 19/23] arm64: dts: Update cache properties for rockchip Date: Mon, 7 Nov 2022 16:57:12 +0100 Message-Id: <20221107155825.1644604-20-pierre.gondois@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221107155825.1644604-1-pierre.gondois@arm.com> References: <20221107155825.1644604-1-pierre.gondois@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748855864815604101?= X-GMAIL-MSGID: =?utf-8?q?1748855864815604101?= The DeviceTree Specification v0.3 specifies that the cache node 'compatible' and 'cache-level' properties are 'required'. Cf. s3.8 Multi-level and Shared Cache Nodes The 'cache-unified' property should be present if one of the properties for unified cache is present ('cache-size', ...). Update the Device Trees accordingly. Signed-off-by: Pierre Gondois --- arch/arm64/boot/dts/rockchip/rk3308.dtsi | 1 + arch/arm64/boot/dts/rockchip/rk3328.dtsi | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi index 2dfa67f1cd67..dd228a256a32 100644 --- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi @@ -96,6 +96,7 @@ CPU_SLEEP: cpu-sleep { l2: l2-cache { compatible = "cache"; + cache-level = <2>; }; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi index 49ae15708a0b..8741914cea44 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi @@ -102,6 +102,7 @@ CPU_SLEEP: cpu-sleep { l2: l2-cache0 { compatible = "cache"; + cache-level = <2>; }; }; From patchwork Mon Nov 7 15:57:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierre Gondois X-Patchwork-Id: 16566 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2158902wru; Mon, 7 Nov 2022 08:35:37 -0800 (PST) X-Google-Smtp-Source: AMsMyM69A+0aM9XQIXdb1PtQIbgGwKJoZXP9YL5E8IfJCqcCSpmTLsecgaPRoIlSKplk18LYlaFh X-Received: by 2002:a62:1b11:0:b0:56d:568d:c293 with SMTP id b17-20020a621b11000000b0056d568dc293mr44004800pfb.41.1667838936741; Mon, 07 Nov 2022 08:35:36 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1667838936; cv=none; d=google.com; s=arc-20160816; b=zA72e2kLB5YJXXtIJKWDxPLOFptVjzQVzpx7xDp7ipgLklvyGl0gbiuBVR0/or25Og Tk/wiUOopdEPdgy8flgmjdec6sSiCUDD9l2I4hcbU9hVUo2QdeFTCjoLmGUcUhralT1U fkrzWchH3NPzwQDxO4HDlRXMvU1h6Z0jKil0dXTIUm56kdiNoNG6pau25b9HdUK4Ozb+ 9nibs9pdsBfpdunOwrta6DP1jeBX2I2QnrkM57dAz8NoJZQ1fPrwlfDUFy5drtcNr2Lu q2nfo80DH1tc7UWhKh7goAPG1rJnKOZJn0rRYIHB4N0kWou1smhsOdUZSD7D/VN6qv6D wUyg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=mdLZY405J3655s0rV0afQV61PLq7CSM+FebkFJjSZkg=; b=XsZ9TZ6gIhm9wfV7h6tRNwCrYlhLf4gIhJ3kpTANq+Gn/QICGMODYniWG44d+kVZ1i 1jKjY9/byghUiRdCWQln455AChxRh33I8iXjb6rLWMezMvQRL4eB5jIY8gQs9M2xwWB9 w6gLEOgxPMkFBHTj3GzH01pXgraFaaK6EzgYud5PD3xzryjIeO2XvcvID8ovAJi3tt8g Dj6LiVWkZvzmq1JastadeMCtvYwyQJIxAVBYuXfUZtzvQr/25gZXFqmTyU9427srbv8O WmJQTvlQ+TFUaKosbCEXm/kYDuEqqv0hCMN04RQriWOqVt/5wOV3yDiRIvcdqyVBi07h Yy7Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id e7-20020a056a001a8700b00569a7731a99si11073700pfv.326.2022.11.07.08.35.23; Mon, 07 Nov 2022 08:35:36 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232730AbiKGQeQ (ORCPT + 99 others); Mon, 7 Nov 2022 11:34:16 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60404 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232499AbiKGQeA (ORCPT ); Mon, 7 Nov 2022 11:34:00 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id DBB65E44; Mon, 7 Nov 2022 08:33:23 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 6BE18ED1; Mon, 7 Nov 2022 08:33:29 -0800 (PST) Received: from pierre123.arm.com (pierre123.nice.arm.com [10.34.100.128]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 21D303F534; Mon, 7 Nov 2022 08:33:08 -0800 (PST) From: Pierre Gondois To: linux-kernel@vger.kernel.org Cc: Pierre Gondois , Rob Herring , Krzysztof Kozlowski , Florian Fainelli , Broadcom internal kernel review list , Ray Jui , Scott Branden , Tsahee Zidenberg , Antoine Tenart , Brijesh Singh , Suravee Suthikulpanit , Tom Lendacky , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Khuong Dinh , Liviu Dudau , Sudeep Holla , Lorenzo Pieralisi , William Zhang , Anand Gore , Kursad Oney , =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= , Alim Akhtar , Shawn Guo , Li Yang , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Chester Lin , =?utf-8?q?Andreas_F=C3=A4rber?= , Matthias Brugger , NXP S32 Linux Team , Wei Xu , Chanho Min , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Lars Povlsen , Steen Hegelund , Daniel Machon , UNGLinuxDriver@microchip.com, Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Thierry Reding , Jonathan Hunter , Andy Gross , Bjorn Andersson , Konrad Dybcio , Geert Uytterhoeven , Magnus Damm , Heiko Stuebner , Kunihiko Hayashi , Masami Hiramatsu , Jisheng Zhang , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Viorel Suman , Abel Vesa , Shenwei Wang , Shijie Qin , Ming Qian , Peng Fan , Lucas Stach , Adam Ford , Tim Harvey , Li Jun , Richard Zhu , Markus Niebel , Marek Vasut , Laurent Pinchart , Alexander Stein , Paul Elder , Martin Kepplinger , Joakim Zhang , David Heidelberg , Oliver Graute , Liu Ying , Zhou Peng , Wei Fang , Clark Wang , Jacky Bai , Chris Packham , Vadym Kochan , Sameer Pujar , Prathamesh Shete , Akhil R , Mikko Perttunen , Sumit Gupta , Diogo Ivo , Vidya Sagar , Ashish Mhetre , Johan Jonker , Christopher Obbard , Ezequiel Garcia , Aswani Reddy , Shashank Prashar , Chandrasekar R , devicetree@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-mediatek@lists.infradead.org, openbmc@lists.ozlabs.org, linux-tegra@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-realtek-soc@lists.infradead.org, linux-renesas-soc@vger.kernel.org, linux-rockchip@lists.infradead.org Subject: [PATCH v2 20/23] arm64: dts: Update cache properties for socionext Date: Mon, 7 Nov 2022 16:57:13 +0100 Message-Id: <20221107155825.1644604-21-pierre.gondois@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221107155825.1644604-1-pierre.gondois@arm.com> References: <20221107155825.1644604-1-pierre.gondois@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748855881160218339?= X-GMAIL-MSGID: =?utf-8?q?1748855881160218339?= The DeviceTree Specification v0.3 specifies that the cache node 'compatible' and 'cache-level' properties are 'required'. Cf. s3.8 Multi-level and Shared Cache Nodes The 'cache-unified' property should be present if one of the properties for unified cache is present ('cache-size', ...). Update the Device Trees accordingly. Signed-off-by: Pierre Gondois Reviewed-by: Kunihiko Hayashi --- arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi | 1 + arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 2 ++ arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi | 1 + 3 files changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi index 1c76b4375b2e..6e1e00939214 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi +++ b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi @@ -52,6 +52,7 @@ cpu1: cpu@1 { l2: l2-cache { compatible = "cache"; + cache-level = <2>; }; }; diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi index 9308458f9611..db7d20a1a301 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi +++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi @@ -86,10 +86,12 @@ cpu3: cpu@101 { a72_l2: l2-cache0 { compatible = "cache"; + cache-level = <2>; }; a53_l2: l2-cache1 { compatible = "cache"; + cache-level = <2>; }; }; diff --git a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi index b0c29510a7da..9ce544c9ea0a 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi +++ b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi @@ -83,6 +83,7 @@ cpu3: cpu@3 { l2: l2-cache { compatible = "cache"; + cache-level = <2>; }; }; From patchwork Mon Nov 7 15:57:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierre Gondois X-Patchwork-Id: 16567 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2159173wru; Mon, 7 Nov 2022 08:36:05 -0800 (PST) X-Google-Smtp-Source: AMsMyM4bA6pEfGBsXXSpvEp5dBxMlhaO21AQQBbxh8jw3ATRyAGah0znD4W/TxLi7a229p3XslQ+ X-Received: by 2002:a17:903:22c9:b0:187:29fe:bda8 with SMTP id y9-20020a17090322c900b0018729febda8mr40437762plg.40.1667838964796; Mon, 07 Nov 2022 08:36:04 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1667838964; cv=none; d=google.com; s=arc-20160816; b=vcnKpynb35N6Z2+WhZYVDQjwygESPIO4Fr81jpiJeZnNgHug/q9a4sZRNw7jsS2RKu EZUbp2rd8ITYtUHqaXxK9qxnZPTMCRVxx2XLPbRkm188Jp40gEab3F8HsYbUI7DpUGMc Pva2yYcjG6dskWbAW14PRdpL3nfYshwMmal67ztr0WIKut4kc0L5/9dzhUUD65OEo9xT vLGI9NiJ8EVR4SrxaD7RXZYmhIO3enUkc9Ii84r1rq3sMuyrmhWORz/zcVONN2ZBNyYD m3Y0UYVcJ1Yn1OWnh4GqcnH06ytu5NwprU1PN58Z64kQ/CNw+dotcWWEwVvP2qAQwJ3u NQsg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=uoPJyz6gkcnWG2Kv44eflZKIDyHWhpzJmV36RgBBDjc=; b=cDZwwvK8KbykHnuZrNrC4/nZu76gx16PBcdJhDFj04Dt1rqLSM5ZFGEGD8fFvI+dLP nGsqVHoOyjg2LrvGZ560xIWTuAcLBzl+TI1AAmTwfRzwTlr36tkWeu+FToy2oJ5WmSMp ahSbw6Snf4S2hfEvMhZoyqry+HULi2RxWAjIj6GIQVd/QXfqawvcPr/R7o5iQAnim8OK zY0RyCxvjB9eJCUx9TqfeEQgIEZmIphDXh1x74mW3MWQKUHTJAQxW2ROQ1PzJ3bvhNzO rSBA1FcVaj4+HDKpeeSZJZsl2YmxBbhAdBqnt6fqK/PePmkqw3q3GhlEVsKQLkGvaFmN r3cA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id z17-20020a63e111000000b004600ab82237si10440747pgh.293.2022.11.07.08.35.47; Mon, 07 Nov 2022 08:36:04 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231858AbiKGQfE (ORCPT + 99 others); Mon, 7 Nov 2022 11:35:04 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33044 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231302AbiKGQfC (ORCPT ); Mon, 7 Nov 2022 11:35:02 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 956762F5; Mon, 7 Nov 2022 08:35:01 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 795B223A; Mon, 7 Nov 2022 08:35:07 -0800 (PST) Received: from pierre123.arm.com (pierre123.nice.arm.com [10.34.100.128]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id C5A693F534; Mon, 7 Nov 2022 08:34:45 -0800 (PST) From: Pierre Gondois To: linux-kernel@vger.kernel.org Cc: Pierre Gondois , Jisheng Zhang , Rob Herring , Krzysztof Kozlowski , Florian Fainelli , Broadcom internal kernel review list , Ray Jui , Scott Branden , Tsahee Zidenberg , Antoine Tenart , Brijesh Singh , Suravee Suthikulpanit , Tom Lendacky , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Khuong Dinh , Liviu Dudau , Sudeep Holla , Lorenzo Pieralisi , William Zhang , Anand Gore , Kursad Oney , =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= , Alim Akhtar , Shawn Guo , Li Yang , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Chester Lin , =?utf-8?q?Andreas_F=C3=A4rber?= , Matthias Brugger , NXP S32 Linux Team , Wei Xu , Chanho Min , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Lars Povlsen , Steen Hegelund , Daniel Machon , UNGLinuxDriver@microchip.com, Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Thierry Reding , Jonathan Hunter , Andy Gross , Bjorn Andersson , Konrad Dybcio , Geert Uytterhoeven , Magnus Damm , Heiko Stuebner , Kunihiko Hayashi , Masami Hiramatsu , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Viorel Suman , Abel Vesa , Peng Fan , Shenwei Wang , Ming Qian , Tim Harvey , Lucas Stach , Adam Ford , Li Jun , Richard Zhu , Markus Niebel , Marco Felsch , Marek Vasut , Laurent Pinchart , Joakim Zhang , Paul Elder , Alexander Stein , Martin Kepplinger , Joy Zou , David Heidelberg , Liu Ying , Oliver Graute , Zhou Peng , Shijie Qin , Haibo Chen , Jacky Bai , Wei Fang , Clark Wang , Chris Packham , Vadym Kochan , Sameer Pujar , Mikko Perttunen , Akhil R , Sumit Gupta , Prathamesh Shete , Diogo Ivo , Vidya Sagar , Ashish Mhetre , Johan Jonker , Christopher Obbard , Ezequiel Garcia , Aswani Reddy , Shashank Prashar , Andi Shyti , devicetree@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-mediatek@lists.infradead.org, openbmc@lists.ozlabs.org, linux-tegra@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-realtek-soc@lists.infradead.org, linux-renesas-soc@vger.kernel.org, linux-rockchip@lists.infradead.org Subject: [PATCH v2 21/23] arm64: dts: Update cache properties for synaptics Date: Mon, 7 Nov 2022 16:57:14 +0100 Message-Id: <20221107155825.1644604-22-pierre.gondois@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221107155825.1644604-1-pierre.gondois@arm.com> References: <20221107155825.1644604-1-pierre.gondois@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748855910628468886?= X-GMAIL-MSGID: =?utf-8?q?1748855910628468886?= The DeviceTree Specification v0.3 specifies that the cache node 'compatible' and 'cache-level' properties are 'required'. Cf. s3.8 Multi-level and Shared Cache Nodes The 'cache-unified' property should be present if one of the properties for unified cache is present ('cache-size', ...). Update the Device Trees accordingly. Signed-off-by: Pierre Gondois Reviewed-by: Jisheng Zhang --- arch/arm64/boot/dts/synaptics/berlin4ct.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/synaptics/berlin4ct.dtsi b/arch/arm64/boot/dts/synaptics/berlin4ct.dtsi index 0949acee4728..926da7e1a6ba 100644 --- a/arch/arm64/boot/dts/synaptics/berlin4ct.dtsi +++ b/arch/arm64/boot/dts/synaptics/berlin4ct.dtsi @@ -64,6 +64,7 @@ cpu3: cpu@3 { l2: cache { compatible = "cache"; + cache-level = <2>; }; idle-states { From patchwork Mon Nov 7 15:57:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierre Gondois X-Patchwork-Id: 16568 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2159928wru; Mon, 7 Nov 2022 08:37:26 -0800 (PST) X-Google-Smtp-Source: AMsMyM5ZKuK4utG3uSgUk9GXQNUMnbj7UAImeHKP6j7AU6YKdmjWGaV5BeXjhUA9tNBkgBsFsbyU X-Received: by 2002:a63:df43:0:b0:46f:e656:7232 with SMTP id h3-20020a63df43000000b0046fe6567232mr29562906pgj.581.1667839046613; Mon, 07 Nov 2022 08:37:26 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1667839046; cv=none; d=google.com; s=arc-20160816; b=fnBRfeEoy5/f22gy9mAWckI/hWv3S1K1JLziTWihcWozhk+T0WlMsHv4+YJNdzblpb vnRePq6ekY/TvpC+VTY+NVlW/Aw3zluOjl28TUeqIvDtJGOKm/SozoJrjSUkhSYqDnO0 0Mj1SAelr8Y2k1Q15P/vzNDjFAS9aJPDqE3Iw4AveXp/FtMyySkj0sYuZG17+moOJQQr Wr9O0OLKswatgndx8GjSlOxDgZlOwap8WfkUaJEwkP4MMpqUng03gcexFj3mkeGVEQB3 YGPoGH5D8qlaROwjcD71nhImXbY41H4UXsvH7iDRASUCHSp+0vDc/3zzAfkG4zHvMTX9 GYyw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=CorfjQNZGTUOtLrDrBqxxpdISTto8D/B/K1CFLAGiNQ=; b=mcKH1wEWAM+4e1uNk93dS4eQNsxeZUf5ZJqHmTT7+8vJB+XqxiZdtoOSYmPe4p2byy jtklgv2yZgdy9ihORtjzGMA2zx1MGO/pAWonFGyGaIq1SFQPeIr6VPRscc5zo9+yhNvd Adz3xt7ruNouyJrNjzUGeHhy3HauEdc4eU3IzBLtGEcEP7pnYAxW8p7R35dHiUAGF7Ez rQbJ7bk4+GtXjbOOESyCVLc85mXPpTPMmimDUBGngS2h2jqA30gMXYzKqbCrLFNNCZ+R xQwhEGBj/r4kiZHT3czWtBgZkokxNzX3jZMMoSJRBFSCQ8pJ1wG2VSnA1O2Ywf1cFEGT 5OCQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id b18-20020a170902e95200b0017db9b9d54asi10893010pll.300.2022.11.07.08.37.10; Mon, 07 Nov 2022 08:37:26 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232276AbiKGQgq (ORCPT + 99 others); Mon, 7 Nov 2022 11:36:46 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34520 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232142AbiKGQgn (ORCPT ); Mon, 7 Nov 2022 11:36:43 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id D95B0CD0; Mon, 7 Nov 2022 08:36:42 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C8F72ED1; Mon, 7 Nov 2022 08:36:48 -0800 (PST) Received: from pierre123.arm.com (pierre123.nice.arm.com [10.34.100.128]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 943B23F534; Mon, 7 Nov 2022 08:36:27 -0800 (PST) From: Pierre Gondois To: linux-kernel@vger.kernel.org Cc: Pierre Gondois , Rob Herring , Krzysztof Kozlowski , Florian Fainelli , Broadcom internal kernel review list , Ray Jui , Scott Branden , Tsahee Zidenberg , Antoine Tenart , Brijesh Singh , Suravee Suthikulpanit , Tom Lendacky , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Khuong Dinh , Liviu Dudau , Sudeep Holla , Lorenzo Pieralisi , William Zhang , Anand Gore , Kursad Oney , =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= , Alim Akhtar , Shawn Guo , Li Yang , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Chester Lin , =?utf-8?q?Andreas_F=C3=A4rber?= , Matthias Brugger , NXP S32 Linux Team , Wei Xu , Chanho Min , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Lars Povlsen , Steen Hegelund , Daniel Machon , UNGLinuxDriver@microchip.com, Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Thierry Reding , Jonathan Hunter , Andy Gross , Bjorn Andersson , Konrad Dybcio , Geert Uytterhoeven , Magnus Damm , Heiko Stuebner , Kunihiko Hayashi , Masami Hiramatsu , Jisheng Zhang , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Viorel Suman , Abel Vesa , Peng Fan , Zhou Peng , Shenwei Wang , Ming Qian , Adam Ford , Tim Harvey , Lucas Stach , Li Jun , Richard Zhu , Markus Niebel , Marek Vasut , Laurent Pinchart , Joakim Zhang , Alexander Stein , Paul Elder , Martin Kepplinger , David Heidelberg , Oliver Graute , Liu Ying , Shijie Qin , Dong Aisheng , Clark Wang , Jacky Bai , Chris Packham , Vadym Kochan , Sameer Pujar , Mikko Perttunen , Prathamesh Shete , Akhil R , Sumit Gupta , Diogo Ivo , Vidya Sagar , Ashish Mhetre , Johan Jonker , Christopher Obbard , Ezequiel Garcia , Aswani Reddy , Shashank Prashar , devicetree@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-mediatek@lists.infradead.org, openbmc@lists.ozlabs.org, linux-tegra@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-realtek-soc@lists.infradead.org, linux-renesas-soc@vger.kernel.org, linux-rockchip@lists.infradead.org Subject: [PATCH v2 22/23] arm64: dts: Update cache properties for tesla Date: Mon, 7 Nov 2022 16:57:15 +0100 Message-Id: <20221107155825.1644604-23-pierre.gondois@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221107155825.1644604-1-pierre.gondois@arm.com> References: <20221107155825.1644604-1-pierre.gondois@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748855996125055166?= X-GMAIL-MSGID: =?utf-8?q?1748855996125055166?= The DeviceTree Specification v0.3 specifies that the cache node 'compatible' and 'cache-level' properties are 'required'. Cf. s3.8 Multi-level and Shared Cache Nodes The 'cache-unified' property should be present if one of the properties for unified cache is present ('cache-size', ...). Update the Device Trees accordingly. Signed-off-by: Pierre Gondois --- arch/arm64/boot/dts/tesla/fsd.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/tesla/fsd.dtsi b/arch/arm64/boot/dts/tesla/fsd.dtsi index f35bc5a288c2..d58d47618c95 100644 --- a/arch/arm64/boot/dts/tesla/fsd.dtsi +++ b/arch/arm64/boot/dts/tesla/fsd.dtsi @@ -281,6 +281,8 @@ cpucl2_3: cpu@203 { cpucl_l2: l2-cache0 { compatible = "cache"; + cache-level = <2>; + cache-unified; cache-size = <0x400000>; cache-line-size = <64>; cache-sets = <4096>; From patchwork Mon Nov 7 15:57:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierre Gondois X-Patchwork-Id: 16569 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2166554wru; Mon, 7 Nov 2022 08:51:16 -0800 (PST) X-Google-Smtp-Source: AMsMyM5O2JcJIIYGyg3eTjs4OSqoB94tCrvTF0+4cmoPIAx+T9+/57d9kG1WdkfFFAHngmgXfbGX X-Received: by 2002:a05:6402:a47:b0:462:a70e:31a6 with SMTP id bt7-20020a0564020a4700b00462a70e31a6mr50821653edb.233.1667839876085; Mon, 07 Nov 2022 08:51:16 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1667839876; cv=none; d=google.com; s=arc-20160816; b=b1P+GG2GqAmqzfuKZa82gIcJgV26/DkojzE98M5cwJKvs41KMCq/qNbKqFpCYUXfPr 7Ej4A1iIMHErlrC5A0+NxiET2aPyFOorkLSWtrCxSgJD9wmLsdH2Bgwne9AXLhGwfTqq gHjQ0kXUHUTQrUgJ+VVmPJdcRgIVH4dD0nYkHRFSSpv3H9sllWw2f5cI1NtYJU8/LYs2 j/Ex5ERvigGL4zrVun5wQun9SEngDcaUhoguP2o33MLEHxA+IyGHBQJvPKX4PmFXybNb dXn6RFdBgoPFEysQgNZfnBWczHDVj9FZD7nEQRkwYI0mfKmEbUMkmH9BW7QV+C79ZJRO AMlA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=usN79M951iRVSl2NfqrBwQryVBbbjS9xbqiUOEDx3K4=; b=z/Oo0qVEUdJeAb0vkds0chDJART/W+AJiyf1KnRuEH9AK9ZvWR+vSiQHizH4HIKH1f pdhr17swoiqqEMMhuScRuI6TOJBjSvJ0HtTG5Ek2BuqljKDYCLkvaovijK9FdxL4fU7R Gj8HUFauH5Dj1Q9WT83ygoWWdmtDhHTVlGfY7sEqs7xng0nkYhXVJmTYhS2s6zFizo36 Xg/XrO/pRusvrwoeu98nqb5dumKwtv/o3aPe87jskVca4UqChKmf5ZrrK79sKcBz8//9 rJn0uCAdmnlPshH/GVBMKai0c/DHA0A5XFmRWDDj6bvdKXLTO4F+czXod/u3N+wSTJ/C BZsQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id dd18-20020a1709069b9200b0078232bfe3a0si10508661ejc.331.2022.11.07.08.50.46; Mon, 07 Nov 2022 08:51:16 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232348AbiKGQiS (ORCPT + 99 others); Mon, 7 Nov 2022 11:38:18 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35530 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231302AbiKGQiR (ORCPT ); Mon, 7 Nov 2022 11:38:17 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 244B9CDA; Mon, 7 Nov 2022 08:38:16 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id F14141FB; Mon, 7 Nov 2022 08:38:21 -0800 (PST) Received: from pierre123.arm.com (pierre123.nice.arm.com [10.34.100.128]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id C69D73F534; Mon, 7 Nov 2022 08:38:00 -0800 (PST) From: Pierre Gondois To: linux-kernel@vger.kernel.org Cc: Pierre Gondois , Rob Herring , Krzysztof Kozlowski , Florian Fainelli , Broadcom internal kernel review list , Ray Jui , Scott Branden , Tsahee Zidenberg , Antoine Tenart , Brijesh Singh , Suravee Suthikulpanit , Tom Lendacky , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Khuong Dinh , Liviu Dudau , Sudeep Holla , Lorenzo Pieralisi , William Zhang , Anand Gore , Kursad Oney , =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= , Alim Akhtar , Shawn Guo , Li Yang , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Chester Lin , =?utf-8?q?Andreas_F=C3=A4rber?= , Matthias Brugger , NXP S32 Linux Team , Wei Xu , Chanho Min , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Lars Povlsen , Steen Hegelund , Daniel Machon , UNGLinuxDriver@microchip.com, Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Thierry Reding , Jonathan Hunter , Andy Gross , Bjorn Andersson , Konrad Dybcio , Geert Uytterhoeven , Magnus Damm , Heiko Stuebner , Kunihiko Hayashi , Masami Hiramatsu , Jisheng Zhang , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Viorel Suman , Abel Vesa , Zhou Peng , Shenwei Wang , Peng Fan , Ming Qian , Tim Harvey , Adam Ford , Lucas Stach , Li Jun , Richard Zhu , Markus Niebel , Joakim Zhang , Marek Vasut , Laurent Pinchart , Alexander Stein , Paul Elder , Martin Kepplinger , David Heidelberg , Oliver Graute , Liu Ying , Wei Fang , Clark Wang , Jacky Bai , Chris Packham , Vadym Kochan , Sameer Pujar , Mikko Perttunen , Prathamesh Shete , Akhil R , Sumit Gupta , Diogo Ivo , Vidya Sagar , Ashish Mhetre , Johan Jonker , Christopher Obbard , Ezequiel Garcia , Aswani Reddy , Shashank Prashar , Arjun K V , devicetree@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-mediatek@lists.infradead.org, openbmc@lists.ozlabs.org, linux-tegra@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-realtek-soc@lists.infradead.org, linux-renesas-soc@vger.kernel.org, linux-rockchip@lists.infradead.org Subject: [PATCH v2 23/23] arm64: dts: Update cache properties for ti Date: Mon, 7 Nov 2022 16:57:16 +0100 Message-Id: <20221107155825.1644604-24-pierre.gondois@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221107155825.1644604-1-pierre.gondois@arm.com> References: <20221107155825.1644604-1-pierre.gondois@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748856865434979845?= X-GMAIL-MSGID: =?utf-8?q?1748856865434979845?= The DeviceTree Specification v0.3 specifies that the cache node 'compatible' and 'cache-level' properties are 'required'. Cf. s3.8 Multi-level and Shared Cache Nodes The 'cache-unified' property should be present if one of the properties for unified cache is present ('cache-size', ...). Update the Device Trees accordingly. Signed-off-by: Pierre Gondois --- arch/arm64/boot/dts/ti/k3-am625.dtsi | 1 + arch/arm64/boot/dts/ti/k3-am62a7.dtsi | 1 + arch/arm64/boot/dts/ti/k3-am642.dtsi | 1 + arch/arm64/boot/dts/ti/k3-am654.dtsi | 2 ++ arch/arm64/boot/dts/ti/k3-j7200.dtsi | 1 + arch/arm64/boot/dts/ti/k3-j721e.dtsi | 1 + arch/arm64/boot/dts/ti/k3-j721s2.dtsi | 1 + 7 files changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am625.dtsi b/arch/arm64/boot/dts/ti/k3-am625.dtsi index 887f31c23fef..7d7e5a1673a2 100644 --- a/arch/arm64/boot/dts/ti/k3-am625.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am625.dtsi @@ -95,6 +95,7 @@ cpu3: cpu@3 { L2_0: l2-cache0 { compatible = "cache"; + cache-unified; cache-level = <2>; cache-size = <0x40000>; cache-line-size = <64>; diff --git a/arch/arm64/boot/dts/ti/k3-am62a7.dtsi b/arch/arm64/boot/dts/ti/k3-am62a7.dtsi index 331d89fda29d..9734549851c0 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a7.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62a7.dtsi @@ -95,6 +95,7 @@ cpu3: cpu@3 { L2_0: l2-cache0 { compatible = "cache"; + cache-unified; cache-level = <2>; cache-size = <0x40000>; cache-line-size = <64>; diff --git a/arch/arm64/boot/dts/ti/k3-am642.dtsi b/arch/arm64/boot/dts/ti/k3-am642.dtsi index 8a76f4821b11..7a6eedea3aae 100644 --- a/arch/arm64/boot/dts/ti/k3-am642.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am642.dtsi @@ -58,6 +58,7 @@ cpu1: cpu@1 { L2_0: l2-cache0 { compatible = "cache"; cache-level = <2>; + cache-unified; cache-size = <0x40000>; cache-line-size = <64>; cache-sets = <256>; diff --git a/arch/arm64/boot/dts/ti/k3-am654.dtsi b/arch/arm64/boot/dts/ti/k3-am654.dtsi index a89257900047..4cc329b271ac 100644 --- a/arch/arm64/boot/dts/ti/k3-am654.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am654.dtsi @@ -93,6 +93,7 @@ cpu3: cpu@101 { L2_0: l2-cache0 { compatible = "cache"; cache-level = <2>; + cache-unified; cache-size = <0x80000>; cache-line-size = <64>; cache-sets = <512>; @@ -102,6 +103,7 @@ L2_0: l2-cache0 { L2_1: l2-cache1 { compatible = "cache"; cache-level = <2>; + cache-unified; cache-size = <0x80000>; cache-line-size = <64>; cache-sets = <512>; diff --git a/arch/arm64/boot/dts/ti/k3-j7200.dtsi b/arch/arm64/boot/dts/ti/k3-j7200.dtsi index b6da0454cc5b..d74f86b0f622 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200.dtsi @@ -84,6 +84,7 @@ cpu1: cpu@1 { L2_0: l2-cache0 { compatible = "cache"; cache-level = <2>; + cache-unified; cache-size = <0x100000>; cache-line-size = <64>; cache-sets = <1024>; diff --git a/arch/arm64/boot/dts/ti/k3-j721e.dtsi b/arch/arm64/boot/dts/ti/k3-j721e.dtsi index 0e23886c9fd1..6975cae644d9 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e.dtsi @@ -86,6 +86,7 @@ cpu1: cpu@1 { L2_0: l2-cache0 { compatible = "cache"; cache-level = <2>; + cache-unified; cache-size = <0x100000>; cache-line-size = <64>; cache-sets = <1024>; diff --git a/arch/arm64/boot/dts/ti/k3-j721s2.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2.dtsi index 7b930a85a29d..78295ee0fee5 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2.dtsi @@ -69,6 +69,7 @@ cpu1: cpu@1 { L2_0: l2-cache0 { compatible = "cache"; + cache-unified; cache-level = <2>; cache-size = <0x100000>; cache-line-size = <64>;