From patchwork Mon Nov 7 12:38:50 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sinthu Raja X-Patchwork-Id: 16412 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2039946wru; Mon, 7 Nov 2022 05:11:37 -0800 (PST) X-Google-Smtp-Source: AMsMyM7WkcBaoZ+cfyLujQRL0xLGlI4NQzpYw1DNLyCibjDmGBQZf82xs0KGOuKPn5kOCY5fBLnl X-Received: by 2002:a17:907:9603:b0:742:9ed3:3af2 with SMTP id gb3-20020a170907960300b007429ed33af2mr47403939ejc.510.1667826697233; Mon, 07 Nov 2022 05:11:37 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1667826697; cv=none; d=google.com; s=arc-20160816; b=i4/TkEIt9UQOMeb95U7w0s0abYndtZSZv00ZAiyCgMOtSOZjGzuRyGXmuhpdJax63T hq0j/DiYfwWl6xFkgEG/QPdP3QvXEDcXwupJKW6xmr3OT6iTk7n2nqH81wYBU0UC7LvS IydXI/0USPuBhkG/YD4Vbdz6PN+mPywdQTU7QJAwX6SkxhQaRimyaHZSFDteTtAzAZEu 2f63VOXNSIYLTnXds4zDThlM3U2iMPtFRz5jVVCMbW041oAeSV23Q4atKxU3oExaGJS5 nfOmt1CJbWBIbyzgBfJV2d/oLWYSqEMYkLylyVJPVkLWS8/pwwW/cXr6TK3sC/Eqlh5E mRGQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=A4fuZdwonDphiFwrvDgt+7IrILXPVSlkCWT1e74/3Bg=; b=yVoQ8uQ3Uku8uemnI3pxeg3tmMvUU//yU+SUE0qoOPdpetLTmN+J755riax3Poc4TB JIrfLC5MhMMbaaXJ8o6e3Kd0ueOxDf9CvZ3l3FOOMX0EbbqFuQ1wmTKZYyBO00ct6tfQ sekLYzHHi6PXngrSgU/fZu2lByXCeHA2UT7JE79AggjM1A70qS9m5GW7TKWa+lOS1+Er 5zhcOsZYlTDBL5OAYcOJZIjfMriwv1ifRwqeCeYfXAWJFMGymzDlpwQlHyohshGi5Nd4 UyfhafAH9YUeWJ/dJLcTmuesMllinRPIl6dLkzBKVe3bpo6SKuZAwripdobXbmFmCp1O I1fg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mistralsolutions.com header.s=google header.b=ZmoCFKQi; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mistralsolutions.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id hg2-20020a1709072cc200b00780e022dfb8si9091971ejc.494.2022.11.07.05.11.09; Mon, 07 Nov 2022 05:11:37 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@mistralsolutions.com header.s=google header.b=ZmoCFKQi; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mistralsolutions.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231858AbiKGNKZ (ORCPT + 99 others); Mon, 7 Nov 2022 08:10:25 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49998 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231829AbiKGNKW (ORCPT ); Mon, 7 Nov 2022 08:10:22 -0500 Received: from egress-ip4b.ess.de.barracuda.com (egress-ip4b.ess.de.barracuda.com [18.185.115.208]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 76F42193C6 for ; Mon, 7 Nov 2022 05:10:19 -0800 (PST) Received: from mail-oi1-f198.google.com (mail-oi1-f198.google.com [209.85.167.198]) by mx-outbound22-4.eu-central-1b.ess.aws.cudaops.com (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Mon, 07 Nov 2022 13:10:16 +0000 Received: by mail-oi1-f198.google.com with SMTP id z15-20020a056808048f00b0035a08170a97so4441846oid.2 for ; Mon, 07 Nov 2022 05:10:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mistralsolutions.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=A4fuZdwonDphiFwrvDgt+7IrILXPVSlkCWT1e74/3Bg=; b=ZmoCFKQiEF4cEtrrlS1gwsKAI75SiO3H/K+CbpY3eiV2rXTN32nwGIhNNLwOA4JPGM BlTf0b2OzE1kQEWxoQooFea0ddb+8d7qmUiY62YtFRf81aNsf/AiyrrEgJDs40d6KCDx dDDrTIydUtaQAlw6E9HNIMSijd0hpqq+Di+lA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=A4fuZdwonDphiFwrvDgt+7IrILXPVSlkCWT1e74/3Bg=; b=olheSmx9tDPNoC7Yhyc6M6gpOe0r/qm243oTZRFy/9npR7nlTakPXSux+zVG7p7o1M RYfs8gdDu4uMQqi91e7OC8PBAlTpgWYtSvMLs2LeNKxs26QyDl/oWCr9zi5+zGc3x39K srOWXnW4t8NLIcI2zyllxRi8ML1v5o+aA0ND749FiL5vAdzq89MXyRuAv6HpSpTVR52O X1J4M9TMTU2TDG/U+pTjGqznDDBhW5jfrinmVDjnNq0JRjvpqgJkR0bmuw/IWW+wFTZk X6SaJpXpwnKTgWTAzupjPvslykFWq3BP8VAgv+bhv4UEDtTsuJfzWFzasx12B+odUK1l rg+Q== X-Gm-Message-State: ACrzQf11A5Qhj321Te/9Ig5abdgM7VfdcqpkzzfkJnYozitFAT/vksP9 Q2YliI56kmj26fRzZlwYGty/1gMo+SK/+6CYzOBFRYQ+inyMhh9ncZ8F8C5RXyT0o4qrH8a3Z3f ZQEP2o4Pp2vNSTDGfpdO4cipqwRyZqvXWIP2lVgEVudyrdxU/S97mqWLeB9g7 X-Received: by 2002:a17:90a:ab8e:b0:213:ef84:3bb9 with SMTP id n14-20020a17090aab8e00b00213ef843bb9mr40596375pjq.241.1667824749657; Mon, 07 Nov 2022 04:39:09 -0800 (PST) X-Received: by 2002:a17:90a:ab8e:b0:213:ef84:3bb9 with SMTP id n14-20020a17090aab8e00b00213ef843bb9mr40596353pjq.241.1667824749373; Mon, 07 Nov 2022 04:39:09 -0800 (PST) Received: from LAP568U.mistral.in ([106.51.69.35]) by smtp.gmail.com with ESMTPSA id x11-20020aa7956b000000b0056bbba4302dsm4400423pfq.119.2022.11.07.04.39.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 07 Nov 2022 04:39:08 -0800 (PST) From: Sinthu Raja X-Google-Original-From: Sinthu Raja To: Nishanth Menon , Tero Kristo , Rob Herring Cc: Vignesh Raghavendra , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sinthu Raja Subject: [PATCH V2 1/3] dt-bindings: arm: ti: Add binding for AM68 SK Date: Mon, 7 Nov 2022 18:08:50 +0530 Message-Id: <20221107123852.8063-2-sinthu.raja@ti.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20221107123852.8063-1-sinthu.raja@ti.com> References: <20221107123852.8063-1-sinthu.raja@ti.com> MIME-Version: 1.0 X-BESS-ID: 1667826615-305636-5385-13845-1 X-BESS-VER: 2019.1_20221024.2147 X-BESS-Apparent-Source-IP: 209.85.167.198 X-BESS-Outbound-Spam-Score: 0.40 X-BESS-Outbound-Spam-Report: Code version 3.2, rules version 3.2.2.243991 [from cloudscan19-69.eu-central-1b.ess.aws.cudaops.com] Rule breakdown below pts rule name description ---- ---------------------- -------------------------------- 0.00 BSF_SC0_MISMATCH_TO META: Envelope rcpt doesn't match header 0.00 BSF_BESS_OUTBOUND META: BESS Outbound 0.40 BSF_SC0_SA085b META: Custom Rule SA085b X-BESS-Outbound-Spam-Status: SCORE=0.40 using account:ESS91090 scores of KILL_LEVEL=7.0 tests=BSF_SC0_MISMATCH_TO, BSF_BESS_OUTBOUND, BSF_SC0_SA085b X-BESS-BRTS-Status: 1 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748843046934692482?= X-GMAIL-MSGID: =?utf-8?q?1748843046934692482?= From: Sinthu Raja AM68 Starter Kit is a low cost, small form factor board designed for TI's AM68 SoC which is optimized to provide best in class performance for industrial applications and add binding for the same. Signed-off-by: Sinthu Raja Acked-by: Krzysztof Kozlowski --- Changes in V2: *Addressed review comment - added entry in alphabetical order. V1:https://lore.kernel.org/linux-arm-kernel/20221018123849.23695-2-sinthu.raja@ti.com/ Documentation/devicetree/bindings/arm/ti/k3.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/ti/k3.yaml b/Documentation/devicetree/bindings/arm/ti/k3.yaml index 28b8232e1c5b..072d1215a113 100644 --- a/Documentation/devicetree/bindings/arm/ti/k3.yaml +++ b/Documentation/devicetree/bindings/arm/ti/k3.yaml @@ -68,6 +68,7 @@ properties: - description: K3 J721s2 SoC items: - enum: + - ti,am68-sk - ti,j721s2-evm - const: ti,j721s2 From patchwork Mon Nov 7 12:38:51 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Sinthu Raja X-Patchwork-Id: 16409 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2038271wru; Mon, 7 Nov 2022 05:08:58 -0800 (PST) X-Google-Smtp-Source: AMsMyM772xV9GLeQ03KVB+xuSRa4Kn4OICFnGJ0yLxb2wm3QGCiIj+cnM1eGF41cJ+Kcxj1htkpZ X-Received: by 2002:a05:6402:5406:b0:452:1560:f9d4 with SMTP id ev6-20020a056402540600b004521560f9d4mr50687271edb.333.1667826538479; Mon, 07 Nov 2022 05:08:58 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1667826538; cv=none; d=google.com; s=arc-20160816; b=Koxn4Exfpt7GebUZN/H0l8Q3Tg/9FntdzIwiU6XrhFi9ILCjXurM3t53K9/BhT2Hyd ENLNwDoe4T7WsmX59Gt1nUvYmDtC7JsD4ptmiVy2OqGyQGiVLw8tiLcZI1VyrqbLJI4t HpX0XE+XqEp8N8uHsfbS3ikYXMbQHT+RegzQ8P1uZ52HJXNQu7aDBCsW1P/FG4KmM3kW TcOGLaMYUvTeEkPSil09HK5a0MwxsI9upsxRmIXglZEtPt0PgAeK3rJBUdF+BV2AR+h1 wnXvepZdKIvgUGbGrdwlO4f2OhPEHWKPbGISwPlhuKIBhnldFNmO4g4xNBqQboPSWfwa 21bA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=AVRDz2BIo+vmNYU+2ymb0qBib0aSJsJ1LoD/KgL4ZhY=; b=bMBWIhqbwm9wHXCAFZPp7bZz0ZVxMkxy7S4ur05Wb9dfyv1m9eds1EZLDzmjBxDB8p +jC6mVxHYOQfhHcFbhJokJAVsplucpr9SE5Xd5rTp5eCaQVvotO4lUUxRY50ah8qJYvT AsKjGir/KQKb+wXQThw7q+IVthLeoYGgufyfUWaBzIx0srlXx5hyHLyV5gr+NEVFLcJk v70QgXulFY7h+S6nMuERoOkbzFJm3sN4JQBNjWvIuvKCpv0w4OFD5BpSOlgsgD2wdUHT w5D3FREk+gE3oQr0ZPy1U+8g2JlU18yvdva0gqgXKywXyfj5uVkyFs4RYwdREffVJTU9 1row== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mistralsolutions.com header.s=google header.b=oQra8D5u; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mistralsolutions.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id jv10-20020a170907768a00b007ae286f26b1si6572211ejc.620.2022.11.07.05.08.31; Mon, 07 Nov 2022 05:08:58 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@mistralsolutions.com header.s=google header.b=oQra8D5u; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mistralsolutions.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232215AbiKGNHa (ORCPT + 99 others); Mon, 7 Nov 2022 08:07:30 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48310 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232207AbiKGNH1 (ORCPT ); Mon, 7 Nov 2022 08:07:27 -0500 Received: from egress-ip4b.ess.de.barracuda.com (egress-ip4b.ess.de.barracuda.com [18.185.115.208]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 46D6A1C123 for ; Mon, 7 Nov 2022 05:07:26 -0800 (PST) Received: from mail-ot1-f72.google.com (mail-ot1-f72.google.com [209.85.210.72]) by mx-outbound22-4.eu-central-1b.ess.aws.cudaops.com (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Mon, 07 Nov 2022 13:07:22 +0000 Received: by mail-ot1-f72.google.com with SMTP id l12-20020a9d6a8c000000b0066c33f1649cso5529874otq.2 for ; Mon, 07 Nov 2022 05:07:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mistralsolutions.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=AVRDz2BIo+vmNYU+2ymb0qBib0aSJsJ1LoD/KgL4ZhY=; b=oQra8D5uHhgvvN7RUxYjCSzUnPqEwxEl9q/kPqap8IDgXiFjM2WftZT8kcl9/4xTZS 75/Z+m6UTUB19KlyQJ8cM7fzGyNPDqB+PRU2vrtrQTNCxc+sZyAP+NIhnkXIaH9nsBwU pvI5KI/ZaLBZdIclGwcG62U6BI6bbUQMdcgrs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=AVRDz2BIo+vmNYU+2ymb0qBib0aSJsJ1LoD/KgL4ZhY=; b=O9exsDoE3RQi7iqyHybF1FnhBMK+17+kCFEXCudMKZ7JPAwQ+IIEKMiibcQ0Zd9eZp 72uArVouljM17AvnpzJzV91TTBPG8IqVvV4vWaDUue9Xi5fVopm2/GRjLNI+O7572Euq jiqekAMaXRK9daifvMkQfi5LnaaZPzrZ/Yfa0OL2c5Ywal/TBxHItOvVt5iVJSzXjJmu 0YQZPnO/yEuf0dftnnWOhLpXPlO+spKiDkq2MJSpXXTr6pVMMjEC4urfzwsOKerPi37Q tQ6XH8xp+5yLd86zq2BoSCy3i/qnQI2uwYs5prLce8dWOl9OfA8u/BY7FIK0sHU2BWae jgQw== X-Gm-Message-State: ACrzQf2HsQWPgLzpSEscqsOX/cvyhWIKV286CU+lXTEg9KmFH6cbAovD vRWcy/DngI/7m6GXIuqeaLSoCt9z4r82hlDEUtXBVZ0W+/04TRdTSuWk85edmsg8aNKIhNicmsq /vUp/+i4YoUqkSQxeiAIydcNNCW4hwk0TBTvWmaaJMgLDDdQEG8SGEKRDkmcw X-Received: by 2002:a17:90a:a017:b0:213:ad3:4d1a with SMTP id q23-20020a17090aa01700b002130ad34d1amr68063338pjp.120.1667824753852; Mon, 07 Nov 2022 04:39:13 -0800 (PST) X-Received: by 2002:a17:90a:a017:b0:213:ad3:4d1a with SMTP id q23-20020a17090aa01700b002130ad34d1amr68063324pjp.120.1667824753574; Mon, 07 Nov 2022 04:39:13 -0800 (PST) Received: from LAP568U.mistral.in ([106.51.69.35]) by smtp.gmail.com with ESMTPSA id x11-20020aa7956b000000b0056bbba4302dsm4400423pfq.119.2022.11.07.04.39.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 07 Nov 2022 04:39:13 -0800 (PST) From: Sinthu Raja X-Google-Original-From: Sinthu Raja To: Nishanth Menon , Tero Kristo , Rob Herring Cc: Vignesh Raghavendra , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sinthu Raja Subject: [PATCH V2 2/3] arm64: dts: ti: Add initial support for AM68 SK System on Module Date: Mon, 7 Nov 2022 18:08:51 +0530 Message-Id: <20221107123852.8063-3-sinthu.raja@ti.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20221107123852.8063-1-sinthu.raja@ti.com> References: <20221107123852.8063-1-sinthu.raja@ti.com> MIME-Version: 1.0 X-BESS-ID: 1667826442-305636-5386-13613-1 X-BESS-VER: 2019.1_20221024.2147 X-BESS-Apparent-Source-IP: 209.85.210.72 X-BESS-Outbound-Spam-Score: 0.90 X-BESS-Outbound-Spam-Report: Code version 3.2, rules version 3.2.2.243991 [from cloudscan11-132.eu-central-1a.ess.aws.cudaops.com] Rule breakdown below pts rule name description ---- ---------------------- -------------------------------- 0.00 BSF_SC0_MISMATCH_TO META: Envelope rcpt doesn't match header 0.40 BSF_SC0_SA085b META: Custom Rule SA085b 0.00 BSF_BESS_OUTBOUND META: BESS Outbound 0.50 BSF_RULE_7582B META: Custom Rule 7582B X-BESS-Outbound-Spam-Status: SCORE=0.90 using account:ESS91090 scores of KILL_LEVEL=7.0 tests=BSF_SC0_MISMATCH_TO, BSF_SC0_SA085b, BSF_BESS_OUTBOUND, BSF_RULE_7582B X-BESS-BRTS-Status: 1 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748842880266958788?= X-GMAIL-MSGID: =?utf-8?q?1748842880266958788?= From: Sinthu Raja AM68 Starter Kit (SK)[1] is a low cost, small form factor board designed for TI’s AM68 SoC. TI’s AM68 SoC comprises of dual core A72, high performance vision accelerators, hardware accelerators, latest C71x DSP, high bandwidth real-time IPs for capture and display. The SoC is power optimized to provide best in class performance for industrial applications. AM68 SK supports the following interfaces: * 16 GB LPDDR4 RAM * x1 Gigabit Ethernet interface * x1 USB 3.1 Type-C port * x2 USB 3.1 Type-A ports * x1 PCIe M.2 M Key * 512 Mbit OSPI flash * x2 CSI2 Camera interface (RPi and TI Camera connector) * 40-pin Raspberry Pi GPIO header SK's System on Module (SoM) contains the SoC and DDR. Therefore, add DT node for the SOC and DDR on the SoM. Schematics: https://www.ti.com/lit/zip/SPRR463 TRM: http://www.ti.com/lit/pdf/spruj28 Signed-off-by: Sinthu Raja --- Changes in V2: Addressed review comments - dropped the empty lines. V1:https://lore.kernel.org/linux-arm-kernel/20221018123849.23695-3-sinthu.raja@ti.com/ arch/arm64/boot/dts/ti/k3-am68-sk-som.dtsi | 127 +++++++++++++++++++++ 1 file changed, 127 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-am68-sk-som.dtsi diff --git a/arch/arm64/boot/dts/ti/k3-am68-sk-som.dtsi b/arch/arm64/boot/dts/ti/k3-am68-sk-som.dtsi new file mode 100644 index 000000000000..cb1c58fcd154 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am68-sk-som.dtsi @@ -0,0 +1,127 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ + */ + +/dts-v1/; + +#include "k3-j721s2.dtsi" +#include + +/ { + memory@80000000 { + device_type = "memory"; + /* 16 GB RAM */ + reg = <0x00 0x80000000 0x00 0x80000000>, + <0x08 0x80000000 0x03 0x80000000>; + }; + + /* Reserving memory regions still pending */ + reserved_memory: reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + secure_ddr: optee@9e800000 { + reg = <0x00 0x9e800000 0x00 0x01800000>; + alignment = <0x1000>; + no-map; + }; + }; +}; + +&mailbox0_cluster0 { + status = "disabled"; +}; + +&mailbox0_cluster1 { + status = "disabled"; +}; + +&mailbox0_cluster2 { + status = "disabled"; +}; + +&mailbox0_cluster3 { + status = "disabled"; +}; + +&mailbox0_cluster4 { + status = "disabled"; +}; + +&mailbox0_cluster5 { + status = "disabled"; +}; + +&mailbox0_cluster6 { + status = "disabled"; +}; + +&mailbox0_cluster7 { + status = "disabled"; +}; + +&mailbox0_cluster8 { + status = "disabled"; +}; + +&mailbox0_cluster9 { + status = "disabled"; +}; + +&mailbox0_cluster10 { + status = "disabled"; +}; + +&mailbox0_cluster11 { + status = "disabled"; +}; + +&mailbox1_cluster0 { + status = "disabled"; +}; + +&mailbox1_cluster1 { + status = "disabled"; +}; + +&mailbox1_cluster2 { + status = "disabled"; +}; + +&mailbox1_cluster3 { + status = "disabled"; +}; + +&mailbox1_cluster4 { + status = "disabled"; +}; + +&mailbox1_cluster5 { + status = "disabled"; +}; + +&mailbox1_cluster6 { + status = "disabled"; +}; + +&mailbox1_cluster7 { + status = "disabled"; +}; + +&mailbox1_cluster8 { + status = "disabled"; +}; + +&mailbox1_cluster9 { + status = "disabled"; +}; + +&mailbox1_cluster10 { + status = "disabled"; +}; + +&mailbox1_cluster11 { + status = "disabled"; +}; From patchwork Mon Nov 7 12:38:52 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sinthu Raja X-Patchwork-Id: 16410 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2038689wru; Mon, 7 Nov 2022 05:09:36 -0800 (PST) X-Google-Smtp-Source: AMsMyM7Q1Mh6SIv2MIymh5kHpB7L+6DEbZ+7mTHkUmtXh2b5Vy4EdCmzwVIhoWob7/k3P2ckJh9j X-Received: by 2002:a17:902:8c8f:b0:186:b6ad:3592 with SMTP id t15-20020a1709028c8f00b00186b6ad3592mr50893414plo.119.1667826576393; Mon, 07 Nov 2022 05:09:36 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1667826576; cv=none; d=google.com; s=arc-20160816; b=w2726Dtx8pH2UF22vPuiR9IiVT7KmfweZf8IgVTfzoWvxedqCdK56KuBBzEAYcD5gg V3tVkjY4+K5ReBuN0wuvXv4nTmNKVcf8WPESOY7GcseaHUM4+mYxv9w0PbSDXPbfvUjg mI8jjB0HBd0u+xCE3fqlCkLlZ2MRFnKykVTFXWXZwbqGhRZHDHJkxktTjDydXf4O70HR RAYgOHugPHe3w1QhBcjiOcgTtH7OxR05UL46zyhBV7+hjXJV4Fcv2ni9JzPmB81+IrXM WrwnuVIOMn/3miz8+lGjHxVSrnhHU4uw+Vkm9MgoKxMkxnk4sBEkRFoRUk2jFCXLSMR0 SZww== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=n3fekhuJzqQjnOV7EOjdSfwujFb3JS6F18skKmkiRfg=; b=oVcmgruuNTc2+BMIsbK5d1nz5PXwdknAEOV41pLfycCybjqV840QQkrWA2gTcoqG51 071zdqCvyR1atmupayUl5Bl5ti1+bheDN8kFALg8FqdSkeKW1n/5ZE9kT5AIJAZUmqzz pWOSA/33HQ92Z/+XY4EJ76xJQkUPksLntGxlWKit6lzUglATeF/XjZG3K3ikcmd3y/AV 5KIoj3oKKknd3/J1rdKsYMTHaWEHOy0OJyjrHtL7Jd4A662umpCllKh3qfOzb6AcbI6b 1YRXKZ9+eP2RMcPtcJFFdO2Ob49F43GddAiFWh3AH6Wg58vGkbw23ETl3I4IXSaLKUpG MizA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mistralsolutions.com header.s=google header.b=S88OjYHx; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mistralsolutions.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id j12-20020a63cf0c000000b0046ebcc1c65bsi10606132pgg.739.2022.11.07.05.09.21; Mon, 07 Nov 2022 05:09:36 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@mistralsolutions.com header.s=google header.b=S88OjYHx; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mistralsolutions.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232231AbiKGNHi (ORCPT + 99 others); Mon, 7 Nov 2022 08:07:38 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48324 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232230AbiKGNHc (ORCPT ); Mon, 7 Nov 2022 08:07:32 -0500 Received: from egress-ip4b.ess.de.barracuda.com (egress-ip4b.ess.de.barracuda.com [18.185.115.208]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B31A919C1A for ; Mon, 7 Nov 2022 05:07:29 -0800 (PST) Received: from mail-pl1-f199.google.com (mail-pl1-f199.google.com [209.85.214.199]) by mx-outbound22-4.eu-central-1b.ess.aws.cudaops.com (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Mon, 07 Nov 2022 13:07:25 +0000 Received: by mail-pl1-f199.google.com with SMTP id i8-20020a170902c94800b0018712ccd6bbso8995323pla.1 for ; Mon, 07 Nov 2022 05:07:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mistralsolutions.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=n3fekhuJzqQjnOV7EOjdSfwujFb3JS6F18skKmkiRfg=; b=S88OjYHxaC+/Z9m7nJNQsgQFP+xzwK1W3pNYLBqlUn3gokLj/tMaSjHyxxAvWt7w7s vYm2NyLlyFqbniYmAb3sQ88UhHJiGNK37+agfK/LjQJDWPxRMW2CjA6RDtT1UVyS/f8h /HyeTb7ZZnxPAwptzMwJ8d+PolvDGez+vO7pA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=n3fekhuJzqQjnOV7EOjdSfwujFb3JS6F18skKmkiRfg=; b=Da+hrebgxu1XYipwXga7wOCNaU4Z/cF2Ym7qO2MAS4LqvKb0/OEeDOn+BZOsx5iNf6 VFq5vlqSHTCM0h5PICCbIYrWXjY/U4QZOclMttI52FOqTup08fzOI755Oabc18NYsnE/ EBN+zJOtpI7luZY4bUMBhFYzPNqWSClKn6tKUkPAghHzaCeZZWgnYkEXP6nYMIRAhVzM wjB+jt/x6Dlmg4Vyu5jL01+QNR5MZulMXEIE79i0d7jhvBe3O6LsVih+bxwkUg3cLbFR vnyeHXofiI9UvFXYBsRxiBq/8bS2fUIrWge2iDS5LgJlnIxZzpwXHWGaPiX2QXSl5zXB xzGg== X-Gm-Message-State: ACrzQf189TWND3yf9sYUThEHixo9RJIAR5hiQepFKD8hlpOBb1UNB0kn CXPWATHQHnVtj19wHypanTd8SqB6SMTMy0QhnB2inpV+Xm109fpt7FrNEQk8Wn1vFLZOsEExKeP 6A9OH7m+im0bM+1oGMFKLr5DZUtdnUuO0kbNyuZUwN7jhdO7HNSMDKbJBKEUX X-Received: by 2002:a17:902:ced2:b0:187:1dda:6897 with SMTP id d18-20020a170902ced200b001871dda6897mr42411216plg.83.1667824758028; Mon, 07 Nov 2022 04:39:18 -0800 (PST) X-Received: by 2002:a17:902:ced2:b0:187:1dda:6897 with SMTP id d18-20020a170902ced200b001871dda6897mr42411188plg.83.1667824757680; Mon, 07 Nov 2022 04:39:17 -0800 (PST) Received: from LAP568U.mistral.in ([106.51.69.35]) by smtp.gmail.com with ESMTPSA id x11-20020aa7956b000000b0056bbba4302dsm4400423pfq.119.2022.11.07.04.39.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 07 Nov 2022 04:39:17 -0800 (PST) From: Sinthu Raja X-Google-Original-From: Sinthu Raja To: Nishanth Menon , Tero Kristo , Rob Herring Cc: Vignesh Raghavendra , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sinthu Raja Subject: [PATCH V2 3/3] arm64: dts: ti: k3-am68-sk: Add support for AM68 SK base board Date: Mon, 7 Nov 2022 18:08:52 +0530 Message-Id: <20221107123852.8063-4-sinthu.raja@ti.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20221107123852.8063-1-sinthu.raja@ti.com> References: <20221107123852.8063-1-sinthu.raja@ti.com> MIME-Version: 1.0 X-BESS-ID: 1667826444-305636-5390-13617-1 X-BESS-VER: 2019.1_20221024.2147 X-BESS-Apparent-Source-IP: 209.85.214.199 X-BESS-Outbound-Spam-Score: 0.90 X-BESS-Outbound-Spam-Report: Code version 3.2, rules version 3.2.2.243991 [from cloudscan15-22.eu-central-1a.ess.aws.cudaops.com] Rule breakdown below pts rule name description ---- ---------------------- -------------------------------- 0.40 BSF_SC0_SA085b META: Custom Rule SA085b 0.50 BSF_RULE7568M META: Custom Rule 7568M 0.00 BSF_SC0_MISMATCH_TO META: Envelope rcpt doesn't match header 0.00 BSF_BESS_OUTBOUND META: BESS Outbound X-BESS-Outbound-Spam-Status: SCORE=0.90 using account:ESS91090 scores of KILL_LEVEL=7.0 tests=BSF_SC0_SA085b, BSF_RULE7568M, BSF_SC0_MISMATCH_TO, BSF_BESS_OUTBOUND X-BESS-BRTS-Status: 1 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748842919719439025?= X-GMAIL-MSGID: =?utf-8?q?1748842919719439025?= From: Sinthu Raja The SK architecture comprises of baseboard and a SOM board. The AM68 Starter Kit's baseboard contains most of the actual connectors, power supply etc. The System on Module (SoM) is plugged on to the base board. Therefore, add support for peripherals brought out in the base board. Schematics: https://www.ti.com/lit/zip/SPRR463 Signed-off-by: Sinthu Raja --- Changes in V2: *Addressed the review comments: - Updated the commit description. - Updated the regulator nodes: fixedregulator to "regulator-" - Updated the commit $subject to align with rest of the commits. - Dropped the blank lines - Changed the node names that are added with underscore("_") with "-" V1: https://lore.kernel.org/linux-arm-kernel/20221018123849.23695-3-sinthu.raja@ti.com/ arch/arm64/boot/dts/ti/Makefile | 2 + .../boot/dts/ti/k3-am68-sk-base-board.dts | 447 ++++++++++++++++++ 2 files changed, 449 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index 4555a5be2257..eeeebda30e3d 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -12,6 +12,8 @@ dtb-$(CONFIG_ARCH_K3) += k3-am6528-iot2050-basic-pg2.dtb dtb-$(CONFIG_ARCH_K3) += k3-am6548-iot2050-advanced.dtb dtb-$(CONFIG_ARCH_K3) += k3-am6548-iot2050-advanced-pg2.dtb +dtb-$(CONFIG_ARCH_K3) += k3-am68-sk-base-board.dtb + dtb-$(CONFIG_ARCH_K3) += k3-j721e-common-proc-board.dtb dtb-$(CONFIG_ARCH_K3) += k3-j721e-sk.dtb diff --git a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts new file mode 100644 index 000000000000..ad727495e99b --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts @@ -0,0 +1,447 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ + * + * Base Board: https://www.ti.com/lit/zip/SPRR463 + */ + +/dts-v1/; + +#include "k3-am68-sk-som.dtsi" +#include +#include +#include +#include + +/ { + compatible = "ti,am68-sk", "ti,j721s2"; + model = "Texas Instruments AM68 SK"; + + chosen { + stdout-path = "serial2:115200n8"; + }; + + aliases { + serial2 = &main_uart8; + mmc1 = &main_sdhci1; + can0 = &mcu_mcan0; + can1 = &mcu_mcan1; + can2 = &main_mcan6; + can3 = &main_mcan7; + }; + + vusb_main: regulator-vusb-main5v0 { + /* USB MAIN INPUT 5V DC */ + compatible = "regulator-fixed"; + regulator-name = "vusb-main5v0"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + regulator-boot-on; + }; + + vsys_3v3: regulator-vsys3v3 { + /* Output of LM5141 */ + compatible = "regulator-fixed"; + regulator-name = "vsys_3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vusb_main>; + regulator-always-on; + regulator-boot-on; + }; + + vdd_mmc1: regulator-sd { + /* Output of TPS22918 */ + compatible = "regulator-fixed"; + regulator-name = "vdd_mmc1"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + enable-active-high; + vin-supply = <&vsys_3v3>; + gpio = <&exp1 10 GPIO_ACTIVE_HIGH>; + }; + + vdd_sd_dv: gpio-regulator-tlv71033 { + /* Output of TLV71033 */ + compatible = "regulator-gpio"; + regulator-name = "tlv71033"; + pinctrl-names = "default"; + pinctrl-0 = <&vdd_sd_dv_pins_default>; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + vin-supply = <&vsys_3v3>; + gpios = <&main_gpio0 49 GPIO_ACTIVE_HIGH>; + states = <1800000 0x0>, + <3300000 0x1>; + }; + + vsys_io_1v8: regulator-vsys-io-1v8 { + compatible = "regulator-fixed"; + regulator-name = "vsys_io_1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + vsys_io_1v2: regulator-vsys-io-1v2 { + compatible = "regulator-fixed"; + regulator-name = "vsys_io_1v2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + regulator-boot-on; + }; + + transceiver1: can-phy0 { + compatible = "ti,tcan1042"; + #phy-cells = <0>; + max-bitrate = <5000000>; + }; + + transceiver2: can-phy1 { + compatible = "ti,tcan1042"; + #phy-cells = <0>; + max-bitrate = <5000000>; + }; + + transceiver3: can-phy2 { + compatible = "ti,tcan1042"; + #phy-cells = <0>; + max-bitrate = <5000000>; + }; + + transceiver4: can-phy3 { + compatible = "ti,tcan1042"; + #phy-cells = <0>; + max-bitrate = <5000000>; + }; +}; + +&main_pmx0 { + main_uart8_pins_default: main-uart8-pins-default { + pinctrl-single,pins = < + J721S2_IOPAD(0x0d0, PIN_INPUT, 11) /* (AF26) SPI0_CS1.UART8_RXD */ + J721S2_IOPAD(0x0d4, PIN_OUTPUT, 11) /* (AH27) SPI0_CLK.UART8_TXD */ + >; + }; + + main_i2c0_pins_default: main-i2c0-pins-default { + pinctrl-single,pins = < + J721S2_IOPAD(0x0e0, PIN_INPUT, 0) /* (AH25) I2C0_SCL */ + J721S2_IOPAD(0x0e4, PIN_INPUT, 0) /* (AE24) I2C0_SDA */ + >; + }; + + main_mmc1_pins_default: main-mmc1-pins-default { + pinctrl-single,pins = < + J721S2_IOPAD(0x104, PIN_INPUT, 0) /* (P23) MMC1_CLK */ + J721S2_IOPAD(0x108, PIN_INPUT, 0) /* (N24) MMC1_CMD */ + J721S2_IOPAD(0x0fc, PIN_INPUT, 0) /* (M23) MMC1_DAT0 */ + J721S2_IOPAD(0x0f8, PIN_INPUT, 0) /* (P24) MMC1_DAT1 */ + J721S2_IOPAD(0x0f4, PIN_INPUT, 0) /* (R24) MMC1_DAT2 */ + J721S2_IOPAD(0x0f0, PIN_INPUT, 0) /* (R22) MMC1_DAT3 */ + J721S2_IOPAD(0x0e8, PIN_INPUT, 8) /* (AE25) TIMER_IO0.MMC1_SDCD */ + >; + }; + + vdd_sd_dv_pins_default: vdd-sd-dv-pins-default { + pinctrl-single,pins = < + J721S2_IOPAD(0x0c4, PIN_INPUT, 7) /* (AB26) ECAP0_IN_APWM_OUT.GPIO0_49 */ + >; + }; + + main_usbss0_pins_default: main-usbss0-pins-default { + pinctrl-single,pins = < + J721S2_IOPAD(0x0ec, PIN_OUTPUT, 6) /* (AG25) TIMER_IO1.USB0_DRVVBUS */ + >; + }; + + main_mcan6_pins_default: main-mcan6-pins-default { + pinctrl-single,pins = < + J721S2_IOPAD(0x098, PIN_INPUT, 0) /* (V25) MCASP0_AXR10.MCAN6_RX */ + J721S2_IOPAD(0x094, PIN_INPUT, 0) /* (AA25) MCASP0_AXR9.MCAN6_TX */ + >; + }; + + main_mcan7_pins_default: main-mcan7-pins-default { + pinctrl-single,pins = < + J721S2_IOPAD(0x0a0, PIN_INPUT, 0) /* (AB25) MCASP0_AXR12.MCAN7_RX */ + J721S2_IOPAD(0x09c, PIN_INPUT, 0) /* (T24) MCASP0_AXR11.MCAN7_TX */ + >; + }; +}; + +&wkup_pmx0 { + mcu_cpsw_pins_default: mcu-cpsw-pins-default { + pinctrl-single,pins = < + J721S2_WKUP_IOPAD(0x094, PIN_INPUT, 0) /* (B22) MCU_RGMII1_RD0 */ + J721S2_WKUP_IOPAD(0x090, PIN_INPUT, 0) /* (B21) MCU_RGMII1_RD1 */ + J721S2_WKUP_IOPAD(0x08c, PIN_INPUT, 0) /* (C22) MCU_RGMII1_RD2 */ + J721S2_WKUP_IOPAD(0x088, PIN_INPUT, 0) /* (D23) MCU_RGMII1_RD3 */ + J721S2_WKUP_IOPAD(0x084, PIN_INPUT, 0) /* (D22) MCU_RGMII1_RXC */ + J721S2_WKUP_IOPAD(0x06c, PIN_INPUT, 0) /* (E23) MCU_RGMII1_RX_CTL */ + J721S2_WKUP_IOPAD(0x07c, PIN_OUTPUT, 0) /* (F23) MCU_RGMII1_TD0 */ + J721S2_WKUP_IOPAD(0x078, PIN_OUTPUT, 0) /* (G22) MCU_RGMII1_TD1 */ + J721S2_WKUP_IOPAD(0x074, PIN_OUTPUT, 0) /* (E21) MCU_RGMII1_TD2 */ + J721S2_WKUP_IOPAD(0x070, PIN_OUTPUT, 0) /* (E22) MCU_RGMII1_TD3 */ + J721S2_WKUP_IOPAD(0x080, PIN_OUTPUT, 0) /* (F21) MCU_RGMII1_TXC */ + J721S2_WKUP_IOPAD(0x068, PIN_OUTPUT, 0) /* (F22) MCU_RGMII1_TX_CTL */ + >; + }; + + mcu_mdio_pins_default: mcu-mdio-pins-default { + pinctrl-single,pins = < + J721S2_WKUP_IOPAD(0x09c, PIN_OUTPUT, 0) /* (A21) MCU_MDIO0_MDC */ + J721S2_WKUP_IOPAD(0x098, PIN_INPUT, 0) /* (A22) MCU_MDIO0_MDIO */ + >; + }; + + mcu_mcan0_pins_default: mcu-mcan0-pins-default { + pinctrl-single,pins = < + J721S2_WKUP_IOPAD(0x0bc, PIN_INPUT, 0) /* (E28) MCU_MCAN0_RX */ + J721S2_WKUP_IOPAD(0x0b8, PIN_OUTPUT, 0) /* (E27) MCU_MCAN0_TX */ + >; + }; + + mcu_mcan1_pins_default: mcu-mcan1-pins-default { + pinctrl-single,pins = < + J721S2_WKUP_IOPAD(0x0d4, PIN_INPUT, 0) /* (F26) WKUP_GPIO0_5.MCU_MCAN1_RX */ + J721S2_WKUP_IOPAD(0x0d0, PIN_OUTPUT, 0) /* (C23) WKUP_GPIO0_4.MCU_MCAN1_TX*/ + >; + }; + + mcu_i2c1_pins_default: mcu-i2c1-pins-default { + pinctrl-single,pins = < + J721S2_WKUP_IOPAD(0x0e0, PIN_INPUT, 0) /* (F24) WKUP_GPIO0_8.MCU_I2C1_SCL */ + J721S2_WKUP_IOPAD(0x0e4, PIN_INPUT, 0) /* (H26) WKUP_GPIO0_9.MCU_I2C1_SDA */ + >; + }; +}; + +&main_gpio2 { + status = "disabled"; +}; + +&main_gpio4 { + status = "disabled"; +}; + +&main_gpio6 { + status = "disabled"; +}; + +&wkup_gpio1 { + status = "disabled"; +}; + +&wkup_uart0 { + status = "reserved"; +}; + +&main_uart0 { + status = "disabled"; +}; + +&main_uart1 { + status = "disabled"; +}; + +&main_uart2 { + status = "disabled"; +}; + +&main_uart3 { + status = "disabled"; +}; + +&main_uart4 { + status = "disabled"; +}; + +&main_uart5 { + status = "disabled"; +}; + +&main_uart6 { + status = "disabled"; +}; + +&main_uart7 { + status = "disabled"; +}; + +&main_uart8 { + pinctrl-names = "default"; + pinctrl-0 = <&main_uart8_pins_default>; + /* Shared with TFA on this platform */ + power-domains = <&k3_pds 357 TI_SCI_PD_SHARED>; +}; + +&main_uart9 { + status = "disabled"; +}; + +&main_i2c0 { + clock-frequency = <400000>; + + exp1: gpio@21 { + compatible = "ti,tca6416"; + reg = <0x21>; + gpio-controller; + #gpio-cells = <2>; + gpio-line-names = "CSI_VIO_SEL", "CSI_SEL_FPC_EXPn", "HDMI_PDn", + "HDMI_LS_OE", "DP0_3V3 _EN", "BOARDID_EEPROM_WP", + "CAN_STB", " ", "GPIO_uSD_PWR_EN", "eDP_ENABLE", + "IO_EXP_PCIe1_M.2_RTSz", "IO_EXP_MCU_RGMII_RST#", + "IO_EXP_CSI2_EXP_RSTz", " ", "CSI0_B_GPIO1", + "CSI1_B_GPIO1"; + }; +}; + +&main_i2c1 { + status = "disabled"; +}; + +&main_i2c2 { + status = "disabled"; +}; + +&main_i2c3 { + status = "disabled"; +}; + +&main_i2c4 { + status = "disabled"; +}; + +&main_i2c5 { + status = "disabled"; +}; + +&main_i2c6 { + status = "disabled"; +}; + +&main_sdhci0 { + status = "disabled"; +}; + +&main_sdhci1 { + /* SD card */ + pinctrl-0 = <&main_mmc1_pins_default>; + pinctrl-names = "default"; + disable-wp; + vmmc-supply = <&vdd_mmc1>; + vqmmc-supply = <&vdd_sd_dv>; +}; + +&mcu_cpsw { + pinctrl-names = "default"; + pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>; +}; + +&davinci_mdio { + phy0: ethernet-phy@0 { + reg = <0>; + ti,rx-internal-delay = ; + ti,fifo-depth = ; + ti,min-output-impedance; + }; +}; + +&cpsw_port1 { + phy-mode = "rgmii-rxid"; + phy-handle = <&phy0>; +}; + +&mcu_mcan0 { + pinctrl-names = "default"; + pinctrl-0 = <&mcu_mcan0_pins_default>; + phys = <&transceiver1>; +}; + +&mcu_mcan1 { + pinctrl-names = "default"; + pinctrl-0 = <&mcu_mcan1_pins_default>; + phys = <&transceiver2>; +}; + +&main_mcan0 { + status = "disabled"; +}; + +&main_mcan1 { + status = "disabled"; +}; + +&main_mcan2 { + status = "disabled"; +}; + +&main_mcan3 { + status = "disabled"; +}; + +&main_mcan4 { + status = "disabled"; +}; + +&main_mcan5 { + status = "disabled"; +}; + +&main_mcan6 { + pinctrl-names = "default"; + pinctrl-0 = <&main_mcan6_pins_default>; + phys = <&transceiver3>; +}; + +&main_mcan7 { + pinctrl-names = "default"; + pinctrl-0 = <&main_mcan7_pins_default>; + phys = <&transceiver4>; +}; + +&main_mcan8 { + status = "disabled"; +}; + +&main_mcan9 { + status = "disabled"; +}; + +&main_mcan10 { + status = "disabled"; +}; + +&main_mcan11 { + status = "disabled"; +}; + +&main_mcan12 { + status = "disabled"; +}; + +&main_mcan13 { + status = "disabled"; +}; + +&main_mcan14 { + status = "disabled"; +}; + +&main_mcan15 { + status = "disabled"; +}; + +&main_mcan16 { + status = "disabled"; +}; + +&main_mcan17 { + status = "disabled"; +};