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[23.128.96.35]) by mx.google.com with ESMTPS id p8-20020a056a000b4800b006be2f4171b6si3998545pfo.151.2023.10.18.04.34.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Oct 2023 04:34:10 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.35 as permitted sender) client-ip=23.128.96.35; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=lSWAU71a; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.35 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by groat.vger.email (Postfix) with ESMTP id DC797802AA37; Wed, 18 Oct 2023 04:34:07 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at groat.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229629AbjJRLds (ORCPT + 24 others); Wed, 18 Oct 2023 07:33:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34060 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229977AbjJRLdp (ORCPT ); Wed, 18 Oct 2023 07:33:45 -0400 Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.126]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B6D35115; Wed, 18 Oct 2023 04:33:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1697628823; x=1729164823; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=+IUgN6qDc3zy/7h4GNa/9YgQiOVwyIUTeR+n02SRwIM=; b=lSWAU71aIUaHqUWrMunRcy8XDUWNZfk9zGNWodVyf5ut3K/O4u+Zm9Zr fPQ3yfYnvExezMnkOeHDWAjb9BrWuPkOVclLh1oulpu4Xy1yNNJsDNisw cavOtF4jVJeI6AU5mosxapsU7uaLwjcRYjvOtjZt1VqqirxZNpTC2CbTw VmHgYDmtd8BGTo0vj8SxBlqoEbPSPyrKnFbgxpel9Xj7kDsgW6jLAq9Ya r2I9LDAYs4D0oLthtKRZzCgAZr+gLzqZKPh4ikta8hpNR+hWa9Wc1tAY+ ftPGWRsKQnKdCVXvS2hIMGV526o/7BKHa9XBvq/f6mXg3Xs+37QdrKEIK A==; X-IronPort-AV: E=McAfee;i="6600,9927,10866"; a="371056710" X-IronPort-AV: E=Sophos;i="6.03,234,1694761200"; d="scan'208";a="371056710" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Oct 2023 04:33:43 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10866"; a="930150801" X-IronPort-AV: E=Sophos;i="6.03,234,1694761200"; d="scan'208";a="930150801" Received: from suguccin-mobl1.amr.corp.intel.com (HELO localhost) ([10.252.44.63]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Oct 2023 04:33:39 -0700 From: =?utf-8?q?Ilpo_J=C3=A4rvinen?= To: Bjorn Helgaas , linux-pci@vger.kernel.org, Lorenzo Pieralisi , Rob Herring , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Jonathan Cameron , Tom Joseph , Lorenzo Pieralisi , linux-kernel@vger.kernel.org Cc: =?utf-8?q?Ilpo_J=C3=A4rvinen?= Subject: [PATCH 1/7] PCI: cadence: Use FIELD_GET() Date: Wed, 18 Oct 2023 14:32:48 +0300 Message-Id: <20231018113254.17616-2-ilpo.jarvinen@linux.intel.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20231018113254.17616-1-ilpo.jarvinen@linux.intel.com> References: <20231018113254.17616-1-ilpo.jarvinen@linux.intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on groat.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (groat.vger.email [0.0.0.0]); Wed, 18 Oct 2023 04:34:07 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1780092868945657783 X-GMAIL-MSGID: 1780092868945657783 Convert open-coded variants of PCI field access into FIELD_GET() to make the code easier to understand. Signed-off-by: Ilpo Järvinen --- drivers/pci/controller/cadence/pcie-cadence-ep.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/pci/controller/cadence/pcie-cadence-ep.c b/drivers/pci/controller/cadence/pcie-cadence-ep.c index b8b655d4047e..3142feb8ac19 100644 --- a/drivers/pci/controller/cadence/pcie-cadence-ep.c +++ b/drivers/pci/controller/cadence/pcie-cadence-ep.c @@ -3,6 +3,7 @@ // Cadence PCIe endpoint controller driver. // Author: Cyrille Pitchen +#include #include #include #include @@ -262,7 +263,7 @@ static int cdns_pcie_ep_get_msi(struct pci_epc *epc, u8 fn, u8 vfn) * Get the Multiple Message Enable bitfield from the Message Control * register. */ - mme = (flags & PCI_MSI_FLAGS_QSIZE) >> 4; + mme = FIELD_GET(PCI_MSI_FLAGS_QSIZE, flags); return mme; } @@ -394,7 +395,7 @@ static int cdns_pcie_ep_send_msi_irq(struct cdns_pcie_ep *ep, u8 fn, u8 vfn, return -EINVAL; /* Get the number of enabled MSIs */ - mme = (flags & PCI_MSI_FLAGS_QSIZE) >> 4; + mme = FIELD_GET(PCI_MSI_FLAGS_QSIZE, flags); msi_count = 1 << mme; if (!interrupt_num || interrupt_num > msi_count) return -EINVAL; @@ -449,7 +450,7 @@ static int cdns_pcie_ep_map_msi_irq(struct pci_epc *epc, u8 fn, u8 vfn, return -EINVAL; /* Get the number of enabled MSIs */ - mme = (flags & PCI_MSI_FLAGS_QSIZE) >> 4; + mme = FIELD_GET(PCI_MSI_FLAGS_QSIZE, flags); msi_count = 1 << mme; if (!interrupt_num || interrupt_num > msi_count) return -EINVAL; @@ -506,7 +507,7 @@ static int cdns_pcie_ep_send_msix_irq(struct cdns_pcie_ep *ep, u8 fn, u8 vfn, reg = cap + PCI_MSIX_TABLE; tbl_offset = cdns_pcie_ep_fn_readl(pcie, fn, reg); - bir = tbl_offset & PCI_MSIX_TABLE_BIR; + bir = FIELD_GET(PCI_MSIX_TABLE_BIR, tbl_offset); tbl_offset &= PCI_MSIX_TABLE_OFFSET; msix_tbl = epf->epf_bar[bir]->addr + tbl_offset; From patchwork Wed Oct 18 11:32:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Ilpo_J=C3=A4rvinen?= X-Patchwork-Id: 154834 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2908:b0:403:3b70:6f57 with SMTP id ib8csp4722786vqb; Wed, 18 Oct 2023 04:34:32 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGpg5d75zBthgxLWDFglAKnKOfbA8pSpOttLoXDNvgk2LXcDk1GRABev3tWFqUBHtDwQ0do X-Received: by 2002:a05:6359:740b:b0:166:d97d:c5c3 with SMTP id va11-20020a056359740b00b00166d97dc5c3mr4029340rwb.1.1697628872508; Wed, 18 Oct 2023 04:34:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697628872; cv=none; d=google.com; s=arc-20160816; b=Hi4ngcOKcCmGA9+CoQ4YsfMGmd/MSm5afHQ213BO2v5t+JBLL44NV9DMZXnyL+M8J0 34nbhRp/Ei9ERz+HOrPp7R35kTcMmnbNIjiWt/8aX2IPsVwP/W0WSorXcZw3Fr3MSxZ/ NuLGxWe1UKVWSEDS2t0rlYRKeVeTxQJrkoRVzJ+lIaq5jsqh1PsgyLPaiRlr01HMs6Yx LZ/7JINbgMoXI5q3RJypH9L5R9dp7qpalk2kszitBQd0jE3khNIxfzw/DEFBAXjFq4JM CulsyVpTT/tPOnSamxv/9Wt5IYIwchPP/KVFVYLSLK/Z+piU7xbfrELOasehT4+q7W0H SnjA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=52QTfvzkHmGQ4H3Mj2PzXgi5u34Fb30Ye8yWWXaePRY=; fh=9dII+ZUA1/lhgBdhBG13bbMSFe4cHKKUBrBOD62UznM=; b=nORoUHQ2gihGIeQWybhXun8cQs6T2pPfEAS9sSFgAzl/j2da5TkHLBy7AbzqhYh91C eVxJlYlCOG28ZCVFruZk7NQKejhTrKe9iKpIrlQvHnAQPz6TozcqAjkb2MAZVCCv7kGH rpP9+5y+KIyfWSqbLo0334G+wk6U2Ne95jIm+ziWa58HoU5gouQenbGipEb0U35rd784 7EBlrGBIb6i6tC4KBhGvrRdTnQ0/5r7tp/Fo6Eby1djJ8Gep6xnJAYV6cTAwFD3aFagn fhKH8vTimmWWvToZpr2+dfzoSwc1fTL1jUb2UhAnlfYeBUzP15Dyx/y0Du/sPlzFteN/ lMCQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=OpRZX6Ax; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.34 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from howler.vger.email (howler.vger.email. [23.128.96.34]) by mx.google.com with ESMTPS id y39-20020a056a00182700b006bd7cfa8497si3921161pfa.83.2023.10.18.04.34.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Oct 2023 04:34:32 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.34 as permitted sender) client-ip=23.128.96.34; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=OpRZX6Ax; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.34 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by howler.vger.email (Postfix) with ESMTP id 520778025838; Wed, 18 Oct 2023 04:34:29 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at howler.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229995AbjJRLeU (ORCPT + 24 others); Wed, 18 Oct 2023 07:34:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53612 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229605AbjJRLeT (ORCPT ); Wed, 18 Oct 2023 07:34:19 -0400 Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.126]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3A984113; Wed, 18 Oct 2023 04:34:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1697628857; x=1729164857; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=za1tMI3kospkfp0GbYoB/w+yEM/E+KhNu9VygOaadfA=; b=OpRZX6AxSFriTTFF7KbMatHmznaPqB8B5nQfaUBYnWsCVh0LKujcSRni YDK5M8nw3siGMSj/MUEao2Z4mlt8DJ77n1pmMUeCNP8oupNK42jgoST1v nK9dSR3pOcxn0ZbtX6UU3wl9r4Y1/wUCGi03glpCzwtw05ei/PWh3MmxH XiJLq+00n5k6Ss6T5NwUrc+5G9kTT9BSjbHZXeRamusl2T8S0FxFkKhwm qrFUz0EOCk681FXJtZtZKxHBFi9vw7p3zayHE3ZfX/Hvls43zKkL6Yl6K Cqd3EP0FV64wi3ps4D3pWxEsGTtEy5f05Pa/hSxLUkpbdpDTPv61Leoub Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10866"; a="371056750" X-IronPort-AV: E=Sophos;i="6.03,234,1694761200"; d="scan'208";a="371056750" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Oct 2023 04:33:55 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10866"; a="930150810" X-IronPort-AV: E=Sophos;i="6.03,234,1694761200"; d="scan'208";a="930150810" Received: from suguccin-mobl1.amr.corp.intel.com (HELO localhost) ([10.252.44.63]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Oct 2023 04:33:49 -0700 From: =?utf-8?q?Ilpo_J=C3=A4rvinen?= To: Bjorn Helgaas , linux-pci@vger.kernel.org, Lorenzo Pieralisi , Rob Herring , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Jonathan Cameron , Jingoo Han , Gustavo Pimentel , Manivannan Sadhasivam , Lorenzo Pieralisi , Thierry Reding , Jonathan Hunter , linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org Cc: =?utf-8?q?Ilpo_J=C3=A4rvinen?= Subject: [PATCH 2/7] PCI: dwc: Use FIELD_GET/PREP() Date: Wed, 18 Oct 2023 14:32:49 +0300 Message-Id: <20231018113254.17616-3-ilpo.jarvinen@linux.intel.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20231018113254.17616-1-ilpo.jarvinen@linux.intel.com> References: <20231018113254.17616-1-ilpo.jarvinen@linux.intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on howler.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (howler.vger.email [0.0.0.0]); Wed, 18 Oct 2023 04:34:29 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1780092892534007990 X-GMAIL-MSGID: 1780092892534007990 Convert open-coded variants of PCI field access into FIELD_GET/PREP() to make the code easier to understand. Add two missing defines into pci_regs.h. Logically, the Max No-Snoop Latency Register is a separate word sized register in the PCIe spec, but the pre-existing LTR defines in pci_regs.h with dword long values seem to consider the registers together (the same goes for the only user). Thus, follow the custom and make the new values also take both word long LTR registers as a joint dword register. Signed-off-by: Ilpo Järvinen --- drivers/pci/controller/dwc/pcie-designware-ep.c | 7 ++++--- drivers/pci/controller/dwc/pcie-tegra194.c | 5 ++--- include/uapi/linux/pci_regs.h | 2 ++ 3 files changed, 8 insertions(+), 6 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c index f9182f8d552f..20bef1436bfb 100644 --- a/drivers/pci/controller/dwc/pcie-designware-ep.c +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c @@ -6,6 +6,7 @@ * Author: Kishon Vijay Abraham I */ +#include #include #include @@ -334,7 +335,7 @@ static int dw_pcie_ep_get_msi(struct pci_epc *epc, u8 func_no, u8 vfunc_no) if (!(val & PCI_MSI_FLAGS_ENABLE)) return -EINVAL; - val = (val & PCI_MSI_FLAGS_QSIZE) >> 4; + val = FIELD_GET(PCI_MSI_FLAGS_QSIZE, val); return val; } @@ -357,7 +358,7 @@ static int dw_pcie_ep_set_msi(struct pci_epc *epc, u8 func_no, u8 vfunc_no, reg = ep_func->msi_cap + func_offset + PCI_MSI_FLAGS; val = dw_pcie_readw_dbi(pci, reg); val &= ~PCI_MSI_FLAGS_QMASK; - val |= (interrupts << 1) & PCI_MSI_FLAGS_QMASK; + val |= FIELD_PREP(PCI_MSI_FLAGS_QMASK, interrupts); dw_pcie_dbi_ro_wr_en(pci); dw_pcie_writew_dbi(pci, reg, val); dw_pcie_dbi_ro_wr_dis(pci); @@ -584,7 +585,7 @@ int dw_pcie_ep_raise_msix_irq(struct dw_pcie_ep *ep, u8 func_no, reg = ep_func->msix_cap + func_offset + PCI_MSIX_TABLE; tbl_offset = dw_pcie_readl_dbi(pci, reg); - bir = (tbl_offset & PCI_MSIX_TABLE_BIR); + bir = FIELD_GET(PCI_MSIX_TABLE_BIR, tbl_offset); tbl_offset &= PCI_MSIX_TABLE_OFFSET; msix_tbl = ep->epf_bar[bir]->addr + tbl_offset; diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c index 248cd9347e8f..12d5ab2f5219 100644 --- a/drivers/pci/controller/dwc/pcie-tegra194.c +++ b/drivers/pci/controller/dwc/pcie-tegra194.c @@ -126,7 +126,6 @@ #define APPL_LTR_MSG_1 0xC4 #define LTR_MSG_REQ BIT(15) -#define LTR_MST_NO_SNOOP_SHIFT 16 #define APPL_LTR_MSG_2 0xC8 #define APPL_LTR_MSG_2_LTR_MSG_REQ_STATE BIT(3) @@ -496,8 +495,8 @@ static irqreturn_t tegra_pcie_ep_irq_thread(int irq, void *arg) ktime_t timeout; /* 110us for both snoop and no-snoop */ - val = 110 | (2 << PCI_LTR_SCALE_SHIFT) | LTR_MSG_REQ; - val |= (val << LTR_MST_NO_SNOOP_SHIFT); + val = 110 | FIELD_PREP(PCI_LTR_SCALE_SHIFT, 2) | LTR_MSG_REQ; + val |= FIELD_PREP(PCI_LTR_NOSNOOP_VALUE, val); appl_writel(pcie, val, APPL_LTR_MSG_1); /* Send LTR upstream */ diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h index e5f558d96493..495f0ae4ecd5 100644 --- a/include/uapi/linux/pci_regs.h +++ b/include/uapi/linux/pci_regs.h @@ -975,6 +975,8 @@ #define PCI_LTR_VALUE_MASK 0x000003ff #define PCI_LTR_SCALE_MASK 0x00001c00 #define PCI_LTR_SCALE_SHIFT 10 +#define PCI_LTR_NOSNOOP_VALUE 0x03ff0000 /* Max No-Snoop Latency Value */ +#define PCI_LTR_NOSNOOP_SCALE 0x1c000000 /* Scale for Max Value */ #define PCI_EXT_CAP_LTR_SIZEOF 8 /* Access Control Service */ From patchwork Wed Oct 18 11:32:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Ilpo_J=C3=A4rvinen?= X-Patchwork-Id: 154836 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2908:b0:403:3b70:6f57 with SMTP id ib8csp4722841vqb; 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[2620:137:e000::3:6]) by mx.google.com with ESMTPS id fb1-20020a056a002d8100b006901387b0b3si3853265pfb.9.2023.10.18.04.34.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Oct 2023 04:34:39 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:6 as permitted sender) client-ip=2620:137:e000::3:6; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=fphr2OIX; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:6 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by pete.vger.email (Postfix) with ESMTP id 095EB802370E; Wed, 18 Oct 2023 04:34:37 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at pete.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230299AbjJRLe1 (ORCPT + 24 others); Wed, 18 Oct 2023 07:34:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53648 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230265AbjJRLeX (ORCPT ); Wed, 18 Oct 2023 07:34:23 -0400 Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.126]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BABE110F; Wed, 18 Oct 2023 04:34:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1697628861; x=1729164861; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=MqRibY96VGUvi4t4Y8OdfajrD7rQssLGYBUaujkdMxs=; b=fphr2OIXahRYqsnweJgi7pKz8g0bpB5qr+uH3MXpZwhAqJs1ypwgZpKj ASH3xl5Kv3uWQCkQs6bUkokLRjpRmHqCqb5WzmGTcdsqgW/GWugaTJNgv Vy/Lnq5ugCgXf6J3v4FwhVANLb8fjfYWeT6EUZeMfY5Q+SvSr4LqFy/XC v8X0UCFlgjkE4bsFVXpuiKYUvA6jUxFaUiZdsGaWgfPSj3YoviRRNvZ5U KUILqUK+sa1Ws2Zy/P0rPGzSL/7BF0IZ3myge+mE8KruVUinTyOcKSbNV ty9z15VeZ60CDF03sOxIoF3JGB0oGRx/zNGcuCx0tqMnr3ofBq9T9otf4 g==; X-IronPort-AV: E=McAfee;i="6600,9927,10866"; a="371056786" X-IronPort-AV: E=Sophos;i="6.03,234,1694761200"; d="scan'208";a="371056786" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Oct 2023 04:34:06 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10866"; a="930150816" X-IronPort-AV: E=Sophos;i="6.03,234,1694761200"; d="scan'208";a="930150816" Received: from suguccin-mobl1.amr.corp.intel.com (HELO localhost) ([10.252.44.63]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Oct 2023 04:34:02 -0700 From: =?utf-8?q?Ilpo_J=C3=A4rvinen?= To: Bjorn Helgaas , linux-pci@vger.kernel.org, Lorenzo Pieralisi , Rob Herring , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Jonathan Cameron , Michael Ellerman , Nicholas Piggin , Christophe Leroy , linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org Cc: =?utf-8?q?Ilpo_J=C3=A4rvinen?= Subject: [PATCH 3/7] PCI: hotplug: Use FIELD_GET/PREP() Date: Wed, 18 Oct 2023 14:32:50 +0300 Message-Id: <20231018113254.17616-4-ilpo.jarvinen@linux.intel.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20231018113254.17616-1-ilpo.jarvinen@linux.intel.com> References: <20231018113254.17616-1-ilpo.jarvinen@linux.intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on pete.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (pete.vger.email [0.0.0.0]); Wed, 18 Oct 2023 04:34:37 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1780092900736026378 X-GMAIL-MSGID: 1780092900736026378 Instead of handcrafted shifts to handle register fields, use FIELD_GET/FIELD_PREP(). Signed-off-by: Ilpo Järvinen --- drivers/pci/hotplug/pciehp_core.c | 3 ++- drivers/pci/hotplug/pciehp_hpc.c | 5 +++-- drivers/pci/hotplug/pnv_php.c | 3 ++- 3 files changed, 7 insertions(+), 4 deletions(-) diff --git a/drivers/pci/hotplug/pciehp_core.c b/drivers/pci/hotplug/pciehp_core.c index 4042d87d539d..ddd55ad97a58 100644 --- a/drivers/pci/hotplug/pciehp_core.c +++ b/drivers/pci/hotplug/pciehp_core.c @@ -20,6 +20,7 @@ #define pr_fmt(fmt) "pciehp: " fmt #define dev_fmt pr_fmt +#include #include #include #include @@ -103,7 +104,7 @@ static int set_attention_status(struct hotplug_slot *hotplug_slot, u8 status) struct pci_dev *pdev = ctrl->pcie->port; if (status) - status <<= PCI_EXP_SLTCTL_ATTN_IND_SHIFT; + status = FIELD_PREP(PCI_EXP_SLTCTL_AIC, status); else status = PCI_EXP_SLTCTL_ATTN_IND_OFF; diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c index fd713abdfb9f..b1d0a1b3917d 100644 --- a/drivers/pci/hotplug/pciehp_hpc.c +++ b/drivers/pci/hotplug/pciehp_hpc.c @@ -14,6 +14,7 @@ #define dev_fmt(fmt) "pciehp: " fmt +#include #include #include #include @@ -484,7 +485,7 @@ int pciehp_set_raw_indicator_status(struct hotplug_slot *hotplug_slot, struct pci_dev *pdev = ctrl_dev(ctrl); pci_config_pm_runtime_get(pdev); - pcie_write_cmd_nowait(ctrl, status << 6, + pcie_write_cmd_nowait(ctrl, FIELD_PREP(PCI_EXP_SLTCTL_AIC, status), PCI_EXP_SLTCTL_AIC | PCI_EXP_SLTCTL_PIC); pci_config_pm_runtime_put(pdev); return 0; @@ -1028,7 +1029,7 @@ struct controller *pcie_init(struct pcie_device *dev) PCI_EXP_SLTSTA_DLLSC | PCI_EXP_SLTSTA_PDC); ctrl_info(ctrl, "Slot #%d AttnBtn%c PwrCtrl%c MRL%c AttnInd%c PwrInd%c HotPlug%c Surprise%c Interlock%c NoCompl%c IbPresDis%c LLActRep%c%s\n", - (slot_cap & PCI_EXP_SLTCAP_PSN) >> 19, + FIELD_GET(PCI_EXP_SLTCAP_PSN, slot_cap), FLAG(slot_cap, PCI_EXP_SLTCAP_ABP), FLAG(slot_cap, PCI_EXP_SLTCAP_PCP), FLAG(slot_cap, PCI_EXP_SLTCAP_MRLSP), diff --git a/drivers/pci/hotplug/pnv_php.c b/drivers/pci/hotplug/pnv_php.c index 881d420637bf..694349be9d0a 100644 --- a/drivers/pci/hotplug/pnv_php.c +++ b/drivers/pci/hotplug/pnv_php.c @@ -5,6 +5,7 @@ * Copyright Gavin Shan, IBM Corporation 2016. */ +#include #include #include #include @@ -731,7 +732,7 @@ static int pnv_php_enable_msix(struct pnv_php_slot *php_slot) /* Check hotplug MSIx entry is in range */ pcie_capability_read_word(pdev, PCI_EXP_FLAGS, &pcie_flag); - entry.entry = (pcie_flag & PCI_EXP_FLAGS_IRQ) >> 9; + entry.entry = FIELD_GET(PCI_EXP_FLAGS_IRQ, pcie_flag); if (entry.entry >= nr_entries) return -ERANGE; From patchwork Wed Oct 18 11:32:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Ilpo_J=C3=A4rvinen?= X-Patchwork-Id: 154835 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2908:b0:403:3b70:6f57 with SMTP id ib8csp4722821vqb; Wed, 18 Oct 2023 04:34:38 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHOmO5vI2EFj8dLA5RjcHhNiQBLpKC+a0HFrN+DifrkAg5vfoLgstJeNn3MIiO2ZxyInKK7 X-Received: by 2002:a05:6359:3118:b0:166:d9b6:1db3 with SMTP id rh24-20020a056359311800b00166d9b61db3mr4124089rwb.2.1697628877737; Wed, 18 Oct 2023 04:34:37 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697628877; cv=none; d=google.com; s=arc-20160816; b=koZwwOTAZNdtaexe4+7rUOhKk48GSDYvKZJikDSECgemTe0JSXDNqZRxDDhObCP0NV ZDTkbak5OpUzUg190DVdelSSrZ/C8aNr6fjPqAI4CbTq+MWPmFA1UtST1a+coomDckTQ pQp3Vrzurj1zBSrdcSsEmmIv0Aud7GfD3nfZOj944A7RjgCtRINT7Kn8I0TswdBctzwe onMgTvVPCLwX00rMwF5Ph813d9ZVa4U/rMC2lpYGqt3m2u9Sbdl9ThQ5wiQ8od7p/HEf wOlSgwBkMx4f7ent0D3grx/SOoBuLKJCJ6wK3AZDhRXUSixnkaERZGXvtE9VKDxPETVo VbZA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=nfRQcQcln4VXgEw3SKTjbEo141OrnL/o2od2t1nCocM=; fh=a4jVY77fL8q59y9vETjVHhCjkDpQmBwhOdq5bpbAGHU=; b=qTKpQ9cOl6BgWgf3997UfRkd0uzxSLZTH8VgAoL80jtYzk62uVexE3VBVpynNoD3ne lrAsQ0lwHFH8x7y6R5G5NQRZcvj2i5/Q7sZYEdBVDWdScxxJ6pq5SkaCX2XG3cL+pZaj 9xzmlMHbPPoGwRsyJb+Pq1Yhgecs2Cp8y3vvpVLt/UpM5LUgeHv7zWSDK/ckVp2wroL0 5ttmcei8KmwpwTegeURCqrsmDsqGHtK/bgnukfiEt9hv0L2THLy/SsRBP4jgRq6aEjP3 v39TW3HwBi9DS2j/Ckl5bzkqnrzeJm+13Zq3cNT79qu5JX3phWsOBLshL1/LLvp8Ha5p ZDAA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=n+mNjmKR; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from snail.vger.email (snail.vger.email. [23.128.96.37]) by mx.google.com with ESMTPS id n8-20020a654508000000b005b34179728esi1978769pgq.237.2023.10.18.04.34.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Oct 2023 04:34:37 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) client-ip=23.128.96.37; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=n+mNjmKR; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by snail.vger.email (Postfix) with ESMTP id E8A3381393DA; Wed, 18 Oct 2023 04:34:36 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at snail.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231313AbjJRLeb (ORCPT + 24 others); Wed, 18 Oct 2023 07:34:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53706 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231176AbjJRLeZ (ORCPT ); Wed, 18 Oct 2023 07:34:25 -0400 Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 85F7B11A; Wed, 18 Oct 2023 04:34:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1697628863; x=1729164863; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=VjreTDi7jjJH97Z5MyoUOCUozCMclaID/DbiusXdx6k=; b=n+mNjmKR7c2Bqus+QmqeZqy4DnKw0j/iAXSscaw8HOCvNFgrducuxp7G 067EiZeIxAzLh3+EPBf7NSPitb4GBmSUFgV0d7pkpCziTU5T4ZOcLGNA6 2Zncv6woiUzgt6QK0KC/84blXuPu9Sg0Eat5zva/JhXWhPAc79hIHwxW7 IWw1chKq9p0WO+FODIthqXp8KytqIPmfEGRaqWUwD4hTAq2ogWjeTT1Et QJAbjH2AMKK9vYI04le1Rgu6vmFOIMRlBwCDKZ1j/YkBMt4wYnNjKw+ot oI1+0twJOoYYDJ4cK/eytJEs1wRmWMY9+jQkBzEurxJw1Ncjro/PFUHiM Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10866"; a="383215893" X-IronPort-AV: E=Sophos;i="6.03,234,1694761200"; d="scan'208";a="383215893" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Oct 2023 04:34:23 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10866"; a="826855199" X-IronPort-AV: E=Sophos;i="6.03,234,1694761200"; d="scan'208";a="826855199" Received: from suguccin-mobl1.amr.corp.intel.com (HELO localhost) ([10.252.44.63]) by fmsmga004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Oct 2023 04:34:13 -0700 From: =?utf-8?q?Ilpo_J=C3=A4rvinen?= To: Bjorn Helgaas , linux-pci@vger.kernel.org, Lorenzo Pieralisi , Rob Herring , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Jonathan Cameron , Mahesh J Salgaonkar , "Oliver O'Halloran" , linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org Cc: =?utf-8?q?Ilpo_J=C3=A4rvinen?= Subject: [PATCH 4/7] PCI/DPC: Use FIELD_GET() Date: Wed, 18 Oct 2023 14:32:51 +0300 Message-Id: <20231018113254.17616-5-ilpo.jarvinen@linux.intel.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20231018113254.17616-1-ilpo.jarvinen@linux.intel.com> References: <20231018113254.17616-1-ilpo.jarvinen@linux.intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Wed, 18 Oct 2023 04:34:36 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1780092897822882952 X-GMAIL-MSGID: 1780092897822882952 From: Bjorn Helgaas Use FIELD_GET() to remove dependencies on the field position, i.e., the shift value. No functional change intended. Signed-off-by: Ilpo Järvinen Signed-off-by: Bjorn Helgaas --- drivers/pci/pcie/dpc.c | 5 +++-- drivers/pci/quirks.c | 2 +- include/uapi/linux/pci_regs.h | 1 + 3 files changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/pci/pcie/dpc.c b/drivers/pci/pcie/dpc.c index 3ceed8e3de41..a5c259ada9ea 100644 --- a/drivers/pci/pcie/dpc.c +++ b/drivers/pci/pcie/dpc.c @@ -9,6 +9,7 @@ #define dev_fmt(fmt) "DPC: " fmt #include +#include #include #include #include @@ -202,7 +203,7 @@ static void dpc_process_rp_pio_error(struct pci_dev *pdev) /* Get First Error Pointer */ pci_read_config_word(pdev, cap + PCI_EXP_DPC_STATUS, &dpc_status); - first_error = (dpc_status & 0x1f00) >> 8; + first_error = FIELD_GET(PCI_EXP_DPC_RP_PIO_FEP, dpc_status); for (i = 0; i < ARRAY_SIZE(rp_pio_error_string); i++) { if ((status & ~mask) & (1 << i)) @@ -338,7 +339,7 @@ void pci_dpc_init(struct pci_dev *pdev) /* Quirks may set dpc_rp_log_size if device or firmware is buggy */ if (!pdev->dpc_rp_log_size) { pdev->dpc_rp_log_size = - (cap & PCI_EXP_DPC_RP_PIO_LOG_SIZE) >> 8; + FIELD_GET(PCI_EXP_DPC_RP_PIO_LOG_SIZE, cap); if (pdev->dpc_rp_log_size < 4 || pdev->dpc_rp_log_size > 9) { pci_err(pdev, "RP PIO log size %u is invalid\n", pdev->dpc_rp_log_size); diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index eeec1d6f9023..a9fdc2e3f110 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -6154,7 +6154,7 @@ static void dpc_log_size(struct pci_dev *dev) if (!(val & PCI_EXP_DPC_CAP_RP_EXT)) return; - if (!((val & PCI_EXP_DPC_RP_PIO_LOG_SIZE) >> 8)) { + if (FIELD_GET(PCI_EXP_DPC_RP_PIO_LOG_SIZE, val) == 0) { pci_info(dev, "Overriding RP PIO Log Size to 4\n"); dev->dpc_rp_log_size = 4; } diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h index 495f0ae4ecd5..2d6df02a4b93 100644 --- a/include/uapi/linux/pci_regs.h +++ b/include/uapi/linux/pci_regs.h @@ -1047,6 +1047,7 @@ #define PCI_EXP_DPC_STATUS_INTERRUPT 0x0008 /* Interrupt Status */ #define PCI_EXP_DPC_RP_BUSY 0x0010 /* Root Port Busy */ #define PCI_EXP_DPC_STATUS_TRIGGER_RSN_EXT 0x0060 /* Trig Reason Extension */ +#define PCI_EXP_DPC_RP_PIO_FEP 0x1f00 /* Root Port PIO First Error Pointer */ #define PCI_EXP_DPC_SOURCE_ID 0x0A /* DPC Source Identifier */ From patchwork Wed Oct 18 11:32:52 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Ilpo_J=C3=A4rvinen?= X-Patchwork-Id: 154837 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2908:b0:403:3b70:6f57 with SMTP id ib8csp4722919vqb; Wed, 18 Oct 2023 04:34:50 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHCXVNYuc+t/nx5vhIioZ+VW7UQhMssG0cS1igRij+B/piV4CtiyMWwiVGHLatbo8TRRL7n X-Received: by 2002:a17:902:e746:b0:1bb:9e6e:a9f3 with SMTP id p6-20020a170902e74600b001bb9e6ea9f3mr5040623plf.4.1697628890584; Wed, 18 Oct 2023 04:34:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697628890; cv=none; d=google.com; s=arc-20160816; b=cG8xQEnJ9B9RRs/pe6IeuEj76a7Ik6FKXaGeXoYjLh3+Uh3lyxiyN7001ZUQmxkhzP imPiisGbKZB4QD4EOEHzEPCQe0POGECvCDBYsNbiwgNqKiFQEolFYZFUnMoX2vScb/KO ei+3UPfjG1iSMilLeTU5IksLVbRn0x5vJa/3O1CKkYmGRA2VXDJxuheFioZ7SdnMV7kU JwipmyHOWjV7f1PWGLe2AuNbdRYNXqAPdI8xXNUAukXdVJSKFMihQK0URowsVWhFdU5T Eha/uqRPQYbPQvHxowHsocVftuWgtWpFL0Zks1tdXvDnpzJaNrAXsXMIFpEvBA8wd8gM Vwog== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=0ydEZu3R7Q7mStE0Pa3hj4GczRLBqagLHsYHro15TR8=; fh=a4jVY77fL8q59y9vETjVHhCjkDpQmBwhOdq5bpbAGHU=; b=vUgmuSCuUbtunOuEN8Lq3iRDrQdiWiEEO8QVHuikaVQXR7wh6ELtN8yukO3DW+JmrD xUblK2yorl6yBXEV73xoOP/cgDVRg542uY+hrGenQ2sMNwZsKIHv+jl7szELtPjq7RM/ WjVycao5ZFhBHnuoshha1kZ/g++bzFC5X4A0ZJAacPrh3pAedI2sOgRgMfh+/JiToidr Ptz4XZeKgd+MQjv2rhTA3Rt1j5DBWkB6lrsTWPH9ZgLFL7/haqvOhGoTYVSro5uZnTnR WwnqbQDSxqK2CXLjSSiFE+HXSPGbWK7lVb3S5wmzIp2ZOjNc52/JeBS4MZtyXecx7xPx 0eng== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=hXDENuY7; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:4 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from howler.vger.email (howler.vger.email. [2620:137:e000::3:4]) by mx.google.com with ESMTPS id k1-20020a170902c40100b001b674055d72si4307938plk.621.2023.10.18.04.34.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Oct 2023 04:34:50 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:4 as permitted sender) client-ip=2620:137:e000::3:4; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=hXDENuY7; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:4 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by howler.vger.email (Postfix) with ESMTP id B45B0802583C; Wed, 18 Oct 2023 04:34:46 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at howler.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231266AbjJRLef (ORCPT + 24 others); Wed, 18 Oct 2023 07:34:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35608 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230265AbjJRLec (ORCPT ); Wed, 18 Oct 2023 07:34:32 -0400 Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 79680114; Wed, 18 Oct 2023 04:34:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1697628870; x=1729164870; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=eqc17uG/Wp2D66WXcFZdwU3+R9wxUscpDbfeTvikXZs=; b=hXDENuY7dRREPQA7nPotsPyhE0JAPBdkS7GfYJ5kFTB0IEo9+wuzB3jn VqSR7dQZHfKiVctWPYS5vTdTDvq0bXLZmmQ0nmvkKznJzGxCkYafGroTG AUrjv2oX4uajsrfcTDeR0gTtccAGUoBJJGkkPs8puqNX4ONH+YkBAnAPN rWvYlhKIDoNy64tmRsGPzo00X9XGQLR0/+Aw3Xy72I7eJOhHabxp1k12B FMB1uzQ1im5bRkYB1Xnhcx8PXLIRf9/8pykYUnNkLprF1W1ZyP9qVdmGw 31iRItZfYWsCuguLWoC9jW5xZijJOHLUCDCpOyNfpng91Pw0Ts31bkgkP Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10866"; a="383215922" X-IronPort-AV: E=Sophos;i="6.03,234,1694761200"; d="scan'208";a="383215922" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Oct 2023 04:34:29 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10866"; a="826855323" X-IronPort-AV: E=Sophos;i="6.03,234,1694761200"; d="scan'208";a="826855323" Received: from suguccin-mobl1.amr.corp.intel.com (HELO localhost) ([10.252.44.63]) by fmsmga004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Oct 2023 04:34:25 -0700 From: =?utf-8?q?Ilpo_J=C3=A4rvinen?= To: Bjorn Helgaas , linux-pci@vger.kernel.org, Lorenzo Pieralisi , Rob Herring , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Jonathan Cameron , Mahesh J Salgaonkar , "Oliver O'Halloran" , linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org Cc: =?utf-8?q?Ilpo_J=C3=A4rvinen?= Subject: [PATCH 5/7] PCI/DPC: Use defined fields with DPC_CTL register Date: Wed, 18 Oct 2023 14:32:52 +0300 Message-Id: <20231018113254.17616-6-ilpo.jarvinen@linux.intel.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20231018113254.17616-1-ilpo.jarvinen@linux.intel.com> References: <20231018113254.17616-1-ilpo.jarvinen@linux.intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on howler.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (howler.vger.email [0.0.0.0]); Wed, 18 Oct 2023 04:34:46 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1780092911111241554 X-GMAIL-MSGID: 1780092911111241554 Instead of using a literal to clear bits, add PCI_EXP_DPC_CTL_EN_MASK and use the usual pattern to modify a bitfield. While at it, rearrange RMW code more logically together. Signed-off-by: Ilpo Järvinen --- drivers/pci/pcie/dpc.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/pci/pcie/dpc.c b/drivers/pci/pcie/dpc.c index a5c259ada9ea..0048a11bd119 100644 --- a/drivers/pci/pcie/dpc.c +++ b/drivers/pci/pcie/dpc.c @@ -18,6 +18,9 @@ #include "portdrv.h" #include "../pci.h" +#define PCI_EXP_DPC_CTL_EN_MASK (PCI_EXP_DPC_CTL_EN_FATAL | \ + PCI_EXP_DPC_CTL_EN_NONFATAL) + static const char * const rp_pio_error_string[] = { "Configuration Request received UR Completion", /* Bit Position 0 */ "Configuration Request received CA Completion", /* Bit Position 1 */ @@ -369,12 +372,13 @@ static int dpc_probe(struct pcie_device *dev) } pci_read_config_word(pdev, pdev->dpc_cap + PCI_EXP_DPC_CAP, &cap); - pci_read_config_word(pdev, pdev->dpc_cap + PCI_EXP_DPC_CTL, &ctl); - ctl = (ctl & 0xfff4) | PCI_EXP_DPC_CTL_EN_FATAL | PCI_EXP_DPC_CTL_INT_EN; + pci_read_config_word(pdev, pdev->dpc_cap + PCI_EXP_DPC_CTL, &ctl); + ctl &= ~PCI_EXP_DPC_CTL_EN_MASK; + ctl |= PCI_EXP_DPC_CTL_EN_FATAL | PCI_EXP_DPC_CTL_INT_EN; pci_write_config_word(pdev, pdev->dpc_cap + PCI_EXP_DPC_CTL, ctl); - pci_info(pdev, "enabled with IRQ %d\n", dev->irq); + pci_info(pdev, "enabled with IRQ %d\n", dev->irq); pci_info(pdev, "error containment capabilities: Int Msg #%d, RPExt%c PoisonedTLP%c SwTrigger%c RP PIO Log %d, DL_ActiveErr%c\n", cap & PCI_EXP_DPC_IRQ, FLAG(cap, PCI_EXP_DPC_CAP_RP_EXT), FLAG(cap, PCI_EXP_DPC_CAP_POISONED_TLP), From patchwork Wed Oct 18 11:32:53 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Ilpo_J=C3=A4rvinen?= X-Patchwork-Id: 154839 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2908:b0:403:3b70:6f57 with SMTP id ib8csp4723346vqb; Wed, 18 Oct 2023 04:35:43 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFwkg59KW4nz8Xomyftmc6W0fivBwI0AK/zCmE4T06/S5c4x7Nquj7mnY3ZrN5gIn/YpjiO X-Received: by 2002:a05:6a20:c182:b0:15d:6fd3:8e74 with SMTP id bg2-20020a056a20c18200b0015d6fd38e74mr5515400pzb.3.1697628942885; Wed, 18 Oct 2023 04:35:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697628942; cv=none; d=google.com; s=arc-20160816; b=RF+exOt6mrZvnAeInzd4WD5ADVyzxfdE0JhxS5KBxLgy4wYuqwNrKkgSBzgEboqAjS Yew4gB5EWMLG55Oa4+b9oFb3Zty8n62JSDU/p3YBNBgnvfvruhJ9Jm7k5Peq1IGVrbgO IcFv8M6ci6KlmF3anlO5uuexcM7/AnpVApcJHSJqFx1Al/qaQ1rEgz04m4tpZWvies9g 5iagolC8jsTG51ME5sfpOiYaSjImiDvAM1JxNwGwox9ATPzi9xvIN3y4H8bmXVz2NTME aW32lY23Z6FGLBAI+tNOBwfkJRTKlSFX8XDdfVhEOAGxXxEWBOzawinpQRSd7WL6jRDU iULw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=dfwwJFiOfurfYerGYIidFJd0RU51cz3jz/a0RG+Exbg=; fh=a4jVY77fL8q59y9vETjVHhCjkDpQmBwhOdq5bpbAGHU=; b=eY5YmW1ANNd3i+8Ce1muSnyiYNJ2Kyk/XmS739NKvWR7elSdjJWmbSAiXRGI39LypY 897c9FVOFZF5IHw7gYPXtgYLDzOslj33+LkecJDq6C9Yww2iVAx0B+VaunB4X5A80anF g4EdNTuf1h/zQuPZz1PgDR9l/EGeFVpugA7nYlQlWMD/2TiuAH1dfOwZGS5Sz+Ox8Cef j6DH5vXlpKrz8weOPjbZ9gys2b6iS7xItQVdc9OfjS+7/VuLi8PNjK1/R6CpH0SEZeiT DSX87SgmAvVnbcC+eCl6eqZpACuqX35h9RmLtmt/9C9ZE+l1m0D0O0onriNYWp5US8rl aSsg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=CTnHRV8N; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.36 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from pete.vger.email (pete.vger.email. [23.128.96.36]) by mx.google.com with ESMTPS id y20-20020a170902ed5400b001c9b5e4be5fsi3874840plb.396.2023.10.18.04.35.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Oct 2023 04:35:42 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.36 as permitted sender) client-ip=23.128.96.36; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=CTnHRV8N; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.36 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by pete.vger.email (Postfix) with ESMTP id 42DC58023706; Wed, 18 Oct 2023 04:35:40 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at pete.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231361AbjJRLe6 (ORCPT + 24 others); Wed, 18 Oct 2023 07:34:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59694 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231446AbjJRLev (ORCPT ); Wed, 18 Oct 2023 07:34:51 -0400 Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 332391B4; Wed, 18 Oct 2023 04:34:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1697628885; x=1729164885; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=k/22Q3ibxWUMJOAz8W7Fp9YO2SyS1HtQWBwVBnojOT4=; b=CTnHRV8NoMBY8MYyls08/2zYM1RQMFDsBOBIpJanJCNCn6i5msM+Gai7 3utdZeHaHrEP5xkMw119tW+lZzNxrLZPyrLo0MksHn/LT2feeF9Da5Jbo KTLzRByzpVK/b1ITbM1xqyvinZar1y2IoMAH2y5+BGYT3eE/uRQ8yAa3c ZLpiSfvyoYFksty3qngKTuwbZGO6+SuYGjJe1+ehdPt093baAeA24uwgz uoJVQ3LkSDu59Q6a9DypQVvtwecKv1Zhq+ePeg/v8K7W9XizAgLYzqTZM kkuJEVnciin8zkhzEa5aP2WAsYCxZTbnJ6kX4+SmcSe7YhRtAdIhNpOdx A==; X-IronPort-AV: E=McAfee;i="6600,9927,10866"; a="383216002" X-IronPort-AV: E=Sophos;i="6.03,234,1694761200"; d="scan'208";a="383216002" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Oct 2023 04:34:43 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10866"; a="826855333" X-IronPort-AV: E=Sophos;i="6.03,234,1694761200"; d="scan'208";a="826855333" Received: from suguccin-mobl1.amr.corp.intel.com (HELO localhost) ([10.252.44.63]) by fmsmga004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Oct 2023 04:34:35 -0700 From: =?utf-8?q?Ilpo_J=C3=A4rvinen?= To: Bjorn Helgaas , linux-pci@vger.kernel.org, Lorenzo Pieralisi , Rob Herring , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Jonathan Cameron , Mahesh J Salgaonkar , "Oliver O'Halloran" , linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org Cc: =?utf-8?q?Ilpo_J=C3=A4rvinen?= Subject: [PATCH 6/7] PCI/DPC: Use defines with DPC reason fields Date: Wed, 18 Oct 2023 14:32:53 +0300 Message-Id: <20231018113254.17616-7-ilpo.jarvinen@linux.intel.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20231018113254.17616-1-ilpo.jarvinen@linux.intel.com> References: <20231018113254.17616-1-ilpo.jarvinen@linux.intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on pete.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (pete.vger.email [0.0.0.0]); Wed, 18 Oct 2023 04:35:40 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1780092966854222851 X-GMAIL-MSGID: 1780092966854222851 Add new defines for DPC reason fields and use them instead of literals. Signed-off-by: Ilpo Järvinen --- drivers/pci/pcie/dpc.c | 27 +++++++++++++++++---------- include/uapi/linux/pci_regs.h | 6 ++++++ 2 files changed, 23 insertions(+), 10 deletions(-) diff --git a/drivers/pci/pcie/dpc.c b/drivers/pci/pcie/dpc.c index 0048a11bd119..94111e438241 100644 --- a/drivers/pci/pcie/dpc.c +++ b/drivers/pci/pcie/dpc.c @@ -274,20 +274,27 @@ void dpc_process_error(struct pci_dev *pdev) pci_info(pdev, "containment event, status:%#06x source:%#06x\n", status, source); - reason = (status & PCI_EXP_DPC_STATUS_TRIGGER_RSN) >> 1; - ext_reason = (status & PCI_EXP_DPC_STATUS_TRIGGER_RSN_EXT) >> 5; + reason = status & PCI_EXP_DPC_STATUS_TRIGGER_RSN; + ext_reason = status & PCI_EXP_DPC_STATUS_TRIGGER_RSN_EXT; pci_warn(pdev, "%s detected\n", - (reason == 0) ? "unmasked uncorrectable error" : - (reason == 1) ? "ERR_NONFATAL" : - (reason == 2) ? "ERR_FATAL" : - (ext_reason == 0) ? "RP PIO error" : - (ext_reason == 1) ? "software trigger" : - "reserved error"); + (reason == PCI_EXP_DPC_STATUS_TRIGGER_RSN_UNCOR) ? + "unmasked uncorrectable error" : + (reason == PCI_EXP_DPC_STATUS_TRIGGER_RSN_NFE) ? + "ERR_NONFATAL" : + (reason == PCI_EXP_DPC_STATUS_TRIGGER_RSN_FE) ? + "ERR_FATAL" : + (ext_reason == PCI_EXP_DPC_STATUS_TRIGGER_RSN_RP_PIO) ? + "RP PIO error" : + (ext_reason == PCI_EXP_DPC_STATUS_TRIGGER_RSN_SW_TRIGGER) ? + "software trigger" : + "reserved error"); /* show RP PIO error detail information */ - if (pdev->dpc_rp_extensions && reason == 3 && ext_reason == 0) + if (pdev->dpc_rp_extensions && + reason == PCI_EXP_DPC_STATUS_TRIGGER_RSN_IN_EXT && + ext_reason == PCI_EXP_DPC_STATUS_TRIGGER_RSN_RP_PIO) dpc_process_rp_pio_error(pdev); - else if (reason == 0 && + else if (reason == PCI_EXP_DPC_STATUS_TRIGGER_RSN_UNCOR && dpc_get_aer_uncorrect_severity(pdev, &info) && aer_get_device_error_info(pdev, &info)) { aer_print_error(pdev, &info); diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h index 2d6df02a4b93..c4d67ceae20d 100644 --- a/include/uapi/linux/pci_regs.h +++ b/include/uapi/linux/pci_regs.h @@ -1044,9 +1044,15 @@ #define PCI_EXP_DPC_STATUS 0x08 /* DPC Status */ #define PCI_EXP_DPC_STATUS_TRIGGER 0x0001 /* Trigger Status */ #define PCI_EXP_DPC_STATUS_TRIGGER_RSN 0x0006 /* Trigger Reason */ +#define PCI_EXP_DPC_STATUS_TRIGGER_RSN_UNCOR 0x0000 /* DPC due to unmasked uncorrectable error */ +#define PCI_EXP_DPC_STATUS_TRIGGER_RSN_NFE 0x0002 /* DPC due to receiving ERR_NONFATAL */ +#define PCI_EXP_DPC_STATUS_TRIGGER_RSN_FE 0x0004 /* DPC due to receiving ERR_FATAL */ +#define PCI_EXP_DPC_STATUS_TRIGGER_RSN_IN_EXT 0x0006 /* Reason in Trig Reason Extension field */ #define PCI_EXP_DPC_STATUS_INTERRUPT 0x0008 /* Interrupt Status */ #define PCI_EXP_DPC_RP_BUSY 0x0010 /* Root Port Busy */ #define PCI_EXP_DPC_STATUS_TRIGGER_RSN_EXT 0x0060 /* Trig Reason Extension */ +#define PCI_EXP_DPC_STATUS_TRIGGER_RSN_RP_PIO 0x0000 /* DPC due to RP PIO error */ +#define PCI_EXP_DPC_STATUS_TRIGGER_RSN_SW_TRIGGER 0x0020 /* DPC due to DPC SW Trigger bit */ #define PCI_EXP_DPC_RP_PIO_FEP 0x1f00 /* Root Port PIO First Error Pointer */ #define PCI_EXP_DPC_SOURCE_ID 0x0A /* DPC Source Identifier */ From patchwork Wed Oct 18 11:32:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Ilpo_J=C3=A4rvinen?= X-Patchwork-Id: 154838 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2908:b0:403:3b70:6f57 with SMTP id ib8csp4723201vqb; Wed, 18 Oct 2023 04:35:27 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHl+uQL2NUAY+lcQhGIlFX5GPYsAzlm6Gr4giESqX+lndS45TxI+anCEY3oAaMVBALqVQJU X-Received: by 2002:a05:6358:9f9e:b0:166:d9b7:ed8d with SMTP id fy30-20020a0563589f9e00b00166d9b7ed8dmr4149467rwb.2.1697628927084; Wed, 18 Oct 2023 04:35:27 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697628927; cv=none; d=google.com; s=arc-20160816; b=UEt7keDtt7bpVoNGIG5Q9aJbw8OW394uiVtq33KtZLJaeC84lTffq9rUgoW6IEcVXR pqtt5zaMg/0ZY2LwBsiC3IU/ZPapkJ9X2tDSUlllkkyYOBUUgDbiGzM5ej0Lq1YLwDek uAMnxqkDKPf3bI8gWBIAJvNzZYBO3PqkzIub6NO38WpP+Hq122tSJVo4fEr0AImAwPIw e3IEnib+rdLsvGXixUYh2GGJesS3DsgpDrxoROH4dAZ+vRzhsPtnebgqxyMNUiwn7HMR DmuPK8sR2tkFKzrP1YTreQaL519q40WY90gH0IGAXs7HKwLsYS3yy/I4sKkloI9IScA4 UQeg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=ENFZSFU4kGiFka8pQDw8Yer50AYytlPajpltxNAMRVg=; fh=bayJXXzCogY1NniUO68+IV8OTuFyZvNndGRqtMfemNk=; b=JE8ORvKQj2xmKSusu6Jjz/EkYOKzgter+43Sc90Q0PDjpTXeL6UB1/z8I7oHmIiCpX SRWCcxzDm0EcPzsvjPog/9bROZeChkjEBoN8r0+lL8rKwJzpjrKjj4502Ds7blBzCzZv CchHoBRu0XbcJldyz47mHbeV1H2skplMIpR7VMUMVNnI2BV8KKYC/BFuEQTEi/k0a7mx jtNPffU65T0ULyXAZmVTJuunoGxQjLWtm69oKzuSb9dbY3uGWqSDRjC2ln7B9lYCLLmp vaikpUEqq4L7GMahMZWcfurKMuvN54uX1Lh8EbVTE2YSZnrWcH0cR3EVBVB14g+UaOPQ jLfg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=aGbYegRU; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.33 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from lipwig.vger.email (lipwig.vger.email. [23.128.96.33]) by mx.google.com with ESMTPS id s67-20020a635e46000000b005777bea0b6asi1930366pgb.859.2023.10.18.04.35.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Oct 2023 04:35:27 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.33 as permitted sender) client-ip=23.128.96.33; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=aGbYegRU; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.33 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by lipwig.vger.email (Postfix) with ESMTP id D6AC080F5F12; Wed, 18 Oct 2023 04:35:24 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at lipwig.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235142AbjJRLfJ (ORCPT + 24 others); Wed, 18 Oct 2023 07:35:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59690 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234836AbjJRLfB (ORCPT ); Wed, 18 Oct 2023 07:35:01 -0400 Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.20]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5CAD612F; Wed, 18 Oct 2023 04:34:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1697628895; x=1729164895; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=NRJlQShSFWurHaKOv7QhLLMxfjt9JndN5eDKi4TZy98=; b=aGbYegRUtj56RBdWDPRzO9F0UnjGtoWATtUqMrSJdZjhGYMQ2A6ivG4d 6pVdPGZDrHNJw3PzKnMNjDxsDxINogltPm/9AIegeJsjnG2nhApe4a3FP Kbkd/js6XQVoJwiqrb+NGYeu3Se3MhMV73t52u4PH8gLgZPtY01u8TS6p oHSFuxXJwF7XFJwp7YkFMS3hFHW167AeXArQkgnWhIvOdznIfeBSo503b /8hS6qXYv4iFhgM0hZwCv1NFG45oiZFRX8q0WLUB1b45O8JQvpTnEZiST oSbpvY0P3CxKt/rzUfUHYaW4OLTHrpITf658DpasvOLG1+E/FcvfspS9d w==; X-IronPort-AV: E=McAfee;i="6600,9927,10866"; a="376365782" X-IronPort-AV: E=Sophos;i="6.03,234,1694761200"; d="scan'208";a="376365782" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Oct 2023 04:34:50 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10866"; a="733145191" X-IronPort-AV: E=Sophos;i="6.03,234,1694761200"; d="scan'208";a="733145191" Received: from suguccin-mobl1.amr.corp.intel.com (HELO localhost) ([10.252.44.63]) by orsmga006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Oct 2023 04:34:47 -0700 From: =?utf-8?q?Ilpo_J=C3=A4rvinen?= To: Bjorn Helgaas , linux-pci@vger.kernel.org, Lorenzo Pieralisi , Rob Herring , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Jonathan Cameron , linux-kernel@vger.kernel.org Cc: =?utf-8?q?Ilpo_J=C3=A4rvinen?= Subject: [PATCH 7/7] PCI/MSI: Use FIELD_GET/PREP() Date: Wed, 18 Oct 2023 14:32:54 +0300 Message-Id: <20231018113254.17616-8-ilpo.jarvinen@linux.intel.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20231018113254.17616-1-ilpo.jarvinen@linux.intel.com> References: <20231018113254.17616-1-ilpo.jarvinen@linux.intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lipwig.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (lipwig.vger.email [0.0.0.0]); Wed, 18 Oct 2023 04:35:24 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1780092950093264819 X-GMAIL-MSGID: 1780092950093264819 Instead of custom masking and shifting, use FIELD_GET/PREP() with register fields. Signed-off-by: Ilpo Järvinen --- drivers/pci/msi/msi.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/pci/msi/msi.c b/drivers/pci/msi/msi.c index ef1d8857a51b..682fa877478f 100644 --- a/drivers/pci/msi/msi.c +++ b/drivers/pci/msi/msi.c @@ -6,6 +6,7 @@ * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com) * Copyright (C) 2016 Christoph Hellwig. */ +#include #include #include #include @@ -188,7 +189,7 @@ static inline void pci_write_msg_msi(struct pci_dev *dev, struct msi_desc *desc, pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &msgctl); msgctl &= ~PCI_MSI_FLAGS_QSIZE; - msgctl |= desc->pci.msi_attrib.multiple << 4; + msgctl |= FIELD_PREP(PCI_MSI_FLAGS_QSIZE, desc->pci.msi_attrib.multiple); pci_write_config_word(dev, pos + PCI_MSI_FLAGS, msgctl); pci_write_config_dword(dev, pos + PCI_MSI_ADDRESS_LO, msg->address_lo); @@ -299,7 +300,7 @@ static int msi_setup_msi_desc(struct pci_dev *dev, int nvec, desc.pci.msi_attrib.is_64 = !!(control & PCI_MSI_FLAGS_64BIT); desc.pci.msi_attrib.can_mask = !!(control & PCI_MSI_FLAGS_MASKBIT); desc.pci.msi_attrib.default_irq = dev->irq; - desc.pci.msi_attrib.multi_cap = (control & PCI_MSI_FLAGS_QMASK) >> 1; + desc.pci.msi_attrib.multi_cap = FIELD_GET(PCI_MSI_FLAGS_QMASK, control); desc.pci.msi_attrib.multiple = ilog2(__roundup_pow_of_two(nvec)); desc.affinity = masks; @@ -478,7 +479,7 @@ int pci_msi_vec_count(struct pci_dev *dev) return -EINVAL; pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &msgctl); - ret = 1 << ((msgctl & PCI_MSI_FLAGS_QMASK) >> 1); + ret = 1 << FIELD_GET(PCI_MSI_FLAGS_QMASK, msgctl); return ret; } @@ -511,7 +512,8 @@ void __pci_restore_msi_state(struct pci_dev *dev) pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &control); pci_msi_update_mask(entry, 0, 0); control &= ~PCI_MSI_FLAGS_QSIZE; - control |= (entry->pci.msi_attrib.multiple << 4) | PCI_MSI_FLAGS_ENABLE; + control |= PCI_MSI_FLAGS_ENABLE | + FIELD_PREP(PCI_MSI_FLAGS_QSIZE, entry->pci.msi_attrib.multiple); pci_write_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, control); }