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[2620:137:e000::3:7]) by mx.google.com with ESMTPS id j3-20020a056a00174300b00690ffbb46e6si3252563pfc.261.2023.10.17.22.07.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 Oct 2023 22:07:17 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) client-ip=2620:137:e000::3:7; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=kaNNT6Ex; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by snail.vger.email (Postfix) with ESMTP id 70EC18116E50; Tue, 17 Oct 2023 22:07:16 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at snail.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229552AbjJRFHJ (ORCPT + 23 others); Wed, 18 Oct 2023 01:07:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40012 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229453AbjJRFHF (ORCPT ); Wed, 18 Oct 2023 01:07:05 -0400 Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 66C9EA2 for ; Tue, 17 Oct 2023 22:07:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1697605624; x=1729141624; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Dc0MbEJ8iTAniu2BvDRHDAZHMXmQyjjI1WBQvNDPIaM=; b=kaNNT6Ex4zDQv/1Y4EKPCiCoc1fAg2mAYSNl3i43/NamOYw4N2a3h3BE /KWf0INiy5sddqHgI+B2xOPqEnIjLvYVrFq/3qCor1v5yxIVqvLLUVCWO FzFgCtw9aZ5X6YRbDSdXwbfyzDcn8/Kh5XdId+fWAyt7SbIFvmhKkEgi6 JNKJLvWoHUq8ZxeA4KeDd7qJzLBW+/YlXO8Vsm64IzAxAJQCwoKUrMreP uHFnvzAtS0WhDjwog+vViB3A3dId0mRR9PgFdO6yYnBV1Efo8pr+hBCOj PZO5lUxdbdUsrmB2YkpizBvmU0cGJOubS4hu06I+zXhmT+V+6eh4ePqxF Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10866"; a="388802386" X-IronPort-AV: E=Sophos;i="6.03,234,1694761200"; d="scan'208";a="388802386" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Oct 2023 22:07:04 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10866"; a="822288643" X-IronPort-AV: E=Sophos;i="6.03,234,1694761200"; d="scan'208";a="822288643" Received: from sqa-gate.sh.intel.com (HELO spr-2s5.tsp.org) ([10.239.48.212]) by fmsmga008.fm.intel.com with ESMTP; 17 Oct 2023 22:07:00 -0700 From: Tina Zhang To: iommu@lists.linux.dev, linux-kernel@vger.kernel.org Cc: David Woodhouse , Lu Baolu , Joerg Roedel , Will Deacon , Robin Murphy , Jason Gunthorpe , Kevin Tian , Nicolin Chen , Michael Shavit , Vasant Hegde , Tina Zhang , Jason Gunthorpe Subject: [PATCH v9 1/5] iommu/vt-d: Remove mm->pasid in intel_sva_bind_mm() Date: Wed, 18 Oct 2023 13:06:36 +0800 Message-Id: <20231018050640.24936-2-tina.zhang@intel.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20231018050640.24936-1-tina.zhang@intel.com> References: <20231018050640.24936-1-tina.zhang@intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Tue, 17 Oct 2023 22:07:16 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1780068528655627014 X-GMAIL-MSGID: 1780068528655627014 The pasid is passed in as a parameter through .set_dev_pasid() callback. Thus, intel_sva_bind_mm() can directly use it instead of retrieving the pasid value from mm->pasid. Suggested-by: Lu Baolu Reviewed-by: Lu Baolu Reviewed-by: Jason Gunthorpe Signed-off-by: Tina Zhang --- drivers/iommu/intel/svm.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/iommu/intel/svm.c b/drivers/iommu/intel/svm.c index 50a481c895b8..3c531af58658 100644 --- a/drivers/iommu/intel/svm.c +++ b/drivers/iommu/intel/svm.c @@ -290,21 +290,22 @@ static int pasid_to_svm_sdev(struct device *dev, unsigned int pasid, } static int intel_svm_bind_mm(struct intel_iommu *iommu, struct device *dev, - struct mm_struct *mm) + struct iommu_domain *domain, ioasid_t pasid) { struct device_domain_info *info = dev_iommu_priv_get(dev); + struct mm_struct *mm = domain->mm; struct intel_svm_dev *sdev; struct intel_svm *svm; unsigned long sflags; int ret = 0; - svm = pasid_private_find(mm->pasid); + svm = pasid_private_find(pasid); if (!svm) { svm = kzalloc(sizeof(*svm), GFP_KERNEL); if (!svm) return -ENOMEM; - svm->pasid = mm->pasid; + svm->pasid = pasid; svm->mm = mm; INIT_LIST_HEAD_RCU(&svm->devs); @@ -342,7 +343,7 @@ static int intel_svm_bind_mm(struct intel_iommu *iommu, struct device *dev, /* Setup the pasid table: */ sflags = cpu_feature_enabled(X86_FEATURE_LA57) ? PASID_FLAG_FL5LP : 0; - ret = intel_pasid_setup_first_level(iommu, dev, mm->pgd, mm->pasid, + ret = intel_pasid_setup_first_level(iommu, dev, mm->pgd, pasid, FLPT_DEFAULT_DID, sflags); if (ret) goto free_sdev; @@ -356,7 +357,7 @@ static int intel_svm_bind_mm(struct intel_iommu *iommu, struct device *dev, free_svm: if (list_empty(&svm->devs)) { mmu_notifier_unregister(&svm->notifier, mm); - pasid_private_remove(mm->pasid); + pasid_private_remove(pasid); kfree(svm); } @@ -796,9 +797,8 @@ static int intel_svm_set_dev_pasid(struct iommu_domain *domain, { struct device_domain_info *info = dev_iommu_priv_get(dev); struct intel_iommu *iommu = info->iommu; - struct mm_struct *mm = domain->mm; - return intel_svm_bind_mm(iommu, dev, mm); + return intel_svm_bind_mm(iommu, dev, domain, pasid); } static void intel_svm_domain_free(struct iommu_domain *domain) From patchwork Wed Oct 18 05:06:37 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zhang, Tina" X-Patchwork-Id: 154657 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2908:b0:403:3b70:6f57 with SMTP id ib8csp4570781vqb; Tue, 17 Oct 2023 22:07:36 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHBoBeKn1VBrpCbK9xDtKKrM2X7Egnw39zxAMllWEMaCs+neeVsAb03pvQptdRHkQDtZzHV X-Received: by 2002:a17:902:e80c:b0:1c4:1e65:1e5e with SMTP id u12-20020a170902e80c00b001c41e651e5emr4445147plg.0.1697605655809; Tue, 17 Oct 2023 22:07:35 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697605655; cv=none; d=google.com; s=arc-20160816; b=yl09H3QAYxQGP9P4KoM4z5zJW0vsblkAeEvhMqk2lVGQ/v6jQMRqux8iily3ifh3JR 4H79epoGnpyE38hkQ6YF7x4GWdHt5Ot1zSuHHCetb3Ft+UQmqyOOLgKIOpD7PJMbo8LG 4XohZHIjD4y7zGMaQBcSMvwIF325LI4mJPcERkU9Ob5LLFNwaJOihJmo2k2Iei7Eo0/y 5br4ZSbYg8JDyPWNj+5gDdzEDV2ATkAUtlgPPg/MnFW3nkpZEmS0fO3zxgIGkaYEkxKs Ek/h5yNnZwZ6vTV+yiZ4ehyAdMiIFJWuOas4dc4oWYNh8jU8Ocwk/FjNqZpLRtGBbdmX nxZA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=wbarPM7sfVRYX+BXXNqJvfI0piG+eVfAB225FyCjW2s=; fh=dJBxdn+RXcUABM1aUIOqfrsndRxIHilofn8/gNUoPfs=; b=BryTxWk6fNan0ZSCA9Kum8GuXJ8A2lAQ87MRUgT09H/dflG7iuoMr62dO3c69r9Hpo 9beTySwtqw9GJSIhb81z4S9pdenSqu/fiVZs8V6d2leBJJUVK+kFxjZA4M/ftbiX7Gp/ yz2iCG+d2MD7AuksOFbi8Vtc8LeTx164VAXCO9fsQxzlBx8RbcGnM4bRlu8KEFkuNSQL erC9vSZDwZv37XmQK00OLfgq6QlD+HhBqlGlBSzysNNRi1xAx2iKkpYSeYUhboq5hvI0 scMrdN7mmRlXByeVKiZ2KvqZ9P9JrhBsHOYiOt0ACGBEw56hIcsqWTFmqNKHN5JbgT4g wHDw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=httwKBCo; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:8 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from fry.vger.email (fry.vger.email. [2620:137:e000::3:8]) by mx.google.com with ESMTPS id o6-20020a170902d4c600b001ca81fa0661si3451176plg.508.2023.10.17.22.07.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 Oct 2023 22:07:35 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:8 as permitted sender) client-ip=2620:137:e000::3:8; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=httwKBCo; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:8 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by fry.vger.email (Postfix) with ESMTP id 1EECF80FE286; Tue, 17 Oct 2023 22:07:31 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at fry.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229577AbjJRFHO (ORCPT + 23 others); Wed, 18 Oct 2023 01:07:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55060 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229565AbjJRFHK (ORCPT ); Wed, 18 Oct 2023 01:07:10 -0400 Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 526F7A2 for ; Tue, 17 Oct 2023 22:07:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1697605628; x=1729141628; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=TwlWdc8jKkVm/Zmn4ZCqgN7Ast0uvZUB8ihq7Bkxoqg=; b=httwKBConFcSCBGE9Z6XcJbXdfZnqQ6TJSnY9CxDpACKCMFxbFf/F+pi 0E9hL13jsboR7POAfZmFmDIcqkF3BJ+a6k+wiSb6wz43o9W1F/Wm2Ep+9 aQr55x/dGyoBq64690dzxvSnBp3gk4Y0l6r5opylyTSrECHhVdnxPzYwa nAXhHt02TrRKw9FiEfECYi21ApqWb8JkORJvzInV/aOlgkV5hCtf7rviL vPjrqR9y9eHRlu756tBfxEZ+FUSZRVBeL+TkuHYlSZyzk5qvhQ28SVR+7 0CGGz0lDgPdd0fh562e844rE8pLwOozIB1Yn1ZRJViEm15hdAhO3gPfLq Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10866"; a="388802419" X-IronPort-AV: E=Sophos;i="6.03,234,1694761200"; d="scan'208";a="388802419" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Oct 2023 22:07:07 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10866"; a="822288648" X-IronPort-AV: E=Sophos;i="6.03,234,1694761200"; d="scan'208";a="822288648" Received: from sqa-gate.sh.intel.com (HELO spr-2s5.tsp.org) ([10.239.48.212]) by fmsmga008.fm.intel.com with ESMTP; 17 Oct 2023 22:07:04 -0700 From: Tina Zhang To: iommu@lists.linux.dev, linux-kernel@vger.kernel.org Cc: David Woodhouse , Lu Baolu , Joerg Roedel , Will Deacon , Robin Murphy , Jason Gunthorpe , Kevin Tian , Nicolin Chen , Michael Shavit , Vasant Hegde , Tina Zhang , Jason Gunthorpe Subject: [PATCH v9 2/5] iommu: Add mm_get_enqcmd_pasid() helper function Date: Wed, 18 Oct 2023 13:06:37 +0800 Message-Id: <20231018050640.24936-3-tina.zhang@intel.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20231018050640.24936-1-tina.zhang@intel.com> References: <20231018050640.24936-1-tina.zhang@intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on fry.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (fry.vger.email [0.0.0.0]); Tue, 17 Oct 2023 22:07:31 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1780068547912773906 X-GMAIL-MSGID: 1780068547912773906 mm_get_enqcmd_pasid() should be used by architecture code and closely related to learn the PASID value that the x86 ENQCMD operation should use for the mm. For the moment SMMUv3 uses this without any connection to ENQCMD, it will be cleaned up similar to how the prior patch made VT-d use the PASID argument of set_dev_pasid(). The motivation is to replace mm->pasid with an iommu private data structure that is introduced in a later patch. Reviewed-by: Lu Baolu Reviewed-by: Jason Gunthorpe Tested-by: Nicolin Chen Signed-off-by: Tina Zhang --- Change in v7: - Update the commit message. Changes in v6: - Let SMMUv3 call mm_get_enqcmd_pasid(). - Let iommu_sva_get_pasid() call mm_get_enqcmd_pasid(). Change in v2: - Change mm_get_pasid() to mm_get_enqcmd_pasid() arch/x86/kernel/traps.c | 2 +- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c | 14 +++++++------- drivers/iommu/iommu-sva.c | 2 +- include/linux/iommu.h | 12 ++++++++++++ 4 files changed, 21 insertions(+), 9 deletions(-) diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c index c876f1d36a81..832f4413d96a 100644 --- a/arch/x86/kernel/traps.c +++ b/arch/x86/kernel/traps.c @@ -591,7 +591,7 @@ static bool try_fixup_enqcmd_gp(void) if (!mm_valid_pasid(current->mm)) return false; - pasid = current->mm->pasid; + pasid = mm_get_enqcmd_pasid(current->mm); /* * Did this thread already have its PASID activated? diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c index 353248ab18e7..6d9949ce5b32 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c @@ -246,7 +246,7 @@ static void arm_smmu_mm_arch_invalidate_secondary_tlbs(struct mmu_notifier *mn, smmu_domain); } - arm_smmu_atc_inv_domain(smmu_domain, mm->pasid, start, size); + arm_smmu_atc_inv_domain(smmu_domain, mm_get_enqcmd_pasid(mm), start, size); } static void arm_smmu_mm_release(struct mmu_notifier *mn, struct mm_struct *mm) @@ -264,10 +264,10 @@ static void arm_smmu_mm_release(struct mmu_notifier *mn, struct mm_struct *mm) * DMA may still be running. Keep the cd valid to avoid C_BAD_CD events, * but disable translation. */ - arm_smmu_update_ctx_desc_devices(smmu_domain, mm->pasid, &quiet_cd); + arm_smmu_update_ctx_desc_devices(smmu_domain, mm_get_enqcmd_pasid(mm), &quiet_cd); arm_smmu_tlb_inv_asid(smmu_domain->smmu, smmu_mn->cd->asid); - arm_smmu_atc_inv_domain(smmu_domain, mm->pasid, 0, 0); + arm_smmu_atc_inv_domain(smmu_domain, mm_get_enqcmd_pasid(mm), 0, 0); smmu_mn->cleared = true; mutex_unlock(&sva_lock); @@ -325,10 +325,10 @@ arm_smmu_mmu_notifier_get(struct arm_smmu_domain *smmu_domain, spin_lock_irqsave(&smmu_domain->devices_lock, flags); list_for_each_entry(master, &smmu_domain->devices, domain_head) { - ret = arm_smmu_write_ctx_desc(master, mm->pasid, cd); + ret = arm_smmu_write_ctx_desc(master, mm_get_enqcmd_pasid(mm), cd); if (ret) { list_for_each_entry_from_reverse(master, &smmu_domain->devices, domain_head) - arm_smmu_write_ctx_desc(master, mm->pasid, NULL); + arm_smmu_write_ctx_desc(master, mm_get_enqcmd_pasid(mm), NULL); break; } } @@ -358,7 +358,7 @@ static void arm_smmu_mmu_notifier_put(struct arm_smmu_mmu_notifier *smmu_mn) list_del(&smmu_mn->list); - arm_smmu_update_ctx_desc_devices(smmu_domain, mm->pasid, NULL); + arm_smmu_update_ctx_desc_devices(smmu_domain, mm_get_enqcmd_pasid(mm), NULL); /* * If we went through clear(), we've already invalidated, and no @@ -366,7 +366,7 @@ static void arm_smmu_mmu_notifier_put(struct arm_smmu_mmu_notifier *smmu_mn) */ if (!smmu_mn->cleared) { arm_smmu_tlb_inv_asid(smmu_domain->smmu, cd->asid); - arm_smmu_atc_inv_domain(smmu_domain, mm->pasid, 0, 0); + arm_smmu_atc_inv_domain(smmu_domain, mm_get_enqcmd_pasid(mm), 0, 0); } /* Frees smmu_mn */ diff --git a/drivers/iommu/iommu-sva.c b/drivers/iommu/iommu-sva.c index b78671a8a914..4a2f5699747f 100644 --- a/drivers/iommu/iommu-sva.c +++ b/drivers/iommu/iommu-sva.c @@ -141,7 +141,7 @@ u32 iommu_sva_get_pasid(struct iommu_sva *handle) { struct iommu_domain *domain = handle->domain; - return domain->mm->pasid; + return mm_get_enqcmd_pasid(domain->mm); } EXPORT_SYMBOL_GPL(iommu_sva_get_pasid); diff --git a/include/linux/iommu.h b/include/linux/iommu.h index b5b254e205c6..8aa5910190d1 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -1198,6 +1198,12 @@ static inline bool mm_valid_pasid(struct mm_struct *mm) { return mm->pasid != IOMMU_PASID_INVALID; } + +static inline u32 mm_get_enqcmd_pasid(struct mm_struct *mm) +{ + return mm->pasid; +} + void mm_pasid_drop(struct mm_struct *mm); struct iommu_sva *iommu_sva_bind_device(struct device *dev, struct mm_struct *mm); @@ -1220,6 +1226,12 @@ static inline u32 iommu_sva_get_pasid(struct iommu_sva *handle) } static inline void mm_pasid_init(struct mm_struct *mm) {} static inline bool mm_valid_pasid(struct mm_struct *mm) { return false; } + +static inline u32 mm_get_enqcmd_pasid(struct mm_struct *mm) +{ + return IOMMU_PASID_INVALID; +} + static inline void mm_pasid_drop(struct mm_struct *mm) {} #endif /* CONFIG_IOMMU_SVA */ From patchwork Wed Oct 18 05:06:38 2023 Content-Type: text/plain; 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[2620:137:e000::3:7]) by mx.google.com with ESMTPS id w6-20020a656946000000b00589336ba9f7si1327947pgq.822.2023.10.17.22.07.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 Oct 2023 22:07:28 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) client-ip=2620:137:e000::3:7; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=LFP1f7H4; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by snail.vger.email (Postfix) with ESMTP id C4AE9811F114; Tue, 17 Oct 2023 22:07:27 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at snail.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229628AbjJRFHU (ORCPT + 23 others); Wed, 18 Oct 2023 01:07:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55198 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229595AbjJRFHQ (ORCPT ); Wed, 18 Oct 2023 01:07:16 -0400 Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BAC1A103 for ; Tue, 17 Oct 2023 22:07:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1697605631; x=1729141631; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=D8FloSWnsd/4uIpu7aqdGVx2PMFIFcWQFmckzLsY9KE=; b=LFP1f7H44A0P80fp/CcDugVTyNpo2wkD6Ap99VovTLRLQjKzfEnu6nb1 5IhhomA7KHjZ5KkDqp+3NBQ7gNoxjxep4+r8JNYhZHVldafIuCpmZW1oP 1xHf52newRZHeMiJU/NbWHmhkcM1EqRd9909o5yS5bsJNh+goeLA8Tinr U6R+hgse4BeLEqGlPmZCuHKJGk3bWRXFKj6ZB1JMwvcuhUkPKlQk6f3zZ /aNh6RI0qy02GU/rlkH/6kJSXAkOCab/sgDa0GOnjzRQ5gMbFBuULfDhE XahOnpcd+y6FEooh+AqPFMnI1Zie47m+NlCPFJ0MnHI1j5ZOa74nVt/Td w==; X-IronPort-AV: E=McAfee;i="6600,9927,10866"; a="388802436" X-IronPort-AV: E=Sophos;i="6.03,234,1694761200"; d="scan'208";a="388802436" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Oct 2023 22:07:11 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10866"; a="822288653" X-IronPort-AV: E=Sophos;i="6.03,234,1694761200"; d="scan'208";a="822288653" Received: from sqa-gate.sh.intel.com (HELO spr-2s5.tsp.org) ([10.239.48.212]) by fmsmga008.fm.intel.com with ESMTP; 17 Oct 2023 22:07:07 -0700 From: Tina Zhang To: iommu@lists.linux.dev, linux-kernel@vger.kernel.org Cc: David Woodhouse , Lu Baolu , Joerg Roedel , Will Deacon , Robin Murphy , Jason Gunthorpe , Kevin Tian , Nicolin Chen , Michael Shavit , Vasant Hegde , Tina Zhang , Jason Gunthorpe Subject: [PATCH v9 3/5] mm: Add structure to keep sva information Date: Wed, 18 Oct 2023 13:06:38 +0800 Message-Id: <20231018050640.24936-4-tina.zhang@intel.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20231018050640.24936-1-tina.zhang@intel.com> References: <20231018050640.24936-1-tina.zhang@intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Tue, 17 Oct 2023 22:07:27 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1780068540683018134 X-GMAIL-MSGID: 1780068540683018134 Introduce iommu_mm_data structure to keep sva information (pasid and the related sva domains). Add iommu_mm pointer, pointing to an instance of iommu_mm_data structure, to mm. Reviewed-by: Vasant Hegde Reviewed-by: Lu Baolu Reviewed-by: Jason Gunthorpe Tested-by: Nicolin Chen Signed-off-by: Tina Zhang --- include/linux/iommu.h | 5 +++++ include/linux/mm_types.h | 2 ++ 2 files changed, 7 insertions(+) diff --git a/include/linux/iommu.h b/include/linux/iommu.h index 8aa5910190d1..b581d8d02afe 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -679,6 +679,11 @@ struct iommu_sva { struct iommu_domain *domain; }; +struct iommu_mm_data { + u32 pasid; + struct list_head sva_domains; +}; + int iommu_fwspec_init(struct device *dev, struct fwnode_handle *iommu_fwnode, const struct iommu_ops *ops); void iommu_fwspec_free(struct device *dev); diff --git a/include/linux/mm_types.h b/include/linux/mm_types.h index 36c5b43999e6..9f4efed85f74 100644 --- a/include/linux/mm_types.h +++ b/include/linux/mm_types.h @@ -670,6 +670,7 @@ struct mm_cid { #endif struct kioctx_table; +struct iommu_mm_data; struct mm_struct { struct { /* @@ -883,6 +884,7 @@ struct mm_struct { #ifdef CONFIG_IOMMU_SVA u32 pasid; + struct iommu_mm_data *iommu_mm; #endif #ifdef CONFIG_KSM /* From patchwork Wed Oct 18 05:06:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zhang, Tina" X-Patchwork-Id: 154658 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2908:b0:403:3b70:6f57 with SMTP id ib8csp4570835vqb; Tue, 17 Oct 2023 22:07:45 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGnJ4/oX5h5Rg94Hn+Pv+DLh2wxrXCRYq/S7uyVGHwm2BzkJsN6EVjRmCE/h1xCQAWztwH3 X-Received: by 2002:a05:6a20:c182:b0:15a:2c0b:6c81 with SMTP id bg2-20020a056a20c18200b0015a2c0b6c81mr4758031pzb.3.1697605665627; Tue, 17 Oct 2023 22:07:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697605665; cv=none; d=google.com; s=arc-20160816; b=WUEmO7E1cBfwB04I4lnqcVT6a+ypUmpqJhteyWuOW52lgJx6zMb5o/lfpn7mKMSCuK PcKG1cWQK1GSgI9icNzEwBkuwp5OoTeUBmmWpZKdSs5GVtPM9+wTeimEYimOhWqFAJHD XggYGFny1XjT/suG57hi2NNaXSvR+Tl14/C2ttFuVmx6M6sIkeMBpDzYRCaOxJqQgQQg hD5CV/tL0IajnerF6tPeVBCdMawVYEDsYfCekSVYaTWTqfcuww2e5cdCOR+UauojXnTh PgWT3vW/cbHo5E932AEUYss3q8kjhHn/izwvycb4LuQq/+zg71pQkd5lgHUcPmkUmUtx tvyg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=1+TT5RP5EX/DwyLEmKLJxEGn0jtRUfFSBNSon33sOY4=; fh=dJBxdn+RXcUABM1aUIOqfrsndRxIHilofn8/gNUoPfs=; b=F/37+25uiDqy4xiTXWZf1PEmUyDhrNipXOHsY4hO4XLTRxf+fFqBLx+cJuI5lInHs1 UKERIS2mTfD3Ro5j/1ejiuzUFkuKtS6nSEliJr6byx5Kr8baTXmIIOBBKYZ0+rmlgkRC SnKAKhEOU4e/5KH/A8z9zaMRkDPR/HUdGt5MFDy2UsrkXqxYr+l1Efxgy93onV7Hoq30 t8u11/vE9tmIegG1ReybI/z1BjbaE3Ut/gwyXrdcRys7w+2WYklwOptpzmFBdmDWoXKN Ha/BnHYwUCOVy7nKN3kMcmkSi6SaRGdCbJ8XnNY2S0AkxqHpDdayNgddzLBJaluxFRy9 ktkA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=OK2QPaNU; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.38 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from fry.vger.email (fry.vger.email. [23.128.96.38]) by mx.google.com with ESMTPS id b22-20020a631b56000000b00565701e9a36si1296968pgm.752.2023.10.17.22.07.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 Oct 2023 22:07:45 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.38 as permitted sender) client-ip=23.128.96.38; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=OK2QPaNU; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.38 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by fry.vger.email (Postfix) with ESMTP id 8E73A80FE28B; Tue, 17 Oct 2023 22:07:41 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at fry.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229619AbjJRFH1 (ORCPT + 23 others); Wed, 18 Oct 2023 01:07:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55170 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229589AbjJRFHT (ORCPT ); Wed, 18 Oct 2023 01:07:19 -0400 Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5FC82125 for ; Tue, 17 Oct 2023 22:07:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1697605635; x=1729141635; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=tDmJyJhjBuQSywFoox/054jbQJthRVU8wia3hvMQF6c=; b=OK2QPaNUJokpLACiN37L8+wafkq1mgjFJCoLfVYm9SrltdPmNYg/Urrw g5ec7340oY6DJGWIvNUKm+eBXurPVwLHIXHr6UJq0CGHaTGxrq+RBG+KP BKac0JB/+ujhLLOdiwXhkwUk3hJtxK5qT0vPt0fjFyh9kvV1F6zZYxOjy /JVmIqCEePgYnEljgceWsXw3ZUhb2cz8lqoGPiV6dVEmCMPyHjsU9Qv0E WHZqM3J/dYdZ1nMV21A/JAobGBGzBocV2hyVjfxZA1d5/vowSkq20P1dR l2sdsAYiy601jdqb1KLEptpy8nURnltILdrf3DboxU9WUMX0ji0lZIDos g==; X-IronPort-AV: E=McAfee;i="6600,9927,10866"; a="388802452" X-IronPort-AV: E=Sophos;i="6.03,234,1694761200"; d="scan'208";a="388802452" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Oct 2023 22:07:14 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10866"; a="822288658" X-IronPort-AV: E=Sophos;i="6.03,234,1694761200"; d="scan'208";a="822288658" Received: from sqa-gate.sh.intel.com (HELO spr-2s5.tsp.org) ([10.239.48.212]) by fmsmga008.fm.intel.com with ESMTP; 17 Oct 2023 22:07:11 -0700 From: Tina Zhang To: iommu@lists.linux.dev, linux-kernel@vger.kernel.org Cc: David Woodhouse , Lu Baolu , Joerg Roedel , Will Deacon , Robin Murphy , Jason Gunthorpe , Kevin Tian , Nicolin Chen , Michael Shavit , Vasant Hegde , Tina Zhang , Jason Gunthorpe Subject: [PATCH v9 4/5] iommu: Support mm PASID 1:n with sva domains Date: Wed, 18 Oct 2023 13:06:39 +0800 Message-Id: <20231018050640.24936-5-tina.zhang@intel.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20231018050640.24936-1-tina.zhang@intel.com> References: <20231018050640.24936-1-tina.zhang@intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on fry.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (fry.vger.email [0.0.0.0]); Tue, 17 Oct 2023 22:07:41 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1780068558102468006 X-GMAIL-MSGID: 1780068558102468006 Each mm bound to devices gets a PASID and corresponding sva domains allocated in iommu_sva_bind_device(), which are referenced by iommu_mm field of the mm. The PASID is released in __mmdrop(), while a sva domain is released when no one is using it (the reference count is decremented in iommu_sva_unbind_device()). However, although sva domains and their PASID are separate objects such that their own life cycles could be handled independently, an enqcmd use case may require releasing the PASID in releasing the mm (i.e., once a PASID is allocated for a mm, it will be permanently used by the mm and won't be released until the end of mm) and only allows to drop the PASID after the sva domains are released. To this end, mmgrab() is called in iommu_sva_domain_alloc() to increment the mm reference count and mmdrop() is invoked in iommu_domain_free() to decrement the mm reference count. Since the required info of PASID and sva domains is kept in struct iommu_mm_data of a mm, use mm->iommu_mm field instead of the old pasid field in mm struct. The sva domain list is protected by iommu_sva_lock. Besides, this patch removes mm_pasid_init(), as with the introduced iommu_mm structure, initializing mm pasid in mm_init() is unnecessary. Reviewed-by: Lu Baolu Reviewed-by: Vasant Hegde Reviewed-by: Jason Gunthorpe Tested-by: Nicolin Chen Signed-off-by: Tina Zhang --- Change in v7: - Add mm_pasid_init() back and do zeroing mm->iommu_mm pointer in mm_pasid_init() to avoid the use-after-free/double-free problem. Changes in v6: - Rename iommu_sva_alloc_pasid() to iommu_alloc_mm_data(). - Hold the iommu_sva_lock before invoking iommu_alloc_mm_data(). Change in v5: - Use smp_store_release() & READ_ONCE() in storing and loading mm's pasid value. Change in v4: - Rebase to v6.6-rc1. drivers/iommu/iommu-sva.c | 92 +++++++++++++++++++++++---------------- include/linux/iommu.h | 23 ++++++++-- 2 files changed, 74 insertions(+), 41 deletions(-) diff --git a/drivers/iommu/iommu-sva.c b/drivers/iommu/iommu-sva.c index 4a2f5699747f..5175e8d85247 100644 --- a/drivers/iommu/iommu-sva.c +++ b/drivers/iommu/iommu-sva.c @@ -12,32 +12,42 @@ static DEFINE_MUTEX(iommu_sva_lock); /* Allocate a PASID for the mm within range (inclusive) */ -static int iommu_sva_alloc_pasid(struct mm_struct *mm, struct device *dev) +static struct iommu_mm_data *iommu_alloc_mm_data(struct mm_struct *mm, struct device *dev) { + struct iommu_mm_data *iommu_mm; ioasid_t pasid; - int ret = 0; + + lockdep_assert_held(&iommu_sva_lock); if (!arch_pgtable_dma_compat(mm)) - return -EBUSY; + return ERR_PTR(-EBUSY); - mutex_lock(&iommu_sva_lock); + iommu_mm = mm->iommu_mm; /* Is a PASID already associated with this mm? */ - if (mm_valid_pasid(mm)) { - if (mm->pasid >= dev->iommu->max_pasids) - ret = -EOVERFLOW; - goto out; + if (iommu_mm) { + if (iommu_mm->pasid >= dev->iommu->max_pasids) + return ERR_PTR(-EOVERFLOW); + return iommu_mm; } + iommu_mm = kzalloc(sizeof(struct iommu_mm_data), GFP_KERNEL); + if (!iommu_mm) + return ERR_PTR(-ENOMEM); + pasid = iommu_alloc_global_pasid(dev); if (pasid == IOMMU_PASID_INVALID) { - ret = -ENOSPC; - goto out; + kfree(iommu_mm); + return ERR_PTR(-ENOSPC); } - mm->pasid = pasid; - ret = 0; -out: - mutex_unlock(&iommu_sva_lock); - return ret; + iommu_mm->pasid = pasid; + INIT_LIST_HEAD(&iommu_mm->sva_domains); + /* + * Make sure the write to mm->iommu_mm is not reordered in front of + * initialization to iommu_mm fields. If it does, readers may see a + * valid iommu_mm with uninitialized values. + */ + smp_store_release(&mm->iommu_mm, iommu_mm); + return iommu_mm; } /** @@ -58,31 +68,33 @@ static int iommu_sva_alloc_pasid(struct mm_struct *mm, struct device *dev) */ struct iommu_sva *iommu_sva_bind_device(struct device *dev, struct mm_struct *mm) { + struct iommu_mm_data *iommu_mm; struct iommu_domain *domain; struct iommu_sva *handle; int ret; + mutex_lock(&iommu_sva_lock); + /* Allocate mm->pasid if necessary. */ - ret = iommu_sva_alloc_pasid(mm, dev); - if (ret) - return ERR_PTR(ret); + iommu_mm = iommu_alloc_mm_data(mm, dev); + if (IS_ERR(iommu_mm)) { + ret = PTR_ERR(iommu_mm); + goto out_unlock; + } handle = kzalloc(sizeof(*handle), GFP_KERNEL); - if (!handle) - return ERR_PTR(-ENOMEM); - - mutex_lock(&iommu_sva_lock); - /* Search for an existing domain. */ - domain = iommu_get_domain_for_dev_pasid(dev, mm->pasid, - IOMMU_DOMAIN_SVA); - if (IS_ERR(domain)) { - ret = PTR_ERR(domain); + if (!handle) { + ret = -ENOMEM; goto out_unlock; } - if (domain) { - domain->users++; - goto out; + /* Search for an existing domain. */ + list_for_each_entry(domain, &mm->iommu_mm->sva_domains, next) { + ret = iommu_attach_device_pasid(domain, dev, iommu_mm->pasid); + if (!ret) { + domain->users++; + goto out; + } } /* Allocate a new domain and set it on device pasid. */ @@ -92,23 +104,23 @@ struct iommu_sva *iommu_sva_bind_device(struct device *dev, struct mm_struct *mm goto out_unlock; } - ret = iommu_attach_device_pasid(domain, dev, mm->pasid); + ret = iommu_attach_device_pasid(domain, dev, iommu_mm->pasid); if (ret) goto out_free_domain; domain->users = 1; + list_add(&domain->next, &mm->iommu_mm->sva_domains); + out: mutex_unlock(&iommu_sva_lock); handle->dev = dev; handle->domain = domain; - return handle; out_free_domain: iommu_domain_free(domain); + kfree(handle); out_unlock: mutex_unlock(&iommu_sva_lock); - kfree(handle); - return ERR_PTR(ret); } EXPORT_SYMBOL_GPL(iommu_sva_bind_device); @@ -124,12 +136,13 @@ EXPORT_SYMBOL_GPL(iommu_sva_bind_device); void iommu_sva_unbind_device(struct iommu_sva *handle) { struct iommu_domain *domain = handle->domain; - ioasid_t pasid = domain->mm->pasid; + struct iommu_mm_data *iommu_mm = domain->mm->iommu_mm; struct device *dev = handle->dev; mutex_lock(&iommu_sva_lock); + iommu_detach_device_pasid(domain, dev, iommu_mm->pasid); if (--domain->users == 0) { - iommu_detach_device_pasid(domain, dev, pasid); + list_del(&domain->next); iommu_domain_free(domain); } mutex_unlock(&iommu_sva_lock); @@ -205,8 +218,11 @@ iommu_sva_handle_iopf(struct iommu_fault *fault, void *data) void mm_pasid_drop(struct mm_struct *mm) { - if (likely(!mm_valid_pasid(mm))) + struct iommu_mm_data *iommu_mm = mm->iommu_mm; + + if (!iommu_mm) return; - iommu_free_global_pasid(mm->pasid); + iommu_free_global_pasid(iommu_mm->pasid); + kfree(iommu_mm); } diff --git a/include/linux/iommu.h b/include/linux/iommu.h index b581d8d02afe..51ab4859bbc4 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -113,6 +113,11 @@ struct iommu_domain { struct { /* IOMMU_DOMAIN_SVA */ struct mm_struct *mm; int users; + /* + * Next iommu_domain in mm->iommu_mm->sva-domains list + * protected by iommu_sva_lock. + */ + struct list_head next; }; }; }; @@ -1197,16 +1202,28 @@ static inline bool tegra_dev_iommu_get_stream_id(struct device *dev, u32 *stream #ifdef CONFIG_IOMMU_SVA static inline void mm_pasid_init(struct mm_struct *mm) { - mm->pasid = IOMMU_PASID_INVALID; + /* + * During dup_mm(), a new mm will be memcpy'd from an old one and that makes + * the new mm and the old one point to a same iommu_mm instance. When either + * one of the two mms gets released, the iommu_mm instance is freed, leaving + * the other mm running into a use-after-free/double-free problem. To avoid + * the problem, zeroing the iommu_mm pointer of a new mm is needed here. + */ + mm->iommu_mm = NULL; } + static inline bool mm_valid_pasid(struct mm_struct *mm) { - return mm->pasid != IOMMU_PASID_INVALID; + return READ_ONCE(mm->iommu_mm); } static inline u32 mm_get_enqcmd_pasid(struct mm_struct *mm) { - return mm->pasid; + struct iommu_mm_data *iommu_mm = READ_ONCE(mm->iommu_mm); + + if (!iommu_mm) + return IOMMU_PASID_INVALID; + return iommu_mm->pasid; } void mm_pasid_drop(struct mm_struct *mm); From patchwork Wed Oct 18 05:06:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zhang, Tina" X-Patchwork-Id: 154659 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2908:b0:403:3b70:6f57 with SMTP id ib8csp4570843vqb; Tue, 17 Oct 2023 22:07:47 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHVZrThTXw+GwxfYA9ZekYsur8Tdg+3NQjkA2HzBEF/CE3sC9DhANx4HjDrZ9h4C7Adyk7H X-Received: by 2002:a17:903:334c:b0:1c7:5581:f9c with SMTP id ka12-20020a170903334c00b001c755810f9cmr4319824plb.0.1697605667309; Tue, 17 Oct 2023 22:07:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697605667; cv=none; d=google.com; s=arc-20160816; b=GW8FOUrMxTxZsMOUKM0t61Tb0BEvu3U4xxsnRgdgJfzwhU/7P+r9/oZ3tlyjamzm69 eG/oi131eD5CN1hkh/1pFD7UdZkschAD3x+Poid1l4abcKYKpvbJJpZz2/3IZ0jtfntF 4UaPUnlXyPtQ4ywJk/cWz83Q9n2l712Su94Q7uMunhHrmtcQuHDQgH5gYv9rGiu2V7q3 s9pyV5ZpVmOH8MQo9RWjnvIo50406Rj1JnKqJoA589t1AQ2X6eRrAgZuvdIMCxZZAUaF oFtpUfPx8a8UqKgSijl/XfAW7zaNuEpw7f6+u25QcmSg2Bem+qSs27fGokEXZWyXPi4O hT4w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=nxJodcD0A/BVNjC5Ms8LFReraPUssM65AtJgITza2eY=; fh=dJBxdn+RXcUABM1aUIOqfrsndRxIHilofn8/gNUoPfs=; b=EjLA1PUWz3z3QEC2T142XwfNnWoKadCD5d4Q5VwH5US0JFHlhi6dMdHAaJ/W925+y1 WF7EgiSdcqu+n/uevTgaKqww3AwxAN3t+m4wcQwlze390CGYwjD1uVu5ZfSgl43xBLhe toxt5A/p3FkwnX9o8XTtp21R2r63Zb9B9GJwaVgzap7YLW/KgRJR4INSdccDCeAreHvK bqB3gIXWgpEgnIa2lffpdvd+9ATtKz2SoreK+hSvjW79Dzv3+eXcKN6Z2t+Sm0cqWuxc WjRw0OjugwMQ66Mk7LnJzVA1zGmtLJDLZI8WU4Jm9uOsPDZK0e4KwqxMi6+i5YBD0eK/ ngQw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=NeSSJPoy; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.32 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from agentk.vger.email (agentk.vger.email. [23.128.96.32]) by mx.google.com with ESMTPS id k14-20020a170902c40e00b001ca3cd7ead6si3574849plk.452.2023.10.17.22.07.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 Oct 2023 22:07:47 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.32 as permitted sender) client-ip=23.128.96.32; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=NeSSJPoy; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.32 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by agentk.vger.email (Postfix) with ESMTP id 5CEF28025888; Tue, 17 Oct 2023 22:07:45 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at agentk.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229550AbjJRFHf (ORCPT + 23 others); Wed, 18 Oct 2023 01:07:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60942 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229612AbjJRFHX (ORCPT ); Wed, 18 Oct 2023 01:07:23 -0400 Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EB1EE12E for ; Tue, 17 Oct 2023 22:07:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1697605638; x=1729141638; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=/TKSJz2uqhYSu+kqp+Wq9KnZNxzR/1bl8TV8gHaytgw=; b=NeSSJPoygpoqFzxY+pld34MuEcFOUqPuL63AGcD8q1nwEfaqo1wBChVi KtvRABzF3AklAZP8lnpEIWrj0mqBk5Tg1BFGwukbsuG+Fb4OFyJzeQQny n66orOJyzIb+ukf9o5lM8KrYBLRNZEvgot2qmoQhY8p66mjG4zI949e0V fw6s4rTEB9Orsr6K+LlqdrBRjxZFANV1+tn1S4nc3lBQe4sHgO2eD6cQt nPbGJv22WG7zreJ0gF/txsViHMoN7UREG1wXYJHt1Srqd3aT4tmr1xDOP IPj331YcZXW+G69n7GpUbVG1HaWFjB4C23oXIiKeeoI7noxyzAx9J/jCt Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10866"; a="388802468" X-IronPort-AV: E=Sophos;i="6.03,234,1694761200"; d="scan'208";a="388802468" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Oct 2023 22:07:18 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10866"; a="822288667" X-IronPort-AV: E=Sophos;i="6.03,234,1694761200"; d="scan'208";a="822288667" Received: from sqa-gate.sh.intel.com (HELO spr-2s5.tsp.org) ([10.239.48.212]) by fmsmga008.fm.intel.com with ESMTP; 17 Oct 2023 22:07:15 -0700 From: Tina Zhang To: iommu@lists.linux.dev, linux-kernel@vger.kernel.org Cc: David Woodhouse , Lu Baolu , Joerg Roedel , Will Deacon , Robin Murphy , Jason Gunthorpe , Kevin Tian , Nicolin Chen , Michael Shavit , Vasant Hegde , Tina Zhang , Jason Gunthorpe Subject: [PATCH v9 5/5] mm: Deprecate pasid field Date: Wed, 18 Oct 2023 13:06:40 +0800 Message-Id: <20231018050640.24936-6-tina.zhang@intel.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20231018050640.24936-1-tina.zhang@intel.com> References: <20231018050640.24936-1-tina.zhang@intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on agentk.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (agentk.vger.email [0.0.0.0]); Tue, 17 Oct 2023 22:07:45 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1780068560165343396 X-GMAIL-MSGID: 1780068560165343396 Drop the pasid field, as all the information needed for sva domain management has been moved to the newly added iommu_mm field. Reviewed-by: Lu Baolu Reviewed-by: Vasant Hegde Reviewed-by: Jason Gunthorpe Signed-off-by: Tina Zhang --- include/linux/mm_types.h | 1 - mm/init-mm.c | 3 --- 2 files changed, 4 deletions(-) diff --git a/include/linux/mm_types.h b/include/linux/mm_types.h index 9f4efed85f74..37f049c4b059 100644 --- a/include/linux/mm_types.h +++ b/include/linux/mm_types.h @@ -883,7 +883,6 @@ struct mm_struct { struct work_struct async_put_work; #ifdef CONFIG_IOMMU_SVA - u32 pasid; struct iommu_mm_data *iommu_mm; #endif #ifdef CONFIG_KSM diff --git a/mm/init-mm.c b/mm/init-mm.c index cfd367822cdd..24c809379274 100644 --- a/mm/init-mm.c +++ b/mm/init-mm.c @@ -44,9 +44,6 @@ struct mm_struct init_mm = { #endif .user_ns = &init_user_ns, .cpu_bitmap = CPU_BITS_NONE, -#ifdef CONFIG_IOMMU_SVA - .pasid = IOMMU_PASID_INVALID, -#endif INIT_MM_CONTEXT(init_mm) };