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Tue, 17 Oct 2023 09:43:04 -0500 From: Suravee Suthikulpanit To: , CC: , , , , , , , , , Suravee Suthikulpanit Subject: [PATCH] iommu/amd: Do not flush IRTE when only updating isRun and destination fields Date: Tue, 17 Oct 2023 09:42:36 -0500 Message-ID: <20231017144236.8287-1-suravee.suthikulpanit@amd.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF000015CD:EE_|MN2PR12MB4504:EE_ X-MS-Office365-Filtering-Correlation-Id: 8e3963d8-eff9-420e-7711-08dbcf1f5f69 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 0PsTMrDY3YCztXSQyCKk821fAt7/QieMbcHhMrFRf936zQOP4tDgWus8OJsZIVhXxulQznqr1VVmBAld3zqletgp/1MXYD3/h7lBN/XMiwLNB+MICC2c76hJtRmE4YKYeNVKNMOIPzS4E4OQzThDB0/VVb0ASYqHnoqdee4dG7MIZV+mNpgCneU9ZCl3Zr4VJGSS9EyAr/rZDdx6NazkyQ9hUbWhDIoW+FGWy+zMnq9+LvictuOyfRaZt7cCIBkF4rV+kU1bWThS1o2pWrA32UMVDnAzswPpNlWDlqpFA2E5Ty6OiMDWYbOK/4ZMvQnonLqVq5PNnCz7ZnxZk07BdWoFTU/wkiIjHMV2lXPnOCwPnCN+5xGogYs2toAPAiwb+LezaV/LXdExAH5DkDod6BB+v/exZGkOlPj2/8yGzRllXHMaoPSE/ZvHU9KSMM8W2k/C9RT2Vq1VhgI9HH8vB0E/sgJI8YwF/WUxcoEv6GXRcSWH5i0IQs7+HEkLR9+dqVik1pspQLssOdeqPZPD4AV8ftq9pQWpETn5/yJPX/YI3iJvt8DsW9xv697dpzC95Xn0qkSJSQ0ZSsU39c5vj83TXOtuoZgwqvsASFFR98a1P7Sy7WKJEJeZ+neB2iiF4fbPs58Fpk9brwWIKOTu0J7B2WmUWrbKht1mGmLhzjnK8E2+MCP82NQ9+RcOmxV2LDUMdzAO70GsXhP2p2lmtTWoUlgSjtWYSy8xgPlhpoAePqxAKS3aKqwZenMEglc3 X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(4636009)(136003)(39860400002)(396003)(346002)(376002)(230922051799003)(1800799009)(451199024)(186009)(64100799003)(82310400011)(46966006)(36840700001)(40470700004)(86362001)(41300700001)(44832011)(36860700001)(47076005)(7696005)(5660300002)(83380400001)(8936002)(4326008)(8676002)(2906002)(70586007)(70206006)(36756003)(356005)(316002)(336012)(110136005)(54906003)(426003)(1076003)(2616005)(81166007)(40480700001)(16526019)(82740400003)(26005)(40460700003)(966005)(6666004)(478600001)(36900700001);DIR:OUT;SFP:1101; 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Tue, 17 Oct 2023 07:43:24 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1780014180286894681 X-GMAIL-MSGID: 1780014180286894681 According to the recent update in the AMD IOMMU spec [1], the IsRun and Destination fields of the Interrupt Remapping Table Entry (IRTE) are not cached by the IOMMU hardware. Therefore, do not issue the INVALIDATE_INTERRUPT_TABLE command when updating IRTE[IsRun] and IRTE[Destination] when IRTE[GuestMode]=1, which should help improve IOMMU AVIC/x2AVIC performance. References: [1] AMD IOMMU Spec Revision (Rev 3.08-PUB) (Link: https://www.amd.com/content/dam/amd/en/documents/processor-tech-docs/specifications/48882_IOMMU.pdf) Cc: Joao Martins Cc: Alejandro Jimenez Signed-off-by: Suravee Suthikulpanit Reviewed-by: Vasant Hegde Tested-by: Alejandro Jimenez --- drivers/iommu/amd/iommu.c | 20 ++++++++++++++++---- 1 file changed, 16 insertions(+), 4 deletions(-) diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c index 089886485895..d63590563d3e 100644 --- a/drivers/iommu/amd/iommu.c +++ b/drivers/iommu/amd/iommu.c @@ -2970,8 +2970,8 @@ static int alloc_irq_index(struct amd_iommu *iommu, u16 devid, int count, return index; } -static int modify_irte_ga(struct amd_iommu *iommu, u16 devid, int index, - struct irte_ga *irte) +static int __modify_irte_ga(struct amd_iommu *iommu, u16 devid, int index, + struct irte_ga *irte) { struct irq_remap_table *table; struct irte_ga *entry; @@ -2998,6 +2998,18 @@ static int modify_irte_ga(struct amd_iommu *iommu, u16 devid, int index, raw_spin_unlock_irqrestore(&table->lock, flags); + return 0; +} + +static int modify_irte_ga(struct amd_iommu *iommu, u16 devid, int index, + struct irte_ga *irte) +{ + bool ret; + + ret = __modify_irte_ga(iommu, devid, index, irte); + if (ret) + return ret; + iommu_flush_irt_and_complete(iommu, devid); return 0; @@ -3681,8 +3693,8 @@ int amd_iommu_update_ga(int cpu, bool is_run, void *data) } entry->lo.fields_vapic.is_run = is_run; - return modify_irte_ga(ir_data->iommu, ir_data->irq_2_irte.devid, - ir_data->irq_2_irte.index, entry); + return __modify_irte_ga(ir_data->iommu, ir_data->irq_2_irte.devid, + ir_data->irq_2_irte.index, entry); } EXPORT_SYMBOL(amd_iommu_update_ga); #endif