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Tue, 17 Oct 2023 03:11:31 +0000 Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 39H3BRkU012885 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 17 Oct 2023 03:11:27 GMT Received: from hu-bjorande-lv.qualcomm.com (10.49.16.6) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.39; Mon, 16 Oct 2023 20:11:26 -0700 From: Bjorn Andersson Date: Mon, 16 Oct 2023 20:11:09 -0700 Subject: [PATCH 01/12] dt-bindings: usb: qcom,dwc3: Add qcom,sc8180x-dwc3 MIME-Version: 1.0 Message-ID: <20231016-dwc3-refactor-v1-1-ab4a84165470@quicinc.com> References: <20231016-dwc3-refactor-v1-0-ab4a84165470@quicinc.com> In-Reply-To: <20231016-dwc3-refactor-v1-0-ab4a84165470@quicinc.com> To: Bjorn Andersson , Konrad Dybcio , Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Wesley Cheng , Thinh Nguyen , Felipe Balbi , Philipp Zabel CC: , , , , Johan Hovold , Krishna Kurapati PSSNV , "Bjorn Andersson" X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; 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Mon, 16 Oct 2023 20:13:13 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779970758389921600 X-GMAIL-MSGID: 1779970758389921600 Add the missing compatible for the SC8180X DWC3 glue binding. Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/usb/qcom,dwc3.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml index 51a5581ce692..727abe41c422 100644 --- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml @@ -29,6 +29,7 @@ properties: - qcom,sa8775p-dwc3 - qcom,sc7180-dwc3 - qcom,sc7280-dwc3 + - qcom,sc8180x-dwc3 - qcom,sc8280xp-dwc3 - qcom,sc8280xp-dwc3-mp - qcom,sdm660-dwc3 @@ -314,6 +315,7 @@ allOf: contains: enum: - qcom,qcm2290-dwc3 + - qcom,sc8180x-dwc3 - qcom,sm6115-dwc3 - qcom,sm6125-dwc3 - qcom,sm8150-dwc3 @@ -366,6 +368,7 @@ allOf: - qcom,msm8994-dwc3 - qcom,qcs404-dwc3 - qcom,sc7180-dwc3 + - qcom,sc8180x-dwc3 - qcom,sdm670-dwc3 - qcom,sdm845-dwc3 - qcom,sdx55-dwc3 From patchwork Tue Oct 17 03:11:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 153869 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2908:b0:403:3b70:6f57 with SMTP id ib8csp3869261vqb; Mon, 16 Oct 2023 20:12:34 -0700 (PDT) X-Google-Smtp-Source: AGHT+IF28g4eqdoS8VwPTflLyWtu9tjcmqFK72rjle5oQ2O8LAah3FpgCyfCt+Fexd9ZDi+0IB1q X-Received: by 2002:a05:6a20:d80d:b0:163:ab09:193e with SMTP id iv13-20020a056a20d80d00b00163ab09193emr985226pzb.1.1697512354255; Mon, 16 Oct 2023 20:12:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697512354; cv=none; d=google.com; s=arc-20160816; b=F6FXeD+M/ft79R/ZYfGsqGTlop9ImrMcvdBZBZKo+ACCDtSYclnEj3hKQKu3bWxKiX b88zmXjUm4JLOJN2lzGKpfEieOIaNXLTyx8VDfIeV2/Na+Z4g37fxeqtIvOMTYqPMXqe vgSA/mcltiOze/9W+5zFZt+q8kYIYAVWfLV4iLA5ER8PYAQKHs5cT+qhE7Tvr9ec728l 84VTlN81AJzCY0kMl7NBGvhztlQbt6FM1G8iW0C6+v+yfYX9OgdM+/F4cQCc9UH1vlQz ylNPOl0VZBl+P2iVWuAtxl7YqTyRfEW256DW+WLuTYmax9LDdAVkmsHMHM0uVumbBj13 tknw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=fyPGAmgz8ro8JypxxMa1lsplEbutTRleN+Fq64X2rA4=; fh=yZ2owId4ryp9GLJ5ubSP1PQtd6LUH0AGZACw+F4ReGw=; b=PRyqwjsZOyh4a9sS2uh/3Zj9hJZ/tmFTOgBCVWOaFkuA71rdIEiwCkqfuNo8RD4cB8 9FD05igCqZipB+jMW/gQeEeFb5Rq5Y33Y6WSdGMHZtU+xn/NZEchfGfeKFygIpT8dKR5 VI8mncc+AO2sKSSkVSlT5/lAd3pVHDUE2PxXEVbt3EzUw3+6ePtXKEEiXPlcU1WhMFbp 1F7pKnh5Ic9a0606tw5R1b/kPu6S2RC+FcZCpOWDefp5yJPTTI8kd724w7bYvml70m0/ 7uJKMQFt76PwYmfKUqT2BbB24gk/TvV332k7e3KnKYGag0P8ubbVjZ0rq5txVbA2PNl+ LbXw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=OpTCSNHH; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.36 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from pete.vger.email (pete.vger.email. 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Tue, 17 Oct 2023 03:11:28 +0000 Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 39H3BRNd024762 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 17 Oct 2023 03:11:27 GMT Received: from hu-bjorande-lv.qualcomm.com (10.49.16.6) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.39; Mon, 16 Oct 2023 20:11:26 -0700 From: Bjorn Andersson Date: Mon, 16 Oct 2023 20:11:10 -0700 Subject: [PATCH 02/12] usb: dwc3: qcom: Rename dwc3 platform_device reference MIME-Version: 1.0 Message-ID: <20231016-dwc3-refactor-v1-2-ab4a84165470@quicinc.com> References: <20231016-dwc3-refactor-v1-0-ab4a84165470@quicinc.com> In-Reply-To: <20231016-dwc3-refactor-v1-0-ab4a84165470@quicinc.com> To: Bjorn Andersson , Konrad Dybcio , Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Wesley Cheng , Thinh Nguyen , Felipe Balbi , Philipp Zabel CC: , , , , Johan Hovold , Krishna Kurapati PSSNV , "Bjorn Andersson" X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; 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Mon, 16 Oct 2023 20:12:30 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779970714068283487 X-GMAIL-MSGID: 1779970714068283487 In preparation for the introduction of a direct reference to the struct dwc3 in the dwc3_qcom struct, rename the generically named "dwc3" to reduce the risk for confusion. No functional change. Signed-off-by: Bjorn Andersson Reviewed-by: Konrad Dybcio --- drivers/usb/dwc3/dwc3-qcom.c | 46 ++++++++++++++++++++++---------------------- 1 file changed, 23 insertions(+), 23 deletions(-) diff --git a/drivers/usb/dwc3/dwc3-qcom.c b/drivers/usb/dwc3/dwc3-qcom.c index 3de43df6bbe8..a31c3bc1f56e 100644 --- a/drivers/usb/dwc3/dwc3-qcom.c +++ b/drivers/usb/dwc3/dwc3-qcom.c @@ -67,7 +67,7 @@ struct dwc3_acpi_pdata { struct dwc3_qcom { struct device *dev; void __iomem *qscratch_base; - struct platform_device *dwc3; + struct platform_device *dwc_dev; struct platform_device *urs_usb; struct clk **clks; int num_clocks; @@ -264,7 +264,7 @@ static int dwc3_qcom_interconnect_init(struct dwc3_qcom *qcom) goto put_path_ddr; } - max_speed = usb_get_maximum_speed(&qcom->dwc3->dev); + max_speed = usb_get_maximum_speed(&qcom->dwc_dev->dev); if (max_speed >= USB_SPEED_SUPER || max_speed == USB_SPEED_UNKNOWN) { ret = icc_set_bw(qcom->icc_path_ddr, USB_MEMORY_AVG_SS_BW, USB_MEMORY_PEAK_SS_BW); @@ -312,7 +312,7 @@ static bool dwc3_qcom_is_host(struct dwc3_qcom *qcom) /* * FIXME: Fix this layering violation. */ - dwc = platform_get_drvdata(qcom->dwc3); + dwc = platform_get_drvdata(qcom->dwc_dev); /* Core driver may not have probed yet. */ if (!dwc) @@ -323,7 +323,7 @@ static bool dwc3_qcom_is_host(struct dwc3_qcom *qcom) static enum usb_device_speed dwc3_qcom_read_usb2_speed(struct dwc3_qcom *qcom) { - struct dwc3 *dwc = platform_get_drvdata(qcom->dwc3); + struct dwc3 *dwc = platform_get_drvdata(qcom->dwc_dev); struct usb_device *udev; struct usb_hcd __maybe_unused *hcd; @@ -486,7 +486,7 @@ static int dwc3_qcom_resume(struct dwc3_qcom *qcom, bool wakeup) static irqreturn_t qcom_dwc3_resume_irq(int irq, void *data) { struct dwc3_qcom *qcom = data; - struct dwc3 *dwc = platform_get_drvdata(qcom->dwc3); + struct dwc3 *dwc = platform_get_drvdata(qcom->dwc_dev); /* If pm_suspended then let pm_resume take care of resuming h/w */ if (qcom->pm_suspended) @@ -672,19 +672,19 @@ static int dwc3_qcom_acpi_register_core(struct platform_device *pdev) int irq; int ret; - qcom->dwc3 = platform_device_alloc("dwc3", PLATFORM_DEVID_AUTO); - if (!qcom->dwc3) + qcom->dwc_dev = platform_device_alloc("dwc3", PLATFORM_DEVID_AUTO); + if (!qcom->dwc_dev) return -ENOMEM; - qcom->dwc3->dev.parent = dev; - qcom->dwc3->dev.type = dev->type; - qcom->dwc3->dev.dma_mask = dev->dma_mask; - qcom->dwc3->dev.dma_parms = dev->dma_parms; - qcom->dwc3->dev.coherent_dma_mask = dev->coherent_dma_mask; + qcom->dwc_dev->dev.parent = dev; + qcom->dwc_dev->dev.type = dev->type; + qcom->dwc_dev->dev.dma_mask = dev->dma_mask; + qcom->dwc_dev->dev.dma_parms = dev->dma_parms; + qcom->dwc_dev->dev.coherent_dma_mask = dev->coherent_dma_mask; child_res = kcalloc(2, sizeof(*child_res), GFP_KERNEL); if (!child_res) { - platform_device_put(qcom->dwc3); + platform_device_put(qcom->dwc_dev); return -ENOMEM; } @@ -708,29 +708,29 @@ static int dwc3_qcom_acpi_register_core(struct platform_device *pdev) child_res[1].flags = IORESOURCE_IRQ; child_res[1].start = child_res[1].end = irq; - ret = platform_device_add_resources(qcom->dwc3, child_res, 2); + ret = platform_device_add_resources(qcom->dwc_dev, child_res, 2); if (ret) { dev_err(&pdev->dev, "failed to add resources\n"); goto out; } - ret = device_add_software_node(&qcom->dwc3->dev, &dwc3_qcom_swnode); + ret = device_add_software_node(&qcom->dwc_dev->dev, &dwc3_qcom_swnode); if (ret < 0) { dev_err(&pdev->dev, "failed to add properties\n"); goto out; } - ret = platform_device_add(qcom->dwc3); + ret = platform_device_add(qcom->dwc_dev); if (ret) { dev_err(&pdev->dev, "failed to add device\n"); - device_remove_software_node(&qcom->dwc3->dev); + device_remove_software_node(&qcom->dwc_dev->dev); goto out; } kfree(child_res); return 0; out: - platform_device_put(qcom->dwc3); + platform_device_put(qcom->dwc_dev); kfree(child_res); return ret; } @@ -754,8 +754,8 @@ static int dwc3_qcom_of_register_core(struct platform_device *pdev) goto node_put; } - qcom->dwc3 = of_find_device_by_node(dwc3_np); - if (!qcom->dwc3) { + qcom->dwc_dev = of_find_device_by_node(dwc3_np); + if (!qcom->dwc_dev) { ret = -ENODEV; dev_err(dev, "failed to get dwc3 platform device\n"); } @@ -906,7 +906,7 @@ static int dwc3_qcom_probe(struct platform_device *pdev) if (ret) goto depopulate; - qcom->mode = usb_get_dr_mode(&qcom->dwc3->dev); + qcom->mode = usb_get_dr_mode(&qcom->dwc_dev->dev); /* enable vbus override for device mode */ if (qcom->mode != USB_DR_MODE_HOST) @@ -919,7 +919,7 @@ static int dwc3_qcom_probe(struct platform_device *pdev) wakeup_source = of_property_read_bool(dev->of_node, "wakeup-source"); device_init_wakeup(&pdev->dev, wakeup_source); - device_init_wakeup(&qcom->dwc3->dev, wakeup_source); + device_init_wakeup(&qcom->dwc_dev->dev, wakeup_source); qcom->is_suspended = false; pm_runtime_set_active(dev); @@ -953,7 +953,7 @@ static void dwc3_qcom_remove(struct platform_device *pdev) struct device *dev = &pdev->dev; int i; - device_remove_software_node(&qcom->dwc3->dev); + device_remove_software_node(&qcom->dwc_dev->dev); if (np) of_platform_depopulate(&pdev->dev); else From patchwork Tue Oct 17 03:11:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 153868 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2908:b0:403:3b70:6f57 with SMTP id ib8csp3869197vqb; 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Tue, 17 Oct 2023 03:11:28 +0000 Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 39H3BR69012888 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 17 Oct 2023 03:11:27 GMT Received: from hu-bjorande-lv.qualcomm.com (10.49.16.6) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.39; Mon, 16 Oct 2023 20:11:27 -0700 From: Bjorn Andersson Date: Mon, 16 Oct 2023 20:11:11 -0700 Subject: [PATCH 03/12] usb: dwc3: qcom: Merge resources from urs_usb device MIME-Version: 1.0 Message-ID: <20231016-dwc3-refactor-v1-3-ab4a84165470@quicinc.com> References: <20231016-dwc3-refactor-v1-0-ab4a84165470@quicinc.com> In-Reply-To: <20231016-dwc3-refactor-v1-0-ab4a84165470@quicinc.com> To: Bjorn Andersson , Konrad Dybcio , Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Wesley Cheng , Thinh Nguyen , Felipe Balbi , Philipp Zabel CC: , , , , Johan Hovold , Krishna Kurapati PSSNV , "Bjorn Andersson" X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; 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Mon, 16 Oct 2023 20:12:22 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779970705123793472 X-GMAIL-MSGID: 1779970705123793472 With some ACPI DSDT tables, such as the one found in SC8180X devices, the USB resources are split between the URSn and it's child USBn device nodes, in particular the interrupts are placed in the child nodes. The solution that was chosen for handling this is to allocate a platform_device from the child node and selectively pick interrupts from the main platform_device, or from this created child device, when creating the platform_device for the DWC3 core. This does however not work with the upcoming change where the DWC3 core is instantiated from the same platform_device as the glue, as the DRD and host code will attempt to resolve their interrupts from the shared device, and not the child device. Work around this by merging the resources of the child device into the glue device node, to present a single platform_device with all the resources necessary. Signed-off-by: Bjorn Andersson --- drivers/usb/dwc3/dwc3-qcom.c | 82 ++++++++++++++++++++++++++++++-------------- 1 file changed, 56 insertions(+), 26 deletions(-) diff --git a/drivers/usb/dwc3/dwc3-qcom.c b/drivers/usb/dwc3/dwc3-qcom.c index a31c3bc1f56e..7c810712d246 100644 --- a/drivers/usb/dwc3/dwc3-qcom.c +++ b/drivers/usb/dwc3/dwc3-qcom.c @@ -68,7 +68,6 @@ struct dwc3_qcom { struct device *dev; void __iomem *qscratch_base; struct platform_device *dwc_dev; - struct platform_device *urs_usb; struct clk **clks; int num_clocks; struct reset_control *resets; @@ -522,15 +521,13 @@ static void dwc3_qcom_select_utmi_clk(struct dwc3_qcom *qcom) static int dwc3_qcom_get_irq(struct platform_device *pdev, const char *name, int num) { - struct dwc3_qcom *qcom = platform_get_drvdata(pdev); - struct platform_device *pdev_irq = qcom->urs_usb ? qcom->urs_usb : pdev; struct device_node *np = pdev->dev.of_node; int ret; if (np) - ret = platform_get_irq_byname_optional(pdev_irq, name); + ret = platform_get_irq_byname_optional(pdev, name); else - ret = platform_get_irq_optional(pdev_irq, num); + ret = platform_get_irq_optional(pdev, num); return ret; } @@ -667,8 +664,6 @@ static int dwc3_qcom_acpi_register_core(struct platform_device *pdev) struct dwc3_qcom *qcom = platform_get_drvdata(pdev); struct device *dev = &pdev->dev; struct resource *res, *child_res = NULL; - struct platform_device *pdev_irq = qcom->urs_usb ? qcom->urs_usb : - pdev; int irq; int ret; @@ -700,7 +695,7 @@ static int dwc3_qcom_acpi_register_core(struct platform_device *pdev) child_res[0].end = child_res[0].start + qcom->acpi_pdata->dwc3_core_base_size; - irq = platform_get_irq(pdev_irq, 0); + irq = platform_get_irq(pdev, 0); if (irq < 0) { ret = irq; goto out; @@ -766,31 +761,72 @@ static int dwc3_qcom_of_register_core(struct platform_device *pdev) return ret; } -static struct platform_device * -dwc3_qcom_create_urs_usb_platdev(struct device *dev) +static int dwc3_qcom_acpi_merge_urs_resources(struct platform_device *pdev) { + struct device *dev = &pdev->dev; + struct list_head resource_list; + struct resource_entry *rentry; + struct resource *resources; struct fwnode_handle *fwh; struct acpi_device *adev; char name[8]; + int count; int ret; int id; + int i; /* Figure out device id */ ret = sscanf(fwnode_get_name(dev->fwnode), "URS%d", &id); if (!ret) - return NULL; + return -EINVAL; /* Find the child using name */ snprintf(name, sizeof(name), "USB%d", id); fwh = fwnode_get_named_child_node(dev->fwnode, name); if (!fwh) - return NULL; + return 0; adev = to_acpi_device_node(fwh); if (!adev) - return NULL; + return -EINVAL; + + INIT_LIST_HEAD(&resource_list); + + count = acpi_dev_get_resources(adev, &resource_list, NULL, NULL); + if (count <= 0) + return count; + + count += pdev->num_resources; + + resources = kcalloc(count, sizeof(*resources), GFP_KERNEL); + if (!resources) { + acpi_dev_free_resource_list(&resource_list); + return -ENOMEM; + } + + memcpy(resources, pdev->resource, sizeof(struct resource) * pdev->num_resources); + count = pdev->num_resources; + list_for_each_entry(rentry, &resource_list, node) { + /* Avoid inserting duplicate entries, in case this is called more than once */ + for (i = 0; i < count; i++) { + if (resource_type(&resources[i]) == resource_type(rentry->res) && + resources[i].start == rentry->res->start && + resources[i].end == rentry->res->end) + break; + } + + if (i == count) + resources[count++] = *rentry->res; + } - return acpi_create_platform_device(adev, NULL); + ret = platform_device_add_resources(pdev, resources, count); + if (ret) + dev_err(&pdev->dev, "failed to add resources\n"); + + acpi_dev_free_resource_list(&resource_list); + kfree(resources); + + return ret; } static int dwc3_qcom_probe(struct platform_device *pdev) @@ -817,6 +853,12 @@ static int dwc3_qcom_probe(struct platform_device *pdev) dev_err(&pdev->dev, "no supporting ACPI device data\n"); return -EINVAL; } + + if (qcom->acpi_pdata->is_urs) { + ret = dwc3_qcom_acpi_merge_urs_resources(pdev); + if (ret < 0) + goto clk_disable; + } } qcom->resets = devm_reset_control_array_get_optional_exclusive(dev); @@ -857,18 +899,6 @@ static int dwc3_qcom_probe(struct platform_device *pdev) qcom->acpi_pdata->qscratch_base_offset; parent_res->end = parent_res->start + qcom->acpi_pdata->qscratch_base_size; - - if (qcom->acpi_pdata->is_urs) { - qcom->urs_usb = dwc3_qcom_create_urs_usb_platdev(dev); - if (IS_ERR_OR_NULL(qcom->urs_usb)) { - dev_err(dev, "failed to create URS USB platdev\n"); - if (!qcom->urs_usb) - ret = -ENODEV; - else - ret = PTR_ERR(qcom->urs_usb); - goto clk_disable; - } - } } qcom->qscratch_base = devm_ioremap_resource(dev, parent_res); From patchwork Tue Oct 17 03:11:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 153876 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2908:b0:403:3b70:6f57 with SMTP id ib8csp3869477vqb; Mon, 16 Oct 2023 20:13:15 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFI91BHVAiYiDRJEC7GUJoQOPt3UbvYd2cHztaoQF4Gexv2TuqK77iX5pgM8ouTQ3m0Z2Zh X-Received: by 2002:a17:902:e80c:b0:1c4:1e65:1e5e with SMTP id u12-20020a170902e80c00b001c41e651e5emr1218646plg.0.1697512395422; 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Tue, 17 Oct 2023 03:11:28 +0000 Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 39H3BRif012893 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 17 Oct 2023 03:11:27 GMT Received: from hu-bjorande-lv.qualcomm.com (10.49.16.6) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.39; Mon, 16 Oct 2023 20:11:27 -0700 From: Bjorn Andersson Date: Mon, 16 Oct 2023 20:11:12 -0700 Subject: [PATCH 04/12] usb: dwc3: Expose core driver as library MIME-Version: 1.0 Message-ID: <20231016-dwc3-refactor-v1-4-ab4a84165470@quicinc.com> References: <20231016-dwc3-refactor-v1-0-ab4a84165470@quicinc.com> In-Reply-To: <20231016-dwc3-refactor-v1-0-ab4a84165470@quicinc.com> To: Bjorn Andersson , Konrad Dybcio , Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Wesley Cheng , Thinh Nguyen , Felipe Balbi , Philipp Zabel CC: , , , , Johan Hovold , Krishna Kurapati PSSNV , "Bjorn Andersson" X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; 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Mon, 16 Oct 2023 20:13:03 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779970757871232596 X-GMAIL-MSGID: 1779970757871232596 The DWC3 IP block is handled by three distinct device drivers: XHCI, DWC3 core and a platform specific (optional) DWC3 glue driver. This has resulted in, at least in the case of the Qualcomm glue, the presence of a number of layering violations, where the glue code either can't handle, or has to work around, the fact that core might not probe deterministically. An example of this is that the suspend path should operate slightly different depending on the device operating in host or peripheral mode, and the only way to determine the operating state is to peek into the core's drvdata. The Qualcomm glue driver is expected to make updates in the qscratch register region (the "glue" region) during role switch events, but with the glue and core split using the driver model, there is no reasonable way to introduce listeners for mode changes. Split the dwc3 core platfrom_driver callbacks and their implementation and export the implementation, to make it possible to deterministically instantiate the dwc3 core as part of the dwc3 glue drivers and to allow flattening of the DeviceTree representation. Signed-off-by: Bjorn Andersson --- drivers/usb/dwc3/core.c | 134 ++++++++++++++++++++++++++++++++---------------- drivers/usb/dwc3/core.h | 10 ++++ 2 files changed, 100 insertions(+), 44 deletions(-) diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index d25490965b27..71e376bebb16 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -1876,7 +1876,7 @@ static int dwc3_get_clocks(struct dwc3 *dwc) return 0; } -static int dwc3_probe(struct platform_device *pdev) +struct dwc3 *dwc3_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct resource *res, dwc_res; @@ -1886,14 +1886,14 @@ static int dwc3_probe(struct platform_device *pdev) dwc = devm_kzalloc(dev, sizeof(*dwc), GFP_KERNEL); if (!dwc) - return -ENOMEM; + return ERR_PTR(-ENOMEM); dwc->dev = dev; res = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!res) { dev_err(dev, "missing memory resource\n"); - return -ENODEV; + return ERR_PTR(-ENODEV); } dwc->xhci_resources[0].start = res->start; @@ -1922,7 +1922,7 @@ static int dwc3_probe(struct platform_device *pdev) regs = devm_ioremap_resource(dev, &dwc_res); if (IS_ERR(regs)) - return PTR_ERR(regs); + return ERR_CAST(regs); dwc->regs = regs; dwc->regs_size = resource_size(&dwc_res); @@ -1953,7 +1953,6 @@ static int dwc3_probe(struct platform_device *pdev) goto err_disable_clks; } - platform_set_drvdata(pdev, dwc); dwc3_cache_hwparams(dwc); if (!dwc->sysdev_is_parent && @@ -2006,7 +2005,7 @@ static int dwc3_probe(struct platform_device *pdev) pm_runtime_put(dev); - return 0; + return dwc; err_exit_debugfs: dwc3_debugfs_exit(dwc); @@ -2030,14 +2029,26 @@ static int dwc3_probe(struct platform_device *pdev) if (dwc->usb_psy) power_supply_put(dwc->usb_psy); - return ret; + return ERR_PTR(ret); } +EXPORT_SYMBOL_GPL(dwc3_probe); -static void dwc3_remove(struct platform_device *pdev) +static int dwc3_plat_probe(struct platform_device *pdev) { - struct dwc3 *dwc = platform_get_drvdata(pdev); + struct dwc3 *dwc; + + dwc = dwc3_probe(pdev); + if (IS_ERR(dwc)) + return PTR_ERR(dwc); + + platform_set_drvdata(pdev, dwc); + + return 0; +} - pm_runtime_get_sync(&pdev->dev); +void dwc3_remove(struct dwc3 *dwc) +{ + pm_runtime_get_sync(dwc->dev); dwc3_core_exit_mode(dwc); dwc3_debugfs_exit(dwc); @@ -2045,22 +2056,28 @@ static void dwc3_remove(struct platform_device *pdev) dwc3_core_exit(dwc); dwc3_ulpi_exit(dwc); - pm_runtime_allow(&pdev->dev); - pm_runtime_disable(&pdev->dev); - pm_runtime_dont_use_autosuspend(&pdev->dev); - pm_runtime_put_noidle(&pdev->dev); + pm_runtime_allow(dwc->dev); + pm_runtime_disable(dwc->dev); + pm_runtime_dont_use_autosuspend(dwc->dev); + pm_runtime_put_noidle(dwc->dev); /* * HACK: Clear the driver data, which is currently accessed by parent * glue drivers, before allowing the parent to suspend. */ - platform_set_drvdata(pdev, NULL); - pm_runtime_set_suspended(&pdev->dev); + dev_set_drvdata(dwc->dev, NULL); + pm_runtime_set_suspended(dwc->dev); dwc3_free_event_buffers(dwc); if (dwc->usb_psy) power_supply_put(dwc->usb_psy); } +EXPORT_SYMBOL_GPL(dwc3_remove); + +static void dwc3_plat_remove(struct platform_device *pdev) +{ + dwc3_remove(platform_get_drvdata(pdev)); +} #ifdef CONFIG_PM static int dwc3_core_init_for_resume(struct dwc3 *dwc) @@ -2227,9 +2244,8 @@ static int dwc3_runtime_checks(struct dwc3 *dwc) return 0; } -static int dwc3_runtime_suspend(struct device *dev) +int dwc3_runtime_suspend(struct dwc3 *dwc) { - struct dwc3 *dwc = dev_get_drvdata(dev); int ret; if (dwc3_runtime_checks(dwc)) @@ -2241,10 +2257,10 @@ static int dwc3_runtime_suspend(struct device *dev) return 0; } +EXPORT_SYMBOL_GPL(dwc3_runtime_suspend); -static int dwc3_runtime_resume(struct device *dev) +int dwc3_runtime_resume(struct dwc3 *dwc) { - struct dwc3 *dwc = dev_get_drvdata(dev); int ret; ret = dwc3_resume_common(dwc, PMSG_AUTO_RESUME); @@ -2261,15 +2277,14 @@ static int dwc3_runtime_resume(struct device *dev) break; } - pm_runtime_mark_last_busy(dev); + pm_runtime_mark_last_busy(dwc->dev); return 0; } +EXPORT_SYMBOL_GPL(dwc3_runtime_resume); -static int dwc3_runtime_idle(struct device *dev) +int dwc3_runtime_idle(struct dwc3 *dwc) { - struct dwc3 *dwc = dev_get_drvdata(dev); - switch (dwc->current_dr_role) { case DWC3_GCTL_PRTCAP_DEVICE: if (dwc3_runtime_checks(dwc)) @@ -2281,49 +2296,64 @@ static int dwc3_runtime_idle(struct device *dev) break; } - pm_runtime_mark_last_busy(dev); - pm_runtime_autosuspend(dev); + pm_runtime_mark_last_busy(dwc->dev); + pm_runtime_autosuspend(dwc->dev); return 0; } +EXPORT_SYMBOL_GPL(dwc3_runtime_idle); + +static int dwc3_plat_runtime_suspend(struct device *dev) +{ + return dwc3_runtime_suspend(dev_get_drvdata(dev)); +} + +static int dwc3_plat_runtime_resume(struct device *dev) +{ + return dwc3_runtime_resume(dev_get_drvdata(dev)); +} + +static int dwc3_plat_runtime_idle(struct device *dev) +{ + return dwc3_runtime_idle(dev_get_drvdata(dev)); +} #endif /* CONFIG_PM */ #ifdef CONFIG_PM_SLEEP -static int dwc3_suspend(struct device *dev) +int dwc3_suspend(struct dwc3 *dwc) { - struct dwc3 *dwc = dev_get_drvdata(dev); int ret; ret = dwc3_suspend_common(dwc, PMSG_SUSPEND); if (ret) return ret; - pinctrl_pm_select_sleep_state(dev); + pinctrl_pm_select_sleep_state(dwc->dev); return 0; } +EXPORT_SYMBOL_GPL(dwc3_suspend); -static int dwc3_resume(struct device *dev) +int dwc3_resume(struct dwc3 *dwc) { - struct dwc3 *dwc = dev_get_drvdata(dev); int ret; - pinctrl_pm_select_default_state(dev); + pinctrl_pm_select_default_state(dwc->dev); ret = dwc3_resume_common(dwc, PMSG_RESUME); if (ret) return ret; - pm_runtime_disable(dev); - pm_runtime_set_active(dev); - pm_runtime_enable(dev); + pm_runtime_disable(dwc->dev); + pm_runtime_set_active(dwc->dev); + pm_runtime_enable(dwc->dev); return 0; } +EXPORT_SYMBOL_GPL(dwc3_resume); -static void dwc3_complete(struct device *dev) +void dwc3_complete(struct dwc3 *dwc) { - struct dwc3 *dwc = dev_get_drvdata(dev); u32 reg; if (dwc->current_dr_role == DWC3_GCTL_PRTCAP_HOST && @@ -2333,15 +2363,31 @@ static void dwc3_complete(struct device *dev) dwc3_writel(dwc->regs, DWC3_GUCTL3, reg); } } +EXPORT_SYMBOL_GPL(dwc3_complete); + +static int dwc3_plat_suspend(struct device *dev) +{ + return dwc3_suspend(dev_get_drvdata(dev)); +} + +static int dwc3_plat_resume(struct device *dev) +{ + return dwc3_resume(dev_get_drvdata(dev)); +} + +static void dwc3_plat_complete(struct device *dev) +{ + dwc3_complete(dev_get_drvdata(dev)); +} #else -#define dwc3_complete NULL +#define dwc3_plat_complete NULL #endif /* CONFIG_PM_SLEEP */ static const struct dev_pm_ops dwc3_dev_pm_ops = { - SET_SYSTEM_SLEEP_PM_OPS(dwc3_suspend, dwc3_resume) - .complete = dwc3_complete, - SET_RUNTIME_PM_OPS(dwc3_runtime_suspend, dwc3_runtime_resume, - dwc3_runtime_idle) + SET_SYSTEM_SLEEP_PM_OPS(dwc3_plat_suspend, dwc3_plat_resume) + .complete = dwc3_plat_complete, + SET_RUNTIME_PM_OPS(dwc3_plat_runtime_suspend, dwc3_plat_runtime_resume, + dwc3_plat_runtime_idle) }; #ifdef CONFIG_OF @@ -2369,8 +2415,8 @@ MODULE_DEVICE_TABLE(acpi, dwc3_acpi_match); #endif static struct platform_driver dwc3_driver = { - .probe = dwc3_probe, - .remove_new = dwc3_remove, + .probe = dwc3_plat_probe, + .remove_new = dwc3_plat_remove, .driver = { .name = "dwc3", .of_match_table = of_match_ptr(of_dwc3_match), diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index c6c87acbd376..f5e22559bb73 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -1568,6 +1568,16 @@ void dwc3_event_buffers_cleanup(struct dwc3 *dwc); int dwc3_core_soft_reset(struct dwc3 *dwc); +struct dwc3 *dwc3_probe(struct platform_device *pdev); +void dwc3_remove(struct dwc3 *dwc); + +int dwc3_runtime_suspend(struct dwc3 *dwc); +int dwc3_runtime_resume(struct dwc3 *dwc); +int dwc3_runtime_idle(struct dwc3 *dwc); +int dwc3_suspend(struct dwc3 *dwc); +int dwc3_resume(struct dwc3 *dwc); +void dwc3_complete(struct dwc3 *dwc); + #if IS_ENABLED(CONFIG_USB_DWC3_HOST) || IS_ENABLED(CONFIG_USB_DWC3_DUAL_ROLE) int dwc3_host_init(struct dwc3 *dwc); void dwc3_host_exit(struct dwc3 *dwc); From patchwork Tue Oct 17 03:11:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 153867 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2908:b0:403:3b70:6f57 with SMTP id ib8csp3869101vqb; Mon, 16 Oct 2023 20:12:09 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFOKL4GvtE5l0O+CJ5cydhS4me145yi3H4g3lunmKDu9GAgpbqwR9VBeqqJ46tEC7NH4hiR X-Received: by 2002:a05:6359:3118:b0:166:d9b6:1db3 with SMTP id rh24-20020a056359311800b00166d9b61db3mr902779rwb.2.1697512329199; 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Mon, 16 Oct 2023 20:12:03 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779970688028531780 X-GMAIL-MSGID: 1779970688028531780 In the case that the dwc3 core driver is instantiated from the same memory resource information as the glue driver, the dwc_res memory region will overlap with the memory region already mapped by the glue. As the DWC3 core driver already does math on the passed memory region to exclude the XHCI region, also adjust the end address, to avoid having to pass an adjusted region from the glue explicitly. Signed-off-by: Bjorn Andersson Acked-by: Konrad Dybcio --- drivers/usb/dwc3/core.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index 71e376bebb16..5d86b803fab0 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -1908,6 +1908,7 @@ struct dwc3 *dwc3_probe(struct platform_device *pdev) */ dwc_res = *res; dwc_res.start += DWC3_GLOBALS_REGS_START; + dwc_res.end = res->start + DWC3_OTG_REGS_END; if (dev->of_node) { struct device_node *parent = of_get_parent(dev->of_node); @@ -1915,6 +1916,7 @@ struct dwc3 *dwc3_probe(struct platform_device *pdev) if (of_device_is_compatible(parent, "realtek,rtd-dwc3")) { dwc_res.start -= DWC3_GLOBALS_REGS_START; dwc_res.start += DWC3_RTK_RTD_GLOBALS_REGS_START; + dwc_res.end = dwc_res.start + DWC3_OTG_REGS_END; } of_node_put(parent); From patchwork Tue Oct 17 03:11:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 153873 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2908:b0:403:3b70:6f57 with SMTP id ib8csp3869336vqb; Mon, 16 Oct 2023 20:12:47 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFO84WlWAM3rmNTp3Y2Ii3EUnjJ1LhugWeCXXpfHcrD/ct1Ha/goL37JkSGeh1tTZCEkKaY X-Received: by 2002:a05:6359:5e20:b0:166:d93e:339 with SMTP id pw32-20020a0563595e2000b00166d93e0339mr1112531rwb.0.1697512366976; Mon, 16 Oct 2023 20:12:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697512366; cv=none; d=google.com; s=arc-20160816; b=xsRAPy6YnISjbNF4oYeS8uH73i8mqQVRx1wuTlr9TtAYE7bNb8DwB3ezxnzBSu2EWp zNeRDvKu0lXEw+IQxWijV4KEcfi8889rqs+11bG5fWlspLmKf0xd/cO5jnUPh9Yy6y9D obsAD5dY2Rs5OyYuc7VVrfgWDJbeugQP6aeab+++ReDoNOMUpAeeP54sH9/0yPEHGs/X vP/mzIw7RYgRULMepTDo2IV3Z0pav4BTVxYlxiJZVfGPvMvw8zR90d2/XwZFnYm5egop e5n7CHOdoLJNlIYnO+wM9TxAKO7I68N7ItcYVP/I3hCx2kzLO76sphRs3Bc0v2MPAxw2 9rEw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=MD0vRGHKVSv5tIsJbfLJScCBWTTC11d48ggnY3hpncA=; fh=yZ2owId4ryp9GLJ5ubSP1PQtd6LUH0AGZACw+F4ReGw=; b=FbfVdWUjE+CVEwfUcq3CQdC3ZDQ3KRnkhuuv4XYrmfoqztGM5YjClQaXOg/SDEGUQU yfragTdBy9is+UtMwo1DmKbgIzuda7Bm9u+MRwbQWwn9gTxz+oCNkX1LN8cbEINxQHHW QlGMkwocq8wT2+hQaBrhun5yMz4XYg0TXpW01o9ubQIGc7F2qA8NQ4pB6/TbSR88Tm3x mdQI5SfELT1tWX0Swi1E8oAw+cBTJAGXr0BQvfe90JM3dhG4/YVjLCWrWe7lKxdm39+p Ze3F7zgCH5EyIO4CNbSX950lo17z00ZE7fp8NqbYLA3RotjEH9MT2xeUXTGaD6riAscy h8Ww== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=GZ17xj8H; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:5 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from groat.vger.email (groat.vger.email. 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Tue, 17 Oct 2023 03:11:28 +0000 Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 39H3BS1D004288 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 17 Oct 2023 03:11:28 GMT Received: from hu-bjorande-lv.qualcomm.com (10.49.16.6) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.39; Mon, 16 Oct 2023 20:11:28 -0700 From: Bjorn Andersson Date: Mon, 16 Oct 2023 20:11:14 -0700 Subject: [PATCH 06/12] usb: dwc3: qcom: Add dwc3 core reference in driver state MIME-Version: 1.0 Message-ID: <20231016-dwc3-refactor-v1-6-ab4a84165470@quicinc.com> References: <20231016-dwc3-refactor-v1-0-ab4a84165470@quicinc.com> In-Reply-To: <20231016-dwc3-refactor-v1-0-ab4a84165470@quicinc.com> To: Bjorn Andersson , Konrad Dybcio , Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Wesley Cheng , Thinh Nguyen , Felipe Balbi , Philipp Zabel CC: , , , , Johan Hovold , Krishna Kurapati PSSNV , "Bjorn Andersson" X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; 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Mon, 16 Oct 2023 20:12:38 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779970727725931722 X-GMAIL-MSGID: 1779970727725931722 In the coming changes the Qualcomm DWC3 glue will be able to either manage the DWC3 core as a child platform_device, or directly instantiate it within its own context. Introduce a reference to the dwc3 core state and make the driver reference the dwc3 core either the child device or this new reference. As the new member isn't assigned, and qcom->dwc_dev is assigned in all current cases, the change should have no functional impact. Signed-off-by: Bjorn Andersson --- drivers/usb/dwc3/dwc3-qcom.c | 100 +++++++++++++++++++++++++++++++++++-------- 1 file changed, 83 insertions(+), 17 deletions(-) diff --git a/drivers/usb/dwc3/dwc3-qcom.c b/drivers/usb/dwc3/dwc3-qcom.c index 7c810712d246..901e5050363b 100644 --- a/drivers/usb/dwc3/dwc3-qcom.c +++ b/drivers/usb/dwc3/dwc3-qcom.c @@ -67,7 +67,8 @@ struct dwc3_acpi_pdata { struct dwc3_qcom { struct device *dev; void __iomem *qscratch_base; - struct platform_device *dwc_dev; + struct platform_device *dwc_dev; /* only used when core is separate device */ + struct dwc3 *dwc; /* not used when core is separate device */ struct clk **clks; int num_clocks; struct reset_control *resets; @@ -263,7 +264,11 @@ static int dwc3_qcom_interconnect_init(struct dwc3_qcom *qcom) goto put_path_ddr; } - max_speed = usb_get_maximum_speed(&qcom->dwc_dev->dev); + if (qcom->dwc_dev) + max_speed = usb_get_maximum_speed(&qcom->dwc_dev->dev); + else + max_speed = usb_get_maximum_speed(qcom->dev); + if (max_speed >= USB_SPEED_SUPER || max_speed == USB_SPEED_UNKNOWN) { ret = icc_set_bw(qcom->icc_path_ddr, USB_MEMORY_AVG_SS_BW, USB_MEMORY_PEAK_SS_BW); @@ -311,7 +316,10 @@ static bool dwc3_qcom_is_host(struct dwc3_qcom *qcom) /* * FIXME: Fix this layering violation. */ - dwc = platform_get_drvdata(qcom->dwc_dev); + if (qcom->dwc_dev) + dwc = platform_get_drvdata(qcom->dwc_dev); + else + dwc = qcom->dwc; /* Core driver may not have probed yet. */ if (!dwc) @@ -322,10 +330,14 @@ static bool dwc3_qcom_is_host(struct dwc3_qcom *qcom) static enum usb_device_speed dwc3_qcom_read_usb2_speed(struct dwc3_qcom *qcom) { - struct dwc3 *dwc = platform_get_drvdata(qcom->dwc_dev); struct usb_device *udev; struct usb_hcd __maybe_unused *hcd; + struct dwc3 *dwc; + if (qcom->dwc_dev) + dwc = platform_get_drvdata(qcom->dwc_dev); + else + dwc = qcom->dwc; /* * FIXME: Fix this layering violation. */ @@ -485,12 +497,17 @@ static int dwc3_qcom_resume(struct dwc3_qcom *qcom, bool wakeup) static irqreturn_t qcom_dwc3_resume_irq(int irq, void *data) { struct dwc3_qcom *qcom = data; - struct dwc3 *dwc = platform_get_drvdata(qcom->dwc_dev); + struct dwc3 *dwc; /* If pm_suspended then let pm_resume take care of resuming h/w */ if (qcom->pm_suspended) return IRQ_HANDLED; + if (qcom->dwc_dev) + dwc = platform_get_drvdata(qcom->dwc_dev); + else + dwc = qcom->dwc; + /* * This is safe as role switching is done from a freezable workqueue * and the wakeup interrupts are disabled as part of resume. @@ -936,25 +953,33 @@ static int dwc3_qcom_probe(struct platform_device *pdev) if (ret) goto depopulate; - qcom->mode = usb_get_dr_mode(&qcom->dwc_dev->dev); + if (qcom->dwc_dev) + qcom->mode = usb_get_dr_mode(&qcom->dwc_dev->dev); + else + qcom->mode = usb_get_dr_mode(dev); /* enable vbus override for device mode */ if (qcom->mode != USB_DR_MODE_HOST) dwc3_qcom_vbus_override_enable(qcom, true); - /* register extcon to override sw_vbus on Vbus change later */ - ret = dwc3_qcom_register_extcon(qcom); - if (ret) - goto interconnect_exit; + if (qcom->dwc_dev) { + /* register extcon to override sw_vbus on Vbus change later */ + ret = dwc3_qcom_register_extcon(qcom); + if (ret) + goto interconnect_exit; + } wakeup_source = of_property_read_bool(dev->of_node, "wakeup-source"); device_init_wakeup(&pdev->dev, wakeup_source); - device_init_wakeup(&qcom->dwc_dev->dev, wakeup_source); + if (qcom->dwc_dev) + device_init_wakeup(&qcom->dwc_dev->dev, wakeup_source); qcom->is_suspended = false; - pm_runtime_set_active(dev); - pm_runtime_enable(dev); - pm_runtime_forbid(dev); + if (qcom->dwc_dev) { + pm_runtime_set_active(dev); + pm_runtime_enable(dev); + pm_runtime_forbid(dev); + } return 0; @@ -983,6 +1008,9 @@ static void dwc3_qcom_remove(struct platform_device *pdev) struct device *dev = &pdev->dev; int i; + if (qcom->dwc) + dwc3_remove(qcom->dwc); + device_remove_software_node(&qcom->dwc_dev->dev); if (np) of_platform_depopulate(&pdev->dev); @@ -998,8 +1026,10 @@ static void dwc3_qcom_remove(struct platform_device *pdev) dwc3_qcom_interconnect_exit(qcom); reset_control_assert(qcom->resets); - pm_runtime_allow(dev); - pm_runtime_disable(dev); + if (qcom->dwc_dev) { + pm_runtime_allow(dev); + pm_runtime_disable(dev); + } } static int __maybe_unused dwc3_qcom_pm_suspend(struct device *dev) @@ -1008,6 +1038,12 @@ static int __maybe_unused dwc3_qcom_pm_suspend(struct device *dev) bool wakeup = device_may_wakeup(dev); int ret; + if (qcom->dwc) { + ret = dwc3_suspend(qcom->dwc); + if (ret) + return ret; + } + ret = dwc3_qcom_suspend(qcom, wakeup); if (ret) return ret; @@ -1029,12 +1065,33 @@ static int __maybe_unused dwc3_qcom_pm_resume(struct device *dev) qcom->pm_suspended = false; + if (qcom->dwc) { + ret = dwc3_resume(qcom->dwc); + if (ret) + return ret; + } + return 0; } +static void dwc3_qcom_complete(struct device *dev) +{ + struct dwc3_qcom *qcom = dev_get_drvdata(dev); + + if (qcom->dwc) + dwc3_complete(qcom->dwc); +} + static int __maybe_unused dwc3_qcom_runtime_suspend(struct device *dev) { struct dwc3_qcom *qcom = dev_get_drvdata(dev); + int ret; + + if (qcom->dwc) { + ret = dwc3_runtime_suspend(qcom->dwc); + if (ret) + return ret; + } return dwc3_qcom_suspend(qcom, true); } @@ -1042,12 +1099,21 @@ static int __maybe_unused dwc3_qcom_runtime_suspend(struct device *dev) static int __maybe_unused dwc3_qcom_runtime_resume(struct device *dev) { struct dwc3_qcom *qcom = dev_get_drvdata(dev); + int ret; + + ret = dwc3_qcom_resume(qcom, true); + if (ret) + return ret; - return dwc3_qcom_resume(qcom, true); + if (qcom->dwc) + return dwc3_runtime_resume(qcom->dwc); + + return 0; } static const struct dev_pm_ops dwc3_qcom_dev_pm_ops = { SET_SYSTEM_SLEEP_PM_OPS(dwc3_qcom_pm_suspend, dwc3_qcom_pm_resume) + .complete = dwc3_qcom_complete, SET_RUNTIME_PM_OPS(dwc3_qcom_runtime_suspend, dwc3_qcom_runtime_resume, NULL) }; From patchwork Tue Oct 17 03:11:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 153871 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2908:b0:403:3b70:6f57 with SMTP id ib8csp3869301vqb; Mon, 16 Oct 2023 20:12:42 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEEHTToRiS/l33GKzdOY3KgBhR+oaLi73Gmmd5KpQHelshL2QxVJrl+67v1UAlAMwGMYKlV X-Received: by 2002:a05:6a20:c182:b0:13d:fff1:c672 with SMTP id bg2-20020a056a20c18200b0013dfff1c672mr1023630pzb.4.1697512361901; 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Tue, 17 Oct 2023 03:11:29 +0000 Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 39H3BSFE004291 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 17 Oct 2023 03:11:28 GMT Received: from hu-bjorande-lv.qualcomm.com (10.49.16.6) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.39; Mon, 16 Oct 2023 20:11:28 -0700 From: Bjorn Andersson Date: Mon, 16 Oct 2023 20:11:15 -0700 Subject: [PATCH 07/12] usb: dwc3: qcom: Instantiate dwc3 core directly MIME-Version: 1.0 Message-ID: <20231016-dwc3-refactor-v1-7-ab4a84165470@quicinc.com> References: <20231016-dwc3-refactor-v1-0-ab4a84165470@quicinc.com> In-Reply-To: <20231016-dwc3-refactor-v1-0-ab4a84165470@quicinc.com> To: Bjorn Andersson , Konrad Dybcio , Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Wesley Cheng , Thinh Nguyen , Felipe Balbi , Philipp Zabel CC: , , , , Johan Hovold , Krishna Kurapati PSSNV , "Bjorn Andersson" X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; 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Mon, 16 Oct 2023 20:12:35 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779970722352433878 X-GMAIL-MSGID: 1779970722352433878 The Qualcomm DWC3 glue builds up a platform_device programmatically in order to probe the DWC3 core when running off ACPI data. But with the newly introduced support for instantiating the core directly from the glue, this code can be replaced with a single function call. Signed-off-by: Bjorn Andersson --- drivers/usb/dwc3/dwc3-qcom.c | 85 ++++++++------------------------------------ 1 file changed, 15 insertions(+), 70 deletions(-) diff --git a/drivers/usb/dwc3/dwc3-qcom.c b/drivers/usb/dwc3/dwc3-qcom.c index 901e5050363b..cc0fe010ee8c 100644 --- a/drivers/usb/dwc3/dwc3-qcom.c +++ b/drivers/usb/dwc3/dwc3-qcom.c @@ -56,7 +56,6 @@ struct dwc3_acpi_pdata { u32 qscratch_base_offset; u32 qscratch_base_size; - u32 dwc3_core_base_size; int hs_phy_irq_index; int dp_hs_phy_irq_index; int dm_hs_phy_irq_index; @@ -676,75 +675,17 @@ static const struct software_node dwc3_qcom_swnode = { .properties = dwc3_qcom_acpi_properties, }; -static int dwc3_qcom_acpi_register_core(struct platform_device *pdev) +static int dwc3_qcom_probe_core(struct platform_device *pdev, struct dwc3_qcom *qcom) { - struct dwc3_qcom *qcom = platform_get_drvdata(pdev); - struct device *dev = &pdev->dev; - struct resource *res, *child_res = NULL; - int irq; - int ret; - - qcom->dwc_dev = platform_device_alloc("dwc3", PLATFORM_DEVID_AUTO); - if (!qcom->dwc_dev) - return -ENOMEM; - - qcom->dwc_dev->dev.parent = dev; - qcom->dwc_dev->dev.type = dev->type; - qcom->dwc_dev->dev.dma_mask = dev->dma_mask; - qcom->dwc_dev->dev.dma_parms = dev->dma_parms; - qcom->dwc_dev->dev.coherent_dma_mask = dev->coherent_dma_mask; - - child_res = kcalloc(2, sizeof(*child_res), GFP_KERNEL); - if (!child_res) { - platform_device_put(qcom->dwc_dev); - return -ENOMEM; - } - - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!res) { - dev_err(&pdev->dev, "failed to get memory resource\n"); - ret = -ENODEV; - goto out; - } - - child_res[0].flags = res->flags; - child_res[0].start = res->start; - child_res[0].end = child_res[0].start + - qcom->acpi_pdata->dwc3_core_base_size; - - irq = platform_get_irq(pdev, 0); - if (irq < 0) { - ret = irq; - goto out; - } - child_res[1].flags = IORESOURCE_IRQ; - child_res[1].start = child_res[1].end = irq; + struct dwc3 *dwc; - ret = platform_device_add_resources(qcom->dwc_dev, child_res, 2); - if (ret) { - dev_err(&pdev->dev, "failed to add resources\n"); - goto out; - } + dwc = dwc3_probe(pdev); + if (IS_ERR(dwc)) + return PTR_ERR(dwc); - ret = device_add_software_node(&qcom->dwc_dev->dev, &dwc3_qcom_swnode); - if (ret < 0) { - dev_err(&pdev->dev, "failed to add properties\n"); - goto out; - } + qcom->dwc = dwc; - ret = platform_device_add(qcom->dwc_dev); - if (ret) { - dev_err(&pdev->dev, "failed to add device\n"); - device_remove_software_node(&qcom->dwc_dev->dev); - goto out; - } - kfree(child_res); return 0; - -out: - platform_device_put(qcom->dwc_dev); - kfree(child_res); - return ret; } static int dwc3_qcom_of_register_core(struct platform_device *pdev) @@ -871,6 +812,12 @@ static int dwc3_qcom_probe(struct platform_device *pdev) return -EINVAL; } + ret = device_add_software_node(&pdev->dev, &dwc3_qcom_swnode); + if (ret < 0) { + dev_err(&pdev->dev, "failed to add properties\n"); + return ret; + } + if (qcom->acpi_pdata->is_urs) { ret = dwc3_qcom_acpi_merge_urs_resources(pdev); if (ret < 0) @@ -942,7 +889,7 @@ static int dwc3_qcom_probe(struct platform_device *pdev) if (np) ret = dwc3_qcom_of_register_core(pdev); else - ret = dwc3_qcom_acpi_register_core(pdev); + ret = dwc3_qcom_probe_core(pdev, qcom); if (ret) { dev_err(dev, "failed to register DWC3 Core, err=%d\n", ret); @@ -986,10 +933,10 @@ static int dwc3_qcom_probe(struct platform_device *pdev) interconnect_exit: dwc3_qcom_interconnect_exit(qcom); depopulate: - if (np) + if (qcom->dwc_dev) of_platform_depopulate(&pdev->dev); else - platform_device_put(pdev); + dwc3_remove(qcom->dwc); clk_disable: for (i = qcom->num_clocks - 1; i >= 0; i--) { clk_disable_unprepare(qcom->clks[i]); @@ -1128,7 +1075,6 @@ MODULE_DEVICE_TABLE(of, dwc3_qcom_of_match); static const struct dwc3_acpi_pdata sdm845_acpi_pdata = { .qscratch_base_offset = SDM845_QSCRATCH_BASE_OFFSET, .qscratch_base_size = SDM845_QSCRATCH_SIZE, - .dwc3_core_base_size = SDM845_DWC3_CORE_SIZE, .hs_phy_irq_index = 1, .dp_hs_phy_irq_index = 4, .dm_hs_phy_irq_index = 3, @@ -1138,7 +1084,6 @@ static const struct dwc3_acpi_pdata sdm845_acpi_pdata = { static const struct dwc3_acpi_pdata sdm845_acpi_urs_pdata = { .qscratch_base_offset = SDM845_QSCRATCH_BASE_OFFSET, .qscratch_base_size = SDM845_QSCRATCH_SIZE, - .dwc3_core_base_size = SDM845_DWC3_CORE_SIZE, .hs_phy_irq_index = 1, .dp_hs_phy_irq_index = 4, .dm_hs_phy_irq_index = 3, From patchwork Tue Oct 17 03:11:16 2023 Content-Type: text/plain; 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Tue, 17 Oct 2023 03:11:29 +0000 Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 39H3BSJO015405 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 17 Oct 2023 03:11:28 GMT Received: from hu-bjorande-lv.qualcomm.com (10.49.16.6) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.39; Mon, 16 Oct 2023 20:11:28 -0700 From: Bjorn Andersson Date: Mon, 16 Oct 2023 20:11:16 -0700 Subject: [PATCH 08/12] usb: dwc3: qcom: Inline the qscratch constants MIME-Version: 1.0 Message-ID: <20231016-dwc3-refactor-v1-8-ab4a84165470@quicinc.com> References: <20231016-dwc3-refactor-v1-0-ab4a84165470@quicinc.com> In-Reply-To: <20231016-dwc3-refactor-v1-0-ab4a84165470@quicinc.com> To: Bjorn Andersson , Konrad Dybcio , Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Wesley Cheng , Thinh Nguyen , Felipe Balbi , Philipp Zabel CC: , , , , Johan Hovold , Krishna Kurapati PSSNV , "Bjorn Andersson" X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; 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Mon, 16 Oct 2023 20:13:07 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779970753926963671 X-GMAIL-MSGID: 1779970753926963671 The two constants for the offset and size of the qscratch block within the DWC3 region has the same value in all supported variants, so they don't necessarily need to be picked dynamically. By replacing the lookup with the constants it's possible to reuse the same code path without the ACPI pdata structure in the upcoming commit. Signed-off-by: Bjorn Andersson Reviewed-by: Konrad Dybcio --- drivers/usb/dwc3/dwc3-qcom.c | 12 ++---------- 1 file changed, 2 insertions(+), 10 deletions(-) diff --git a/drivers/usb/dwc3/dwc3-qcom.c b/drivers/usb/dwc3/dwc3-qcom.c index cc0fe010ee8c..cf6c391ba498 100644 --- a/drivers/usb/dwc3/dwc3-qcom.c +++ b/drivers/usb/dwc3/dwc3-qcom.c @@ -54,8 +54,6 @@ #define APPS_USB_PEAK_BW MBps_to_icc(40) struct dwc3_acpi_pdata { - u32 qscratch_base_offset; - u32 qscratch_base_size; int hs_phy_irq_index; int dp_hs_phy_irq_index; int dm_hs_phy_irq_index; @@ -859,10 +857,8 @@ static int dwc3_qcom_probe(struct platform_device *pdev) memcpy(&local_res, res, sizeof(struct resource)); parent_res = &local_res; - parent_res->start = res->start + - qcom->acpi_pdata->qscratch_base_offset; - parent_res->end = parent_res->start + - qcom->acpi_pdata->qscratch_base_size; + parent_res->start = res->start + SDM845_QSCRATCH_BASE_OFFSET; + parent_res->end = parent_res->start + SDM845_QSCRATCH_SIZE; } qcom->qscratch_base = devm_ioremap_resource(dev, parent_res); @@ -1073,8 +1069,6 @@ MODULE_DEVICE_TABLE(of, dwc3_qcom_of_match); #ifdef CONFIG_ACPI static const struct dwc3_acpi_pdata sdm845_acpi_pdata = { - .qscratch_base_offset = SDM845_QSCRATCH_BASE_OFFSET, - .qscratch_base_size = SDM845_QSCRATCH_SIZE, .hs_phy_irq_index = 1, .dp_hs_phy_irq_index = 4, .dm_hs_phy_irq_index = 3, @@ -1082,8 +1076,6 @@ static const struct dwc3_acpi_pdata sdm845_acpi_pdata = { }; static const struct dwc3_acpi_pdata sdm845_acpi_urs_pdata = { - .qscratch_base_offset = SDM845_QSCRATCH_BASE_OFFSET, - .qscratch_base_size = SDM845_QSCRATCH_SIZE, .hs_phy_irq_index = 1, .dp_hs_phy_irq_index = 4, .dm_hs_phy_irq_index = 3, From patchwork Tue Oct 17 03:11:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 153872 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2908:b0:403:3b70:6f57 with SMTP id ib8csp3869314vqb; Mon, 16 Oct 2023 20:12:44 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGAbSQc5f2ZtfGlt0fREK80kyZ+75lZC1JojW2g/tPRTs0Ycck8/Cy/GL1PaWXhCDeNTegu X-Received: by 2002:a17:903:290c:b0:1c6:2902:24f9 with SMTP id lh12-20020a170903290c00b001c6290224f9mr1204357plb.1.1697512363728; Mon, 16 Oct 2023 20:12:43 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697512363; cv=none; d=google.com; s=arc-20160816; b=q+fLnLu3m6ztgscUS7Mz15tgKPQuw7Ab3IbkyjyyhtwzsZs2AN9RJ2rXd3ESCA6zp0 7X1lkRoo1W5teaCwOK9EEZaE/KbQ7+vsIXOVrRXXQtw9cfgpLOU2hBhTslf83cTZH5Zl 2uD2rQA8Zatpec4sYSFe5S3+brcxNPmNci/S4JCVQ1zJwjjVScY4whvzt7bUyNdy30SP PJUV4ARM7lAYHz+LnHKhM60bUu8JPE38oWHzDuyXKMkip0E2M2pvmyDI/CUIhwIcpCty idNsWgF7uqNFvu/pMeRLGcXdURFBokKEx3I1azdeeV0Pj3J60ic/BcuS94fULET+1amE V2Kg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=Luk9Ud2tLTRXw0KmA6WPexK8kOoHsWs52V3XvQyeKsA=; fh=yZ2owId4ryp9GLJ5ubSP1PQtd6LUH0AGZACw+F4ReGw=; b=eEFlzT8FzXmciaktNzZfqjN0XtF8RdG59t0RvKgWe47BiSXgAAC3444wpjldgYQh6S FiJNGUHR/Z3k/9ZvmZ8UKNlhuap6WRPeiVdX3oEfaVXT7trZe25iwdJEelR/lOr2bP1m VWVUOYZXHfjPHiPioKQdsGKS0r+wWpE/WLVA9z0yDIQGKcaOd2h4OyiL7u7oB0Tg+Yvg NeuDaq5Oxdz1/vRkcPGDYyTSnsesLoWs7XUaPAK8lqdJ+IK8iJO70A57YS1OQk5hXt51 YEO7DyBx7nRbpYiJwViJ1fr2AY58tMLg/uXUs2A34CuMkT9KmzRns027C3qxedN1pMaO f4xA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=cc3sdNvj; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.31 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from morse.vger.email (morse.vger.email. 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Tue, 17 Oct 2023 03:11:30 +0000 Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 39H3BT9X004301 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 17 Oct 2023 03:11:29 GMT Received: from hu-bjorande-lv.qualcomm.com (10.49.16.6) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.39; Mon, 16 Oct 2023 20:11:28 -0700 From: Bjorn Andersson Date: Mon, 16 Oct 2023 20:11:17 -0700 Subject: [PATCH 09/12] dt-bindings: usb: qcom,dwc3: Rename to "glue" MIME-Version: 1.0 Message-ID: <20231016-dwc3-refactor-v1-9-ab4a84165470@quicinc.com> References: <20231016-dwc3-refactor-v1-0-ab4a84165470@quicinc.com> In-Reply-To: <20231016-dwc3-refactor-v1-0-ab4a84165470@quicinc.com> To: Bjorn Andersson , Konrad Dybcio , Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Wesley Cheng , Thinh Nguyen , Felipe Balbi , Philipp Zabel CC: , , , , Johan Hovold , Krishna Kurapati PSSNV , "Bjorn Andersson" X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; 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Mon, 16 Oct 2023 20:12:41 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779970724575419275 X-GMAIL-MSGID: 1779970724575419275 The Qualcomm USB block consists of three intertwined parts, the XHCI, the DWC3 core and the Qualcomm DWC3 glue. The exsting binding represents the Qualcomm glue part, with the other two represented as in a child node. Rename the qcom,dwc3 binding, to represent that this is indeed only the glue part, to make room for a combined binding. The large "select" is included to avoid the schema to be selected for validation with the upcoming flattened binding - which includes snps,dwc3 in the compatible. Signed-off-by: Bjorn Andersson Reviewed-by: Krzysztof Kozlowski --- .../usb/{qcom,dwc3.yaml => qcom,dwc3-glue.yaml} | 54 +++++++++++++++++++++- 1 file changed, 52 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,dwc3-glue.yaml similarity index 89% rename from Documentation/devicetree/bindings/usb/qcom,dwc3.yaml rename to Documentation/devicetree/bindings/usb/qcom,dwc3-glue.yaml index 727abe41c422..bec0151b41d2 100644 --- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/qcom,dwc3-glue.yaml @@ -1,14 +1,64 @@ # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2 --- -$id: http://devicetree.org/schemas/usb/qcom,dwc3.yaml# +$id: http://devicetree.org/schemas/usb/qcom,dwc3-glue.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Qualcomm SuperSpeed DWC3 USB SoC controller +title: Qualcomm SuperSpeed DWC3 USB SoC controller glue + +description: + This describes the Qualcomm glue-section of the SuperSpeed DWC3 USB + controller found in many Qualcomm platforms, with the XHCI and DWC3 core + portions described as a separate child device. + The combined representation, defined by qcom,dwc3.yaml is preferred. maintainers: - Wesley Cheng +select: + properties: + compatible: + items: + - enum: + - qcom,ipq4019-dwc3 + - qcom,ipq5018-dwc3 + - qcom,ipq5332-dwc3 + - qcom,ipq6018-dwc3 + - qcom,ipq8064-dwc3 + - qcom,ipq8074-dwc3 + - qcom,ipq9574-dwc3 + - qcom,msm8953-dwc3 + - qcom,msm8994-dwc3 + - qcom,msm8996-dwc3 + - qcom,msm8998-dwc3 + - qcom,qcm2290-dwc3 + - qcom,qcs404-dwc3 + - qcom,sa8775p-dwc3 + - qcom,sc7180-dwc3 + - qcom,sc7280-dwc3 + - qcom,sc8180x-dwc3 + - qcom,sc8280xp-dwc3 + - qcom,sc8280xp-dwc3-mp + - qcom,sdm660-dwc3 + - qcom,sdm670-dwc3 + - qcom,sdm845-dwc3 + - qcom,sdx55-dwc3 + - qcom,sdx65-dwc3 + - qcom,sdx75-dwc3 + - qcom,sm4250-dwc3 + - qcom,sm6115-dwc3 + - qcom,sm6125-dwc3 + - qcom,sm6350-dwc3 + - qcom,sm6375-dwc3 + - qcom,sm8150-dwc3 + - qcom,sm8250-dwc3 + - qcom,sm8350-dwc3 + - qcom,sm8450-dwc3 + - qcom,sm8550-dwc3 + - const: qcom,dwc3 + required: + - compatible + properties: compatible: items: From patchwork Tue Oct 17 03:11:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 153874 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2908:b0:403:3b70:6f57 with SMTP id ib8csp3869445vqb; Mon, 16 Oct 2023 20:13:09 -0700 (PDT) X-Google-Smtp-Source: AGHT+IE3FaSaVJULwZeGdXJWfxpqz5wASNW2IB1AQCkt6pXlcVW6sNtG9E1E040rAWM6TstuAngs X-Received: by 2002:a17:902:bd07:b0:1ca:28f3:569a with SMTP id p7-20020a170902bd0700b001ca28f3569amr1073673pls.5.1697512389484; Mon, 16 Oct 2023 20:13:09 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697512389; cv=none; d=google.com; s=arc-20160816; b=MN/9NsG7RvdmEPMrwR9l1bKOrKk8Tnqxdwo0PcEHlzJpvQb287nlG5ctEApytkya97 rTgbT0HFs9vPDza9iZPw43WGcOFMoTOyvsE1E+7zw/+ZMFiozjRaDQyDhSs0PkOJnWUp Rpvc803g1bXXyHvZhXLN1xOb+BVTiAHl/RsQdy2SxUXvWZawUwzMY/nteN93mVvdztL1 ymwc3nIReGvoSCRL4wAKaXvRj24QQaLVW/EZS3Hh+V1f6XlGj2AyJCBM6DUpG3NqumwT hZu/iyQJ4N2zF4sLWBRYMwCVx9ag86oeHodF9zBRdWyDlRGVQZdruqeE5VJhkzCaVqjJ +46g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=lrUdZbLCOxF6Xek7KbYSwODmC3KFmAx9oR4IKUydMLU=; fh=yZ2owId4ryp9GLJ5ubSP1PQtd6LUH0AGZACw+F4ReGw=; b=JV4YLWXlur4Fd3OlsGhGIVCvAO/K6TVYn9bzsiLyI1nYEHdKd4+UBqdbCpFAknhyFs w6qAqmyy/lSm/l0YvbE9DCosoJOK4cPM9GB5cUx8NB7izZQMhNIYHPAq7/hxzkS0IgCl hNPqoRwBslbQ2b45os9xaV379fifuHm2TLAxWVTlNvTKSL7fIzIwNiqAPR3a+qvntn7a kis7brtq6sro90IFPRDA/EbhdmaTTnmwnGYst1Q4QDzKgQDDCJccZiXyjGNZoykt7N8+ HPL/T6iYhBK/XD4zQ8inK5hUra8sWhrONYo0FU7eNlwjZOh8ugHy5tia6jvch4HGvXA1 boAw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=p6WshpUs; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.31 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from morse.vger.email (morse.vger.email. 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Tue, 17 Oct 2023 03:11:30 +0000 Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 39H3BTEF024794 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 17 Oct 2023 03:11:29 GMT Received: from hu-bjorande-lv.qualcomm.com (10.49.16.6) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.39; Mon, 16 Oct 2023 20:11:29 -0700 From: Bjorn Andersson Date: Mon, 16 Oct 2023 20:11:18 -0700 Subject: [PATCH 10/12] dt-bindings: usb: qcom,dwc3: Introduce flattened qcom,dwc3 binding MIME-Version: 1.0 Message-ID: <20231016-dwc3-refactor-v1-10-ab4a84165470@quicinc.com> References: <20231016-dwc3-refactor-v1-0-ab4a84165470@quicinc.com> In-Reply-To: <20231016-dwc3-refactor-v1-0-ab4a84165470@quicinc.com> To: Bjorn Andersson , Konrad Dybcio , Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Wesley Cheng , Thinh Nguyen , Felipe Balbi , Philipp Zabel CC: , , , , Johan Hovold , Krishna Kurapati PSSNV , "Bjorn Andersson" X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; 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Mon, 16 Oct 2023 20:13:05 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779970751447635878 X-GMAIL-MSGID: 1779970751447635878 The Qualcomm USB block consists of three intertwined parts, the XHCI, the DWC3 core and the Qualcomm DWC3 glue. The three parts can not be operated independently, but the binding was for historical reasons split to mimic the Linux driver implementation. The split binding also makes it hard to alter the implementation, as properties and resources are split between the two nodes, in some cases with some duplication. Introduce a new binding, with a single representation of the whole USB block in one node. Signed-off-by: Bjorn Andersson --- .../devicetree/bindings/usb/qcom,dwc3.yaml | 482 +++++++++++++++++++++ .../devicetree/bindings/usb/snps,dwc3.yaml | 14 +- 2 files changed, 491 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml new file mode 100644 index 000000000000..cb50261c6a36 --- /dev/null +++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml @@ -0,0 +1,482 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/qcom,dwc3.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SuperSpeed DWC3 USB SoC controller + +maintainers: + - Wesley Cheng + +select: + properties: + compatible: + items: + - enum: + - qcom,ipq4019-dwc3 + - qcom,ipq5018-dwc3 + - qcom,ipq5332-dwc3 + - qcom,ipq6018-dwc3 + - qcom,ipq8064-dwc3 + - qcom,ipq8074-dwc3 + - qcom,ipq9574-dwc3 + - qcom,msm8953-dwc3 + - qcom,msm8994-dwc3 + - qcom,msm8996-dwc3 + - qcom,msm8998-dwc3 + - qcom,qcm2290-dwc3 + - qcom,qcs404-dwc3 + - qcom,sa8775p-dwc3 + - qcom,sc7180-dwc3 + - qcom,sc7280-dwc3 + - qcom,sc8180x-dwc3 + - qcom,sc8280xp-dwc3 + - qcom,sc8280xp-dwc3-mp + - qcom,sdm660-dwc3 + - qcom,sdm670-dwc3 + - qcom,sdm845-dwc3 + - qcom,sdx55-dwc3 + - qcom,sdx65-dwc3 + - qcom,sdx75-dwc3 + - qcom,sm4250-dwc3 + - qcom,sm6115-dwc3 + - qcom,sm6125-dwc3 + - qcom,sm6350-dwc3 + - qcom,sm6375-dwc3 + - qcom,sm8150-dwc3 + - qcom,sm8250-dwc3 + - qcom,sm8350-dwc3 + - qcom,sm8450-dwc3 + - qcom,sm8550-dwc3 + - const: qcom,dwc3 + - const: snps,dwc3 + required: + - compatible + +properties: + compatible: + items: + - enum: + - qcom,ipq4019-dwc3 + - qcom,ipq5018-dwc3 + - qcom,ipq5332-dwc3 + - qcom,ipq6018-dwc3 + - qcom,ipq8064-dwc3 + - qcom,ipq8074-dwc3 + - qcom,ipq9574-dwc3 + - qcom,msm8953-dwc3 + - qcom,msm8994-dwc3 + - qcom,msm8996-dwc3 + - qcom,msm8998-dwc3 + - qcom,qcm2290-dwc3 + - qcom,qcs404-dwc3 + - qcom,sa8775p-dwc3 + - qcom,sc7180-dwc3 + - qcom,sc7280-dwc3 + - qcom,sc8180x-dwc3 + - qcom,sc8280xp-dwc3 + - qcom,sc8280xp-dwc3-mp + - qcom,sdm660-dwc3 + - qcom,sdm670-dwc3 + - qcom,sdm845-dwc3 + - qcom,sdx55-dwc3 + - qcom,sdx65-dwc3 + - qcom,sdx75-dwc3 + - qcom,sm4250-dwc3 + - qcom,sm6115-dwc3 + - qcom,sm6125-dwc3 + - qcom,sm6350-dwc3 + - qcom,sm6375-dwc3 + - qcom,sm8150-dwc3 + - qcom,sm8250-dwc3 + - qcom,sm8350-dwc3 + - qcom,sm8450-dwc3 + - qcom,sm8550-dwc3 + - const: qcom,dwc3 + - const: snps,dwc3 + + reg: + description: Offset and length of register set for QSCRATCH wrapper + maxItems: 1 + + power-domains: + description: specifies a phandle to PM domain provider node + maxItems: 1 + + required-opps: + maxItems: 1 + + clocks: + description: | + Several clocks are used, depending on the variant. Typical ones are:: + - cfg_noc:: System Config NOC clock. + - core:: Master/Core clock, has to be >= 125 MHz for SS operation and >= + 60MHz for HS operation. + - iface:: System bus AXI clock. + - sleep:: Sleep clock, used for wakeup when USB3 core goes into low + power mode (U3). + - mock_utmi:: Mock utmi clock needed for ITP/SOF generation in host + mode. Its frequency should be 19.2MHz. + minItems: 1 + maxItems: 9 + + clock-names: + minItems: 1 + maxItems: 9 + + resets: + maxItems: 1 + + interconnects: + maxItems: 2 + + interconnect-names: + items: + - const: usb-ddr + - const: apps-usb + + interrupts: + minItems: 2 + maxItems: 5 + + interrupt-names: + minItems: 2 + maxItems: 5 + + qcom,select-utmi-as-pipe-clk: + description: + If present, disable USB3 pipe_clk requirement. + Used when dwc3 operates without SSPHY and only + HS/FS/LS modes are supported. + type: boolean + + wakeup-source: true + +# Required child node: + +required: + - compatible + - reg + - clocks + - clock-names + - interrupts + - interrupt-names + +allOf: + - $ref: snps,dwc3.yaml# + + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq4019-dwc3 + then: + properties: + clocks: + maxItems: 3 + clock-names: + items: + - const: core + - const: sleep + - const: mock_utmi + + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq8064-dwc3 + then: + properties: + clocks: + items: + - description: Master/Core clock, has to be >= 125 MHz + for SS operation and >= 60MHz for HS operation. + clock-names: + items: + - const: core + + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq9574-dwc3 + - qcom,msm8953-dwc3 + - qcom,msm8996-dwc3 + - qcom,msm8998-dwc3 + - qcom,sa8775p-dwc3 + - qcom,sc7180-dwc3 + - qcom,sc7280-dwc3 + - qcom,sdm670-dwc3 + - qcom,sdm845-dwc3 + - qcom,sdx55-dwc3 + - qcom,sdx65-dwc3 + - qcom,sdx75-dwc3 + - qcom,sm6350-dwc3 + then: + properties: + clocks: + maxItems: 5 + clock-names: + items: + - const: cfg_noc + - const: core + - const: iface + - const: sleep + - const: mock_utmi + + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq6018-dwc3 + then: + properties: + clocks: + minItems: 3 + maxItems: 4 + clock-names: + oneOf: + - items: + - const: core + - const: sleep + - const: mock_utmi + - items: + - const: cfg_noc + - const: core + - const: sleep + - const: mock_utmi + + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq8074-dwc3 + then: + properties: + clocks: + maxItems: 4 + clock-names: + items: + - const: cfg_noc + - const: core + - const: sleep + - const: mock_utmi + + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq5018-dwc3 + - qcom,ipq5332-dwc3 + - qcom,msm8994-dwc3 + - qcom,qcs404-dwc3 + then: + properties: + clocks: + maxItems: 4 + clock-names: + items: + - const: core + - const: iface + - const: sleep + - const: mock_utmi + + - if: + properties: + compatible: + contains: + enum: + - qcom,sc8280xp-dwc3 + - qcom,sc8280xp-dwc3-mp + then: + properties: + clocks: + maxItems: 9 + clock-names: + items: + - const: cfg_noc + - const: core + - const: iface + - const: sleep + - const: mock_utmi + - const: noc_aggr + - const: noc_aggr_north + - const: noc_aggr_south + - const: noc_sys + + - if: + properties: + compatible: + contains: + enum: + - qcom,sdm660-dwc3 + then: + properties: + clocks: + minItems: 5 + maxItems: 6 + clock-names: + oneOf: + - items: + - const: cfg_noc + - const: core + - const: iface + - const: sleep + - const: mock_utmi + - const: bus + - items: + - const: cfg_noc + - const: core + - const: sleep + - const: mock_utmi + - const: bus + + - if: + properties: + compatible: + contains: + enum: + - qcom,qcm2290-dwc3 + - qcom,sc8180x-dwc3 + - qcom,sm6115-dwc3 + - qcom,sm6125-dwc3 + - qcom,sm8150-dwc3 + - qcom,sm8250-dwc3 + - qcom,sm8450-dwc3 + - qcom,sm8550-dwc3 + then: + properties: + clocks: + minItems: 6 + clock-names: + items: + - const: cfg_noc + - const: core + - const: iface + - const: sleep + - const: mock_utmi + - const: xo + + - if: + properties: + compatible: + contains: + enum: + - qcom,sm8350-dwc3 + then: + properties: + clocks: + minItems: 5 + maxItems: 6 + clock-names: + minItems: 5 + items: + - const: cfg_noc + - const: core + - const: iface + - const: sleep + - const: mock_utmi + - const: xo + + - if: + properties: + compatible: + contains: + enum: + - qcom,sc8280xp-dwc3-mp + then: + properties: + interrupts: + maxItems: 14 + interrupt-names: + items: + - const: pwr_event_1 + - const: pwr_event_2 + - const: pwr_event_3 + - const: pwr_event_4 + - const: dp_hs_phy_1 + - const: dm_hs_phy_1 + - const: dp_hs_phy_2 + - const: dm_hs_phy_2 + - const: dp_hs_phy_3 + - const: dm_hs_phy_3 + - const: dp_hs_phy_4 + - const: dm_hs_phy_4 + - const: ss_phy_1 + - const: ss_phy_2 + else: + properties: + interrupts: + minItems: 1 + items: + - description: Common DWC3 interrupt + - description: The interrupt that is asserted + when a wakeup event is received on USB2 bus. + - description: The interrupt that is asserted + when a wakeup event is received on USB3 bus. + - description: Wakeup event on DM line. + - description: Wakeup event on DP line. + + interrupt-names: + minItems: 1 + items: + - const: dwc_usb3 + - const: hs_phy_irq + - const: ss_phy_irq + - const: dm_hs_phy_irq + - const: dp_hs_phy_irq + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + usb@a600000 { + compatible = "qcom,sdm845-dwc3", "qcom,dwc3", "snps,dwc3"; + reg = <0x0a600000 0x200000>; + + clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, + <&gcc GCC_USB30_PRIM_MASTER_CLK>, + <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>, + <&gcc GCC_USB30_PRIM_SLEEP_CLK>, + <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>; + clock-names = "cfg_noc", + "core", + "iface", + "sleep", + "mock_utmi"; + + assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, + <&gcc GCC_USB30_PRIM_MASTER_CLK>; + assigned-clock-rates = <19200000>, <150000000>; + + interrupts = , + , + , + , + ; + interrupt-names = "dwc_usb3", "hs_phy_irq", "ss_phy_irq", + "dm_hs_phy_irq", "dp_hs_phy_irq"; + + power-domains = <&gcc USB30_PRIM_GDSC>; + + iommus = <&apps_smmu 0x740 0>; + + resets = <&gcc GCC_USB30_PRIM_BCR>; + + snps,dis_u2_susphy_quirk; + snps,dis_enblslpm_quirk; + phys = <&usb_1_hsphy>, <&usb_1_ssphy>; + phy-names = "usb2-phy", "usb3-phy"; + + }; +... diff --git a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml index d81c2e849ca9..d6914b8cef6a 100644 --- a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml @@ -44,14 +44,18 @@ properties: It's either a single common DWC3 interrupt (dwc_usb3) or individual interrupts for the host, gadget and DRD modes. minItems: 1 - maxItems: 4 + maxItems: 5 interrupt-names: - minItems: 1 - maxItems: 4 oneOf: - - const: dwc_usb3 - - items: + - minItems: 1 + maxItems: 5 + items: + - const: dwc_usb3 + additionalItems: true + - minItems: 1 + maxItems: 4 + items: enum: [host, peripheral, otg, wakeup] clocks: From patchwork Tue Oct 17 03:11:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 153878 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2908:b0:403:3b70:6f57 with SMTP id ib8csp3869493vqb; Mon, 16 Oct 2023 20:13:18 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHn3jH29mU3xtWLBHYFPS0bV21/2yy/+auTGzgIwRZYj1l7OIRl5Aidd60PeJ+EJOWD1vLf X-Received: by 2002:a17:903:845:b0:1ca:273d:232 with SMTP id ks5-20020a170903084500b001ca273d0232mr1134955plb.0.1697512398096; Mon, 16 Oct 2023 20:13:18 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697512398; cv=none; d=google.com; s=arc-20160816; b=ZJNuS5OWd31eDwjnRbynSZucOo+enlNDNXLgNDUmL/UkjdPvOT5fC7bWu2HnCAvlEJ qWOJ2ehCEW3vsgYaMejoep/CM4tnNqPxXIY8F6ETPwvEYO5FYM0ZrO0/fcsY65/iZNYO BfOv7YTlE+Cp3wffKOzh/DJnUJ08hOmUoKs7WoqQauzWrnp2xLWkdMD14Fbk4FwIArlE eQTIzhy62Sbf4zc8CCKmBSJAdd9jwTgr1qS21n+vOqArFuEqfmiGbBbH6irWNiEuUes7 eGH0G1/1wFBQvJkuM7HpCGhQJnGIj2eYnGf14waK9reo679Kj+PJYam4X4tNMs9ThdrP jOqw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=FzE+nJADc6KEGAFQ2X715waVEHS3cgEjoG+xFy2ZWV0=; fh=yZ2owId4ryp9GLJ5ubSP1PQtd6LUH0AGZACw+F4ReGw=; b=DnM4t/N6RjhNhxC5oRY7pIerTXBhkiI1lTjYU1SATIFc11vbuNZ+R/MWX9wlAUO24N IawhGLbZ3UosmKjKD415b63p0OmXLULF9pIjQpfMDPqz5f9bKScHgYcoXkNxzQuTSdg1 RFBALFrDt6OJLIaHfQwt6vH4DJrWtAHzZJsRP6zRrsbNW+bP4KhuSWaP5Hwg3TwnQIBj BcIi/5bf1hXIkuGpQZX8pl/T0TJq8eSSOTZ/JRe7wwXTxubJ7++E0wg5P19uIbAfKCZH QmPe+pl54z8mtm2badNi4n6BPJ8kYfKXFVeAweOap8U7uNnX4TphFcavF2RgPoU98377 RrBw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=DTP+j7tB; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:5 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from groat.vger.email (groat.vger.email. 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Tue, 17 Oct 2023 03:11:30 +0000 Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 39H3BTrK015408 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 17 Oct 2023 03:11:29 GMT Received: from hu-bjorande-lv.qualcomm.com (10.49.16.6) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.39; Mon, 16 Oct 2023 20:11:29 -0700 From: Bjorn Andersson Date: Mon, 16 Oct 2023 20:11:19 -0700 Subject: [PATCH 11/12] usb: dwc3: qcom: Flatten the Qualcomm dwc3 binding and implementation MIME-Version: 1.0 Message-ID: <20231016-dwc3-refactor-v1-11-ab4a84165470@quicinc.com> References: <20231016-dwc3-refactor-v1-0-ab4a84165470@quicinc.com> In-Reply-To: <20231016-dwc3-refactor-v1-0-ab4a84165470@quicinc.com> To: Bjorn Andersson , Konrad Dybcio , Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Wesley Cheng , Thinh Nguyen , Felipe Balbi , Philipp Zabel CC: , , , , Johan Hovold , Krishna Kurapati PSSNV , "Bjorn Andersson" X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; 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Mon, 16 Oct 2023 20:13:15 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779970760382470505 X-GMAIL-MSGID: 1779970760382470505 The USB block found in most Qualcomm platforms is modelled as three different independent device drivers, and represented in DeviceTree as two layered nodes. But as shown by the already existing layering violations in the Qualcomm glue driver they can not be operated independently. In the current model, the probing of the core is asynchronous, and in a number of places there's risk that the driver dereferences NULL pointers, as it peeks into the core's drvdata. There is also no way, in the current design to make the core notify the glue upon DRD mode changes. Among the past proposals have been attempts to provide a callback registration API, but as there is no way to know when the core is probed this doesn't work. Based on the recent refactoring its now possible to instantiate the glue and core from a single representation of the DWC3 IP-block. This will also allow for the glue to pass a callback to be called for DRD mode changes. The only overlapping handling between the Qualcomm glue and the core is the release of reset, which is left to the core to handle. Signed-off-by: Bjorn Andersson --- drivers/usb/dwc3/dwc3-qcom.c | 49 +++++++++++++++++++++++++++++--------------- 1 file changed, 32 insertions(+), 17 deletions(-) diff --git a/drivers/usb/dwc3/dwc3-qcom.c b/drivers/usb/dwc3/dwc3-qcom.c index cf6c391ba498..3c9a2b5cd559 100644 --- a/drivers/usb/dwc3/dwc3-qcom.c +++ b/drivers/usb/dwc3/dwc3-qcom.c @@ -686,6 +686,16 @@ static int dwc3_qcom_probe_core(struct platform_device *pdev, struct dwc3_qcom * return 0; } +static bool dwc3_qcom_has_separate_dwc3_of_node(struct device *dev) +{ + struct device_node *np; + + np = of_get_compatible_child(dev->of_node, "snps,dwc3"); + of_node_put(np); + + return !!np; +} + static int dwc3_qcom_of_register_core(struct platform_device *pdev) { struct dwc3_qcom *qcom = platform_get_drvdata(pdev); @@ -795,11 +805,14 @@ static int dwc3_qcom_probe(struct platform_device *pdev) int ret, i; bool ignore_pipe_clk; bool wakeup_source; + bool legacy_binding; qcom = devm_kzalloc(&pdev->dev, sizeof(*qcom), GFP_KERNEL); if (!qcom) return -ENOMEM; + legacy_binding = dwc3_qcom_has_separate_dwc3_of_node(dev); + platform_set_drvdata(pdev, qcom); qcom->dev = &pdev->dev; @@ -823,24 +836,26 @@ static int dwc3_qcom_probe(struct platform_device *pdev) } } - qcom->resets = devm_reset_control_array_get_optional_exclusive(dev); - if (IS_ERR(qcom->resets)) { - return dev_err_probe(&pdev->dev, PTR_ERR(qcom->resets), - "failed to get resets\n"); - } + if (legacy_binding) { + qcom->resets = devm_reset_control_array_get_optional_exclusive(dev); + if (IS_ERR(qcom->resets)) { + return dev_err_probe(&pdev->dev, PTR_ERR(qcom->resets), + "failed to get resets\n"); + } - ret = reset_control_assert(qcom->resets); - if (ret) { - dev_err(&pdev->dev, "failed to assert resets, err=%d\n", ret); - return ret; - } + ret = reset_control_assert(qcom->resets); + if (ret) { + dev_err(&pdev->dev, "failed to assert resets, err=%d\n", ret); + return ret; + } - usleep_range(10, 1000); + usleep_range(10, 1000); - ret = reset_control_deassert(qcom->resets); - if (ret) { - dev_err(&pdev->dev, "failed to deassert resets, err=%d\n", ret); - goto reset_assert; + ret = reset_control_deassert(qcom->resets); + if (ret) { + dev_err(&pdev->dev, "failed to deassert resets, err=%d\n", ret); + goto reset_assert; + } } ret = dwc3_qcom_clk_init(qcom, of_clk_get_parent_count(np)); @@ -851,7 +866,7 @@ static int dwc3_qcom_probe(struct platform_device *pdev) res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (np) { + if (legacy_binding) { parent_res = res; } else { memcpy(&local_res, res, sizeof(struct resource)); @@ -882,7 +897,7 @@ static int dwc3_qcom_probe(struct platform_device *pdev) if (ignore_pipe_clk) dwc3_qcom_select_utmi_clk(qcom); - if (np) + if (legacy_binding) ret = dwc3_qcom_of_register_core(pdev); else ret = dwc3_qcom_probe_core(pdev, qcom); From patchwork Tue Oct 17 03:11:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 153870 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2908:b0:403:3b70:6f57 with SMTP id ib8csp3869270vqb; Mon, 16 Oct 2023 20:12:35 -0700 (PDT) X-Google-Smtp-Source: AGHT+IG2+3a1GRS6CwmYFrdghsRXviOZL9113+mLdq08waPBiyK1NOCOv57Fz0yMhNt/ou8DmDhn X-Received: by 2002:a17:90b:3eca:b0:263:730b:f568 with SMTP id rm10-20020a17090b3eca00b00263730bf568mr1099614pjb.3.1697512355727; Mon, 16 Oct 2023 20:12:35 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697512355; cv=none; d=google.com; s=arc-20160816; b=jCZRDw8e762p4PieuMx8/jfPhn5xDlRsyk7bAc0qu3Zh7fYEhlZ2gnC4MCJ6l+U1VM 3y9Xy7MmZvgPBZCyXPMeK3paLkPcRWkTWdwsCv6OtBiW5Z7ehGGtvVTS8ZO/AjE3GLXH WH93BoCX5cHKOBvBacbtEKU8pen19amrrCzPXIQxUGWdJNRozaaucBqZbgiTFddcb7jt HoQ9sg4/l+t+4Ec1dNFiTRRmeuogbjJBBeAbx9tz6B4xquAuKZHQCBQzCr7PqYWPu6ZH pJONS8Zs3nhLpQHWynP+CGbH6PpnMMswLFOZOYBvwKRWjLi8E3pKtO6fCyCrSRTqjL8m NXYw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=Kjra/0cjyoiECp8232apcs6dm3Z9K3KJxcZmuOoDaWE=; fh=yZ2owId4ryp9GLJ5ubSP1PQtd6LUH0AGZACw+F4ReGw=; b=OTiL7Ia8ZdELJiAhvL7xpCk1eATphAV+u2XXoPTNmiRimj1YmQpvKzG/RHhlqu3PVo uQTSV1qGG9zIOe9Pjkdk/eQcj9NNlYVUxdiyqZ74UGLt9r1SQ+9XAXnJK93cfu7VGMsZ MVIADz8SK+72Ps5IxqlS8qVXV/s/wmsAr5bv/ZJfdtEMujBY0dve+H6wUbnnI0RMEoVH XUwCKwBePjDUdjc48ib0FwE5YRTplFs8mj+q8CIZpOATaCdI8GAl1swZLk4NgVDn9vj/ YW59hO9aZFIEZEYPNIUKyb4AMXbgmCPAUkDXu+h5VCxB/1QL1IBSRq+lLwZK9C1Lopuc PGjA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=MPLf45ZL; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.31 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from morse.vger.email (morse.vger.email. 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Mon, 16 Oct 2023 20:12:33 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779970716003706656 X-GMAIL-MSGID: 1779970716003706656 Flatten one of the USB controllers in the SC8180X platform, as an example. Signed-off-by: Bjorn Andersson --- .../arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts | 6 ++-- arch/arm64/boot/dts/qcom/sc8180x-primus.dts | 6 ++-- arch/arm64/boot/dts/qcom/sc8180x.dtsi | 34 +++++++++------------- 3 files changed, 17 insertions(+), 29 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts b/arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts index 3ea07d094b60..91a9d822ea43 100644 --- a/arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts +++ b/arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts @@ -607,11 +607,9 @@ &usb_sec_role_switch { }; &usb_sec { - status = "okay"; -}; - -&usb_sec_dwc3 { dr_mode = "host"; + + status = "okay"; }; &wifi { diff --git a/arch/arm64/boot/dts/qcom/sc8180x-primus.dts b/arch/arm64/boot/dts/qcom/sc8180x-primus.dts index fd2fab4895b3..a17c69b5aa57 100644 --- a/arch/arm64/boot/dts/qcom/sc8180x-primus.dts +++ b/arch/arm64/boot/dts/qcom/sc8180x-primus.dts @@ -684,11 +684,9 @@ &usb_sec_role_switch { }; &usb_sec { - status = "okay"; -}; - -&usb_sec_dwc3 { dr_mode = "host"; + + status = "okay"; }; &wifi { diff --git a/arch/arm64/boot/dts/qcom/sc8180x.dtsi b/arch/arm64/boot/dts/qcom/sc8180x.dtsi index a34f438ef2d9..f5e427789ad8 100644 --- a/arch/arm64/boot/dts/qcom/sc8180x.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8180x.dtsi @@ -2605,8 +2605,8 @@ usb_prim_role_switch: endpoint { }; usb_sec: usb@a8f8800 { - compatible = "qcom,sc8180x-dwc3", "qcom,dwc3"; - reg = <0 0x0a8f8800 0 0x400>; + compatible = "qcom,sc8180x-dwc3", "qcom,dwc3", "snps,dwc3"; + reg = <0 0x0a800000 0 0x200000>; clocks = <&gcc GCC_CFG_NOC_USB3_SEC_AXI_CLK>, <&gcc GCC_USB30_SEC_MASTER_CLK>, @@ -2622,11 +2622,12 @@ usb_sec: usb@a8f8800 { "xo"; resets = <&gcc GCC_USB30_SEC_BCR>; power-domains = <&gcc USB30_SEC_GDSC>; - interrupts = , + interrupts = , + , , , ; - interrupt-names = "hs_phy_irq", "ss_phy_irq", + interrupt-names = "dwc_usb3", "hs_phy_irq", "ss_phy_irq", "dm_hs_phy_irq", "dp_hs_phy_irq"; assigned-clocks = <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, @@ -2637,26 +2638,17 @@ usb_sec: usb@a8f8800 { <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_USB3_1 0>; interconnect-names = "usb-ddr", "apps-usb"; - #address-cells = <2>; - #size-cells = <2>; - ranges; - dma-ranges; + iommus = <&apps_smmu 0x160 0>; - status = "disabled"; + snps,dis_u2_susphy_quirk; + snps,dis_enblslpm_quirk; + phys = <&usb_sec_hsphy>, <&usb_sec_ssphy>; + phy-names = "usb2-phy", "usb3-phy"; - usb_sec_dwc3: usb@a800000 { - compatible = "snps,dwc3"; - reg = <0 0x0a800000 0 0xcd00>; - interrupts = ; - iommus = <&apps_smmu 0x160 0>; - snps,dis_u2_susphy_quirk; - snps,dis_enblslpm_quirk; - phys = <&usb_sec_hsphy>, <&usb_sec_ssphy>; - phy-names = "usb2-phy", "usb3-phy"; + status = "disabled"; - port { - usb_sec_role_switch: endpoint { - }; + port { + usb_sec_role_switch: endpoint { }; }; };