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[8.43.85.97]) by mx.google.com with ESMTPS id q22-20020a05620a0c9600b00776fb0c6b42si3347117qki.461.2023.10.14.17.44.42 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 14 Oct 2023 17:44:42 -0700 (PDT) Received-SPF: pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; dkim=pass header.i=@irq.a4lg.com header.s=2017s01 header.b=TZtpatva; arc=pass (i=1); spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=irq.a4lg.com Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id A39CA3858031 for ; Sun, 15 Oct 2023 00:44:42 +0000 (GMT) X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender.a4lg.com [153.120.152.154]) by sourceware.org (Postfix) with ESMTPS id 3AC2E3858C5F for ; Sun, 15 Oct 2023 00:44:36 +0000 (GMT) ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 3AC2E3858C5F Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=153.120.152.154 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1697330678; cv=none; b=bZ0JHhe7nwBcYQw/+1CX1bbHBeFbA8OlDmtvBNTcLqf/AggblRd7FodFWDR/BIsUdhWTSPdr8sPwFpxlKsCWhJk6LKQ+Hx8t5PoCwb105pMJZZIbPLDQLeitkYoUZ+9x8p37pFjxtJ2qRM2ruFBpdy1FBIJigARB1f7RMGoJW0k= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1697330678; c=relaxed/simple; bh=Klwr/baGX8A5XlwSS1DFFl7TkzbBoG3lEpxRrsgW0I4=; h=DKIM-Signature:From:To:Subject:Date:Message-ID:Mime-Version; b=olLPhyWLipy6957WWOyCab1mR2O15z7ODSnMYHiYOxMW1ieZdkegHdDgJC9xTpnqYPwr8lVVGkxVScv86vpRhTtykP5I3pl0yVzSJt34XrLhjlNV0uSXb1l6yCzkMxVu+WMqqrte2mJS8IElc8rAhnbnRMOh0e3rKXNbJE8xETc= ARC-Authentication-Results: i=1; server2.sourceware.org DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 3AC2E3858C5F Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=irq.a4lg.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=irq.a4lg.com Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id ACC27300089; Sun, 15 Oct 2023 00:44:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=irq.a4lg.com; s=2017s01; t=1697330673; bh=hfIubmdGtzg9ADBfPkSQb3q8909FDLTTgOMWGebq6yA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: Mime-Version:Content-Transfer-Encoding; b=TZtpatvawnc/mROo/OgoSFb8NnnQiYHcn4vdcJ0/x1/gdFkgHPqoRIu7ACZSn6h8I 0D+0RzZT6VTWInTwcFmasyZB+twobEBAO0KQGc0zhh75wMKPAEIiM2TkZ9zKp5Wdtd ckndedxPJaeovY1byYNn9Cimw+WfoNTbMjDWuELc= From: Tsukasa OI To: Tsukasa OI , Palmer Dabbelt , Andrew Waterman , Jim Wilson , Nelson Chu , Kito Cheng Cc: binutils@sourceware.org Subject: [PATCH v2 1/2] RISC-V: Group linker relaxation features Date: Sun, 15 Oct 2023 00:44:17 +0000 Message-ID: <9b8b01e1427cc0498fed6df25787af0da63cca47.1697330630.git.research_trasio@irq.a4lg.com> In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-11.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, KAM_MANYTO, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: binutils-bounces+ouuuleilei=gmail.com@sourceware.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779780218558326717 X-GMAIL-MSGID: 1779780218558326717 From: Tsukasa OI It does not only deduplicate multiple relaxation feature detection, but enable more complex features so that querying the feature availability will get too slow if we perform it per-relocation (not per-section). Even if that wouldn't happen any time soon, it will improve the maintainability around the linker relaxation code. bfd/ChangeLog: * elfnn-riscv.c (RISCV_RELAX_RVC, RISCV_RELAX_GP): New. (relax_func_t): Add new relax_features argument. (_bfd_riscv_relax_call): Likewise. Move feature detection to _bfd_riscv_relax_section. Use bool for simplicity. (_bfd_riscv_relax_lui): Likewise. Move feature detection to _bfd_riscv_relax_section. (_bfd_riscv_relax_tls_le): Likewise but features are not used. (_bfd_riscv_relax_align): Likewise but features are not used. (_bfd_riscv_relax_pc): Likewise. Move feature detection to _bfd_riscv_relax_section. (_bfd_riscv_relax_section): Detect relaxation-related features and pass the flags to each relaxation function. Use the PIC feature flag generated by itself. --- bfd/elfnn-riscv.c | 50 ++++++++++++++++++++++++++++++++++------------- 1 file changed, 36 insertions(+), 14 deletions(-) diff --git a/bfd/elfnn-riscv.c b/bfd/elfnn-riscv.c index 09aa7be225ef..947a02d44478 100644 --- a/bfd/elfnn-riscv.c +++ b/bfd/elfnn-riscv.c @@ -4085,6 +4085,11 @@ _bfd_riscv_elf_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info) return false; } +/* Enabled relaxation features to use. */ +#define RISCV_RELAX_RVC 0x01U +#define RISCV_RELAX_GP 0x02U +#define RISCV_RELAX_PIC 0x04U + /* A second format for recording PC-relative hi relocations. This stores the information required to relax them to GP-relative addresses. */ @@ -4471,7 +4476,8 @@ typedef bool (*relax_func_t) (bfd *, asection *, asection *, Elf_Internal_Rela *, bfd_vma, bfd_vma, bfd_vma, bool *, riscv_pcgp_relocs *, - bool undefined_weak); + bool undefined_weak, + unsigned relax_features); /* Relax AUIPC + JALR into JAL. */ @@ -4484,13 +4490,15 @@ _bfd_riscv_relax_call (bfd *abfd, asection *sec, asection *sym_sec, bfd_vma reserve_size ATTRIBUTE_UNUSED, bool *again, riscv_pcgp_relocs *pcgp_relocs, - bool undefined_weak ATTRIBUTE_UNUSED) + bool undefined_weak ATTRIBUTE_UNUSED, + unsigned relax_features) { bfd_byte *contents = elf_section_data (sec)->this_hdr.contents; bfd_vma foff = symval - (sec_addr (sec) + rel->r_offset); bool near_zero = (symval + RISCV_IMM_REACH / 2) < RISCV_IMM_REACH; + bool rvc = (relax_features & RISCV_RELAX_RVC) != 0; bfd_vma auipc, jalr; - int rd, r_type, len = 4, rvc = elf_elfheader (abfd)->e_flags & EF_RISCV_RVC; + int rd, r_type, len = 4; /* If the call crosses section boundaries, an alignment directive could cause the PC-relative offset to later increase, so we need to add in the @@ -4505,7 +4513,8 @@ _bfd_riscv_relax_call (bfd *abfd, asection *sec, asection *sym_sec, } /* See if this function call can be shortened. */ - if (!VALID_JTYPE_IMM (foff) && !(!bfd_link_pic (link_info) && near_zero)) + if (!VALID_JTYPE_IMM (foff) + && !(!(relax_features & RISCV_RELAX_PIC) && near_zero)) return true; /* Shorten the function call. */ @@ -4590,15 +4599,16 @@ _bfd_riscv_relax_lui (bfd *abfd, bfd_vma reserve_size, bool *again, riscv_pcgp_relocs *pcgp_relocs, - bool undefined_weak) + bool undefined_weak, + unsigned relax_features) { struct riscv_elf_link_hash_table *htab = riscv_elf_hash_table (link_info); bfd_byte *contents = elf_section_data (sec)->this_hdr.contents; /* Can relax to x0 even when gp relaxation is disabled. */ - bfd_vma gp = htab->params->relax_gp + bfd_vma gp = (relax_features & RISCV_RELAX_GP) != 0 ? riscv_global_pointer_value (link_info) : 0; - int use_rvc = elf_elfheader (abfd)->e_flags & EF_RISCV_RVC; + bool use_rvc = (relax_features & RISCV_RELAX_RVC) != 0; BFD_ASSERT (rel->r_offset + 4 <= sec->size); @@ -4703,7 +4713,8 @@ _bfd_riscv_relax_tls_le (bfd *abfd, bfd_vma reserve_size ATTRIBUTE_UNUSED, bool *again, riscv_pcgp_relocs *pcgp_relocs, - bool undefined_weak ATTRIBUTE_UNUSED) + bool undefined_weak ATTRIBUTE_UNUSED, + unsigned relax_features ATTRIBUTE_UNUSED) { /* See if this symbol is in range of tp. */ if (RISCV_CONST_HIGH_PART (tpoff (link_info, symval)) != 0) @@ -4745,7 +4756,8 @@ _bfd_riscv_relax_align (bfd *abfd, asection *sec, bfd_vma reserve_size ATTRIBUTE_UNUSED, bool *again ATTRIBUTE_UNUSED, riscv_pcgp_relocs *pcgp_relocs ATTRIBUTE_UNUSED, - bool undefined_weak ATTRIBUTE_UNUSED) + bool undefined_weak ATTRIBUTE_UNUSED, + unsigned relax_features ATTRIBUTE_UNUSED) { bfd_byte *contents = elf_section_data (sec)->this_hdr.contents; bfd_vma alignment = 1, pos; @@ -4805,11 +4817,12 @@ _bfd_riscv_relax_pc (bfd *abfd ATTRIBUTE_UNUSED, bfd_vma reserve_size, bool *again, riscv_pcgp_relocs *pcgp_relocs, - bool undefined_weak) + bool undefined_weak, + unsigned relax_features) { struct riscv_elf_link_hash_table *htab = riscv_elf_hash_table (link_info); /* Can relax to x0 even when gp relaxation is disabled. */ - bfd_vma gp = htab->params->relax_gp + bfd_vma gp = (relax_features & RISCV_RELAX_GP) != 0 ? riscv_global_pointer_value (link_info) : 0; @@ -4965,6 +4978,15 @@ _bfd_riscv_relax_section (bfd *abfd, asection *sec, bfd_vma max_alignment, reserve_size = 0; riscv_pcgp_relocs pcgp_relocs; static asection *first_section = NULL; + unsigned relax_features = 0; + + /* Detect available/enabled relaxation features. */ + if (elf_elfheader (abfd)->e_flags & EF_RISCV_RVC) + relax_features |= RISCV_RELAX_RVC; + if (htab->params->relax_gp) + relax_features |= RISCV_RELAX_GP; + if (bfd_link_pic (info)) + relax_features |= RISCV_RELAX_PIC; *again = false; @@ -5032,7 +5054,7 @@ _bfd_riscv_relax_section (bfd *abfd, asection *sec, || type == R_RISCV_TPREL_LO12_I || type == R_RISCV_TPREL_LO12_S) relax_func = _bfd_riscv_relax_tls_le; - else if (!bfd_link_pic (info) + else if (!(relax_features & RISCV_RELAX_PIC) && (type == R_RISCV_PCREL_HI20 || type == R_RISCV_PCREL_LO12_I || type == R_RISCV_PCREL_LO12_S)) @@ -5145,7 +5167,7 @@ _bfd_riscv_relax_section (bfd *abfd, asection *sec, /* This line has to match the check in riscv_elf_relocate_section in the R_RISCV_CALL[_PLT] case. */ - if (bfd_link_pic (info) && h->plt.offset != MINUS_ONE) + if ((relax_features & RISCV_RELAX_PIC) && h->plt.offset != MINUS_ONE) { sym_sec = htab->elf.splt; symval = h->plt.offset; @@ -5208,7 +5230,7 @@ _bfd_riscv_relax_section (bfd *abfd, asection *sec, if (!relax_func (abfd, sec, sym_sec, info, rel, symval, max_alignment, reserve_size, again, - &pcgp_relocs, undefined_weak)) + &pcgp_relocs, undefined_weak, relax_features)) goto fail; } From patchwork Sun Oct 15 00:44:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 152979 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2908:b0:403:3b70:6f57 with SMTP id ib8csp2715799vqb; Sat, 14 Oct 2023 17:44:57 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEDEna0Nbb9eglWH6KQBZYLdKhaOdsMriOUcBfXpMRIV/XXYlYTn7oTwmnjEJ+W3BYWOHtM X-Received: by 2002:ac8:4e4c:0:b0:418:d18:56ae with SMTP id e12-20020ac84e4c000000b004180d1856aemr36006413qtw.25.1697330697288; Sat, 14 Oct 2023 17:44:57 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1697330697; cv=pass; d=google.com; s=arc-20160816; b=hk0bsHtiYxh5tfK5ZhIYi2do1MhLFTR/7n0m3sQMdxMyylNcRMPQji8Sl16vpwOKKZ lpVtxSR476Ztoztg3QNvX7XSa5/9IOdPLHaUanxaQ7G/lmkKJK9fHQG7/FiA8YaOskPJ /KzZIClz1ukjrYllrHIGUvQ/2EzjHBACrjp/1Se+6Hb+NFyzziNL4ibWVkb+08B7cuPq DmMzeOSJBcxwNmfb0rRr6BMUbNpg3V1uB8KO+iVTvFpwUGX+5tQxIOtshgsNse/tKKrJ V5zsGFolREXD+K0sjmHSfGZRs1ADSNcKhMbpQ8lxhXII2DOLpi47tqNNsxDpFEcJh+s9 Q1ig== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature:dmarc-filter:arc-filter:delivered-to; bh=1oglxlNRM3nqD7sbljgPRvQkGQE1HeOJOZKXWOh7n/g=; fh=Q+ZPQdyJDzJx4BfovHNTR1lP4msTSfN6TDra8V1lyf8=; b=IMSbjwcTjOhBrU6snasH81C7X8kG2jGpFWpBMPT7ap5iFuo2IvkO/w5MGpk4U0DDBN VwyaFP4tjjXgZ+K0/wb3/EHPQ3/jsCbHSsrZCUO68NdPHLctsNxXa0AXiLfQzhgQLrLP lh5rxyKvMTVs4H3rDW0l77mgsttBy0AoJy0YLFrrJy3s8O5rbA+qiKFzfoflfYGyLV9M DgOt0vOLQo3eqqPVpj8Y0qnOYFGzdB6arw7DoPMqlxK4XPwQfhtmZGJ5zMJgCFFDaiwe 2/wmofV2M9SeCGIB30ctV6Ynq9Umt/Wjwr95vue0FDmOC1j6Eg2zi+6hesg6D95/GD8o de6Q== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@irq.a4lg.com header.s=2017s01 header.b=mCf9GSyi; arc=pass (i=1); spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=irq.a4lg.com Received: from server2.sourceware.org (server2.sourceware.org. [2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id j17-20020ac85f91000000b004181594e15dsi3374754qta.326.2023.10.14.17.44.57 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 14 Oct 2023 17:44:57 -0700 (PDT) Received-SPF: pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; dkim=pass header.i=@irq.a4lg.com header.s=2017s01 header.b=mCf9GSyi; arc=pass (i=1); spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=irq.a4lg.com Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 1EE7A3858031 for ; Sun, 15 Oct 2023 00:44:55 +0000 (GMT) X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender.a4lg.com [153.120.152.154]) by sourceware.org (Postfix) with ESMTPS id 0E3B23858410 for ; Sun, 15 Oct 2023 00:44:46 +0000 (GMT) ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 0E3B23858410 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=153.120.152.154 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1697330690; cv=none; b=As4jjo399xDVaiOJbjbf5wSR3nEBBh/wOmEMx1nEp4qAS4KUTLb58En/e88L2NI9PYbthG4WEjqtyC86RrUMnqEBVpnnl6sUBkMJIFpnTAo8vzJW3TuGm6Cb6duARSa1F4ozoXIA9Bzg3bugHdVfgDapqHEv4a5tTaqhtALfsk8= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1697330690; c=relaxed/simple; bh=02tN3X3VivyPj35CP8r7yFt7FNkAwV07sgBUfOijRwE=; h=DKIM-Signature:From:To:Subject:Date:Message-ID:Mime-Version; b=V3VEOR6bT1/G4vzCEFOEKkyWtzI0wnGNBBO6LXhFqrGWBgefb9VB+qJy85LoZXvpP4wkuqj6FmdOyvet6g0r4PEFhJx1SzNaUK28nLyER3jzlIWLBihkcrHe5pMKWuXBpv94DtXM6Af/n/diM+z/Gu9UlnmAVZKmYbBpMspKMqE= ARC-Authentication-Results: i=1; server2.sourceware.org DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 0E3B23858410 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=irq.a4lg.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=irq.a4lg.com Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 7788C300089; Sun, 15 Oct 2023 00:44:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=irq.a4lg.com; s=2017s01; t=1697330684; bh=1oglxlNRM3nqD7sbljgPRvQkGQE1HeOJOZKXWOh7n/g=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: Mime-Version:Content-Transfer-Encoding; b=mCf9GSyiVFu2AIZ/eY3+wCVMX4VuvBJeQ9dBTalmI81KsfL9crgISR93PGQCyc9lV vjkc/vl0yKnab8HE6XNufMx3ZgjuutltTqNq+ewB0FMGzqZactRrkeF4LFDouIl8ft NJEI+5b/lP2nTx+zRRPstb+a+RnukXIm+frMJuIw= From: Tsukasa OI To: Tsukasa OI , Palmer Dabbelt , Andrew Waterman , Jim Wilson , Nelson Chu , Kito Cheng Cc: binutils@sourceware.org Subject: [PATCH v2 2/2] RISC-V: Prepare for more generic PCREL relaxations Date: Sun, 15 Oct 2023 00:44:18 +0000 Message-ID: In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-11.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, KAM_MANYTO, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: binutils-bounces+ouuuleilei=gmail.com@sourceware.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779705942639052649 X-GMAIL-MSGID: 1779780233174558502 From: Tsukasa OI There's not only Global-pointer Relaxation defined by the RISC-V psABI Specification. There is also the Zero-page relaxation, making the name "pcgp" not suitable for storage to PC-relative relocations used in the linker relaxation passes. This commit prepares for future changes including proper zero-page relaxation. bfd/ChangeLog: * elfnn-riscv.c (struct riscv_pcgp_hi_reloc): Rename to... (struct riscv_pc_relax_hi_reloc): ...here. (struct riscv_pcgp_lo_reloc): Rename to... (struct riscv_pc_relax_lo_reloc): ...here. (riscv_init_pcgp_relocs): Rename to... (riscv_init_pc_relax_relocs): ...here. (riscv_free_pcgp_relocs): Rename to... (riscv_free_pc_relax_relocs): ...here. (riscv_record_pcgp_hi_reloc): Rename to... (riscv_record_pc_relax_hi_reloc): ...here. (riscv_find_pcgp_hi_reloc): Rename to... (riscv_find_pc_relax_hi_reloc): ...here. (riscv_record_pcgp_lo_reloc): Rename to... (riscv_record_pc_relax_lo_reloc): ...here. (riscv_find_pcgp_lo_reloc): Rename to... (riscv_find_pc_relax_lo_reloc): ...here. (riscv_update_pcgp_relocs): Rename to... (riscv_update_pc_relax_relocs): ...here. (_riscv_relax_delete_bytes, _riscv_relax_delete_piecewise, _riscv_relax_delete_immediate, _bfd_riscv_relax_call, _bfd_riscv_relax_tls_le, _bfd_riscv_relax_align, _bfd_riscv_relax_section): Reflect name changes. (_bfd_riscv_relax_lui, _bfd_riscv_relax_pc): Likewise. Also change "GP-relative" to "GP/zero-relative" in the function description comment. --- bfd/elfnn-riscv.c | 143 ++++++++++++++++++++++++---------------------- 1 file changed, 75 insertions(+), 68 deletions(-) diff --git a/bfd/elfnn-riscv.c b/bfd/elfnn-riscv.c index 947a02d44478..97ed74ffa91e 100644 --- a/bfd/elfnn-riscv.c +++ b/bfd/elfnn-riscv.c @@ -4091,10 +4091,10 @@ _bfd_riscv_elf_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info) #define RISCV_RELAX_PIC 0x04U /* A second format for recording PC-relative hi relocations. This stores the - information required to relax them to GP-relative addresses. */ + information required to relax them to other kinds of relative addresses. */ -typedef struct riscv_pcgp_hi_reloc riscv_pcgp_hi_reloc; -struct riscv_pcgp_hi_reloc +typedef struct riscv_pc_relax_hi_reloc riscv_pc_relax_hi_reloc; +struct riscv_pc_relax_hi_reloc { bfd_vma hi_sec_off; bfd_vma hi_addend; @@ -4102,68 +4102,69 @@ struct riscv_pcgp_hi_reloc unsigned hi_sym; asection *sym_sec; bool undefined_weak; - riscv_pcgp_hi_reloc *next; + riscv_pc_relax_hi_reloc *next; }; -typedef struct riscv_pcgp_lo_reloc riscv_pcgp_lo_reloc; -struct riscv_pcgp_lo_reloc +typedef struct riscv_pc_relax_lo_reloc riscv_pc_relax_lo_reloc; +struct riscv_pc_relax_lo_reloc { bfd_vma hi_sec_off; - riscv_pcgp_lo_reloc *next; + riscv_pc_relax_lo_reloc *next; }; typedef struct { - riscv_pcgp_hi_reloc *hi; - riscv_pcgp_lo_reloc *lo; -} riscv_pcgp_relocs; + riscv_pc_relax_hi_reloc *hi; + riscv_pc_relax_lo_reloc *lo; +} riscv_pc_relax_relocs; -/* Initialize the pcgp reloc info in P. */ +/* Initialize the pc relaxation reloc info in P. */ static bool -riscv_init_pcgp_relocs (riscv_pcgp_relocs *p) +riscv_init_pc_relax_relocs (riscv_pc_relax_relocs *p) { p->hi = NULL; p->lo = NULL; return true; } -/* Free the pcgp reloc info in P. */ +/* Free the pc relaxation reloc info in P. */ static void -riscv_free_pcgp_relocs (riscv_pcgp_relocs *p, - bfd *abfd ATTRIBUTE_UNUSED, - asection *sec ATTRIBUTE_UNUSED) +riscv_free_pc_relax_relocs (riscv_pc_relax_relocs *p, + bfd *abfd ATTRIBUTE_UNUSED, + asection *sec ATTRIBUTE_UNUSED) { - riscv_pcgp_hi_reloc *c; - riscv_pcgp_lo_reloc *l; + riscv_pc_relax_hi_reloc *c; + riscv_pc_relax_lo_reloc *l; for (c = p->hi; c != NULL; ) { - riscv_pcgp_hi_reloc *next = c->next; + riscv_pc_relax_hi_reloc *next = c->next; free (c); c = next; } for (l = p->lo; l != NULL; ) { - riscv_pcgp_lo_reloc *next = l->next; + riscv_pc_relax_lo_reloc *next = l->next; free (l); l = next; } } -/* Record pcgp hi part reloc info in P, using HI_SEC_OFF as the lookup index. - The HI_ADDEND, HI_ADDR, HI_SYM, and SYM_SEC args contain info required to - relax the corresponding lo part reloc. */ +/* Record pc relaxation hi part reloc info in P, using HI_SEC_OFF as + the lookup index. The HI_ADDEND, HI_ADDR, HI_SYM, and SYM_SEC args + contain info required to relax the corresponding lo part reloc. */ static bool -riscv_record_pcgp_hi_reloc (riscv_pcgp_relocs *p, bfd_vma hi_sec_off, - bfd_vma hi_addend, bfd_vma hi_addr, - unsigned hi_sym, asection *sym_sec, - bool undefined_weak) +riscv_record_pc_relax_hi_reloc (riscv_pc_relax_relocs *p, + bfd_vma hi_sec_off, + bfd_vma hi_addend, bfd_vma hi_addr, + unsigned hi_sym, asection *sym_sec, + bool undefined_weak) { - riscv_pcgp_hi_reloc *new = bfd_malloc (sizeof (*new)); + riscv_pc_relax_hi_reloc *new = bfd_malloc (sizeof (*new)); if (!new) return false; new->hi_sec_off = hi_sec_off; @@ -4180,10 +4181,10 @@ riscv_record_pcgp_hi_reloc (riscv_pcgp_relocs *p, bfd_vma hi_sec_off, /* Look up hi part pcgp reloc info in P, using HI_SEC_OFF as the lookup index. This is used by a lo part reloc to find the corresponding hi part reloc. */ -static riscv_pcgp_hi_reloc * -riscv_find_pcgp_hi_reloc (riscv_pcgp_relocs *p, bfd_vma hi_sec_off) +static riscv_pc_relax_hi_reloc * +riscv_find_pc_relax_hi_reloc (riscv_pc_relax_relocs *p, bfd_vma hi_sec_off) { - riscv_pcgp_hi_reloc *c; + riscv_pc_relax_hi_reloc *c; for (c = p->hi; c != NULL; c = c->next) if (c->hi_sec_off == hi_sec_off) @@ -4195,9 +4196,10 @@ riscv_find_pcgp_hi_reloc (riscv_pcgp_relocs *p, bfd_vma hi_sec_off) This is used to record relocs that can't be relaxed. */ static bool -riscv_record_pcgp_lo_reloc (riscv_pcgp_relocs *p, bfd_vma hi_sec_off) +riscv_record_pc_relax_lo_reloc (riscv_pc_relax_relocs *p, + bfd_vma hi_sec_off) { - riscv_pcgp_lo_reloc *new = bfd_malloc (sizeof (*new)); + riscv_pc_relax_lo_reloc *new = bfd_malloc (sizeof (*new)); if (!new) return false; new->hi_sec_off = hi_sec_off; @@ -4210,9 +4212,9 @@ riscv_record_pcgp_lo_reloc (riscv_pcgp_relocs *p, bfd_vma hi_sec_off) This is used by a hi part reloc to find the corresponding lo part reloc. */ static bool -riscv_find_pcgp_lo_reloc (riscv_pcgp_relocs *p, bfd_vma hi_sec_off) +riscv_find_pc_relax_lo_reloc (riscv_pc_relax_relocs *p, bfd_vma hi_sec_off) { - riscv_pcgp_lo_reloc *c; + riscv_pc_relax_lo_reloc *c; for (c = p->lo; c != NULL; c = c->next) if (c->hi_sec_off == hi_sec_off) @@ -4221,14 +4223,16 @@ riscv_find_pcgp_lo_reloc (riscv_pcgp_relocs *p, bfd_vma hi_sec_off) } static void -riscv_update_pcgp_relocs (riscv_pcgp_relocs *p, asection *deleted_sec, - bfd_vma deleted_addr, size_t deleted_count) +riscv_update_pc_relax_relocs (riscv_pc_relax_relocs *p, + asection *deleted_sec, + bfd_vma deleted_addr, + size_t deleted_count) { /* Bytes have already been deleted and toaddr should match the old section size for our checks, so adjust it here. */ bfd_vma toaddr = deleted_sec->size + deleted_count; - riscv_pcgp_lo_reloc *l; - riscv_pcgp_hi_reloc *h; + riscv_pc_relax_lo_reloc *l; + riscv_pc_relax_hi_reloc *h; /* Update section offsets of corresponding pcrel_hi relocs for the pcrel_lo entries where they occur after the deleted bytes. */ @@ -4259,7 +4263,7 @@ _riscv_relax_delete_bytes (bfd *abfd, bfd_vma addr, size_t count, struct bfd_link_info *link_info, - riscv_pcgp_relocs *p, + riscv_pc_relax_relocs *p, bfd_vma delete_total, bfd_vma toaddr) { @@ -4288,7 +4292,7 @@ _riscv_relax_delete_bytes (bfd *abfd, /* Adjust the hi_sec_off, and the hi_addr of any entries in the pcgp relocs table for which these values occur after the deleted bytes. */ if (p) - riscv_update_pcgp_relocs (p, sec, addr, count); + riscv_update_pc_relax_relocs (p, sec, addr, count); /* Adjust the local symbols defined in this section. */ for (i = 0; i < symtab_hdr->sh_info; i++) @@ -4377,7 +4381,7 @@ _riscv_relax_delete_bytes (bfd *abfd, typedef bool (*relax_delete_t) (bfd *, asection *, bfd_vma, size_t, struct bfd_link_info *, - riscv_pcgp_relocs *, + riscv_pc_relax_relocs *, Elf_Internal_Rela *); static relax_delete_t riscv_relax_delete_bytes; @@ -4391,7 +4395,7 @@ _riscv_relax_delete_piecewise (bfd *abfd ATTRIBUTE_UNUSED, bfd_vma addr, size_t count, struct bfd_link_info *link_info ATTRIBUTE_UNUSED, - riscv_pcgp_relocs *p ATTRIBUTE_UNUSED, + riscv_pc_relax_relocs *p ATTRIBUTE_UNUSED, Elf_Internal_Rela *rel) { if (rel == NULL) @@ -4410,7 +4414,7 @@ _riscv_relax_delete_immediate (bfd *abfd, bfd_vma addr, size_t count, struct bfd_link_info *link_info, - riscv_pcgp_relocs *p, + riscv_pc_relax_relocs *p, Elf_Internal_Rela *rel) { if (rel != NULL) @@ -4475,7 +4479,7 @@ typedef bool (*relax_func_t) (bfd *, asection *, asection *, struct bfd_link_info *, Elf_Internal_Rela *, bfd_vma, bfd_vma, bfd_vma, bool *, - riscv_pcgp_relocs *, + riscv_pc_relax_relocs *, bool undefined_weak, unsigned relax_features); @@ -4489,7 +4493,7 @@ _bfd_riscv_relax_call (bfd *abfd, asection *sec, asection *sym_sec, bfd_vma max_alignment, bfd_vma reserve_size ATTRIBUTE_UNUSED, bool *again, - riscv_pcgp_relocs *pcgp_relocs, + riscv_pc_relax_relocs *pc_relax_relocs, bool undefined_weak ATTRIBUTE_UNUSED, unsigned relax_features) { @@ -4556,7 +4560,7 @@ _bfd_riscv_relax_call (bfd *abfd, asection *sec, asection *sym_sec, /* Delete unnecessary JALR and reuse the R_RISCV_RELAX reloc. */ *again = true; return riscv_relax_delete_bytes (abfd, sec, rel->r_offset + len, 8 - len, - link_info, pcgp_relocs, rel + 1); + link_info, pc_relax_relocs, rel + 1); } /* Traverse all output sections and return the max alignment. @@ -4586,7 +4590,8 @@ _bfd_riscv_get_max_alignment (asection *sec, bfd_vma gp) return (bfd_vma) 1 << max_alignment_power; } -/* Relax non-PIC global variable references to GP-relative references. */ +/* Relax non-PIC global variable references to + GP/zero-relative references. */ static bool _bfd_riscv_relax_lui (bfd *abfd, @@ -4598,7 +4603,7 @@ _bfd_riscv_relax_lui (bfd *abfd, bfd_vma max_alignment, bfd_vma reserve_size, bool *again, - riscv_pcgp_relocs *pcgp_relocs, + riscv_pc_relax_relocs *pc_relax_relocs, bool undefined_weak, unsigned relax_features) { @@ -4660,7 +4665,8 @@ _bfd_riscv_relax_lui (bfd *abfd, /* Delete unnecessary LUI and reuse the reloc. */ *again = true; return riscv_relax_delete_bytes (abfd, sec, rel->r_offset, 4, - link_info, pcgp_relocs, rel); + link_info, pc_relax_relocs, + rel); default: abort (); @@ -4694,7 +4700,8 @@ _bfd_riscv_relax_lui (bfd *abfd, /* Delete extra bytes and reuse the R_RISCV_RELAX reloc. */ *again = true; return riscv_relax_delete_bytes (abfd, sec, rel->r_offset + 2, 2, - link_info, pcgp_relocs, rel + 1); + link_info, pc_relax_relocs, + rel + 1); } return true; @@ -4712,7 +4719,7 @@ _bfd_riscv_relax_tls_le (bfd *abfd, bfd_vma max_alignment ATTRIBUTE_UNUSED, bfd_vma reserve_size ATTRIBUTE_UNUSED, bool *again, - riscv_pcgp_relocs *pcgp_relocs, + riscv_pc_relax_relocs *pc_relax_relocs, bool undefined_weak ATTRIBUTE_UNUSED, unsigned relax_features ATTRIBUTE_UNUSED) { @@ -4736,7 +4743,7 @@ _bfd_riscv_relax_tls_le (bfd *abfd, /* Delete unnecessary instruction and reuse the reloc. */ *again = true; return riscv_relax_delete_bytes (abfd, sec, rel->r_offset, 4, link_info, - pcgp_relocs, rel); + pc_relax_relocs, rel); default: abort (); @@ -4755,7 +4762,7 @@ _bfd_riscv_relax_align (bfd *abfd, asection *sec, bfd_vma max_alignment ATTRIBUTE_UNUSED, bfd_vma reserve_size ATTRIBUTE_UNUSED, bool *again ATTRIBUTE_UNUSED, - riscv_pcgp_relocs *pcgp_relocs ATTRIBUTE_UNUSED, + riscv_pc_relax_relocs *pc_relax_relocs ATTRIBUTE_UNUSED, bool undefined_weak ATTRIBUTE_UNUSED, unsigned relax_features ATTRIBUTE_UNUSED) { @@ -4804,7 +4811,7 @@ _bfd_riscv_relax_align (bfd *abfd, asection *sec, NULL, NULL); } -/* Relax PC-relative references to GP-relative references. */ +/* Relax PC-relative references to GP/zero-relative references. */ static bool _bfd_riscv_relax_pc (bfd *abfd ATTRIBUTE_UNUSED, @@ -4816,7 +4823,7 @@ _bfd_riscv_relax_pc (bfd *abfd ATTRIBUTE_UNUSED, bfd_vma max_alignment, bfd_vma reserve_size, bool *again, - riscv_pcgp_relocs *pcgp_relocs, + riscv_pc_relax_relocs *pc_relax_relocs, bool undefined_weak, unsigned relax_features) { @@ -4830,7 +4837,7 @@ _bfd_riscv_relax_pc (bfd *abfd ATTRIBUTE_UNUSED, /* Chain the _LO relocs to their cooresponding _HI reloc to compute the actual target address. */ - riscv_pcgp_hi_reloc hi_reloc; + riscv_pc_relax_hi_reloc hi_reloc; memset (&hi_reloc, 0, sizeof (hi_reloc)); switch (ELFNN_R_TYPE (rel->r_info)) { @@ -4842,11 +4849,11 @@ _bfd_riscv_relax_pc (bfd *abfd ATTRIBUTE_UNUSED, hi part instruction. So we must subtract it here for the lookup. It is still used below in the final symbol address. */ bfd_vma hi_sec_off = symval - sec_addr (sym_sec) - rel->r_addend; - riscv_pcgp_hi_reloc *hi = riscv_find_pcgp_hi_reloc (pcgp_relocs, - hi_sec_off); + riscv_pc_relax_hi_reloc *hi = + riscv_find_pc_relax_hi_reloc (pc_relax_relocs, hi_sec_off); if (hi == NULL) { - riscv_record_pcgp_lo_reloc (pcgp_relocs, hi_sec_off); + riscv_record_pc_relax_lo_reloc (pc_relax_relocs, hi_sec_off); return true; } @@ -4857,7 +4864,7 @@ _bfd_riscv_relax_pc (bfd *abfd ATTRIBUTE_UNUSED, /* We can not know whether the undefined weak symbol is referenced according to the information of R_RISCV_PCREL_LO12_I/S. Therefore, we have to record the 'undefined_weak' flag when handling the - corresponding R_RISCV_HI20 reloc in riscv_record_pcgp_hi_reloc. */ + corresponding R_RISCV_HI20 reloc in riscv_record_pc_relax_hi_reloc. */ undefined_weak = hi_reloc.undefined_weak; } break; @@ -4870,7 +4877,7 @@ _bfd_riscv_relax_pc (bfd *abfd ATTRIBUTE_UNUSED, /* If the cooresponding lo relocation has already been seen then it's not safe to relax this relocation. */ - if (riscv_find_pcgp_lo_reloc (pcgp_relocs, rel->r_offset)) + if (riscv_find_pc_relax_lo_reloc (pc_relax_relocs, rel->r_offset)) return true; break; @@ -4926,7 +4933,7 @@ _bfd_riscv_relax_pc (bfd *abfd ATTRIBUTE_UNUSED, return true; case R_RISCV_PCREL_HI20: - riscv_record_pcgp_hi_reloc (pcgp_relocs, + riscv_record_pc_relax_hi_reloc (pc_relax_relocs, rel->r_offset, rel->r_addend, symval, @@ -4936,7 +4943,7 @@ _bfd_riscv_relax_pc (bfd *abfd ATTRIBUTE_UNUSED, /* Delete unnecessary AUIPC and reuse the reloc. */ *again = true; riscv_relax_delete_bytes (abfd, sec, rel->r_offset, 4, link_info, - pcgp_relocs, rel); + pc_relax_relocs, rel); return true; default: @@ -4976,7 +4983,7 @@ _bfd_riscv_relax_section (bfd *abfd, asection *sec, bool ret = false; unsigned int i; bfd_vma max_alignment, reserve_size = 0; - riscv_pcgp_relocs pcgp_relocs; + riscv_pc_relax_relocs pc_relax_relocs; static asection *first_section = NULL; unsigned relax_features = 0; @@ -5009,7 +5016,7 @@ _bfd_riscv_relax_section (bfd *abfd, asection *sec, else if (first_section == sec) htab->max_alignment_for_gp = -1; - riscv_init_pcgp_relocs (&pcgp_relocs); + riscv_init_pc_relax_relocs (&pc_relax_relocs); /* Read this BFD's relocs if we haven't done so already. */ if (data->relocs) @@ -5230,7 +5237,7 @@ _bfd_riscv_relax_section (bfd *abfd, asection *sec, if (!relax_func (abfd, sec, sym_sec, info, rel, symval, max_alignment, reserve_size, again, - &pcgp_relocs, undefined_weak, relax_features)) + &pc_relax_relocs, undefined_weak, relax_features)) goto fail; } @@ -5243,7 +5250,7 @@ _bfd_riscv_relax_section (bfd *abfd, asection *sec, fail: if (relocs != data->relocs) free (relocs); - riscv_free_pcgp_relocs (&pcgp_relocs, abfd, sec); + riscv_free_pc_relax_relocs (&pc_relax_relocs, abfd, sec); return ret; }