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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni Cc: Christian Marangi , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Linus Walleij X-Mailer: b4 0.12.3 X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on fry.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (fry.vger.email [0.0.0.0]); Sat, 14 Oct 2023 13:53:00 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779765645457226322 X-GMAIL-MSGID: 1779765645457226322 This is an attempt to rewrite the Marvell MV88E6xxx switch bindings in YAML schema. The current text binding says: WARNING: This binding is currently unstable. Do not program it into a FLASH never to be changed again. Once this binding is stable, this warning will be removed. Well that never happened before we switched to YAML markup, we can't have it like this, what about fixing the mess? Signed-off-by: Linus Walleij --- .../bindings/net/dsa/marvell,mv88e6xxx.yaml | 241 +++++++++++++++++++++ .../devicetree/bindings/net/dsa/marvell.txt | 109 ---------- MAINTAINERS | 2 +- 3 files changed, 242 insertions(+), 110 deletions(-) diff --git a/Documentation/devicetree/bindings/net/dsa/marvell,mv88e6xxx.yaml b/Documentation/devicetree/bindings/net/dsa/marvell,mv88e6xxx.yaml new file mode 100644 index 000000000000..22ae844da2b5 --- /dev/null +++ b/Documentation/devicetree/bindings/net/dsa/marvell,mv88e6xxx.yaml @@ -0,0 +1,241 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/dsa/marvell,mv88e6xxx.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell MV88E6xxx DSA switch family + +maintainers: + - Andrew Lunn + +description: + The Marvell MV88E6xxx switch series has been produced and sold + by Marvell since at least 2010. The switch has a few compatibles which + just indicate the base address of the switch, then operating systems + can investigate switch ID registers to find out which actual version + of the switch it is dealing with. + +properties: + compatible: + oneOf: + - enum: + - marvell,mv88e6085 + - marvell,mv88e6190 + - marvell,mv88e6250 + description: | + marvell,mv88e6085: This switch uses base address 0x10. + This switch and its siblings will be autodetected from + ID registers found in the switch, so only "marvell,mv88e6085" should be + specified. This includes the following list of MV88Exxxx switches: + 6085, 6095, 6097, 6123, 6131, 6141, 6161, 6165, 6171, 6172, 6175, 6176, + 6185, 6240, 6320, 6321, 6341, 6350, 6351, 6352 + marvell,mv88e6190: This switch uses base address 0x00. + This switch and its siblings will be autodetected from + ID registers found in the switch, so only "marvell,mv88e6190" should be + specified. This includes the following list of MV88Exxxx switches: + 6190, 6190X, 6191, 6290, 6361, 6390, 6390X + marvell,mv88e6250: This switch uses base address 0x08 or 0x18. + This switch and its siblings will be autodetected from + ID registers found in the switch, so only "marvell,mv88e6250" should be + specified. This includes the following list of MV88Exxxx switches: + 6220, 6250 + + reg: + maxItems: 1 + + eeprom-length: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Set to the length of an EEPROM connected to the switch. Must be + set if the switch can not detect the presence and/or size of a connected + EEPROM, otherwise optional. + + reset-gpios: + description: + GPIO to be used to reset the whole device + maxItems: 1 + + interrupts: + description: The switch provides an external interrupt line, but it is + not always used by target systems. + maxItems: 1 + + interrupt-controller: + description: The switch has an internal interrupt controller used by + the different sub-blocks. + + '#interrupt-cells': + description: The internal interrupt controller only supports triggering + on active high level interrupts so the second cell must alway be set to + IRQ_TYPE_LEVEL_HIGH. + const: 2 + + mdio: + $ref: /schemas/net/mdio.yaml# + unevaluatedProperties: false + description: Marvell MV88E6xxx switches have an internal mdio bus to + access switch ports, which is handled in this node. + + mdio-external: + $ref: /schemas/net/mdio.yaml# + unevaluatedProperties: false + description: Marvell MV88E6xxx switches have an external mdio bus to + access external PHYs connected to the switch ports. + + properties: + compatible: + const: marvell,mv88e6xxx-mdio-external + + required: + - compatible + +$ref: dsa.yaml# + +patternProperties: + "^(ethernet-)?ports$": + type: object + patternProperties: + "^(ethernet-)?port@[0-9]+$": + type: object + description: Ethernet switch ports + + $ref: dsa-port.yaml# + + unevaluatedProperties: false + +oneOf: + - required: + - ports + - required: + - ethernet-ports + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + #include + #include + mdio { + #address-cells = <1>; + #size-cells = <0>; + + switch0: switch@0 { + compatible = "marvell,mv88e6085"; + reg = <0>; + reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>; + interrupt-parent = <&gpio0>; + interrupts = <27 IRQ_TYPE_LEVEL_LOW>; + interrupt-controller; + #interrupt-cells = <2>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "lan1"; + }; + port@1 { + reg = <1>; + label = "lan2"; + }; + port@2 { + reg = <2>; + label = "lan3"; + }; + port@3 { + reg = <3>; + label = "lan4"; + }; + port@4 { + reg = <4>; + label = "wan"; + }; + + port@5 { + reg = <5>; + phy-mode = "sgmii"; + ethernet = <ð2>; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + switch0phy0: switch0phy@0 { + reg = <0>; + interrupt-parent = <&switch0>; + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + }; + }; + }; + }; + + - | + #include + #include + mdio { + #address-cells = <1>; + #size-cells = <0>; + + switch1: switch@0 { + compatible = "marvell,mv88e6190"; + reg = <0>; + reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>; + interrupt-parent = <&gpio0>; + interrupts = <27 IRQ_TYPE_LEVEL_LOW>; + interrupt-controller; + #interrupt-cells = <2>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "lan1"; + }; + port@1 { + reg = <1>; + label = "lan2"; + }; + port@2 { + reg = <2>; + label = "lan3"; + }; + port@3 { + reg = <3>; + label = "lan4"; + }; + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + switch1phy0: switch1phy@0 { + reg = <0>; + interrupt-parent = <&switch1>; + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + }; + }; + + mdio-external { + compatible = "marvell,mv88e6xxx-mdio-external"; + #address-cells = <1>; + #size-cells = <0>; + switch1phy9: switch1phy@9 { + reg = <9>; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/net/dsa/marvell.txt b/Documentation/devicetree/bindings/net/dsa/marvell.txt deleted file mode 100644 index 6ec0c181b6db..000000000000 --- a/Documentation/devicetree/bindings/net/dsa/marvell.txt +++ /dev/null @@ -1,109 +0,0 @@ -Marvell DSA Switch Device Tree Bindings ---------------------------------------- - -WARNING: This binding is currently unstable. Do not program it into a -FLASH never to be changed again. Once this binding is stable, this -warning will be removed. - -If you need a stable binding, use the old dsa.txt binding. - -Marvell Switches are MDIO devices. The following properties should be -placed as a child node of an mdio device. - -The properties described here are those specific to Marvell devices. -Additional required and optional properties can be found in dsa.txt. - -The compatibility string is used only to find an identification register, -which is at a different MDIO base address in different switch families. -- "marvell,mv88e6085" : Switch has base address 0x10. Use with models: - 6085, 6095, 6097, 6123, 6131, 6141, 6161, 6165, - 6171, 6172, 6175, 6176, 6185, 6240, 6320, 6321, - 6341, 6350, 6351, 6352 -- "marvell,mv88e6190" : Switch has base address 0x00. Use with models: - 6190, 6190X, 6191, 6290, 6361, 6390, 6390X -- "marvell,mv88e6250" : Switch has base address 0x08 or 0x18. Use with model: - 6220, 6250 - -Required properties: -- compatible : Should be one of "marvell,mv88e6085", - "marvell,mv88e6190" or "marvell,mv88e6250" as - indicated above -- reg : Address on the MII bus for the switch. - -Optional properties: - -- reset-gpios : Should be a gpio specifier for a reset line -- interrupts : Interrupt from the switch -- interrupt-controller : Indicates the switch is itself an interrupt - controller. This is used for the PHY interrupts. -#interrupt-cells = <2> : Controller uses two cells, number and flag -- eeprom-length : Set to the length of an EEPROM connected to the - switch. Must be set if the switch can not detect - the presence and/or size of a connected EEPROM, - otherwise optional. -- mdio : Container of PHY and devices on the switches MDIO - bus. -- mdio? : Container of PHYs and devices on the external MDIO - bus. The node must contains a compatible string of - "marvell,mv88e6xxx-mdio-external" - -Example: - - mdio { - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&gpio0>; - interrupts = <27 IRQ_TYPE_LEVEL_LOW>; - interrupt-controller; - #interrupt-cells = <2>; - - switch0: switch@0 { - compatible = "marvell,mv88e6085"; - reg = <0>; - reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>; - - mdio { - #address-cells = <1>; - #size-cells = <0>; - switch1phy0: switch1phy0@0 { - reg = <0>; - interrupt-parent = <&switch0>; - interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; - }; - }; - }; - }; - - mdio { - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&gpio0>; - interrupts = <27 IRQ_TYPE_LEVEL_LOW>; - interrupt-controller; - #interrupt-cells = <2>; - - switch0: switch@0 { - compatible = "marvell,mv88e6190"; - reg = <0>; - reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>; - - mdio { - #address-cells = <1>; - #size-cells = <0>; - switch1phy0: switch1phy0@0 { - reg = <0>; - interrupt-parent = <&switch0>; - interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; - }; - }; - - mdio1 { - compatible = "marvell,mv88e6xxx-mdio-external"; - #address-cells = <1>; - #size-cells = <0>; - switch1phy9: switch1phy0@9 { - reg = <9>; - }; - }; - }; - }; diff --git a/MAINTAINERS b/MAINTAINERS index 90f13281d297..1b4475254d27 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -12625,7 +12625,7 @@ MARVELL 88E6XXX ETHERNET SWITCH FABRIC DRIVER M: Andrew Lunn L: netdev@vger.kernel.org S: Maintained -F: Documentation/devicetree/bindings/net/dsa/marvell.txt +F: Documentation/devicetree/bindings/net/dsa/marvell,mv88e6xxx.yaml F: Documentation/networking/devlink/mv88e6xxx.rst F: drivers/net/dsa/mv88e6xxx/ F: include/linux/dsa/mv88e6xxx.h From patchwork Sat Oct 14 20:51:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 152960 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2908:b0:403:3b70:6f57 with SMTP id ib8csp2654476vqb; Sat, 14 Oct 2023 13:53:01 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEgvO7MQfNnY3gor3JjhZrgfHAu81VgGTyKGjKzZR0KweU+k+uGUex1rNVO8qdyaGNOE36e X-Received: by 2002:a05:6a20:7d85:b0:163:57ba:2ad4 with SMTP id v5-20020a056a207d8500b0016357ba2ad4mr35870481pzj.2.1697316781492; Sat, 14 Oct 2023 13:53:01 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697316781; cv=none; d=google.com; s=arc-20160816; b=Q2Tgh42YYXU5WEXbTw+nrEoagOFtukeLUS7ObTM3jBt2/BLzAn1TkeE/QtPMQf2e1B fwstel6pm5rLm4kgGp9DL7xOkl7+yhKpYQy26fpZPZC1ykEyn1cOK2Xx1wYXgmAuk7XP OE4RahQHPf8FdA7n2I2fpjXzOheGyq9sUj6SuqVFgPCoXzrr+cv/RvDlxIhy5W3dC6Ob BFbVQj7D1P0NeM7nvW7EGJ0xKx3QYj69Wq2BZmLkb4umzz9JfI0fUowRmnJOGFi0bZAw TpSqPV6RH5pXlvpvjoY+J8Vr63uTq+VGssl5pN2AEZTmZwjiQwDTLwHyYEaBcj97I3a+ SpYA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=83tifkcL7STtWqxT7Toe1m2iOWJK+NJCvD/bs0pj7pU=; fh=4OsP5L1B9pUAL+M4LarVIcTAoEa8QdmflUFnWk97NDA=; b=hhJihYT+itEZ5lxp6aCU4TrnBEbsIGyYeBM3tS9GTGgtZES1tlozRlbaqzKt45prbu FmuK69JF7Uf+7zt6RVYKuxaJgc4eRwSczpoOFMEIGJkI3OvQ6kOuD+GKp+Ofhj03vvDu mxVQNlh1/UOUXKQWC06WPK4jkLxgYJrlFRmGT3A70UwFjBV67bUYgM81XmixAhnfrKQl IgTdCL6nERnQP/LKluuNu7i4gJ9cPgX5lQKVGSK3eZbyNE1CGKgBc0CVX6EElqq1O6Mo cMIZoVqitj7j0yQTCETNPvHEWSy3f3Pm1NOwE2B9ncQtt19iMgcipqMEg65B5GbPc6sC vhTg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=j1ijFjZu; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from snail.vger.email (snail.vger.email. [23.128.96.37]) by mx.google.com with ESMTPS id q193-20020a632aca000000b00565701e9a36si5903178pgq.752.2023.10.14.13.53.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 14 Oct 2023 13:53:01 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) client-ip=23.128.96.37; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=j1ijFjZu; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by snail.vger.email (Postfix) with ESMTP id C2C0D80978AF; Sat, 14 Oct 2023 13:52:01 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at snail.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233279AbjJNUvs (ORCPT + 19 others); Sat, 14 Oct 2023 16:51:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46156 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232643AbjJNUvm (ORCPT ); Sat, 14 Oct 2023 16:51:42 -0400 Received: from mail-lj1-x235.google.com (mail-lj1-x235.google.com [IPv6:2a00:1450:4864:20::235]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 24AF7DF for ; Sat, 14 Oct 2023 13:51:40 -0700 (PDT) Received: by mail-lj1-x235.google.com with SMTP id 38308e7fff4ca-2c50305c5c4so30021631fa.1 for ; Sat, 14 Oct 2023 13:51:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1697316698; x=1697921498; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=83tifkcL7STtWqxT7Toe1m2iOWJK+NJCvD/bs0pj7pU=; b=j1ijFjZuWa7QSevQlo1UNJE+HKtRD/d/rV3z56eHi6J7AnTobWDxl+P7YVkvRspxjG eXCQg/XErekoeFbFcUUL7GIg9XjazhEkCwdwCgbVP/SJaGzzXDPEQSd5+nhAnnbVPCIQ wZi2aJS9LQdIpVUmniUHihIrVmAqomzEwwaKPkfbOHWPZDwSuS94qIBQmuyqQO6Z8C2C CuVbRLIww0VgdDoG4lhVZeFACi4QKb1T5BVQG18abkXROKWcQRZeRajOM7SldOsl0S4r 0ZDPVJ4uoIh06s1Kzau9b8/ESjfHhcBtkitm2nzbinGrL9Oc4lTfBibNHn5Xd4dQQ/8j OPeA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697316698; x=1697921498; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=83tifkcL7STtWqxT7Toe1m2iOWJK+NJCvD/bs0pj7pU=; b=oZSMUbKGP0/CyzCWO6MUz1nHkZzBlD7N8ATyFZXujz0FFvt1KzN33Dc88DaPzKBvpD XKme/qc+P4i1ybJvLUQeVQGMubs8fIuzscodXup2B9ZGzIlIhCe76zOXykPDp2lCuXv+ 3gTZo0U7zxpPQc58BcU6lZktjyuli3EafZVtQTUErONq8yjr81ltimkkRnOhKM/BluNp r65VOLNtBI5QjMD3s/xAiudNwlwjew7nm90oMyLUdIJvbThKHlO8nVwwhUHexUjB09Ag b58qunFhEbC5ibjKjxwsM1Rm0ZBb4oH2MlYTQ5oXkss50j1FEfEM3iCACk5knIH6Eet5 YAfA== X-Gm-Message-State: AOJu0Yyd97Ny7im24itq1CwI+8RQMu3j9OoePoY8cZqjNcRfIZRfABwm a/QEG/YA0JKcUP4nYsyEAHlfmw== X-Received: by 2002:a05:6512:1153:b0:4fb:7559:aea3 with SMTP id m19-20020a056512115300b004fb7559aea3mr30227904lfg.39.1697316698352; Sat, 14 Oct 2023 13:51:38 -0700 (PDT) Received: from [127.0.1.1] ([85.235.12.238]) by smtp.gmail.com with ESMTPSA id o17-20020ac24e91000000b004ff96c09b47sm49926lfr.260.2023.10.14.13.51.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 14 Oct 2023 13:51:37 -0700 (PDT) From: Linus Walleij Date: Sat, 14 Oct 2023 22:51:33 +0200 Subject: [PATCH net-next v2 2/5] dt-bindings: marvell: Add Marvell MV88E6060 DSA schema MIME-Version: 1.0 Message-Id: <20231014-marvell-88e6152-wan-led-v2-2-7fca08b68849@linaro.org> References: <20231014-marvell-88e6152-wan-led-v2-0-7fca08b68849@linaro.org> In-Reply-To: <20231014-marvell-88e6152-wan-led-v2-0-7fca08b68849@linaro.org> To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Russell King , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni Cc: Christian Marangi , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Linus Walleij X-Mailer: b4 0.12.3 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Sat, 14 Oct 2023 13:52:01 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779765641455369942 X-GMAIL-MSGID: 1779765641455369942 The Marvell MV88E6060 is one of the oldest DSA switches from Marvell, and it has DT bindings used in the wild. Let's define them properly. It is different enough from the rest of the MV88E6xxx switches that it deserves its own binding. Signed-off-by: Linus Walleij --- .../bindings/net/dsa/marvell,mv88e6060.yaml | 106 +++++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 107 insertions(+) diff --git a/Documentation/devicetree/bindings/net/dsa/marvell,mv88e6060.yaml b/Documentation/devicetree/bindings/net/dsa/marvell,mv88e6060.yaml new file mode 100644 index 000000000000..74e546a8472c --- /dev/null +++ b/Documentation/devicetree/bindings/net/dsa/marvell,mv88e6060.yaml @@ -0,0 +1,106 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/dsa/marvell,mv88e6060.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell MV88E6060 DSA switch + +maintainers: + - Andrew Lunn + +description: + The Marvell MV88E6060 switch has been produced and sold by Marvell + since at least 2010. The switch has one pin ADDR4 that controls the + MDIO address of the switch to be 0x10 or 0x00, and on the MDIO bus + connected to the switch, the PHY:s inside the switch appear as + independent devices on address 0x00-0x04 or 0x10-0x14, so in difference + from many other DSA switches this switch does not have an internal + MDIO bus for the PHY devices. + +properties: + compatible: + const: marvell,mv88e6060 + description: + The MV88E6060 is the oldest Marvell DSA switch product, and + as such a bit limited in features compared to later hardware. + + reg: + maxItems: 1 + + reset-gpios: + description: + GPIO to be used to reset the whole device + maxItems: 1 + +$ref: dsa.yaml# + +patternProperties: + "^(ethernet-)?ports$": + type: object + patternProperties: + "^(ethernet-)?port@[0-9]+$": + type: object + description: Ethernet switch ports + + $ref: dsa-port.yaml# + + unevaluatedProperties: false + +oneOf: + - required: + - ports + - required: + - ethernet-ports + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + #include + #include + mdio { + #address-cells = <1>; + #size-cells = <0>; + + switch@16 { + compatible = "marvell,mv88e6060"; + reg = <16>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "lan1"; + }; + port@1 { + reg = <1>; + label = "lan2"; + }; + port@2 { + reg = <2>; + label = "lan3"; + }; + port@3 { + reg = <3>; + label = "lan4"; + }; + port@5 { + reg = <5>; + phy-mode = "rgmii-id"; + ethernet = <ðc>; + label = "cpu"; + fixed-link { + speed = <100>; + full-duplex; + }; + }; + }; + }; + }; diff --git a/MAINTAINERS b/MAINTAINERS index 1b4475254d27..4c933a2a56ad 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -12625,6 +12625,7 @@ MARVELL 88E6XXX ETHERNET SWITCH FABRIC DRIVER M: Andrew Lunn L: netdev@vger.kernel.org S: Maintained +F: Documentation/devicetree/bindings/net/dsa/marvell,mv88e6060.yaml F: Documentation/devicetree/bindings/net/dsa/marvell,mv88e6xxx.yaml F: Documentation/networking/devlink/mv88e6xxx.rst F: drivers/net/dsa/mv88e6xxx/ From patchwork Sat Oct 14 20:51:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 152959 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2908:b0:403:3b70:6f57 with SMTP id ib8csp2654402vqb; Sat, 14 Oct 2023 13:52:38 -0700 (PDT) X-Google-Smtp-Source: AGHT+IESTORySb4FhML3/e2j7DR78jj+ATvM0R3LyLPmIqKtYRl+SMXM/rsVyqFOcaEErBofm7QB X-Received: by 2002:a17:902:a40e:b0:1c9:bd60:72a6 with SMTP id p14-20020a170902a40e00b001c9bd6072a6mr14344156plq.4.1697316757870; Sat, 14 Oct 2023 13:52:37 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697316757; cv=none; d=google.com; s=arc-20160816; b=njo6ZTEOsSlW4ax0+Zo3/cCDbbPCtup6p6bkM1YkpJwcY86mGsklCXYNwxZyNRkow9 iqr8fbv2i/bOE6AJOxUGCuJVTYGfPHjBYjF3qAJgAKtCVX4MW6DPVev/VZFmQQQaFn2P We+uAqD0bFmdps1eoXQ3fWhKhrH031Y3n03WBhuw/NIi/KH9UVfyNPiSjpuAfovInJp+ ADj2uRS7FpKNk4f/wXS5mclGYfH1lKpBeW0H3N6xbFW1n6Dt2IWZ14hhzUikcGwuwmfF 3jWqnZmySYTa8RCHpBC6bQBtkIN9HGDtiPa0TAubMo0Z2jnHy10wpVH5PHnwkJ06CqHp jTMA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=XhgTFSg7xZQFKqQUdPj7mdXINHwkkUMiMJQ/LwbGzwg=; fh=4OsP5L1B9pUAL+M4LarVIcTAoEa8QdmflUFnWk97NDA=; b=ijrxzXh316dNuXANNhcb5VJdgDGK/uSlxKDNhKw9W5IpKiGc2mjD4q1h2Oll/j2JTR iMqDd7KRDmDOrRtzZd52q1+MkywZNiBiCwz8wpTkiNLVfS1ZgTK41y4bTklkGNs+PsZt XRui9ZhPiityMDU2Gpgeqk2r93De1aUsE1yW/yZ0NGWEr/Bhoz3CB8QWfUG6qETlOZHz FV+iMbkayHpHJGSD2MrRXQfIN/MUzwDZfX9zAwQvuahoWfOLNVtQMHuYecwLZpPyLgFn tVDuWbeAweuPakzEaiA5pB09tF7Tdow4oWM6S75UEcHyRR3UombZ1zLEvJOoRrnjFEA8 EdoA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=toOR32us; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.35 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from groat.vger.email (groat.vger.email. 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni Cc: Christian Marangi , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Linus Walleij X-Mailer: b4 0.12.3 X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on groat.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (groat.vger.email [0.0.0.0]); Sat, 14 Oct 2023 13:52:20 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779765616466154634 X-GMAIL-MSGID: 1779765616466154634 Fix some errors in the Marvell MV88E6xxx switch descriptions: - The top node had no address size or cells. - switch0@0 is not OK, should be switch@0. - port@a is not normal port naming, use decimal port@10. - The ports node should have port@0 etc children, no plural "ports". This serves as an example of fixes needed for introducing a schema for the bindings, but the patch can simply be applied. Signed-off-by: Linus Walleij --- arch/arm/boot/dts/marvell/armada-370-rd.dts | 2 -- .../arm/boot/dts/marvell/armada-381-netgear-gs110emx.dts | 6 ++---- arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts | 2 +- arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-s4.dts | 2 +- arch/arm/boot/dts/marvell/armada-385-linksys.dtsi | 2 -- arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts | 16 +++++++--------- arch/arm/boot/dts/marvell/armada-388-clearfog.dts | 2 -- arch/arm/boot/dts/marvell/armada-xp-linksys-mamba.dts | 2 -- 8 files changed, 11 insertions(+), 23 deletions(-) diff --git a/arch/arm/boot/dts/marvell/armada-370-rd.dts b/arch/arm/boot/dts/marvell/armada-370-rd.dts index b459a670f615..e3a1834986ee 100644 --- a/arch/arm/boot/dts/marvell/armada-370-rd.dts +++ b/arch/arm/boot/dts/marvell/armada-370-rd.dts @@ -151,8 +151,6 @@ led@0 { switch: switch@10 { compatible = "marvell,mv88e6085"; - #address-cells = <1>; - #size-cells = <0>; reg = <0x10>; interrupt-controller; #interrupt-cells = <2>; diff --git a/arch/arm/boot/dts/marvell/armada-381-netgear-gs110emx.dts b/arch/arm/boot/dts/marvell/armada-381-netgear-gs110emx.dts index f4c4b213ef4e..cf37f53ec070 100644 --- a/arch/arm/boot/dts/marvell/armada-381-netgear-gs110emx.dts +++ b/arch/arm/boot/dts/marvell/armada-381-netgear-gs110emx.dts @@ -79,14 +79,12 @@ &mdio { switch@0 { compatible = "marvell,mv88e6190"; - #address-cells = <1>; #interrupt-cells = <2>; interrupt-controller; interrupt-parent = <&gpio1>; interrupts = <7 IRQ_TYPE_LEVEL_LOW>; pinctrl-0 = <&switch_interrupt_pins>; pinctrl-names = "default"; - #size-cells = <0>; reg = <0>; mdio { @@ -214,12 +212,12 @@ port@9 { reg = <9>; }; - port@a { + port@10 { /* 88X3310P external phy */ label = "lan10"; phy-handle = <&phy2>; phy-mode = "xaui"; - reg = <0xa>; + reg = <10>; }; }; }; diff --git a/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts b/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts index 1990f7d0cc79..1be0419f8f3e 100644 --- a/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts +++ b/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts @@ -7,7 +7,7 @@ / { }; &mdio { - switch0: switch0@4 { + switch0: switch@4 { compatible = "marvell,mv88e6190"; reg = <4>; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-s4.dts b/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-s4.dts index b795ad573891..6ec536222bfb 100644 --- a/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-s4.dts +++ b/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-s4.dts @@ -11,7 +11,7 @@ &sfp0 { }; &mdio { - switch0: switch0@4 { + switch0: switch@4 { compatible = "marvell,mv88e6085"; reg = <4>; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/marvell/armada-385-linksys.dtsi b/arch/arm/boot/dts/marvell/armada-385-linksys.dtsi index fc8216fd9f60..63a0bc9455ca 100644 --- a/arch/arm/boot/dts/marvell/armada-385-linksys.dtsi +++ b/arch/arm/boot/dts/marvell/armada-385-linksys.dtsi @@ -160,8 +160,6 @@ &mdio { switch@0 { compatible = "marvell,mv88e6085"; - #address-cells = <1>; - #size-cells = <0>; reg = <0>; ports { diff --git a/arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts b/arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts index 2d8d319bec83..8c69dbd6a2c7 100644 --- a/arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts +++ b/arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts @@ -439,8 +439,6 @@ switch@10 { pinctrl-names = "default"; pinctrl-0 = <&swint_pins>; compatible = "marvell,mv88e6085"; - #address-cells = <1>; - #size-cells = <0>; dsa,member = <0 0>; reg = <0x10>; @@ -452,32 +450,32 @@ ports { #address-cells = <1>; #size-cells = <0>; - ports@0 { + port@0 { reg = <0>; label = "lan0"; }; - ports@1 { + port@1 { reg = <1>; label = "lan1"; }; - ports@2 { + port@2 { reg = <2>; label = "lan2"; }; - ports@3 { + port@3 { reg = <3>; label = "lan3"; }; - ports@4 { + port@4 { reg = <4>; label = "lan4"; }; - ports@5 { + port@5 { reg = <5>; ethernet = <ð1>; phy-mode = "rgmii-id"; @@ -488,7 +486,7 @@ fixed-link { }; }; - ports@6 { + port@6 { reg = <6>; ethernet = <ð0>; phy-mode = "rgmii-id"; diff --git a/arch/arm/boot/dts/marvell/armada-388-clearfog.dts b/arch/arm/boot/dts/marvell/armada-388-clearfog.dts index 32c569df142f..ab46903580aa 100644 --- a/arch/arm/boot/dts/marvell/armada-388-clearfog.dts +++ b/arch/arm/boot/dts/marvell/armada-388-clearfog.dts @@ -94,8 +94,6 @@ &mdio { switch@4 { compatible = "marvell,mv88e6085"; - #address-cells = <1>; - #size-cells = <0>; reg = <4>; pinctrl-0 = <&clearfog_dsa0_clk_pins &clearfog_dsa0_pins>; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/marvell/armada-xp-linksys-mamba.dts b/arch/arm/boot/dts/marvell/armada-xp-linksys-mamba.dts index 7a0614fd0c93..2a5518c73bff 100644 --- a/arch/arm/boot/dts/marvell/armada-xp-linksys-mamba.dts +++ b/arch/arm/boot/dts/marvell/armada-xp-linksys-mamba.dts @@ -267,8 +267,6 @@ &mdio { switch@0 { compatible = "marvell,mv88e6085"; - #address-cells = <1>; - #size-cells = <0>; reg = <0>; ports { From patchwork Sat Oct 14 20:51:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 152962 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2908:b0:403:3b70:6f57 with SMTP id ib8csp2654498vqb; Sat, 14 Oct 2023 13:53:09 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFU5wcbnU9L6mM4vtG4PBZkofP9mpYfsz1EddxJBVMt78y9RJksIyU7Z+Fd1DCY4dEVGBjX X-Received: by 2002:a05:6a20:c18f:b0:16e:26fd:7c02 with SMTP id bg15-20020a056a20c18f00b0016e26fd7c02mr22465478pzb.2.1697316788910; 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni Cc: Christian Marangi , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Linus Walleij X-Mailer: b4 0.12.3 X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on fry.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (fry.vger.email [0.0.0.0]); Sat, 14 Oct 2023 13:53:04 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779765649370769061 X-GMAIL-MSGID: 1779765649370769061 Fix some errors in the Marvell MV88E6xxx switch descriptions: - switch0@0 is not OK, should be switch@0 Signed-off-by: Linus Walleij --- arch/arm/boot/dts/nxp/vf/vf610-zii-cfu1.dts | 2 +- arch/arm/boot/dts/nxp/vf/vf610-zii-scu4-aib.dts | 8 ++++---- arch/arm/boot/dts/nxp/vf/vf610-zii-spb4.dts | 2 +- arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-dtu.dts | 4 ++-- arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-spu3.dts | 2 +- 5 files changed, 9 insertions(+), 9 deletions(-) diff --git a/arch/arm/boot/dts/nxp/vf/vf610-zii-cfu1.dts b/arch/arm/boot/dts/nxp/vf/vf610-zii-cfu1.dts index 1a19aec8957b..add47d8fb58a 100644 --- a/arch/arm/boot/dts/nxp/vf/vf610-zii-cfu1.dts +++ b/arch/arm/boot/dts/nxp/vf/vf610-zii-cfu1.dts @@ -162,7 +162,7 @@ mdio1: mdio { suppress-preamble; status = "okay"; - switch0: switch0@0 { + switch0: switch@0 { compatible = "marvell,mv88e6085"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_switch>; diff --git a/arch/arm/boot/dts/nxp/vf/vf610-zii-scu4-aib.dts b/arch/arm/boot/dts/nxp/vf/vf610-zii-scu4-aib.dts index df1335492a19..50356bd87d04 100644 --- a/arch/arm/boot/dts/nxp/vf/vf610-zii-scu4-aib.dts +++ b/arch/arm/boot/dts/nxp/vf/vf610-zii-scu4-aib.dts @@ -47,7 +47,7 @@ mdio_mux_1: mdio@1 { #address-cells = <1>; #size-cells = <0>; - switch0: switch0@0 { + switch0: switch@0 { compatible = "marvell,mv88e6190"; reg = <0>; dsa,member = <0 0>; @@ -130,7 +130,7 @@ mdio_mux_2: mdio@2 { #address-cells = <1>; #size-cells = <0>; - switch1: switch1@0 { + switch1: switch@0 { compatible = "marvell,mv88e6190"; reg = <0>; dsa,member = <0 1>; @@ -188,7 +188,7 @@ mdio_mux_4: mdio@4 { #address-cells = <1>; #size-cells = <0>; - switch2: switch2@0 { + switch2: switch@0 { compatible = "marvell,mv88e6190"; reg = <0>; dsa,member = <0 2>; @@ -276,7 +276,7 @@ mdio_mux_8: mdio@8 { #address-cells = <1>; #size-cells = <0>; - switch3: switch3@0 { + switch3: switch@0 { compatible = "marvell,mv88e6190"; reg = <0>; dsa,member = <0 3>; diff --git a/arch/arm/boot/dts/nxp/vf/vf610-zii-spb4.dts b/arch/arm/boot/dts/nxp/vf/vf610-zii-spb4.dts index 1461804ecaea..20e9e2dacbe6 100644 --- a/arch/arm/boot/dts/nxp/vf/vf610-zii-spb4.dts +++ b/arch/arm/boot/dts/nxp/vf/vf610-zii-spb4.dts @@ -123,7 +123,7 @@ mdio1: mdio { suppress-preamble; status = "okay"; - switch0: switch0@0 { + switch0: switch@0 { compatible = "marvell,mv88e6190"; pinctrl-0 = <&pinctrl_gpio_switch0>; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-dtu.dts b/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-dtu.dts index 463c2452b9b7..aa53a60518c3 100644 --- a/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-dtu.dts +++ b/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-dtu.dts @@ -112,7 +112,7 @@ mdio1: mdio { suppress-preamble; status = "okay"; - switch0: switch0@0 { + switch0: switch@0 { compatible = "marvell,mv88e6190"; pinctrl-0 = <&pinctrl_gpio_switch0>; pinctrl-names = "default"; @@ -167,7 +167,7 @@ port@9 { }; }; - mdio1 { + mdio-external { compatible = "marvell,mv88e6xxx-mdio-external"; #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-spu3.dts b/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-spu3.dts index f5ae0d5de315..0b7063b74130 100644 --- a/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-spu3.dts +++ b/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-spu3.dts @@ -137,7 +137,7 @@ mdio1: mdio { suppress-preamble; status = "okay"; - switch0: switch0@0 { + switch0: switch@0 { compatible = "marvell,mv88e6190"; pinctrl-0 = <&pinctrl_gpio_switch0>; pinctrl-names = "default"; From patchwork Sat Oct 14 20:51:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 152963 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2908:b0:403:3b70:6f57 with SMTP id ib8csp2654503vqb; Sat, 14 Oct 2023 13:53:11 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEWCv1I3rh8sZh5Xw3cMgAHTEcKLY9bKxTN6BRRuzjLtyS7EPnD/bX6qojxG/6gvdDZI+sy X-Received: by 2002:a17:902:e74b:b0:1c7:1eed:10f2 with SMTP id p11-20020a170902e74b00b001c71eed10f2mr34040164plf.2.1697316791466; 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni Cc: Christian Marangi , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Linus Walleij X-Mailer: b4 0.12.3 X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on fry.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (fry.vger.email [0.0.0.0]); Sat, 14 Oct 2023 13:53:07 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779765651937408966 X-GMAIL-MSGID: 1779765651937408966 Fix some errors in the Marvell MV88E6xxx switch descriptions: - The top node had no address size or cells. - switch0@0 is not OK, should be switch@0. - port@a is not normal port naming, use decimal port@10. Signed-off-by: Linus Walleij --- .../boot/dts/marvell/armada-3720-espressobin.dtsi | 4 +-- .../boot/dts/marvell/armada-3720-gl-mv1000.dts | 4 +-- .../boot/dts/marvell/armada-3720-turris-mox.dts | 32 +++++++++++----------- .../boot/dts/marvell/armada-7040-mochabin.dts | 2 -- .../dts/marvell/armada-8040-clearfog-gt-8k.dts | 2 +- arch/arm64/boot/dts/marvell/cn9130-crb.dtsi | 6 ++-- 6 files changed, 21 insertions(+), 29 deletions(-) diff --git a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi index 5fc613d24151..b526efeee293 100644 --- a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi @@ -145,10 +145,8 @@ &usb2 { }; &mdio { - switch0: switch0@1 { + switch0: switch@1 { compatible = "marvell,mv88e6085"; - #address-cells = <1>; - #size-cells = <0>; reg = <1>; dsa,member = <0 0>; diff --git a/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts b/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts index b1b45b4fa9d4..5de4417f929c 100644 --- a/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts +++ b/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts @@ -152,10 +152,8 @@ &uart0 { }; &mdio { - switch0: switch0@1 { + switch0: switch@1 { compatible = "marvell,mv88e6085"; - #address-cells = <1>; - #size-cells = <0>; reg = <1>; dsa,member = <0 0>; diff --git a/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts b/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts index 9eab2bb22134..ea66ba5a9762 100644 --- a/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts +++ b/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts @@ -305,7 +305,7 @@ phy1: ethernet-phy@1 { }; /* switch nodes are enabled by U-Boot if modules are present */ - switch0@10 { + switch@10 { compatible = "marvell,mv88e6190"; reg = <0x10>; dsa,member = <0 0>; @@ -410,8 +410,8 @@ port@9 { managed = "in-band-status"; }; - switch0port10: port@a { - reg = <0xa>; + switch0port10: port@10 { + reg = <10>; label = "dsa"; phy-mode = "2500base-x"; managed = "in-band-status"; @@ -419,8 +419,8 @@ switch0port10: port@a { status = "disabled"; }; - port-sfp@a { - reg = <0xa>; + port-sfp@10 { + reg = <10>; label = "sfp"; sfp = <&sfp>; phy-mode = "sgmii"; @@ -430,7 +430,7 @@ port-sfp@a { }; }; - switch0@2 { + switch@2 { compatible = "marvell,mv88e6085"; reg = <0x2>; dsa,member = <0 0>; @@ -497,7 +497,7 @@ port@5 { }; }; - switch1@11 { + switch@11 { compatible = "marvell,mv88e6190"; reg = <0x11>; dsa,member = <0 1>; @@ -602,8 +602,8 @@ switch1port9: port@9 { link = <&switch0port10>; }; - switch1port10: port@a { - reg = <0xa>; + switch1port10: port@10 { + reg = <10>; label = "dsa"; phy-mode = "2500base-x"; managed = "in-band-status"; @@ -611,8 +611,8 @@ switch1port10: port@a { status = "disabled"; }; - port-sfp@a { - reg = <0xa>; + port-sfp@10 { + reg = <10>; label = "sfp"; sfp = <&sfp>; phy-mode = "sgmii"; @@ -622,7 +622,7 @@ port-sfp@a { }; }; - switch1@2 { + switch@2 { compatible = "marvell,mv88e6085"; reg = <0x2>; dsa,member = <0 1>; @@ -689,7 +689,7 @@ port@5 { }; }; - switch2@12 { + switch@12 { compatible = "marvell,mv88e6190"; reg = <0x12>; dsa,member = <0 2>; @@ -794,8 +794,8 @@ switch2port9: port@9 { link = <&switch1port10 &switch0port10>; }; - port-sfp@a { - reg = <0xa>; + port-sfp@10 { + reg = <10>; label = "sfp"; sfp = <&sfp>; phy-mode = "sgmii"; @@ -805,7 +805,7 @@ port-sfp@a { }; }; - switch2@2 { + switch@2 { compatible = "marvell,mv88e6085"; reg = <0x2>; dsa,member = <0 2>; diff --git a/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts b/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts index 48202810bf78..3cc794fcf12e 100644 --- a/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts +++ b/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts @@ -303,8 +303,6 @@ eth2phy: ethernet-phy@1 { /* 88E6141 Topaz switch */ switch: switch@3 { compatible = "marvell,mv88e6085"; - #address-cells = <1>; - #size-cells = <0>; reg = <3>; pinctrl-names = "default"; diff --git a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts index 4125202028c8..7a25ea36b565 100644 --- a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts +++ b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts @@ -497,7 +497,7 @@ ge_phy: ethernet-phy@0 { reset-deassert-us = <10000>; }; - switch0: switch0@4 { + switch0: switch@4 { compatible = "marvell,mv88e6085"; reg = <4>; pinctrl-names = "default"; diff --git a/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi b/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi index 32cfb3e2efc3..2f6281b66467 100644 --- a/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi +++ b/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi @@ -207,11 +207,9 @@ phy0: ethernet-phy@0 { reg = <0>; }; - switch6: switch0@6 { + switch6: switch@6 { /* Actual device is MV88E6393X */ compatible = "marvell,mv88e6190"; - #address-cells = <1>; - #size-cells = <0>; reg = <6>; interrupt-parent = <&cp0_gpio1>; interrupts = <28 IRQ_TYPE_LEVEL_LOW>; @@ -280,7 +278,7 @@ port@9 { managed = "in-band-status"; }; - port@a { + port@10 { reg = <10>; ethernet = <&cp0_eth0>; phy-mode = "10gbase-r";