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Thu, 12 Oct 2023 16:40:40 +0800 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Thu, 12 Oct 2023 16:40:38 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Thu, 12 Oct 2023 16:40:38 +0800 From: Moudy Ho To: Chun-Kuang Hu , Philipp Zabel , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mauro Carvalho Chehab , Matthias Brugger , AngeloGioacchino Del Regno , Hans Verkuil CC: , , , , , , "Moudy Ho" Subject: [PATCH v7 01/16] dt-bindings: media: mediatek: mdp3: correct RDMA and WROT node with generic names Date: Thu, 12 Oct 2023 16:40:22 +0800 Message-ID: <20231012084037.19376-2-moudy.ho@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20231012084037.19376-1-moudy.ho@mediatek.com> References: <20231012084037.19376-1-moudy.ho@mediatek.com> MIME-Version: 1.0 X-TM-AS-Product-Ver: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-AS-Result: No-10--5.037100-8.000000 X-TMASE-MatchedRID: 48f3rcDgjOVeJRw5hj8/hCZm6wdY+F8KvtVce6w5+K8QHQ+7AkbTsXGp r8/fPJWi3Bqja0vwl1eIJs0Up7vkWPgN61BAK04FbBu6+EIezdwT28gbcGU2vcGQEnQwhjvzYeG P4tValiDh86Pz6wHGf9bDZUm716LdSSOWVJeuO1AURSScn+QSXt0H8LFZNFG7hqz53n/yPnr6mB BLNPMDStsMyfImHMxzmQlancTqNZl2MVdSgHCqvuHmS6fG01P0 X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--5.037100-8.000000 X-TMASE-Version: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-SNTS-SMTP: 456C5E0CB6562DE56AC0F992C3DA0792228E45D1E813A80F82225F8A6D8464612000:8 X-MTK: N X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on pete.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (pete.vger.email [0.0.0.0]); Thu, 12 Oct 2023 01:43:43 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779538571302095012 X-GMAIL-MSGID: 1779538571302095012 The DMA-related nodes RDMA/WROT in MDP3 should be changed to generic names. In addition, fix improper space indent in example. Fixes: 4ad7b39623ab ("media: dt-binding: mediatek: add bindings for MediaTek MDP3 components") Signed-off-by: Moudy Ho Acked-by: Rob Herring Reviewed-by: AngeloGioacchino Del Regno --- .../bindings/media/mediatek,mdp3-rdma.yaml | 29 +++++++++++-------- .../bindings/media/mediatek,mdp3-wrot.yaml | 23 +++++++++------ 2 files changed, 31 insertions(+), 21 deletions(-) diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml index 7032c7e15039..3e128733ef53 100644 --- a/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml @@ -61,6 +61,9 @@ properties: - description: used for 1st data pipe from RDMA - description: used for 2nd data pipe from RDMA + '#dma-cells': + const: 1 + required: - compatible - reg @@ -70,6 +73,7 @@ required: - clocks - iommus - mboxes + - '#dma-cells' additionalProperties: false @@ -80,16 +84,17 @@ examples: #include #include - mdp3_rdma0: mdp3-rdma0@14001000 { - compatible = "mediatek,mt8183-mdp3-rdma"; - reg = <0x14001000 0x1000>; - mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x1000 0x1000>; - mediatek,gce-events = , - ; - power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; - clocks = <&mmsys CLK_MM_MDP_RDMA0>, - <&mmsys CLK_MM_MDP_RSZ1>; - iommus = <&iommu>; - mboxes = <&gce 20 CMDQ_THR_PRIO_LOWEST>, - <&gce 21 CMDQ_THR_PRIO_LOWEST>; + dma-controller@14001000 { + compatible = "mediatek,mt8183-mdp3-rdma"; + reg = <0x14001000 0x1000>; + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x1000 0x1000>; + mediatek,gce-events = , + ; + power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; + clocks = <&mmsys CLK_MM_MDP_RDMA0>, + <&mmsys CLK_MM_MDP_RSZ1>; + iommus = <&iommu>; + mboxes = <&gce 20 CMDQ_THR_PRIO_LOWEST>, + <&gce 21 CMDQ_THR_PRIO_LOWEST>; + #dma-cells = <1>; }; diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml index 0baa77198fa2..64ea98aa0592 100644 --- a/Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml @@ -50,6 +50,9 @@ properties: iommus: maxItems: 1 + '#dma-cells': + const: 1 + required: - compatible - reg @@ -58,6 +61,7 @@ required: - power-domains - clocks - iommus + - '#dma-cells' additionalProperties: false @@ -68,13 +72,14 @@ examples: #include #include - mdp3_wrot0: mdp3-wrot0@14005000 { - compatible = "mediatek,mt8183-mdp3-wrot"; - reg = <0x14005000 0x1000>; - mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x5000 0x1000>; - mediatek,gce-events = , - ; - power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; - clocks = <&mmsys CLK_MM_MDP_WROT0>; - iommus = <&iommu>; + dma-controller@14005000 { + compatible = "mediatek,mt8183-mdp3-wrot"; + reg = <0x14005000 0x1000>; + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x5000 0x1000>; + mediatek,gce-events = , + ; + power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; + clocks = <&mmsys CLK_MM_MDP_WROT0>; + iommus = <&iommu>; + #dma-cells = <1>; }; From patchwork Thu Oct 12 08:40:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?TW91ZHkgSG8gKOS9leWul+WOnyk=?= X-Patchwork-Id: 151817 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2908:b0:403:3b70:6f57 with SMTP id ib8csp1073585vqb; Thu, 12 Oct 2023 01:41:22 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGLfhemq3pbvABDJ1NZGzs5RQU/6pz++D+65qJbbBm6AlpWuCUwtaH7Q50zlNdA4lorbUqH X-Received: by 2002:a05:6a20:4407:b0:133:6e3d:68cd with SMTP id ce7-20020a056a20440700b001336e3d68cdmr32235637pzb.3.1697100081937; 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[2620:137:e000::3:8]) by mx.google.com with ESMTPS id me10-20020a17090b17ca00b0027ce8bab3b4si1964558pjb.113.2023.10.12.01.41.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Oct 2023 01:41:21 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:8 as permitted sender) client-ip=2620:137:e000::3:8; Authentication-Results: mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=cG258VWR; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:8 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by fry.vger.email (Postfix) with ESMTP id 7E13680AD296; Thu, 12 Oct 2023 01:41:15 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at fry.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235514AbjJLIk5 (ORCPT + 19 others); Thu, 12 Oct 2023 04:40:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58276 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235438AbjJLIku (ORCPT ); Thu, 12 Oct 2023 04:40:50 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AFFEABA; Thu, 12 Oct 2023 01:40:44 -0700 (PDT) X-UUID: 05fed93e68db11eea33bb35ae8d461a2-20231012 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=BIhy7dikDjCtKTCaaw/bkjDH4vFLLuEjeJtVKZZeoY4=; b=cG258VWRJIqivBpcXoJAOX2MEEagaxLc2Qoy2DmOsc2QlyG8jTYbPp4cHUfOs7j6HddskIopupmNWIJrgb7ZgHt7/7D6a7Wi3ke3uftxli8CnQYamJTD7O0BttJIpQUUK9KyY9ZD2ZhbEtVvuqDJtTUOvZYKB6pNYaHuYiAWKx4=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.32,REQID:8ba33f1d-0fcf-4e89-ad3c-a80228ffa899,IP:0,U RL:25,TC:0,Content:-25,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTI ON:release,TS:0 X-CID-META: VersionHash:5f78ec9,CLOUDID:0fddd8bf-14cc-44ca-b657-2d2783296e72,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:11|1,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1,SPR: NO,DKR:0,DKP:0,BRR:0,BRE:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_ULN,TF_CID_SPAM_SNR X-UUID: 05fed93e68db11eea33bb35ae8d461a2-20231012 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1831359816; Thu, 12 Oct 2023 16:40:40 +0800 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs13n1.mediatek.inc (172.21.101.193) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Thu, 12 Oct 2023 16:40:39 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Thu, 12 Oct 2023 16:40:39 +0800 From: Moudy Ho To: Chun-Kuang Hu , Philipp Zabel , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mauro Carvalho Chehab , Matthias Brugger , AngeloGioacchino Del Regno , Hans Verkuil CC: , , , , , , Moudy Ho Subject: [PATCH v7 02/16] dt-bindings: media: mediatek: mdp3: merge the indentical RDMA under display Date: Thu, 12 Oct 2023 16:40:23 +0800 Message-ID: <20231012084037.19376-3-moudy.ho@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20231012084037.19376-1-moudy.ho@mediatek.com> References: <20231012084037.19376-1-moudy.ho@mediatek.com> MIME-Version: 1.0 X-MTK: N X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on fry.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (fry.vger.email [0.0.0.0]); Thu, 12 Oct 2023 01:41:15 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779538415591499833 X-GMAIL-MSGID: 1779538415591499833 To simplify maintenance and avoid branches, the identical component should be merged and placed in the path belonging to the MDP (from display/* to media/*). In addition, currently only MDP utilizes RDMA through CMDQ, and the necessary properties for "mediatek,gce-events", and "mboxes" have been set up for this purpose. Within DISP, it directly receives component interrupt signals. Signed-off-by: Moudy Ho Reviewed-by: AngeloGioacchino Del Regno --- .../display/mediatek/mediatek,mdp-rdma.yaml | 88 ------------------- .../bindings/media/mediatek,mdp3-rdma.yaml | 55 +++++++++--- 2 files changed, 45 insertions(+), 98 deletions(-) delete mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-rdma.yaml diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-rdma.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-rdma.yaml deleted file mode 100644 index dd12e2ff685c..000000000000 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-rdma.yaml +++ /dev/null @@ -1,88 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/display/mediatek/mediatek,mdp-rdma.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: MediaTek MDP RDMA - -maintainers: - - Chun-Kuang Hu - - Philipp Zabel - -description: - The MediaTek MDP RDMA stands for Read Direct Memory Access. - It provides real time data to the back-end panel driver, such as DSI, - DPI and DP_INTF. - It contains one line buffer to store the sufficient pixel data. - RDMA device node must be siblings to the central MMSYS_CONFIG node. - For a description of the MMSYS_CONFIG binding, see - Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml for details. - -properties: - compatible: - const: mediatek,mt8195-vdo1-rdma - - reg: - maxItems: 1 - - interrupts: - maxItems: 1 - - power-domains: - maxItems: 1 - - clocks: - items: - - description: RDMA Clock - - iommus: - maxItems: 1 - - mediatek,gce-client-reg: - description: - The register of display function block to be set by gce. There are 4 arguments, - such as gce node, subsys id, offset and register size. The subsys id that is - mapping to the register of display function blocks is defined in the gce header - include/dt-bindings/gce/-gce.h of each chips. - $ref: /schemas/types.yaml#/definitions/phandle-array - items: - items: - - description: phandle of GCE - - description: GCE subsys id - - description: register offset - - description: register size - maxItems: 1 - -required: - - compatible - - reg - - power-domains - - clocks - - iommus - - mediatek,gce-client-reg - -additionalProperties: false - -examples: - - | - #include - #include - #include - #include - #include - - soc { - #address-cells = <2>; - #size-cells = <2>; - - rdma@1c104000 { - compatible = "mediatek,mt8195-vdo1-rdma"; - reg = <0 0x1c104000 0 0x1000>; - interrupts = ; - clocks = <&vdosys1 CLK_VDO1_MDP_RDMA0>; - power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>; - iommus = <&iommu_vdo M4U_PORT_L2_MDP_RDMA0>; - mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x4000 0x1000>; - }; - }; diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml index 3e128733ef53..c043204cf210 100644 --- a/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml @@ -20,8 +20,9 @@ description: | properties: compatible: - items: - - const: mediatek,mt8183-mdp3-rdma + enum: + - mediatek,mt8183-mdp3-rdma + - mediatek,mt8195-vdo1-rdma reg: maxItems: 1 @@ -49,17 +50,18 @@ properties: maxItems: 1 clocks: - items: - - description: RDMA clock - - description: RSZ clock + minItems: 1 + maxItems: 2 iommus: maxItems: 1 mboxes: - items: - - description: used for 1st data pipe from RDMA - - description: used for 2nd data pipe from RDMA + minItems: 1 + maxItems: 2 + + interrupts: + maxItems: 1 '#dma-cells': const: 1 @@ -68,13 +70,46 @@ required: - compatible - reg - mediatek,gce-client-reg - - mediatek,gce-events - power-domains - clocks - iommus - - mboxes - '#dma-cells' +allOf: + - if: + properties: + compatible: + contains: + const: mediatek,mt8183-mdp3-rdma + + then: + properties: + clocks: + items: + - description: RDMA clock + - description: RSZ clock (shared SRAM with RDMA) + + mboxes: + items: + - description: used for 1st data pipe from RDMA + - description: used for 2nd data pipe from RDMA + + required: + - mboxes + - mediatek,gce-events + + - if: + properties: + compatible: + contains: + const: mediatek,mt8195-vdo1-rdma + + then: + properties: + clocks: + items: + - description: RDMA clock + additionalProperties: false examples: From patchwork Thu Oct 12 08:40:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?TW91ZHkgSG8gKOS9leWul+WOnyk=?= X-Patchwork-Id: 151818 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2908:b0:403:3b70:6f57 with SMTP id ib8csp1073731vqb; Thu, 12 Oct 2023 01:41:47 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHsOvbmTcnsAY1pIFGdq3X6pB0Cs8FaaZERon1GZFxaAI7338Q11DNYPkJzAJpRwWO8TM1x X-Received: by 2002:a17:902:f686:b0:1c7:5581:f9c with SMTP id l6-20020a170902f68600b001c755810f9cmr25589971plg.0.1697100107355; Thu, 12 Oct 2023 01:41:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697100107; cv=none; d=google.com; s=arc-20160816; b=odIgCoZZx1yzuKXusi9WCQ2e/n2myUBTFYp+2yh6jmi16Gy4TpqaBjiI1/7XRJJe0c MDkdllbda3wvxXbQh85R5pKyChGVZe0NwuQaNRRHNgyqIS13TMD+qGbQDCtUdGQqYB+G CT+M7kWGZj8LpbfciQQIZJlmnD8IRYdWC84fpQtKpQ37dYvBQxIWbv8phOjBkBFB5qKd BqVhu2VTpH12ua08h+3siUtI3/AoZypNnrn+xzd0DKpw1js6d3waXe54KDNf2W+DrLjt IMTjO5uWl6fsokg8KY+v7aR1d4iYL2dUXdlJh992tajG7w1i5dqbVUx7rgcXAvOjBL+Q B3ag== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=sU5EEYWlspN5kkmtOJdylKS0jIRF0xzJLsP+2D3sg2g=; fh=SE8P9IcxtB2Gz/wdtSbGJFl2wIf8TbeQx856Bu5KJOQ=; b=ppe8RXZ0RtUlTZTDsKYNYKdEcWD/nNFUaxxeYOXRDwsK2Zw7zTIdJiDuKr7fFXgLmF 5NtUHrZ39dqCUtjOWz7phqwk6W4h2JumUwdX6doptqThUG4GONR5Q+g2m77MrNNPqTsp U532ySsXrhZajHqodNGe6T7kAGB0OPdBn84tK06ewjxXAM0UWZIN0Cd3ruDKa47vxPkv atMj+EzhjlFTqXm5J+m+X9yc8pRhlDPrLYnTXfKyyWsr6YaufR2PTwuwXC5v1RW5Dyli xefxu2N48agjqnBOuljk+fi+2RPrYKOrngIOXYMVJHFULwmBZD5m15Ejj0vvbJW3gknV XoUg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=ZzzzE3Xs; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.33 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from lipwig.vger.email (lipwig.vger.email. [23.128.96.33]) by mx.google.com with ESMTPS id d3-20020a170902c18300b001bda57935fasi1632110pld.64.2023.10.12.01.41.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Oct 2023 01:41:47 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.33 as permitted sender) client-ip=23.128.96.33; Authentication-Results: mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=ZzzzE3Xs; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.33 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by lipwig.vger.email (Postfix) with ESMTP id C09AF8227408; Thu, 12 Oct 2023 01:41:36 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at lipwig.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235438AbjJLIlF (ORCPT + 19 others); Thu, 12 Oct 2023 04:41:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58292 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235475AbjJLIkv (ORCPT ); Thu, 12 Oct 2023 04:40:51 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 843CB90; Thu, 12 Oct 2023 01:40:48 -0700 (PDT) X-UUID: 06120ff468db11ee8051498923ad61e6-20231012 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=sU5EEYWlspN5kkmtOJdylKS0jIRF0xzJLsP+2D3sg2g=; b=ZzzzE3Xs2HIuYkO0XjLGRmeNj+6zwx7nS3XAhPwlrbeRryyM0i2m2YFpbN2G5HzvrB+qkOqQ1E4dgoDtZSL4KCvBBNBRZ80Wn2ZFfSON0CpGMK4LxPSJsiKwu3YKv1VQfgEJoZdT6zwzs6rl3+tUHPV0qjG6n5y9Zmt+3NQnKBo=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.32,REQID:5c0486bf-9905-41cb-bda3-76d7d1d8fe07,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:5f78ec9,CLOUDID:feef09c4-1e57-4345-9d31-31ad9818b39f,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1,SPR:NO, DKR:0,DKP:0,BRR:0,BRE:0 X-CID-BVR: 0,NGT X-CID-BAS: 0,NGT,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-UUID: 06120ff468db11ee8051498923ad61e6-20231012 Received: from mtkmbs11n2.mediatek.inc [(172.21.101.187)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 504890117; Thu, 12 Oct 2023 16:40:40 +0800 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs13n2.mediatek.inc (172.21.101.108) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Thu, 12 Oct 2023 16:40:39 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Thu, 12 Oct 2023 16:40:39 +0800 From: Moudy Ho To: Chun-Kuang Hu , Philipp Zabel , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mauro Carvalho Chehab , Matthias Brugger , AngeloGioacchino Del Regno , Hans Verkuil CC: , , , , , , Moudy Ho Subject: [PATCH v7 03/16] dt-bindings: media: mediatek: mdp3: add config for MT8195 RDMA Date: Thu, 12 Oct 2023 16:40:24 +0800 Message-ID: <20231012084037.19376-4-moudy.ho@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20231012084037.19376-1-moudy.ho@mediatek.com> References: <20231012084037.19376-1-moudy.ho@mediatek.com> MIME-Version: 1.0 X-MTK: N X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lipwig.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (lipwig.vger.email [0.0.0.0]); Thu, 12 Oct 2023 01:41:36 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779538442290483578 X-GMAIL-MSGID: 1779538442290483578 Added the configuration for MT8195 RDMA. In comparison to MT8183, it no longer shares SRAM with RSZ, and there are now preconfigured 5 mbox. Signed-off-by: Moudy Ho Reviewed-by: AngeloGioacchino Del Regno --- .../bindings/media/mediatek,mdp3-rdma.yaml | 26 ++++++++++++++++++- 1 file changed, 25 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml index c043204cf210..504334a76fb3 100644 --- a/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml @@ -22,6 +22,7 @@ properties: compatible: enum: - mediatek,mt8183-mdp3-rdma + - mediatek,mt8195-mdp3-rdma - mediatek,mt8195-vdo1-rdma reg: @@ -58,7 +59,7 @@ properties: mboxes: minItems: 1 - maxItems: 2 + maxItems: 5 interrupts: maxItems: 1 @@ -98,6 +99,29 @@ allOf: - mboxes - mediatek,gce-events + - if: + properties: + compatible: + contains: + const: mediatek,mt8195-mdp3-rdma + + then: + properties: + clocks: + items: + - description: RDMA clock + + mboxes: + items: + - description: used for 1st data pipe from RDMA + - description: used for 2nd data pipe from RDMA + - description: used for 3rd data pipe from RDMA + - description: used for 4th data pipe from RDMA + - description: used for the data pipe from SPLIT + + required: + - mediatek,gce-events + - if: properties: compatible: From patchwork Thu Oct 12 08:40:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?TW91ZHkgSG8gKOS9leWul+WOnyk=?= X-Patchwork-Id: 151825 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2908:b0:403:3b70:6f57 with SMTP id ib8csp1073915vqb; Thu, 12 Oct 2023 01:42:22 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEhOlzZ+LR2l8GaSelw4vdVVsdFZwNzxDNgi3/5wLqr7DFiInJFcxM9SaszY6lppPVw6W2g X-Received: by 2002:a05:6a00:2e87:b0:690:c79c:1912 with SMTP id fd7-20020a056a002e8700b00690c79c1912mr26099023pfb.0.1697100142085; Thu, 12 Oct 2023 01:42:22 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697100142; cv=none; d=google.com; s=arc-20160816; b=F6DscqJKHF9LIWo0aJkwRGj3qRAOHN3smDmyvDLYj9uuc9zoRvV6XyBY5TrpiHOwYZ 3mXbPe/igBu0AAIAYEyT4N0TsN4BArQw1J/TivOIZ8YjBVlr4/01bT1xQ8cIiy2idXOi aO01k25PdkiZmuAwQqKbaQu8PKTy0rAPSr2lqe/ePYFVZapSmJQ/GNcYQ+2yRdvyjgVX 5lD3hC/rPSV/nlEXmRJ16IbRh7nfcLLIoX0bQLDyqu+jr6rTVKROWXNBgm2t3+yRKgJQ JuRK/lM47VkeGv7XMud/Co5FPZNb/TK0kK302B78bKHb2MRCg3qJwwFk90yvF5i/3ur0 zFFQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=MWFyCiicj39sUxQv9CnWjC1tBy0Hri5NcSqxRkzu0Ss=; fh=wJeRWNSZIQvKzTzARBL2sRJoO2hKwpVy82Mig4ni80M=; b=gDXlWtJCPQJBBW5uhzGYczlSSZiLcLzm4XODo4+BtbTmkTnfQhd8muff3ogwcMe1rq mD4rYGmy/IVEqbW1+KBlgCv6IfN+bI0ihnvj+dYQFSyAKP/tQGk4lpH9wMK52/8q9Kq8 VxPiv+bodFcCPfxRBwID2cnxmoDiL26VUoUNZgHZMufupcySW3wI9MMShK6YWRPVJb9P EZhioR4detGmL4mogM3S7/jY0JyE63mMToiSShU1V4fPL9JfKVnPzCtavQB4yvnwvbXv MMRd9fOePDkZA65Batocbnm58aPvgiv6HKb+v+woWudo3r4yyk+7MVpGswOM4fntuK9A KGPw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=iFqAQCSA; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.35 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from groat.vger.email (groat.vger.email. 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Thu, 12 Oct 2023 16:40:44 +0800 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by MTKMBS14N2.mediatek.inc (172.21.101.76) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Thu, 12 Oct 2023 16:40:39 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Thu, 12 Oct 2023 16:40:39 +0800 From: Moudy Ho To: Chun-Kuang Hu , Philipp Zabel , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mauro Carvalho Chehab , Matthias Brugger , AngeloGioacchino Del Regno , Hans Verkuil CC: , , , , , , "Moudy Ho" Subject: [PATCH v7 04/16] dt-bindings: media: mediatek: mdp3: add compatible for MT8195 RSZ Date: Thu, 12 Oct 2023 16:40:25 +0800 Message-ID: <20231012084037.19376-5-moudy.ho@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20231012084037.19376-1-moudy.ho@mediatek.com> References: <20231012084037.19376-1-moudy.ho@mediatek.com> MIME-Version: 1.0 X-TM-AS-Product-Ver: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-AS-Result: No-10--1.519300-8.000000 X-TMASE-MatchedRID: jhJi18RLqAIdj9vNGYhpkSmjEOrcO6AyFuNF4lJG6xtqXTlXpEy00aPF jJEFr+olAmPpbGBYlhvkwjHXXC/4I66NVEWSRWybBYrOm8wcgAgH9t0pBydIMHH0sxhCh8dBhhq AZqrjLCoBpPFIMRIW1wOez9WygIisH1M1nGtXSytvtgJmb1gxM9urduiIJaUEjofsMjQaxVwyYj biqIQ3CsykhtyXcigD6rVdgBjDT2r1nXJavJVNag== X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--1.519300-8.000000 X-TMASE-Version: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-SNTS-SMTP: 3BD59FFC53B881691F4FE3F4FDBDF5E43A2FCA457F2769B520212BD571532D4D2000:8 X-MTK: N X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on groat.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (groat.vger.email [0.0.0.0]); Thu, 12 Oct 2023 01:42:09 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779538478451067383 X-GMAIL-MSGID: 1779538478451067383 MT8195 RSZ inherited from MT8183, add the corresponding compatible name to it. Signed-off-by: Moudy Ho Reviewed-by: AngeloGioacchino Del Regno Acked-by: Krzysztof Kozlowski --- .../devicetree/bindings/media/mediatek,mdp3-rsz.yaml | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-rsz.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-rsz.yaml index 78f9de6192ef..f5676bec4326 100644 --- a/Documentation/devicetree/bindings/media/mediatek,mdp3-rsz.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-rsz.yaml @@ -15,9 +15,13 @@ description: | properties: compatible: - items: + oneOf: - enum: - mediatek,mt8183-mdp3-rsz + - items: + - enum: + - mediatek,mt8195-mdp3-rsz + - const: mediatek,mt8183-mdp3-rsz reg: maxItems: 1 From patchwork Thu Oct 12 08:40:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?TW91ZHkgSG8gKOS9leWul+WOnyk=?= X-Patchwork-Id: 151820 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2908:b0:403:3b70:6f57 with SMTP id ib8csp1073847vqb; Thu, 12 Oct 2023 01:42:07 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHLYCE9xjGe1+L42D429ulXUk7pb8GNZcFoQO5qPDd+ekc+SZ1g2GdRzr+zklCy3U+e/j9z X-Received: by 2002:a17:902:d4c9:b0:1b8:9fc4:2733 with SMTP id o9-20020a170902d4c900b001b89fc42733mr26284546plg.3.1697100127619; Thu, 12 Oct 2023 01:42:07 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697100127; cv=none; d=google.com; s=arc-20160816; b=0s5Afx4V7t+UN6epjr8XodJ07Snn+34KFmJ4vL0v1DzRUWmj2evUSczgmwqZHhJbHt Qx0QPzjBeCWc7NF3TV6KFejD9cGopY+JT+puJlNYMAkp4klOglNkUM0IeHDjLaCVthqI AiPzrtZF5Db83NbzjBDY9b8RTMgL9TMnuq04cP0mCAdjokyv1GdOt2dxMhUW3uKloNl0 tfbw/8/Jx7vp7ikb7dG5qvWDRfZZmf/XZcBYyOkWDjb7XMjdk0BUwKJ3Q360QDTU+zxT reGK2Qpn5t0hWRfwMT7bJdZjaZwvrxR7G2OANFbBykoNsKGPQamsE6QYd+iBTiQBJpUI 0TVQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=UbH82/egIYILf4iLMnrCQkQRdNwTWX4qcQx8XllYqOM=; fh=SE8P9IcxtB2Gz/wdtSbGJFl2wIf8TbeQx856Bu5KJOQ=; b=kPZVnRCwotuiF9VM/wpujd7hzjIiFSJfMbJvCrOkP2so+iGZGaEYRvRQ2XDNkwLqvF 1gHonllRqGIBgMi8tz3vVAkJbqWGnksq0UYopuJyFFAjZKEgFHFWNHmXqiZ37Z/5TD2M bipNGWYy7vIp1H60pWdHc9LjQLErttsOyFNDQynABzw0ElVwCPS47vadg45NJDvca1On Pk5iiFiijQXDguDEY13SGwQ5sz0Npu5yrWRY1uBW0dQ23138j/fNhsIN5PvqQ2n8P559 lCgiR5kUWP2AxZH54kI+secsqIIKqDEwN/IK520+PiZ2T0vFC0MwJ9lxaERnVSyO5II3 q94Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=c7MGXp5D; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.32 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from agentk.vger.email (agentk.vger.email. [23.128.96.32]) by mx.google.com with ESMTPS id l13-20020a170902f68d00b001c0cbaf6970si1806513plg.501.2023.10.12.01.42.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Oct 2023 01:42:07 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.32 as permitted sender) client-ip=23.128.96.32; Authentication-Results: mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=c7MGXp5D; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.32 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by agentk.vger.email (Postfix) with ESMTP id 249888135C74; Thu, 12 Oct 2023 01:42:00 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at agentk.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235583AbjJLIlN (ORCPT + 19 others); Thu, 12 Oct 2023 04:41:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58298 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235480AbjJLIkv (ORCPT ); Thu, 12 Oct 2023 04:40:51 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 844ABC0; Thu, 12 Oct 2023 01:40:48 -0700 (PDT) X-UUID: 06de1dce68db11ee8051498923ad61e6-20231012 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=UbH82/egIYILf4iLMnrCQkQRdNwTWX4qcQx8XllYqOM=; b=c7MGXp5D78zs4bmDb/gSRKIghlH2vrzb46sL/vSD7RaPXbDW9SpQg+tqzMBh4qrXm3K0I5+FhWD+vEV74+5DVCwTqBu9SNqLDPWwcVthuoWpC8EplvsEXi3ZWMbSVAfFmpxHqY6QykbApQbq4i2Wg7Z4ShvAfRrGbCbpSkAB8tU=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.32,REQID:de555960-e8c6-492d-9ebd-a8bd0fa9d9e2,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:5f78ec9,CLOUDID:e244b5f0-9a6e-4c39-b73e-f2bc08ca3dc5,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1,SPR:NO, DKR:0,DKP:0,BRR:0,BRE:0 X-CID-BVR: 0,NGT X-CID-BAS: 0,NGT,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-UUID: 06de1dce68db11ee8051498923ad61e6-20231012 Received: from mtkmbs14n2.mediatek.inc [(172.21.101.76)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1249231783; Thu, 12 Oct 2023 16:40:41 +0800 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs11n2.mediatek.inc (172.21.101.187) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Thu, 12 Oct 2023 16:40:40 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Thu, 12 Oct 2023 16:40:40 +0800 From: Moudy Ho To: Chun-Kuang Hu , Philipp Zabel , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mauro Carvalho Chehab , Matthias Brugger , AngeloGioacchino Del Regno , Hans Verkuil CC: , , , , , , Moudy Ho Subject: [PATCH v7 05/16] dt-bindings: media: mediatek: mdp3: add compatible for MT8195 WROT Date: Thu, 12 Oct 2023 16:40:26 +0800 Message-ID: <20231012084037.19376-6-moudy.ho@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20231012084037.19376-1-moudy.ho@mediatek.com> References: <20231012084037.19376-1-moudy.ho@mediatek.com> MIME-Version: 1.0 X-MTK: N X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on agentk.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (agentk.vger.email [0.0.0.0]); Thu, 12 Oct 2023 01:42:00 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779538463193490124 X-GMAIL-MSGID: 1779538463193490124 MT8195 WROT inherited from MT8183, add the corresponding compatible name to it. Signed-off-by: Moudy Ho Reviewed-by: AngeloGioacchino Del Regno Acked-by: Krzysztof Kozlowski --- .../devicetree/bindings/media/mediatek,mdp3-wrot.yaml | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml index 64ea98aa0592..53a679338402 100644 --- a/Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml @@ -15,9 +15,13 @@ description: | properties: compatible: - items: + oneOf: - enum: - mediatek,mt8183-mdp3-wrot + - items: + - enum: + - mediatek,mt8195-mdp3-wrot + - const: mediatek,mt8183-mdp3-wrot reg: maxItems: 1 From patchwork Thu Oct 12 08:40:27 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?TW91ZHkgSG8gKOS9leWul+WOnyk=?= X-Patchwork-Id: 151819 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2908:b0:403:3b70:6f57 with SMTP id ib8csp1073782vqb; Thu, 12 Oct 2023 01:41:56 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFsot24B8L27993PM2n/swVV17vvWqQkB84XLCPgJzatUPnUdV/KLb3jj5iMjqis77bbrfh X-Received: by 2002:a17:903:22cc:b0:1b8:2ba0:c9a8 with SMTP id y12-20020a17090322cc00b001b82ba0c9a8mr25767205plg.2.1697100115935; Thu, 12 Oct 2023 01:41:55 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697100115; cv=none; d=google.com; s=arc-20160816; b=Pb+rvQklnFVEU5IQe74EmJsEZrHowwuwtnChwZqPII9ZlDPNMjOpfDiw2GTmYJf4ct keX0fkN6DZfIaOOZ9nZaOojI0b2yklwrc+qKkkqD+Ko0z7jLtgsBslYHTrzwTgv+cUb+ AeGAh/wCT38XUdSjgA/tW1scDILHIYbwKjZ9lyNmyGU1F4zHS6EipLVy3Rsm+IEVtL7B TDs7AvebJXNPm969PqD7MU8fkcEnJprPOWRMGlPNQ/u3S2Hu+/JZUOMWbCzbVgCEWEQ4 Fz2xogNOpSORwNkFBZ3jarwRQOTQ8zIpM+uWZ2fLry3WoznveoImWUsTMWIwMsMYN/Hd fWig== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=3HsFWDPzX+y0YFftoA3WkuAJ4JsMYUdC0CeHILinzmo=; fh=SE8P9IcxtB2Gz/wdtSbGJFl2wIf8TbeQx856Bu5KJOQ=; b=FYzEDXVlakGeAIbllt0fmWr5QlNpyXTfoBbWkbaAMK97o48U7RlA38Mwz0p69xpDnq 7KJVxpKXiMund7pcspXfx3RdVzqQy8y7FNVxHeaYXei/hC0Rd+G5Ic+VN5LKswiI8G2/ 0w7Miy3z/anT4vHu/H6oVWNMu1bEdEJx4sCCJZmFcm4E8kRFgh2sc/PiFTBml9KogC2B sRFtgAH4lsmCdytsXVp2MFIqYku5a7Vlt6xXkTpCg6mo8iUxN9lCrLGeiDs6yAQuElhc RF108+P5cb+31aL6y+d1c7Fdu8TpHYOC3SGr8ZJoCTkBgbHxk+Nmuz5mKSUUVEDQDfjp Sw/Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=onCyMjeo; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.36 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from pete.vger.email (pete.vger.email. [23.128.96.36]) by mx.google.com with ESMTPS id 13-20020a170902c24d00b001c7342b46e4si601446plg.23.2023.10.12.01.41.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Oct 2023 01:41:55 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.36 as permitted sender) client-ip=23.128.96.36; Authentication-Results: mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=onCyMjeo; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.36 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by pete.vger.email (Postfix) with ESMTP id 27BA980239C8; Thu, 12 Oct 2023 01:41:38 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at pete.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235509AbjJLIlB (ORCPT + 19 others); Thu, 12 Oct 2023 04:41:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58288 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235474AbjJLIkv (ORCPT ); Thu, 12 Oct 2023 04:40:51 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B268CB7; Thu, 12 Oct 2023 01:40:46 -0700 (PDT) X-UUID: 06f87c1468db11eea33bb35ae8d461a2-20231012 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=3HsFWDPzX+y0YFftoA3WkuAJ4JsMYUdC0CeHILinzmo=; b=onCyMjeoPk50fk7HDjMqD7yMcCsueVOupss5GOSfsWGHKOUt30e+3b8BTllOjdT3uOE6eXoQ2tB+cLM+nq8RQMvmD+kC3DO1GqhkjL9lZUPZNp8ex3s89h6HcuUoQwH5P7+6P1sZOAIgRelDKRh3mf9GLCeI5VzXsLCTOX58KgQ=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.32,REQID:20ada438-c0f7-45bd-b2f3-26135eb11bb8,IP:0,U RL:25,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION :release,TS:25 X-CID-META: VersionHash:5f78ec9,CLOUDID:6119f314-4929-4845-9571-38c601e9c3c9,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:11|1,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1,SPR: NO,DKR:0,DKP:0,BRR:0,BRE:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR,TF_CID_SPAM_ULN X-UUID: 06f87c1468db11eea33bb35ae8d461a2-20231012 Received: from mtkmbs10n2.mediatek.inc [(172.21.101.183)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1997561754; Thu, 12 Oct 2023 16:40:41 +0800 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Thu, 12 Oct 2023 16:40:40 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Thu, 12 Oct 2023 16:40:40 +0800 From: Moudy Ho To: Chun-Kuang Hu , Philipp Zabel , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mauro Carvalho Chehab , Matthias Brugger , AngeloGioacchino Del Regno , Hans Verkuil CC: , , , , , , Moudy Ho Subject: [PATCH v7 06/16] dt-bindings: media: mediatek: mdp3: add component FG for MT8195 Date: Thu, 12 Oct 2023 16:40:27 +0800 Message-ID: <20231012084037.19376-7-moudy.ho@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20231012084037.19376-1-moudy.ho@mediatek.com> References: <20231012084037.19376-1-moudy.ho@mediatek.com> MIME-Version: 1.0 X-MTK: N X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on pete.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (pete.vger.email [0.0.0.0]); Thu, 12 Oct 2023 01:41:38 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779538450769322849 X-GMAIL-MSGID: 1779538450769322849 Add the fundamental hardware configuration of component FG, which is controlled by MDP3 on MT8195. Signed-off-by: Moudy Ho Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Krzysztof Kozlowski --- .../bindings/media/mediatek,mdp3-fg.yaml | 61 +++++++++++++++++++ 1 file changed, 61 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/mediatek,mdp3-fg.yaml diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-fg.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-fg.yaml new file mode 100644 index 000000000000..82f4c182c77a --- /dev/null +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-fg.yaml @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/mediatek,mdp3-fg.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek Media Data Path 3 FG + +maintainers: + - Matthias Brugger + - Moudy Ho + +description: + One of Media Data Path 3 (MDP3) components used to add film grain + according to AV1 spec. + +properties: + compatible: + enum: + - mediatek,mt8195-mdp3-fg + + reg: + maxItems: 1 + + mediatek,gce-client-reg: + description: + The register of display function block to be set by gce. There are 4 arguments, + such as gce node, subsys id, offset and register size. The subsys id that is + mapping to the register of display function blocks is defined in the gce header + include/dt-bindings/gce/-gce.h of each chips. + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + items: + - description: phandle of GCE + - description: GCE subsys id + - description: register offset + - description: register size + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - mediatek,gce-client-reg + - clocks + +additionalProperties: false + +examples: + - | + #include + #include + + display@14002000 { + compatible = "mediatek,mt8195-mdp3-fg"; + reg = <0x14002000 0x1000>; + mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x2000 0x1000>; + clocks = <&vppsys0 CLK_VPP0_MDP_FG>; + }; From patchwork Thu Oct 12 08:40:28 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?TW91ZHkgSG8gKOS9leWul+WOnyk=?= X-Patchwork-Id: 151830 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2908:b0:403:3b70:6f57 with SMTP id ib8csp1074051vqb; Thu, 12 Oct 2023 01:42:46 -0700 (PDT) X-Google-Smtp-Source: AGHT+IF6Lt74+s/SRsv0RLrVmTO/HjYdzdR2ZXU30qhJO6bUbUdlThIxRCaFNcBDVhpon0iahTLL X-Received: by 2002:a05:6a21:a5a0:b0:15d:a247:d20c with SMTP id gd32-20020a056a21a5a000b0015da247d20cmr30744138pzc.6.1697100165918; Thu, 12 Oct 2023 01:42:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697100165; cv=none; d=google.com; s=arc-20160816; b=k2nVfR3LfEUqjy2hXUsg6M7mUTbF2fcHPXV7djiFeRYFJzSThzlGlUYixhHPHMcXCL +sq0iBsGbivUU1NIKS8VUf0kzry6uJNc+ZWanVGW4Y3vXPuY84ze7DCLrgDNIstdcX63 5sbq1iAdo4Q5LEdL+sQH5k9pzZiBfpKsoxYY/xXJ7sw0IM2s6Nkx+tYYstfucXiivz+o vG6M4E2M027onOg7cGfslLKegKkeoLnvbygb0iU+Hc6qtTIJwv6lk4J2Z2iwnEqbVn3E iifBEA7yRzp1da1Ts0Y46F069qDAXUMBGdjuiWzPMiIRcurkvY2Chm/s9RBL4Gyq9ZbL 5cQw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=nto216znPzflD3lPPlNzRkRFAKgxDQ6cM/1N2xk9Liw=; fh=SE8P9IcxtB2Gz/wdtSbGJFl2wIf8TbeQx856Bu5KJOQ=; b=aBLzp6rYhYJzFDAknVgAiWlK+3LfhX0UzutjQbL1xa4f+KBQNGIQ5hGXGLw7az/Q2p x19c+PzRwkDCxJCZ+WncEO88CdYV7hzdG2RLtdVi/Caxs0lhvGhra1AOxMNbQTJS6oeA bWXXRecJ1iUDGzjG/S6b55KypnZ94OESVuNGwCZT6KDvJvMWRb55dnUB36HmlxmZyp34 lIfToFG/9Y1gC6vIc5rypx9AFLIZISb52SIURPq/VcceXzLJgCHgEDSelLJhcn3Rd7Sp RENNR95cDHtB+xyUCu5XQ2D6xQsBUZuGwMSej+z37aj2OKVtKleozMY72Z29oqB+eONV oPtQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b="AdCJ/3zt"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:5 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from groat.vger.email (groat.vger.email. [2620:137:e000::3:5]) by mx.google.com with ESMTPS id d1-20020a17090ad3c100b002791baa4729si1739265pjw.57.2023.10.12.01.42.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Oct 2023 01:42:45 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:5 as permitted sender) client-ip=2620:137:e000::3:5; Authentication-Results: mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b="AdCJ/3zt"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:5 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by groat.vger.email (Postfix) with ESMTP id 24E7980EE7EA; Thu, 12 Oct 2023 01:42:37 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at groat.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235553AbjJLIlJ (ORCPT + 19 others); Thu, 12 Oct 2023 04:41:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58300 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235478AbjJLIkv (ORCPT ); Thu, 12 Oct 2023 04:40:51 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 57E15C4; Thu, 12 Oct 2023 01:40:49 -0700 (PDT) X-UUID: 071ad4d068db11ee8051498923ad61e6-20231012 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=nto216znPzflD3lPPlNzRkRFAKgxDQ6cM/1N2xk9Liw=; b=AdCJ/3zttRRgK84QOlLpErMQMn48ygE0qc/epKcaugckSz86TV2+3GRieJLdmaQAdM6rLom3KeQHF6447Sq6epwF+2jvBCovNEwVKI4w/3yIxAzGLoh/9gWcb8qVoH0x43WCGxY39d2q/iMfwY/l0muCagQAb4Pqd42O6Nm9HyE=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.32,REQID:99d73300-e949-49b5-b576-864d9654b7f2,IP:0,U RL:25,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION :release,TS:25 X-CID-META: VersionHash:5f78ec9,CLOUDID:00f009c4-1e57-4345-9d31-31ad9818b39f,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:11|1,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1,SPR: NO,DKR:0,DKP:0,BRR:0,BRE:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR,TF_CID_SPAM_ULN X-UUID: 071ad4d068db11ee8051498923ad61e6-20231012 Received: from mtkmbs14n2.mediatek.inc [(172.21.101.76)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 732954632; Thu, 12 Oct 2023 16:40:42 +0800 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs13n1.mediatek.inc (172.21.101.193) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Thu, 12 Oct 2023 16:40:40 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Thu, 12 Oct 2023 16:40:40 +0800 From: Moudy Ho To: Chun-Kuang Hu , Philipp Zabel , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mauro Carvalho Chehab , Matthias Brugger , AngeloGioacchino Del Regno , Hans Verkuil CC: , , , , , , Moudy Ho Subject: [PATCH v7 07/16] dt-bindings: media: mediatek: mdp3: add component HDR for MT8195 Date: Thu, 12 Oct 2023 16:40:28 +0800 Message-ID: <20231012084037.19376-8-moudy.ho@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20231012084037.19376-1-moudy.ho@mediatek.com> References: <20231012084037.19376-1-moudy.ho@mediatek.com> MIME-Version: 1.0 X-MTK: N X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on groat.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (groat.vger.email [0.0.0.0]); Thu, 12 Oct 2023 01:42:37 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779538503612141942 X-GMAIL-MSGID: 1779538503612141942 Add the fundamental hardware configuration of component HDR, which is controlled by MDP3 on MT8195. Signed-off-by: Moudy Ho Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Krzysztof Kozlowski --- .../bindings/media/mediatek,mdp3-hdr.yaml | 60 +++++++++++++++++++ 1 file changed, 60 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/mediatek,mdp3-hdr.yaml diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-hdr.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-hdr.yaml new file mode 100644 index 000000000000..98db6cb4d03a --- /dev/null +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-hdr.yaml @@ -0,0 +1,60 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/mediatek,mdp3-hdr.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek Media Data Path 3 HDR + +maintainers: + - Matthias Brugger + - Moudy Ho + +description: + One of Media Data Path 3 (MDP3) components used to perform HDR to SDR + +properties: + compatible: + enum: + - mediatek,mt8195-mdp3-hdr + + reg: + maxItems: 1 + + mediatek,gce-client-reg: + description: + The register of display function block to be set by gce. There are 4 arguments, + such as gce node, subsys id, offset and register size. The subsys id that is + mapping to the register of display function blocks is defined in the gce header + include/dt-bindings/gce/-gce.h of each chips. + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + items: + - description: phandle of GCE + - description: GCE subsys id + - description: register offset + - description: register size + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - mediatek,gce-client-reg + - clocks + +additionalProperties: false + +examples: + - | + #include + #include + + display@14004000 { + compatible = "mediatek,mt8195-mdp3-hdr"; + reg = <0x14004000 0x1000>; + mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x4000 0x1000>; + clocks = <&vppsys0 CLK_VPP0_MDP_HDR>; + }; From patchwork Thu Oct 12 08:40:29 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?TW91ZHkgSG8gKOS9leWul+WOnyk=?= X-Patchwork-Id: 151822 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2908:b0:403:3b70:6f57 with SMTP id ib8csp1073870vqb; Thu, 12 Oct 2023 01:42:13 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFE/5RoCcEHgI+21AuhpeEBuNyPTWMfThPPlvnr9HxWq7huSjDKv5rpMajr+0vnKaUrMY1z X-Received: by 2002:a05:6808:1495:b0:3a8:458d:e1cc with SMTP id e21-20020a056808149500b003a8458de1ccmr29515853oiw.1.1697100133070; Thu, 12 Oct 2023 01:42:13 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697100133; cv=none; d=google.com; s=arc-20160816; b=NcTxqdoJA+2PJg9yjq/cBew8bH3x/e6w+6tLYj2tPH/CXW1dslkG7B2a3axAobXxB8 cS+vbDs9e+dNdT9KoRIwz0MH8QMcRY5FBdPrUBlhcquBmjHHgE7pBh05HOpdj5VC4/2H YOGe3cXVNibFAKzrCZyg9dwR3WffWn3rn34RHSbJRjdBHs7m/WMkm9HGaimHtzn24aRb UJwpsezKj0Lrpp6yll1IqWUemnNA3kqJjMDrcTDdU75b434mPHAMAMASQ1TV2QEsga4B n1UUWCM2wTqSS8JX8sxUwH+8Zbli1xwuf+7POwgBHHjgTXFKTlYIGEQs4mATjm5+nHwW yX4Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=seSDdPmbxpUkj2sJBRkLBY8UonHVXor/eqIz0QXz6T4=; fh=wJeRWNSZIQvKzTzARBL2sRJoO2hKwpVy82Mig4ni80M=; b=iEU6jR/sLabBfTqtqf4rujFQyr8PLsTcLD7RjaY11mdnLj9c0Deu4ekVBrdmSnlCXr 9TjCXfOk8W+tusqwPDb1CnZLNAyrmipoLVVzuC0DgAh8T5DagUGT6sLGFEBJ/Tg8r/xw vdVecmLOW3z5drytYDPvttVjihe8237VdJX2ZNjrF5CTCfgQMz4leR04xqjnVvkgVZAZ 8FfOYy8dpQtQ27WodAB4IhDHvbTBL3jgNVcKG6dyWizBwDBc2fiby9Xr58FZYpkZbYRo siRX/wB+lB/gWF7YLq7w/+e7+ffpdgGBmGSocv2WrGkYM2VRylPbULIkVRL99KcfFpFN bWEQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=mijdgD6c; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:2 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from agentk.vger.email (agentk.vger.email. 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Thu, 12 Oct 2023 16:40:44 +0800 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by MTKMBS14N2.mediatek.inc (172.21.101.76) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Thu, 12 Oct 2023 16:40:41 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Thu, 12 Oct 2023 16:40:41 +0800 From: Moudy Ho To: Chun-Kuang Hu , Philipp Zabel , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mauro Carvalho Chehab , Matthias Brugger , AngeloGioacchino Del Regno , Hans Verkuil CC: , , , , , , "Moudy Ho" Subject: [PATCH v7 08/16] dt-bindings: media: mediatek: mdp3: add component STITCH for MT8195 Date: Thu, 12 Oct 2023 16:40:29 +0800 Message-ID: <20231012084037.19376-9-moudy.ho@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20231012084037.19376-1-moudy.ho@mediatek.com> References: <20231012084037.19376-1-moudy.ho@mediatek.com> MIME-Version: 1.0 X-TM-AS-Product-Ver: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-AS-Result: No-10--8.122500-8.000000 X-TMASE-MatchedRID: +k55+NgUc6boRPKKjGHPUxcqpH7D1rtQTJDl9FKHbrm7qpOHKudqczQz 47GqDWjpnD3AxwqeC/rkllaluas5jhhzK7qAlTSLbBu6+EIezdwzc8FC0MEwT/zaSz3Z/4aao8A sEqzaHYd3IL9RTZjcZXNjxEfTH8yUnuh7s4XRTZbBVprK8rvWX3+vzHfC29pfzsQ8iRVyD45ZoZ UwtnkREuLzNWBegCW2U9w4XVXDWCYLbigRnpKlKWxlRJiH4397fj9jiMqiWyIjyTA0RbddwlqPC +KqjpoaRMaCF3Y0fhqpcY1cS87iDg== X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--8.122500-8.000000 X-TMASE-Version: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-SNTS-SMTP: 510D9C277CA291CBA59DB39714405C3EBE96D1A69B6CBF0EA7D9DCCD43675FCB2000:8 X-MTK: N X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on agentk.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (agentk.vger.email [0.0.0.0]); Thu, 12 Oct 2023 01:42:05 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779538469102512063 X-GMAIL-MSGID: 1779538469102512063 Add the fundamental hardware configuration of component STITCH, which is controlled by MDP3 on MT8195. Signed-off-by: Moudy Ho Reviewed-by: Krzysztof Kozlowski --- .../bindings/media/mediatek,mdp3-stitch.yaml | 61 +++++++++++++++++++ 1 file changed, 61 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/mediatek,mdp3-stitch.yaml diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-stitch.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-stitch.yaml new file mode 100644 index 000000000000..d815bea29154 --- /dev/null +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-stitch.yaml @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/mediatek,mdp3-stitch.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek Media Data Path 3 STITCH + +maintainers: + - Matthias Brugger + - Moudy Ho + +description: + One of Media Data Path 3 (MDP3) components used to combine multiple video frame + with overlapping fields of view to produce a segmented panorame. + +properties: + compatible: + enum: + - mediatek,mt8195-mdp3-stitch + + reg: + maxItems: 1 + + mediatek,gce-client-reg: + description: + The register of display function block to be set by gce. There are 4 arguments, + such as gce node, subsys id, offset and register size. The subsys id that is + mapping to the register of display function blocks is defined in the gce header + include/dt-bindings/gce/-gce.h of each chips. + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + items: + - description: phandle of GCE + - description: GCE subsys id + - description: register offset + - description: register size + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - mediatek,gce-client-reg + - clocks + +additionalProperties: false + +examples: + - | + #include + #include + + display@14003000 { + compatible = "mediatek,mt8195-mdp3-stitch"; + reg = <0x14003000 0x1000>; + mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x3000 0x1000>; + clocks = <&vppsys0 CLK_VPP0_STITCH>; + }; From patchwork Thu Oct 12 08:40:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?TW91ZHkgSG8gKOS9leWul+WOnyk=?= X-Patchwork-Id: 151829 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2908:b0:403:3b70:6f57 with SMTP id ib8csp1074020vqb; Thu, 12 Oct 2023 01:42:41 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHSh8c8HDPjvwrHOAGHZxRq7D6McppswgNuphjmgMflPXuQi8eV40nYzuSEleNYPuZ7JZiK X-Received: by 2002:a17:90a:e7c4:b0:27d:15e3:3aa9 with SMTP id kb4-20020a17090ae7c400b0027d15e33aa9mr2362915pjb.3.1697100161031; Thu, 12 Oct 2023 01:42:41 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697100161; cv=none; d=google.com; s=arc-20160816; b=A3Q/BNnYzaNVquZZ+I0xX6TgeMo5CXZSSHZHfymrrQPjwQ048nkR3JpMRbRQhYnOdd M3k+eeI9DY+Y5L6VPrjX4h4uTryUAduUdznsHks1wTKIYho2aMadWzk07zAV/9kZ2rxG 6aquDukJm1H9qEMA9PNU796I4hiduiQcf6vcFmuW7YixC7HWgJ2pM4DA8ia5KVGsYTW5 pCErt6Xp6LcbSIUH4aG07od4iLnLMotvAmLz9c6KNKgBX06YqVFrK7sve+0+5v+G4Ome iTbh8LAolCAr+H+zyfPeMgb6v458YYhoijZtuYrkXM0of9QzctmXgJXpbxse5zCXUgJ2 DNKw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=d9PkghF78IoyLpbi64ECnGrTix4LWfA2pDeqlo9Wuao=; fh=wJeRWNSZIQvKzTzARBL2sRJoO2hKwpVy82Mig4ni80M=; b=Gn4cqJHZbtuUiM+qx0czFWnuITAGMeOjdmchBQZygjJhakd6YSO9l3V1++RV83x3xe /ZnQ1nZf3XZXX09MJsxogA8iY1eMcDXt2kAvrg1GbCgze+rVvQYTyGSc2wtin5VuvAJU ucL/iEReFxWg+s6sKu3uJiBm/Omb10niVejFuLUICU+MXg1bQZgIFQmYMMwRggO/qtA+ UNFjtUCLqSgsqOtORkzeWl7GVxdikXz6oUqY1z3HR/7jYKqQKoCzyZmEeI1ABRpmHx6B FYBwTBPmorF1bdUPIc3gtndTZ1D9192ipOT/m7USAVrzYzpZGFdn0PUYKwtmM+r3UUAU Ztng== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=djnG9ExQ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:8 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from fry.vger.email (fry.vger.email. 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Thu, 12 Oct 2023 16:40:45 +0800 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Thu, 12 Oct 2023 16:40:43 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Thu, 12 Oct 2023 16:40:43 +0800 From: Moudy Ho To: Chun-Kuang Hu , Philipp Zabel , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mauro Carvalho Chehab , Matthias Brugger , AngeloGioacchino Del Regno , Hans Verkuil CC: , , , , , , "Moudy Ho" Subject: [PATCH v7 09/16] dt-bindings: media: mediatek: mdp3: add component TCC for MT8195 Date: Thu, 12 Oct 2023 16:40:30 +0800 Message-ID: <20231012084037.19376-10-moudy.ho@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20231012084037.19376-1-moudy.ho@mediatek.com> References: <20231012084037.19376-1-moudy.ho@mediatek.com> MIME-Version: 1.0 X-TM-AS-Product-Ver: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-AS-Result: No-10--8.594300-8.000000 X-TMASE-MatchedRID: XAa2d/45j8ToRPKKjGHPUxcqpH7D1rtQTJDl9FKHbrm7qpOHKudqczQz 47GqDWjpnD3AxwqeC/rkllaluas5jhhzK7qAlTSLbBu6+EIezdwzc8FC0MEwT48D7T+G1GV/HCd GeoAEt/3GC9LL60ZzlKs2iyhaZgqyosJM7VQrKm9IRA38P/dwbofsPVs/8Vw6WabPstVV86lkHC sgREbP4RmgGxBaKosCumMCMwce1mUfE8yM4pjsDxZ4ylU2GwzAxEHRux+uk8jHUU+U0ACZwFLpC cuF3zReHuXtW/qJcDfc4EtpCcgTjBFF8L+JyICrnqg/VrSZEiM= X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--8.594300-8.000000 X-TMASE-Version: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-SNTS-SMTP: 5B06B0C9E0164937661A1F58A606FF1B1F8F7FA5AF0AE72564CB43A569881CF02000:8 X-MTK: N X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on fry.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (fry.vger.email [0.0.0.0]); Thu, 12 Oct 2023 01:42:30 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779538498411996954 X-GMAIL-MSGID: 1779538498411996954 Add the fundamental hardware configuration of component TCC, which is controlled by MDP3 on MT8195. Signed-off-by: Moudy Ho Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Krzysztof Kozlowski --- .../bindings/media/mediatek,mdp3-tcc.yaml | 62 +++++++++++++++++++ 1 file changed, 62 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/mediatek,mdp3-tcc.yaml diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-tcc.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-tcc.yaml new file mode 100644 index 000000000000..f134160f85b9 --- /dev/null +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-tcc.yaml @@ -0,0 +1,62 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/mediatek,mdp3-tcc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek Media Data Path 3 TCC + +maintainers: + - Matthias Brugger + +description: + Tone Curve Conversion (TCC) is one of Media Profile Path 3 (MDP3) components. + It is used to handle the tone mapping of various gamma curves in order to + achieve HDR10 effects. This helps adapt the content to the color and + brightness range that standard display devices typically support. + +properties: + compatible: + enum: + - mediatek,mt8195-mdp3-tcc + + reg: + maxItems: 1 + + mediatek,gce-client-reg: + description: + The register of display function block to be set by gce. There are 4 arguments, + such as gce node, subsys id, offset and register size. The subsys id that is + mapping to the register of display function blocks is defined in the gce header + include/dt-bindings/gce/-gce.h of each chips. + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + items: + - description: phandle of GCE + - description: GCE subsys id + - description: register offset + - description: register size + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - mediatek,gce-client-reg + - clocks + +additionalProperties: false + +examples: + - | + #include + #include + + display@1400b000 { + compatible = "mediatek,mt8195-mdp3-tcc"; + reg = <0x1400b000 0x1000>; + mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0xb000 0x1000>; + clocks = <&vppsys0 CLK_VPP0_MDP_TCC>; + }; From patchwork Thu Oct 12 08:40:31 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?TW91ZHkgSG8gKOS9leWul+WOnyk=?= X-Patchwork-Id: 151831 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2908:b0:403:3b70:6f57 with SMTP id ib8csp1074162vqb; Thu, 12 Oct 2023 01:43:07 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEtGjzaJRCXiDHufc20TZYh6qqOQCifwBisvgwfRebN/LULCpCQbXiYK9DAQ5ArVta/ewSR X-Received: by 2002:a17:902:d352:b0:1c9:e121:ccc1 with SMTP id l18-20020a170902d35200b001c9e121ccc1mr860891plk.5.1697100186911; Thu, 12 Oct 2023 01:43:06 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697100186; cv=none; d=google.com; s=arc-20160816; b=fjzMCs+jdn2eVzS2S08tvP1t6CifOkTNXjRbMWLmUYzLi/2H9tRjIK8y842qRMyJEJ jE5Ehk4Kz4hiHLBOPqJKMwi4AfeAOFK2in87D8WzvEvSqt5UlRbDW2jOZwweM+gLGiNN hVkxc1NQ5n5a5N6oRboCQf/iA7H5CWyVhjjJ6+sT7UYYQYvUJV+MIzmkaT0Wkm0cxAvt FyepxptgvFnCdSwIlgZShXCjA85e+ikiaw+k+G66sV9R0wJtYAb2EaJt8VsTUeYobpzG PUS2wRaP+hLyV1T+a7z1SPeXXeqveKLpRbObJ7WVVs0yRpOpPoPZvFxuR9CI3BUdwSqE dClg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=WeTi3Zz4I+hjOP+G95ZWq0hB1FdtJbUX3ItMJS2+pV4=; fh=SE8P9IcxtB2Gz/wdtSbGJFl2wIf8TbeQx856Bu5KJOQ=; b=l56nTfVdaUBNzXRzIVwu+fLiBzlxnNGX5GG3FIOSJskBNtszL0qQ4ZStuqjs/AwVxG cTvzFPRH7G8d823UaT23DdQpRn4X+R8lJM3jG8A4K8FPOivnKNwBtfRzWPtcyJZSTk4q htbehqCA4b0nkq+lC3yBsOc3OHlDiaRhOqjuMxmj/sUY+tmvAEEILeeoX0USPxj/eb5Y XuuppfHF3etZ0uMi4n6ofZqokkNtXCpKDMS31RTo5bMtn5IvIiT7TahOiamvBvVO9CM6 Y55pWGGZVhMhXgvujz3KCBGuMD2Bf/ApFLPBtBfLr7trpsDBUTG42Qmtbd1nolgJJkwl LnSg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b="Wc/G0j8x"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:1 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from morse.vger.email (morse.vger.email. [2620:137:e000::3:1]) by mx.google.com with ESMTPS id d1-20020a170903230100b001bb3316f71dsi1931137plh.481.2023.10.12.01.43.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Oct 2023 01:43:06 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:1 as permitted sender) client-ip=2620:137:e000::3:1; Authentication-Results: mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b="Wc/G0j8x"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:1 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by morse.vger.email (Postfix) with ESMTP id F147B82E297C; Thu, 12 Oct 2023 01:43:03 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at morse.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235480AbjJLImK (ORCPT + 19 others); Thu, 12 Oct 2023 04:42:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54940 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235505AbjJLIk4 (ORCPT ); Thu, 12 Oct 2023 04:40:56 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 30BCDBA; Thu, 12 Oct 2023 01:40:52 -0700 (PDT) X-UUID: 08e3aa5868db11ee8051498923ad61e6-20231012 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=WeTi3Zz4I+hjOP+G95ZWq0hB1FdtJbUX3ItMJS2+pV4=; b=Wc/G0j8xETRb5yf7OKqTWenoesz158EtoiZ483o7dtYgppDxdccp7Aloru7oRpfWoMWtke3pyOnh1TZFmIXA19MGsOp10Gwy0thq1RW2rV4iUP46K67fYhz6haEG7lPDFbYpAj9IW1gaFnrGlROGA8d2h0/WIqAUU+us5IxmjQo=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.32,REQID:a6a907f1-6be2-4d12-b412-4224cb1ed8d9,IP:0,U RL:25,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION :release,TS:25 X-CID-META: VersionHash:5f78ec9,CLOUDID:2145b5f0-9a6e-4c39-b73e-f2bc08ca3dc5,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:11|1,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1,SPR: NO,DKR:0,DKP:0,BRR:0,BRE:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR,TF_CID_SPAM_ULN X-UUID: 08e3aa5868db11ee8051498923ad61e6-20231012 Received: from mtkmbs14n2.mediatek.inc [(172.21.101.76)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 54146606; Thu, 12 Oct 2023 16:40:45 +0800 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs11n2.mediatek.inc (172.21.101.187) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Thu, 12 Oct 2023 16:40:43 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Thu, 12 Oct 2023 16:40:43 +0800 From: Moudy Ho To: Chun-Kuang Hu , Philipp Zabel , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mauro Carvalho Chehab , Matthias Brugger , AngeloGioacchino Del Regno , Hans Verkuil CC: , , , , , , Moudy Ho Subject: [PATCH v7 10/16] dt-bindings: media: mediatek: mdp3: add component TDSHP for MT8195 Date: Thu, 12 Oct 2023 16:40:31 +0800 Message-ID: <20231012084037.19376-11-moudy.ho@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20231012084037.19376-1-moudy.ho@mediatek.com> References: <20231012084037.19376-1-moudy.ho@mediatek.com> MIME-Version: 1.0 X-MTK: N X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on morse.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (morse.vger.email [0.0.0.0]); Thu, 12 Oct 2023 01:43:04 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779538525570739788 X-GMAIL-MSGID: 1779538525570739788 Add the fundamental hardware configuration of component TDSHP, which is controlled by MDP3 on MT8195. Signed-off-by: Moudy Ho Reviewed-by: Krzysztof Kozlowski --- .../bindings/media/mediatek,mdp3-tdshp.yaml | 61 +++++++++++++++++++ 1 file changed, 61 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/mediatek,mdp3-tdshp.yaml diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-tdshp.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-tdshp.yaml new file mode 100644 index 000000000000..92e1547e7c7f --- /dev/null +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-tdshp.yaml @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/mediatek,mdp3-tdshp.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek Media Data Path 3 TDSHP + +maintainers: + - Matthias Brugger + - Moudy Ho + +description: + One of Media Data Path 3 (MDP3) components used to improve image + sharpness and contrast. + +properties: + compatible: + enum: + - mediatek,mt8195-mdp3-tdshp + + reg: + maxItems: 1 + + mediatek,gce-client-reg: + description: + The register of display function block to be set by gce. There are 4 arguments, + such as gce node, subsys id, offset and register size. The subsys id that is + mapping to the register of display function blocks is defined in the gce header + include/dt-bindings/gce/-gce.h of each chips. + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + items: + - description: phandle of GCE + - description: GCE subsys id + - description: register offset + - description: register size + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - mediatek,gce-client-reg + - clocks + +additionalProperties: false + +examples: + - | + #include + #include + + display@14007000 { + compatible = "mediatek,mt8195-mdp3-tdshp"; + reg = <0x14007000 0x1000>; + mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x7000 0x1000>; + clocks = <&vppsys0 CLK_VPP0_MDP_TDSHP>; + }; From patchwork Thu Oct 12 08:40:32 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?TW91ZHkgSG8gKOS9leWul+WOnyk=?= X-Patchwork-Id: 151824 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2908:b0:403:3b70:6f57 with SMTP id ib8csp1073904vqb; Thu, 12 Oct 2023 01:42:19 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFoU4A69+/iM523X+n47RehSVC9afyOKgPy6QQGxdytHgmGq4W41p9Jgk0p4rzqMUlvarDZ X-Received: by 2002:a05:6870:f708:b0:1d5:1a99:537f with SMTP id ej8-20020a056870f70800b001d51a99537fmr25119001oab.2.1697100138871; Thu, 12 Oct 2023 01:42:18 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697100138; cv=none; d=google.com; s=arc-20160816; b=lCWXe2aFebwZiSpvN3mfaKDMN1f2fSXgFhD8rJTSX8c7W/5g5TzqTqgplKc5xQmLyA BumHggVS5Nz2fyBXX3G/7kXFsRY7ZrB4XJqYyQxWHyZDQkNv/7qZbaDs0GJZviwVyDt5 oPYrCIj5XvnDy+NKGcGYdaObN8VXrJeqH91GpOVfCjFPwDZOn2zzLiONLmzf8InAQEgd EJ1oda7dZEumtW/IqVNukrOMyeiElWTsYpWyMgsNwlbPwU5j8naVgHheusvSdf8fAxvj y/kPHrJZ4w8FSiF5LJ6jnfiOtmTRk9UBUs4BXjKWrpk4c2V/u3uQ7BJ/Vq8WU8qYVhVY m+aw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=aim6dnnI43FU33KYGlSGZDevTF8ciIP1lSejF0bvrl4=; fh=SE8P9IcxtB2Gz/wdtSbGJFl2wIf8TbeQx856Bu5KJOQ=; b=Sh90LNZ8eDIx7WFDZFI2idaLmC8Qcj81XkGHXtG1i77xP86GvO/spBMVze+LtsqsSW hAjGsXF0xwyehO8Mmsi7sHNTeolbiAVyBYvSMxP3ki+N1zhpS/idVWicqaAS7o+JBVos NzHe+ACXbTtoi4R6YAbn70CObI7bSzuV2E8CQkUhEVOIhcISiuTAAAO0qHSAAVwO1m8i 85jCu1HevLes1pqR7Rzui6Wh8JQw21Xsh/IewnFn1ozLuyC9DcL77WyoBWB4DJNdSHZj fZITTjbP7+RPUO0LWXCTMiQWfO6BZzx2Yhatt9bZm7zhR/KK7T8ZGkzi4Qu+KeFwFKHw j+5w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b="jPL/HrSY"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from snail.vger.email (snail.vger.email. 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Signed-off-by: Moudy Ho Acked-by: Conor Dooley Reviewed-by: AngeloGioacchino Del Regno --- .../devicetree/bindings/display/mediatek/mediatek,aal.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml index 7fd42c8fdc32..b4c28e96dd55 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml @@ -24,6 +24,7 @@ properties: - enum: - mediatek,mt8173-disp-aal - mediatek,mt8183-disp-aal + - mediatek,mt8195-mdp3-aal - items: - enum: - mediatek,mt2712-disp-aal From patchwork Thu Oct 12 08:40:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?TW91ZHkgSG8gKOS9leWul+WOnyk=?= X-Patchwork-Id: 151828 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2908:b0:403:3b70:6f57 with SMTP id ib8csp1074002vqb; Thu, 12 Oct 2023 01:42:40 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGgfa+EtYeh4ZK3g24GOHITGqdsn2vpvWCgc4o7Fgl33UaUn57By/Zelr/UeZrm7zG7wlNw X-Received: by 2002:a25:db4a:0:b0:d9a:5eb6:5386 with SMTP id g71-20020a25db4a000000b00d9a5eb65386mr6371090ybf.0.1697100159828; Thu, 12 Oct 2023 01:42:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697100159; cv=none; d=google.com; s=arc-20160816; b=oiTQ/XMvgFm6r/8KWzrpKjEYW157IXBM4s2lF/64ia76SV2CVOa+TSVhlG9Xk3+aNb MWKIn9ys6sS0T47eNw2+TW/1OoT/1+XSV7EL66/k4RuVsavK2q1RqyrGMQMdTgfr7tYG IpF17gPA2v08BQ6Mxp1uVGVd5Q3eyYClcgudMbV5ckMiiHcOxrxxK9f/AusUKnxSPAXU tzMgaFK0wB8xtkQNJE4ZGQfOxkeQ5cRU1V+TMXziRSaJHuoikvDOgkTfkghbj7wgrMHt fIPbpnQJ1hHSRZxUNAoMQV9VcG+jJ0pIxHileET3M9aZF3Zha1HDeAsCs3zJvEMdpxcA 6h9w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=JrscK/Pmn31vq3QueZS+3DmRlbk4U+Q1tcQcWf83jFU=; fh=wJeRWNSZIQvKzTzARBL2sRJoO2hKwpVy82Mig4ni80M=; b=aWR5k6sd1XNxGnoq24R1QQjCaZ1wRD0CUEEZhkcsbo1Zp1B7FSuneovSqHMzpO9lBE VIo9GDDS7oETZmQRPqYXHeu6BxeSu6nxfg3td6xT3Md1WfP38Iqxtg4+0QfZSqDi20Fs ukEpz5qXZ577DDxnPgTIqugrylTV6CxvVrgpVzAqj+iUvt0Q+0blbsVmzTjb88krXKaw 9mSiRlNNvIX0MPzT0rzZJeHn2j+y2SQGHv9eE88m3GEuXP8L94agIQBjUKdbBxgWnQhD eM/lF/l+dLdUifEnw4tgBvtX3ROV/q32xoYS5RGY9FGaH15LqNa409fd5xDjEwYX0Eg3 aYLA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=tslIi6kw; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.33 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from lipwig.vger.email (lipwig.vger.email. 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Thu, 12 Oct 2023 01:42:33 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779538497150478905 X-GMAIL-MSGID: 1779538497150478905 Add a compatible string for the COLOR block in MediaTek MT8195 that is controlled by MDP3. Signed-off-by: Moudy Ho Reviewed-by: AngeloGioacchino Del Regno Acked-by: Krzysztof Kozlowski --- .../devicetree/bindings/display/mediatek/mediatek,color.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,color.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,color.yaml index f21e44092043..b886ca0d89ea 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,color.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,color.yaml @@ -26,6 +26,7 @@ properties: - mediatek,mt2701-disp-color - mediatek,mt8167-disp-color - mediatek,mt8173-disp-color + - mediatek,mt8195-mdp3-color - items: - enum: - mediatek,mt7623-disp-color From patchwork Thu Oct 12 08:40:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?TW91ZHkgSG8gKOS9leWul+WOnyk=?= X-Patchwork-Id: 151826 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2908:b0:403:3b70:6f57 with SMTP id ib8csp1073924vqb; Thu, 12 Oct 2023 01:42:24 -0700 (PDT) X-Google-Smtp-Source: AGHT+IH01iYrpk6RAqE3w1BLrTF2W4S5IgbX8BS4SKVigB7cWJYaGETvpn6WDGsXfqc0D3tPf3A1 X-Received: by 2002:a05:6a20:a123:b0:13f:65ca:52a2 with SMTP id q35-20020a056a20a12300b0013f65ca52a2mr26140012pzk.5.1697100143665; Thu, 12 Oct 2023 01:42:23 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697100143; cv=none; d=google.com; s=arc-20160816; b=Fo7wzoEoUzz4z1+qM3p91TILCJgdHUuzGK7GKBHKu89D5N2IDiewlyXy6iqrZS8i8L VWZRii7ZRLpzih61SAGPRDq5NqxYDPHP68A3TBKKWmAp9GOgglk0RE1iD5yS4fc0BZ4S CC82Bo+yt2WtCn0LQ1aE4qHQha6tw1479ORe735w//9yOHVwPtaQYKIZHQOohjjgOyds vuaD/rhVCLBHZjsj4yqeQ5kok14ud1xc0pMzcQAWwCMpw5Md9J7SIzrvD4XqJOkqVsFi VFqMBvq1CODL5g/t4k9s6nm/BWcVoUwhaemtomBpfmkm6B6iNSlbVpJnP4CwWO+qund+ 05Ew== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=IEOOL5V8ZdT35j5g9/2kzpw1taXhNgFEW5b8B3182QQ=; fh=SE8P9IcxtB2Gz/wdtSbGJFl2wIf8TbeQx856Bu5KJOQ=; b=LJ63jsUV57fTD5GjQgyj0BWIZ2iJwidO6ZhCB6fLLLAMuw8WnaiWFNN5boeKFLSCCa pfcoR1D/EJ8Siz5WdJzjHt0hqyto+qGMoXM0hguzeVXrcTUCj8TmjCgrl1T6RLQ25QcS Hct0Y5dETaTnsWzOJIfdZYahFY2EyadTb8w68M/R7yE3wMP48V6azrsFKtcXNr1k2sQi sLAJuk9Rhe4oySS00U0ZH9DMoQCQO2vk/CjYLZRoXXoBFEOvbNbolDA3gQP/rBerSbH2 hgv8lP1mUUb2FWEIzX3w42OU0NweaV08/mM8u6zzSUGIuzUUgI63b2OfflCka/sJLiRZ BdHw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b="YVX/G3c5"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from snail.vger.email (snail.vger.email. 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Signed-off-by: Moudy Ho Reviewed-by: AngeloGioacchino Del Regno Acked-by: Krzysztof Kozlowski --- .../devicetree/bindings/display/mediatek/mediatek,merge.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,merge.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,merge.yaml index eead5cb8636e..401498523404 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,merge.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,merge.yaml @@ -24,6 +24,7 @@ properties: - enum: - mediatek,mt8173-disp-merge - mediatek,mt8195-disp-merge + - mediatek,mt8195-mdp3-merge - items: - const: mediatek,mt6795-disp-merge - const: mediatek,mt8173-disp-merge From patchwork Thu Oct 12 08:40:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?TW91ZHkgSG8gKOS9leWul+WOnyk=?= X-Patchwork-Id: 151827 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2908:b0:403:3b70:6f57 with SMTP id ib8csp1073962vqb; Thu, 12 Oct 2023 01:42:32 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGGhlqOSZSNrf+75b4Ns30q4YaIDHKL2Zlib1iS3dm9pVyUHwbNoooFpD441qRg+CcETiYX X-Received: by 2002:a17:90b:4b04:b0:27d:1593:2b08 with SMTP id lx4-20020a17090b4b0400b0027d15932b08mr2565888pjb.0.1697100151694; Thu, 12 Oct 2023 01:42:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697100151; cv=none; d=google.com; s=arc-20160816; b=lM7jRiu25+F7OIWe2TJVr5CeETzSaI0/DSXC8BYGq/BPTCizU7ee6RPybbvUvQvd1F HNKE5bXWb3FRkpAgivgG4v2QsWqwkeOixVts+vOrUNQg0NvTeDLDGt/6ag8rxk81taXQ gmwZ6v2HDYD5bSFiIu6ziOlEqTPf922Z/E4oy+onHjv24lwmjino+/B53ud0IRNOUlgF xH/EvSEh8g2HwPGM+ZPrUxS7WonimfplLk0701B3qwubA27Lzjqz2U/45ABgrZSQ8yIJ 8aLw5crP8ribB2xYpdNLjRl3akJXUSk9NNuB1Aqwhbs/icTpsQgavUfEgng5WAkltIO9 ootg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=u+w0ri+kgZGLKDLM/x8eR4t7iNHqeEgJHLZA3MrRQrE=; fh=wJeRWNSZIQvKzTzARBL2sRJoO2hKwpVy82Mig4ni80M=; b=mG26Gc96BfOVU7INXb/A5l6p4b70jD8M/jzirPDjVnbQJ28xJmEm0objnb6vPUw6cB V63AhDjDZSIeysPwyamqIS0O2rYsT0eIajds3zb6nlks+iqqfFrJQjK8bLeYfEEz5BUy Q/PZmtwB8sSi6JyqezrcusXWTeZvmU1NENnodZsZYCZ83W54M0Xzf+zAF9/EPT6Qq+gr T0/KRn+i+y+Pox32HdMX7mtIlTkGBLjN+bycOwgP7aQPknwdCK3wbfJ/EuT593zxyYFO JPsZ0C/neIcvuKP+rss6RHmXUQTfNYD9ySZ63T+i384+A0/8YUdyCvxEd1L2kmUCa/jB 2pvA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=Pd1epg6G; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:2 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from agentk.vger.email (agentk.vger.email. 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Thu, 12 Oct 2023 01:42:24 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779538488464728197 X-GMAIL-MSGID: 1779538488464728197 Add a compatible string for the OVL block in MediaTek MT8195 that is controlled by MDP3. Signed-off-by: Moudy Ho Reviewed-by: AngeloGioacchino Del Regno Acked-by: Krzysztof Kozlowski --- .../devicetree/bindings/display/mediatek/mediatek,ovl.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,ovl.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,ovl.yaml index 3e1069b00b56..c471a181d125 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,ovl.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,ovl.yaml @@ -26,6 +26,7 @@ properties: - mediatek,mt8173-disp-ovl - mediatek,mt8183-disp-ovl - mediatek,mt8192-disp-ovl + - mediatek,mt8195-mdp3-ovl - items: - enum: - mediatek,mt7623-disp-ovl From patchwork Thu Oct 12 08:40:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?TW91ZHkgSG8gKOS9leWul+WOnyk=?= X-Patchwork-Id: 151823 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2908:b0:403:3b70:6f57 with SMTP id ib8csp1073881vqb; Thu, 12 Oct 2023 01:42:14 -0700 (PDT) X-Google-Smtp-Source: AGHT+IH4VF+F/w1I/UEF+f44GowEfG/N3jSm9FS6wziuwxdjB//AUQdgauCeJivCoBH0dI6GNfYw X-Received: by 2002:a05:6a00:d46:b0:68e:369b:a123 with SMTP id n6-20020a056a000d4600b0068e369ba123mr25466639pfv.1.1697100134038; Thu, 12 Oct 2023 01:42:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697100134; cv=none; d=google.com; s=arc-20160816; b=jomcSB5UOXv19fIgQRFUtKZaP0C/QE3yoybinZMwOk98xIAi6eRO9AmOgXoGhaT/1w rp3uNlsLQ+pAi+hVM+ubnpPWOi1N3HIQzSMgIYQZyPeGbpVoWNv+Gax01Qte880ObRNf HQvCl52NlC+yubKZ8pwymfPUajKE2tQgqaitIUpRQE8+eec0QWRoo/uJBvMaZ23GCCmz pHqtk5UINpm+2kz6RweIFMI/XjT2/r0K0hwCRsSTy6e67wV4gFFOuPnmxh/HmKWsoAQ9 9JZRNR431xwlw71I1vbijN+f3JaE1TWNv3+vAhZUloPCswzZjwC2lg7pHvvz2b6/hutw zdeA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=kjOhexuevGAYoXYeROCde90v2zna4WaKNlA9I3TFyGE=; fh=SE8P9IcxtB2Gz/wdtSbGJFl2wIf8TbeQx856Bu5KJOQ=; b=D39N7HUN+ifT8pCdncQ/hbfaRrwrvJo/LCa61XIaTMfZXrrA0QgCtADV4571HaMbCz PWMrvWJUlge/9fUZ8RAvbR72pilQ3yTrCgwikJlzo4CRGazAFutipoHM5j2rIimt1IvL gSkrEkkeeEozTKcYc8hPg4uHUcg+WiwdyjBr5xWUgmyFVjKFbJvFOGaGl4ciPr6Zg/aA 6YGdgrC6a87j4MleItB3eNAuCrf0RYj28RTzdskBLlUc3M2gAGw1uQI+TY0/mANTkYaB lEAHgoQMDcig6lbkfR7jrw4k70QVC7C7tLVebcqPuZ2MsYlqvMgCgLM+qOWRT67GxaLy aXqg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=U0GJ1QaY; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:1 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from morse.vger.email (morse.vger.email. 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Signed-off-by: Moudy Ho Reviewed-by: Krzysztof Kozlowski Reviewed-by: AngeloGioacchino Del Regno --- .../display/mediatek/mediatek,split.yaml | 27 +++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,split.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,split.yaml index a8a5c9608598..e4affc854f3d 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,split.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,split.yaml @@ -23,6 +23,7 @@ properties: oneOf: - enum: - mediatek,mt8173-disp-split + - mediatek,mt8195-mdp3-split - items: - const: mediatek,mt6795-disp-split - const: mediatek,mt8173-disp-split @@ -38,6 +39,21 @@ properties: the power controller specified by phandle. See Documentation/devicetree/bindings/power/power-domain.yaml for details. + mediatek,gce-client-reg: + description: + The register of display function block to be set by gce. There are 4 arguments, + such as gce node, subsys id, offset and register size. The subsys id that is + mapping to the register of display function blocks is defined in the gce header + include/dt-bindings/gce/-gce.h of each chips. + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + items: + - description: phandle of GCE + - description: GCE subsys id + - description: register offset + - description: register size + maxItems: 1 + clocks: items: - description: SPLIT Clock @@ -48,6 +64,17 @@ required: - power-domains - clocks +allOf: + - if: + properties: + compatible: + contains: + const: mediatek,mt8195-mdp3-split + + then: + required: + - mediatek,gce-client-reg + additionalProperties: false examples: From patchwork Thu Oct 12 08:40:37 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?TW91ZHkgSG8gKOS9leWul+WOnyk=?= X-Patchwork-Id: 151821 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2908:b0:403:3b70:6f57 with SMTP id ib8csp1073866vqb; Thu, 12 Oct 2023 01:42:12 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHsF2sLMj/ld5x6iuY/W2kcy0lMKfvzQ6Kzfqf2knxdZJwA9s7+axTgsQFxS8VOiq7ahpEo X-Received: by 2002:a17:90a:e7c8:b0:27d:193f:2130 with SMTP id kb8-20020a17090ae7c800b0027d193f2130mr2190255pjb.3.1697100132299; Thu, 12 Oct 2023 01:42:12 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697100132; cv=none; d=google.com; s=arc-20160816; b=qMUtEEpPDurQwVUMBPA3bR5uJcOjQj34zzTirTjxLPfX1zyigTOg6F1ZZq2LxPm5p1 ZvXEa56F9OYbfkZy+jrvjt2qE35nigly07v5aLHDk9/J31gFqK+n5BtIEBPFEdeToUbi eg6/tB3f8tV5Qq/4NecEy85x96GkP6v5tvfduk0D9gCRyrTi2iZxBF4TgC71mBHgmEmF OS5PPD/IrO066hlZagvGEe5tQ25qXGX4sLgNk99WPnx305JIowF/Io6oOaw+h+nfueC9 GvuI2ljIYEi2HQbzs0rQU7SBbHcafiHFaJfbMVz4QEVNlflZo1QGcFEIua7gdDJCB/2p Bw0Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=wPAZy6ESnioZH+kLVb+rHtDuQKaIt/qY8aIqjrMpNI8=; fh=SE8P9IcxtB2Gz/wdtSbGJFl2wIf8TbeQx856Bu5KJOQ=; b=IzIVoEtVKo/BOubRGFsmMrJ/el5tQEFtNMq0sJeQBgx8Cn2ELpnrHqRPkweYCEFfGb 9pm2vgcIv8Oiv2JIUuC8o2FjEDajklxSl4a8SmMJrDCJ40hlkz90qAA0WLeaIbHkPm0d yPYo3B4HLLlQUvISfw5uHNwvj6YQzpv5X0u2H7UPfiOg5ceaFvkulNUFSMrrX5728fMM 42j5hZDuI5YBcof8z4sR38YMxyqw1g45DOqObGsp+luYYBuCzoC8lYHLYwIQzf0U/JXF UFL/vmFdkvOT0YL2UuH1W+xZ5hfMhirMQWZcsqyfBr2ARoHrO5e1NHPxzNgzHrau4Sg5 CBMA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=L8OSc4vJ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.31 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from morse.vger.email (morse.vger.email. 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Signed-off-by: Moudy Ho --- .../bindings/display/mediatek/mediatek,padding.yaml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,padding.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,padding.yaml index db24801ebc48..636b69133acc 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,padding.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,padding.yaml @@ -20,7 +20,9 @@ description: properties: compatible: - const: mediatek,mt8188-padding + enum: + - mediatek,mt8188-padding + - mediatek,mt8195-mdp3-pad reg: maxItems: 1