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([10.237.72.28]) by orsmga001.jf.intel.com with ESMTP; 10 Oct 2023 07:52:34 -0700 From: Alexander Shishkin To: linux-kernel@vger.kernel.org, x86@kernel.org Cc: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Andy Lutomirski , Peter Zijlstra , Alison Schofield , Tom Lendacky , Alexander Shishkin Subject: [PATCH v3 1/2] x86/sev: Move sev_setup_arch() to mem_encrypt.c Date: Tue, 10 Oct 2023 17:52:19 +0300 Message-Id: <20231010145220.3960055-2-alexander.shishkin@linux.intel.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20231010145220.3960055-1-alexander.shishkin@linux.intel.com> References: <20231010145220.3960055-1-alexander.shishkin@linux.intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=2.8 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, RCVD_IN_SBL_CSS,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lipwig.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (lipwig.vger.email [0.0.0.0]); Tue, 10 Oct 2023 07:53:14 -0700 (PDT) X-Spam-Level: ** X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779380621294666920 X-GMAIL-MSGID: 1779380621294666920 Since commit 4d96f9109109b ("x86/sev: Replace occurrences of sev_active() with cc_platform_has()"), the SWIOTLB bounce buffer size adjustment and restricted virtio memory setting also inadvertently apply to TDX: the code is using cc_platform_has(CC_ATTR_GUEST_MEM_ENCRYPT) as a gatekeeping condition, which is also true for TDX, and this is also what we want. To reflect this, move the corresponding code to generic mem_encrypt.c. No functional changes intended. Signed-off-by: Alexander Shishkin --- arch/x86/include/asm/mem_encrypt.h | 4 ++-- arch/x86/kernel/setup.c | 2 +- arch/x86/mm/mem_encrypt.c | 34 +++++++++++++++++++++++++++++ arch/x86/mm/mem_encrypt_amd.c | 35 ------------------------------ 4 files changed, 37 insertions(+), 38 deletions(-) diff --git a/arch/x86/include/asm/mem_encrypt.h b/arch/x86/include/asm/mem_encrypt.h index 473b16d73b47..359ada486fa9 100644 --- a/arch/x86/include/asm/mem_encrypt.h +++ b/arch/x86/include/asm/mem_encrypt.h @@ -19,8 +19,10 @@ #ifdef CONFIG_X86_MEM_ENCRYPT void __init mem_encrypt_init(void); +void __init mem_encrypt_setup_arch(void); #else static inline void mem_encrypt_init(void) { } +static inline void __init mem_encrypt_setup_arch(void) { } #endif #ifdef CONFIG_AMD_MEM_ENCRYPT @@ -43,7 +45,6 @@ void __init sme_map_bootdata(char *real_mode_data); void __init sme_unmap_bootdata(char *real_mode_data); void __init sme_early_init(void); -void __init sev_setup_arch(void); void __init sme_encrypt_kernel(struct boot_params *bp); void __init sme_enable(struct boot_params *bp); @@ -73,7 +74,6 @@ static inline void __init sme_map_bootdata(char *real_mode_data) { } static inline void __init sme_unmap_bootdata(char *real_mode_data) { } static inline void __init sme_early_init(void) { } -static inline void __init sev_setup_arch(void) { } static inline void __init sme_encrypt_kernel(struct boot_params *bp) { } static inline void __init sme_enable(struct boot_params *bp) { } diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c index 3e05ecf8cf8d..ccd3ad29a1dc 100644 --- a/arch/x86/kernel/setup.c +++ b/arch/x86/kernel/setup.c @@ -1120,7 +1120,7 @@ void __init setup_arch(char **cmdline_p) * Needs to run after memblock setup because it needs the physical * memory size. */ - sev_setup_arch(); + mem_encrypt_setup_arch(); efi_fake_memmap(); efi_find_mirror(); diff --git a/arch/x86/mm/mem_encrypt.c b/arch/x86/mm/mem_encrypt.c index 9f27e14e185f..c290c55b632b 100644 --- a/arch/x86/mm/mem_encrypt.c +++ b/arch/x86/mm/mem_encrypt.c @@ -12,6 +12,7 @@ #include #include #include +#include /* Override for DMA direct allocation check - ARCH_HAS_FORCE_DMA_UNENCRYPTED */ bool force_dma_unencrypted(struct device *dev) @@ -86,3 +87,36 @@ void __init mem_encrypt_init(void) print_mem_encrypt_feature_info(); } + +void __init mem_encrypt_setup_arch(void) +{ + phys_addr_t total_mem = memblock_phys_mem_size(); + unsigned long size; + + if (!cc_platform_has(CC_ATTR_GUEST_MEM_ENCRYPT)) + return; + + /* + * For SEV and TDX, all DMA has to occur via shared/unencrypted pages. + * Kernel uses SWIOTLB to make this happen without changing device + * drivers. However, depending on the workload being run, the + * default 64MB of SWIOTLB may not be enough and SWIOTLB may + * run out of buffers for DMA, resulting in I/O errors and/or + * performance degradation especially with high I/O workloads. + * + * Adjust the default size of SWIOTLB using a percentage of guest + * memory for SWIOTLB buffers. Also, as the SWIOTLB bounce buffer + * memory is allocated from low memory, ensure that the adjusted size + * is within the limits of low available memory. + * + * The percentage of guest memory used here for SWIOTLB buffers + * is more of an approximation of the static adjustment which + * 64MB for <1G, and ~128M to 256M for 1G-to-4G, i.e., the 6% + */ + size = total_mem * 6 / 100; + size = clamp_val(size, IO_TLB_DEFAULT_SIZE, SZ_1G); + swiotlb_adjust_size(size); + + /* Set restricted memory access for virtio. */ + virtio_set_mem_acc_cb(virtio_require_restricted_mem_acc); +} diff --git a/arch/x86/mm/mem_encrypt_amd.c b/arch/x86/mm/mem_encrypt_amd.c index 6faea41e99b6..62dde75d41fa 100644 --- a/arch/x86/mm/mem_encrypt_amd.c +++ b/arch/x86/mm/mem_encrypt_amd.c @@ -20,7 +20,6 @@ #include #include #include -#include #include #include @@ -215,40 +214,6 @@ void __init sme_map_bootdata(char *real_mode_data) __sme_early_map_unmap_mem(__va(cmdline_paddr), COMMAND_LINE_SIZE, true); } -void __init sev_setup_arch(void) -{ - phys_addr_t total_mem = memblock_phys_mem_size(); - unsigned long size; - - if (!cc_platform_has(CC_ATTR_GUEST_MEM_ENCRYPT)) - return; - - /* - * For SEV, all DMA has to occur via shared/unencrypted pages. - * SEV uses SWIOTLB to make this happen without changing device - * drivers. However, depending on the workload being run, the - * default 64MB of SWIOTLB may not be enough and SWIOTLB may - * run out of buffers for DMA, resulting in I/O errors and/or - * performance degradation especially with high I/O workloads. - * - * Adjust the default size of SWIOTLB for SEV guests using - * a percentage of guest memory for SWIOTLB buffers. - * Also, as the SWIOTLB bounce buffer memory is allocated - * from low memory, ensure that the adjusted size is within - * the limits of low available memory. - * - * The percentage of guest memory used here for SWIOTLB buffers - * is more of an approximation of the static adjustment which - * 64MB for <1G, and ~128M to 256M for 1G-to-4G, i.e., the 6% - */ - size = total_mem * 6 / 100; - size = clamp_val(size, IO_TLB_DEFAULT_SIZE, SZ_1G); - swiotlb_adjust_size(size); - - /* Set restricted memory access for virtio. */ - virtio_set_mem_acc_cb(virtio_require_restricted_mem_acc); -} - static unsigned long pg_level_to_pfn(int level, pte_t *kpte, pgprot_t *ret_prot) { unsigned long pfn = 0; From patchwork Tue Oct 10 14:52:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Shishkin X-Patchwork-Id: 150831 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2908:b0:403:3b70:6f57 with SMTP id ib8csp259005vqb; Tue, 10 Oct 2023 07:52:59 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHSbqwIZe2gXZ5wPOFlq1ffwfNcoqmok+dOnWzqI29wH9ezMcDJr9kso6Z9i/e1xps8t+gf X-Received: by 2002:a05:6808:3025:b0:3a3:6cb2:d5bf with SMTP id ay37-20020a056808302500b003a36cb2d5bfmr23372169oib.4.1696949579487; Tue, 10 Oct 2023 07:52:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1696949579; cv=none; d=google.com; s=arc-20160816; b=uAD0RSm2PlUnnAkvVGlq9CGlyn7g0PvQIeX8ta7cDWHTf/61OCzxn0ZgFRkcGCnOir WytvVWdE8CD0GmwIJKH+a6u6TX2dv418HhmulPqvXMcreBh0R2BgVgpwkgnCtuT2UKdY 8u9yYKzOOOT0plOiuMAu5YC8CggsIVTOzdmR3TpWd2vVpbNqY2/Jp7XEglWfcw+5aloZ 5OU1URFWyrKEjkvPrv4BmhTFOGxixKlh7xCzdUTzzsafb15rCRG7cAtCmKWaSRFcLrtk 7FaH7gkc7pfgmnnQhKJE350YXLFsS+6uCxObfKpBnbvxAxdITyD+j6oirJvqU0Yz3nu7 MBEw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=4k32NlLOowsfoF7pBkeOAIkt1maob5O8J8Ehw+CHJLw=; fh=sIv1O1zr02Mb5r17diiek/ddX0dZBx8mkPtVoP/DpuQ=; b=BzFzyEzzdCocyWGg3TraBC8BVsMNcNhWvSbKde00FMzYAj6ynoWfxl5CCMQfwUuoYf qHMvtGN8aSHVpak8YoHgsAJLYenFu3Xn20jbLs7UoEUyis3ManuJfkXw843SSSCWNVOd fadVNY2i7MqWVQvI7rRGy49k3CiIW0plmwM0Qe0Vze+Yk4BFHiM//1u1khZjfxS33rk4 RM0Bzmr+zIQK2bf1db6ai1zRVq7Xz1oVJaDSDnHG6Jp60AdS3Gm8dLIhP1Dpl9RwJdZ/ 93cOrNz3oiFqKS83GHu0fFFnjH6kdTY9YgHyopV5T/xBiJG0Ze+YpwxgL6gz/aOBOtcQ 4Nlg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=BGVmBG3M; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.35 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from groat.vger.email (groat.vger.email. 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([10.237.72.28]) by orsmga001.jf.intel.com with ESMTP; 10 Oct 2023 07:52:37 -0700 From: Alexander Shishkin To: linux-kernel@vger.kernel.org, x86@kernel.org Cc: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Andy Lutomirski , Peter Zijlstra , Alison Schofield , Tom Lendacky , Alexander Shishkin Subject: [PATCH v3 2/2] x86/sev: Drop unneeded include Date: Tue, 10 Oct 2023 17:52:20 +0300 Message-Id: <20231010145220.3960055-3-alexander.shishkin@linux.intel.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20231010145220.3960055-1-alexander.shishkin@linux.intel.com> References: <20231010145220.3960055-1-alexander.shishkin@linux.intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=2.8 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, RCVD_IN_SBL_CSS,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on groat.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (groat.vger.email [0.0.0.0]); Tue, 10 Oct 2023 07:52:57 -0700 (PDT) X-Spam-Level: ** X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779380602544691930 X-GMAIL-MSGID: 1779380602544691930 Commit 20f07a044a76 ("x86/sev: Move common memory encryption code to mem_encrypt.c") forgot to remove the include of virtio_config.h from mem_encrypt_amd.c when it moved the related code to mem_encrypt.c (from where this include subsequently got removed by a later commit). Remove it now. No functional changes. Signed-off-by: Alexander Shishkin --- arch/x86/mm/mem_encrypt_amd.c | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/x86/mm/mem_encrypt_amd.c b/arch/x86/mm/mem_encrypt_amd.c index 62dde75d41fa..a68f2dda0948 100644 --- a/arch/x86/mm/mem_encrypt_amd.c +++ b/arch/x86/mm/mem_encrypt_amd.c @@ -19,7 +19,6 @@ #include #include #include -#include #include #include