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[2620:137:e000::1:20]) by mx.google.com with ESMTP id j20-20020aa78014000000b0056d7cc80e34si5755982pfi.102.2022.11.06.08.26.27; Sun, 06 Nov 2022 08:26:56 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=BU5cj1pc; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230078AbiKFQPF (ORCPT + 99 others); Sun, 6 Nov 2022 11:15:05 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54190 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229894AbiKFQPE (ORCPT ); Sun, 6 Nov 2022 11:15:04 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CC5866251; Sun, 6 Nov 2022 08:15:03 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 7116E60C02; Sun, 6 Nov 2022 16:15:03 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id A7D80C433D6; Sun, 6 Nov 2022 16:15:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1667751302; bh=Wg2WuT29edXly9ghtg6n+17s4NqJjt7xViqZcc2xk38=; h=From:To:Cc:Subject:Date:From; b=BU5cj1pcIyFanEHdIULxEqng4PxDpsqDg/Ia9gnhQGMTXm0MpuKbwRW0e3GDVrPDV raASjozNF7+2ZYwvmMN6XjnmmNPK5zqTueC3x+H7aYyQSuHp80mj1+/5S+j6PqUdqP ajCA0xaCIMw2Bx1XHeFCE6LAsaOv2Ix760krIK8on7jS95DLeLMUn9RKT4EbPidpQC s4eDPMFWwz7gi8x8LBPh5KNt7183lXLyT7jxemZ0pUz/igmHUYSuHFz8ns8el6Pl2/ EQz0MRxMob39EjOIp6UGq3sw8MohWeQRdg0cr1xn5/Jaa0WaEzG7H6FVk584y4DCpy KidCL65RKiXwQ== Received: by wens.tw (Postfix, from userid 1000) id C7D995FB95; Mon, 7 Nov 2022 00:14:59 +0800 (CST) From: Chen-Yu Tsai To: Heiko Stuebner Cc: Chen-Yu Tsai , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH] arm64: dts: rockchip: rk356x: Add dma-names to UART device nodes Date: Mon, 7 Nov 2022 00:14:43 +0800 Message-Id: <20221106161443.4104-1-wens@kernel.org> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748764737957188718?= X-GMAIL-MSGID: =?utf-8?q?1748764737957188718?= From: Chen-Yu Tsai At least one implementation, Linux, requires "dma-names" properties be used together with "dmas" to describe DMA resources. These are currently missing, causing DMA to not be used for UARTs. Add "dma-names" to the UART device nodes. Fixes: a3adc0b9071d ("arm64: dts: rockchip: add core dtsi for RK3568 SoC") Signed-off-by: Chen-Yu Tsai --- arch/arm64/boot/dts/rockchip/rk356x.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi index 5706c3e24f0a..5cd55487c20e 100644 --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi @@ -447,6 +447,7 @@ uart0: serial@fdd50000 { clocks = <&pmucru SCLK_UART0>, <&pmucru PCLK_UART0>; clock-names = "baudclk", "apb_pclk"; dmas = <&dmac0 0>, <&dmac0 1>; + dma-names = "tx", "rx"; pinctrl-0 = <&uart0_xfer>; pinctrl-names = "default"; reg-io-width = <4>; @@ -1326,6 +1327,7 @@ uart1: serial@fe650000 { clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>; clock-names = "baudclk", "apb_pclk"; dmas = <&dmac0 2>, <&dmac0 3>; + dma-names = "tx", "rx"; pinctrl-0 = <&uart1m0_xfer>; pinctrl-names = "default"; reg-io-width = <4>; @@ -1340,6 +1342,7 @@ uart2: serial@fe660000 { clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>; clock-names = "baudclk", "apb_pclk"; dmas = <&dmac0 4>, <&dmac0 5>; + dma-names = "tx", "rx"; pinctrl-0 = <&uart2m0_xfer>; pinctrl-names = "default"; reg-io-width = <4>; @@ -1354,6 +1357,7 @@ uart3: serial@fe670000 { clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>; clock-names = "baudclk", "apb_pclk"; dmas = <&dmac0 6>, <&dmac0 7>; + dma-names = "tx", "rx"; pinctrl-0 = <&uart3m0_xfer>; pinctrl-names = "default"; reg-io-width = <4>; @@ -1368,6 +1372,7 @@ uart4: serial@fe680000 { clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>; clock-names = "baudclk", "apb_pclk"; dmas = <&dmac0 8>, <&dmac0 9>; + dma-names = "tx", "rx"; pinctrl-0 = <&uart4m0_xfer>; pinctrl-names = "default"; reg-io-width = <4>; @@ -1382,6 +1387,7 @@ uart5: serial@fe690000 { clocks = <&cru SCLK_UART5>, <&cru PCLK_UART5>; clock-names = "baudclk", "apb_pclk"; dmas = <&dmac0 10>, <&dmac0 11>; + dma-names = "tx", "rx"; pinctrl-0 = <&uart5m0_xfer>; pinctrl-names = "default"; reg-io-width = <4>; @@ -1396,6 +1402,7 @@ uart6: serial@fe6a0000 { clocks = <&cru SCLK_UART6>, <&cru PCLK_UART6>; clock-names = "baudclk", "apb_pclk"; dmas = <&dmac0 12>, <&dmac0 13>; + dma-names = "tx", "rx"; pinctrl-0 = <&uart6m0_xfer>; pinctrl-names = "default"; reg-io-width = <4>; @@ -1410,6 +1417,7 @@ uart7: serial@fe6b0000 { clocks = <&cru SCLK_UART7>, <&cru PCLK_UART7>; clock-names = "baudclk", "apb_pclk"; dmas = <&dmac0 14>, <&dmac0 15>; + dma-names = "tx", "rx"; pinctrl-0 = <&uart7m0_xfer>; pinctrl-names = "default"; reg-io-width = <4>; @@ -1424,6 +1432,7 @@ uart8: serial@fe6c0000 { clocks = <&cru SCLK_UART8>, <&cru PCLK_UART8>; clock-names = "baudclk", "apb_pclk"; dmas = <&dmac0 16>, <&dmac0 17>; + dma-names = "tx", "rx"; pinctrl-0 = <&uart8m0_xfer>; pinctrl-names = "default"; reg-io-width = <4>; @@ -1438,6 +1447,7 @@ uart9: serial@fe6d0000 { clocks = <&cru SCLK_UART9>, <&cru PCLK_UART9>; clock-names = "baudclk", "apb_pclk"; dmas = <&dmac0 18>, <&dmac0 19>; + dma-names = "tx", "rx"; pinctrl-0 = <&uart9m0_xfer>; pinctrl-names = "default"; reg-io-width = <4>;