From patchwork Mon Oct 9 12:29:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: tip-bot2 for Thomas Gleixner X-Patchwork-Id: 150053 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:a888:0:b0:403:3b70:6f57 with SMTP id x8csp1833763vqo; Mon, 9 Oct 2023 05:32:20 -0700 (PDT) X-Google-Smtp-Source: AGHT+IF8ZPf4YJwx8HOIs+oZ1rLbKbn522d9a8JNElyAAwKrmEyw9RkI+mINe31rnksrDAnV0y96 X-Received: by 2002:a05:6808:1412:b0:3a7:e6fb:c8a9 with SMTP id w18-20020a056808141200b003a7e6fbc8a9mr20657674oiv.8.1696854740089; Mon, 09 Oct 2023 05:32:20 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1696854740; cv=none; d=google.com; s=arc-20160816; b=noW6Ck3ap38GPqoVgKRc+hyCMUQoDe0IDtQ7aRl35nBg1qbc2C91BJuGNuzxcngkVB fAmMgvFc7zKCbSlD2xJG7ambOPX1s6jSFluh0y/9qeBI/+wy535lZBRrz75MRBzRBHPS ZWV9WNTznmJ3Ynl0nFgB9IPx7CsFMEpBZ1RTOywvoomEteAIzVOtwFUhaHrzIoHZ9mdV wEKeKZB4HGpQE9bfwKT9ALk2im/g+n48FNVQb0dobchB/9yNkUs3g7XMYG7Ybavyc8yN dBAydURebxjKqc6xGZHWALJIzeBZt+KqFHHtLR5B5/Mjn3E1VGUWhXWhdvk8fugxkUUS IPAw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:robot-unsubscribe :robot-id:message-id:mime-version:references:in-reply-to:cc:subject :to:reply-to:sender:from:dkim-signature:dkim-signature:date; bh=j9BuK/0JPmjKJakucrgKTSIufK36d99jTQsjk5iGSwU=; fh=LWlv3U+xZ3+vQt4tlJRIlKl5VzN7iFjjE/bzRmlxKDA=; b=SGULEiJiAueQ4aon1HSawcq/fxvoxRjOqBjmL+ySdtxahnAIg7aWGMp6FShAEoyU1m JmUPjjan4UEsIWSYyIVHbxuvHb8wcIFHwyJ3ugbFTbD/ky2LyE9Voiby5DCMEzPR1MvX 6XmTlOLZuvhhsc6qDrNw89KZAGHFxJRqpMhFYnd3oVsAux7UHrSayFRBXzklvRLVSwrd yzh/JMqjGdIOF7DNwxkCj+8kWJODb9X0kHWdFjXKHltJdq1ptxIpxDZD/A8UcRjcF9uI Q+dNFwefeScxhC92YrEeMljjsTtBRHOnCbCOP/ZKCTyobLOmtlx2M0OelzWnqyw5HEg9 F2Nw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=Ear2xpDE; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from snail.vger.email (snail.vger.email. [23.128.96.37]) by mx.google.com with ESMTPS id l184-20020a6388c1000000b00537c6c285a0si9631103pgd.167.2023.10.09.05.32.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Oct 2023 05:32:20 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) client-ip=23.128.96.37; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=Ear2xpDE; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by snail.vger.email (Postfix) with ESMTP id AC0FC8061B6C; Mon, 9 Oct 2023 05:30:23 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at snail.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346602AbjJIMaH (ORCPT + 18 others); Mon, 9 Oct 2023 08:30:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38730 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1376354AbjJIM3u (ORCPT ); Mon, 9 Oct 2023 08:29:50 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EA542B4; Mon, 9 Oct 2023 05:29:48 -0700 (PDT) Date: Mon, 09 Oct 2023 12:29:46 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1696854587; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=j9BuK/0JPmjKJakucrgKTSIufK36d99jTQsjk5iGSwU=; b=Ear2xpDEYTc7cNgTvaTptIICqywX9Lmwu5FZmBDQusfAUUrioLdiintV8Z8vjynrNNVcZI XwQZT8ykEPeR38xWADe1GslxYzrU2pWkMg3AozjTH9QT6KH98wXDk6m/xYyEAl1lA+Awt2 3Ot9Pg81R0H5GmU1n+hsxYOO0/3bMYMnfNPRX7ww0/D0QNfrrQe1Pnc0fySc0U4dVKQRDY J8k8ldPZO1m3iwRge4iaVl1We6SYBJ2EEPebS46ruWXdIb4w5MnD37t3SR27n5FS7di1y+ ugNLy8I3SU6aymxw/46J05RzKsqX78DUdLHhQAKT2x8HFS2W5mftXworeJj8IQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1696854587; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=j9BuK/0JPmjKJakucrgKTSIufK36d99jTQsjk5iGSwU=; b=m2+rdpNs+xCCUqx656jTugqh0aN85hG7EaUD8bnWBNABd6d8ABCW+OakNXvri8Kpztlgky FF88EO0yC56A6QAg== From: "tip-bot2 for Thomas Gleixner" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: x86/microcode] x86/microcode: Add per CPU control field Cc: Thomas Gleixner , "Borislav Petkov (AMD)" , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20231002115903.319959519@linutronix.de> References: <20231002115903.319959519@linutronix.de> MIME-Version: 1.0 Message-ID: <169685458692.3135.13853962369912296438.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Mon, 09 Oct 2023 05:30:23 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1778683705325153100 X-GMAIL-MSGID: 1779281156067291540 The following commit has been merged into the x86/microcode branch of tip: Commit-ID: 537929fe93b931a13ab1830a9c9f27a95634c797 Gitweb: https://git.kernel.org/tip/537929fe93b931a13ab1830a9c9f27a95634c797 Author: Thomas Gleixner AuthorDate: Mon, 02 Oct 2023 14:00:01 +02:00 Committer: Borislav Petkov (AMD) CommitterDate: Fri, 06 Oct 2023 15:12:24 +02:00 x86/microcode: Add per CPU control field Add a per CPU control field to ucode_ctrl and define constants for it which are going to be used to control the loading state machine. In theory this could be a global control field, but a global control does not cover the following case: 15 primary CPUs load microcode successfully 1 primary CPU fails and returns with an error code With global control the sibling of the failed CPU would either try again or the whole operation would be aborted with the consequence that the 15 siblings do not invoke the apply path and end up with inconsistent software state. The result in dmesg would be inconsistent too. There are two additional fields added and initialized: ctrl_cpu and secondaries. ctrl_cpu is the CPU number of the primary thread for now, but with the upcoming uniform loading at package or system scope this will be one CPU per package or just one CPU. Secondaries hands the control CPU a CPU mask which will be required to release the secondary CPUs out of the wait loop. Preparatory change for implementing a properly split control flow for primary and secondary CPUs. Signed-off-by: Thomas Gleixner Signed-off-by: Borislav Petkov (AMD) Link: https://lore.kernel.org/r/20231002115903.319959519@linutronix.de --- arch/x86/kernel/cpu/microcode/core.c | 20 ++++++++++++++++++-- 1 file changed, 18 insertions(+), 2 deletions(-) diff --git a/arch/x86/kernel/cpu/microcode/core.c b/arch/x86/kernel/cpu/microcode/core.c index b72ef3b..35d37de 100644 --- a/arch/x86/kernel/cpu/microcode/core.c +++ b/arch/x86/kernel/cpu/microcode/core.c @@ -281,8 +281,19 @@ static struct platform_device *microcode_pdev; * requirement can be relaxed in the future. Right now, this is conservative * and good. */ +enum sibling_ctrl { + /* Spinwait with timeout */ + SCTRL_WAIT, + /* Invoke the microcode_apply() callback */ + SCTRL_APPLY, + /* Proceed without invoking the microcode_apply() callback */ + SCTRL_DONE, +}; + struct microcode_ctrl { + enum sibling_ctrl ctrl; enum ucode_state result; + unsigned int ctrl_cpu; }; static DEFINE_PER_CPU(struct microcode_ctrl, ucode_ctrl); @@ -427,7 +438,7 @@ static int load_late_stop_cpus(void) */ static bool setup_cpus(void) { - struct microcode_ctrl ctrl = { .result = -1, }; + struct microcode_ctrl ctrl = { .ctrl = SCTRL_WAIT, .result = -1, }; unsigned int cpu; for_each_cpu_and(cpu, cpu_present_mask, &cpus_booted_once_mask) { @@ -437,7 +448,12 @@ static bool setup_cpus(void) return false; } } - /* Initialize the per CPU state */ + + /* + * Initialize the per CPU state. This is core scope for now, + * but prepared to take package or system scope into account. + */ + ctrl.ctrl_cpu = cpumask_first(topology_sibling_cpumask(cpu)); per_cpu(ucode_ctrl, cpu) = ctrl; } return true;