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Mon, 09 Oct 2023 04:29:30 -0700 (PDT) X-Spam-Level: ** X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779277216029015536 X-GMAIL-MSGID: 1779277216029015536 Add compatible string for the SOPHGO CV1812H clint. Signed-off-by: Inochi Amaoto Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/timer/sifive,clint.yaml | 1 + 1 file changed, 1 insertion(+) -- 2.42.0 diff --git a/Documentation/devicetree/bindings/timer/sifive,clint.yaml b/Documentation/devicetree/bindings/timer/sifive,clint.yaml index e8be6c470364..4b6c20fc8194 100644 --- a/Documentation/devicetree/bindings/timer/sifive,clint.yaml +++ b/Documentation/devicetree/bindings/timer/sifive,clint.yaml @@ -38,6 +38,7 @@ properties: - enum: - allwinner,sun20i-d1-clint - sophgo,cv1800b-clint + - sophgo,cv1812h-clint - thead,th1520-clint - const: thead,c900-clint - items: From patchwork Mon Oct 9 11:26:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Inochi Amaoto X-Patchwork-Id: 149969 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:a888:0:b0:403:3b70:6f57 with SMTP id x8csp1799511vqo; Mon, 9 Oct 2023 04:28:45 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGYf1eqzJOSp8MpR55k5hSvaAmSfVWesuOjVqAgqAYdc4f6F11TZhaRm+PHRarRY8moW6ox X-Received: by 2002:a05:6870:b28b:b0:1c8:bf19:e1e4 with SMTP id c11-20020a056870b28b00b001c8bf19e1e4mr17379854oao.37.1696850925508; Mon, 09 Oct 2023 04:28:45 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1696850925; cv=pass; d=google.com; s=arc-20160816; b=Czw5IvShLsu4yoFo28mrdoHMuJB8OuMeyalAm8IBQu3junDJqZk7bJ5C8niq0T3WRk DS9BjC1LY6hfj1dR4V3/NGTF+ARoelYUyGL7I/BaSjvtwpBDj7aUYvRq81KgA9rKBNMX by3vRbhx54PIdmTYyLAYvGPv6jkm4olFV0sq7XlnIL5ov8QV7tWo8tuni12PcyAp3GNG sith8ldVvySTVKvu5fN2no74wagca3LSSwSAMk+FgQwuJPUIjDACFZFZfZ0FxwshPxkX Pc6GC/vfOvXvrCGfxpx9MCNT6PHUbWJsPqysTS7Qn9c2r0YbRRresgpvpv//sNH1AOgy qCfA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:content-transfer-encoding :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=KXnbB5CW4hcWd2KYzqwgPMuwW8QdiH7A4QDaJ5+6seE=; fh=jdQ31Tz3LHgVfMSs0EEgQEi1BiId7RxGfLARZWSDsWQ=; b=nUBe7zrBBf3d9y9ml/Wo2nIxHTUVIvEltAyYDxwgsTg8SeMEjRLfXwf52SahiFaPDF OWnHEK0IGmGhTNBOENgmfeG2FkVubUgUS6Ww9vZreUDCxnmv0c/raF89DbeFtbjpQCb7 qn5JJEpSYmEvOrGQzEkeP6XD3kvwzPZ0mmCGqaoCvtd77GUojT4yv3cPAStnR6zWVEBh GGXEWIhTi1br+sNOsrkLshgcd33/21kZ3r9NQwRV8zvvQVHkHuT6kYrU5vwhq8ubNUP2 k6xc/obtPSOrIr1MVG2LhUb+jAXR3I5wYhpCuQzRdUdUQT+DCELQ9gfTlQvytbyeLm2o FtVg== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@outlook.com header.s=selector1 header.b=UqWYWpjP; arc=pass (i=1); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:3 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=outlook.com Received: from lipwig.vger.email (lipwig.vger.email. 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Mon, 09 Oct 2023 04:28:43 -0700 (PDT) X-Spam-Level: ** X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779277156017714567 X-GMAIL-MSGID: 1779277156017714567 Document the compatible strings for the SOPHGO Huashan Pi board which uses the SOPHGO CV1812H SoC. Signed-off-by: Inochi Amaoto Link: https://en.sophgo.com/product/introduce/huashan.html Link: https://en.sophgo.com/product/introduce/cv181xH.html Acked-by: Chen Wang Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/riscv/sophgo.yaml | 4 ++++ 1 file changed, 4 insertions(+) -- 2.42.0 diff --git a/Documentation/devicetree/bindings/riscv/sophgo.yaml b/Documentation/devicetree/bindings/riscv/sophgo.yaml index 86748c5390be..9bc813dad098 100644 --- a/Documentation/devicetree/bindings/riscv/sophgo.yaml +++ b/Documentation/devicetree/bindings/riscv/sophgo.yaml @@ -22,6 +22,10 @@ properties: - enum: - milkv,duo - const: sophgo,cv1800b + - items: + - enum: + - sophgo,huashan-pi + - const: sophgo,cv1812h - items: - enum: - milkv,pioneer From patchwork Mon Oct 9 11:26:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Inochi Amaoto X-Patchwork-Id: 149970 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:a888:0:b0:403:3b70:6f57 with SMTP id x8csp1799821vqo; Mon, 9 Oct 2023 04:29:33 -0700 (PDT) X-Google-Smtp-Source: AGHT+IE6sdd3zEjMTo6BqidIpEwjDNCm56g44tRMD4aODAjlIELwqoTH6AlA34apElCKmrs/R8T6 X-Received: by 2002:a17:902:7893:b0:1bc:6c8:cded with SMTP id q19-20020a170902789300b001bc06c8cdedmr14305174pll.67.1696850972935; Mon, 09 Oct 2023 04:29:32 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1696850972; cv=pass; d=google.com; s=arc-20160816; b=XU+ziz9dTz8SpZ9rD3mVRvB51STGpZwB/jGrXtAwoYcTkajBUBhmJF5ff4tTVPtY9y KUksHVlTK7uAVhof/3rt2w/oYeVqDfKOFVJ2FxXXENY1WEAHFEbefM6xxPeEKIJhmwAC ppPoEKD6e6bD19iaG0++a3HeDZrvRPcDMnpzszVbvOU7umiZ5vrCbgrwiNDgxYxqumT7 hiPTzAXu/AoYFST2Yu0CeyecaYY7ujuKtmnZG6xAROM0npmyygteXTmoSWTadOJribsW vLEPQl5yhSBh+YbzA9BWfHT2TLRFx2ra+kxmdBI8jlmRlGqcg/DZmqbfbWCtjIvj9BDM 7F9Q== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:content-transfer-encoding :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=6IttFsZmWbuo/ioO2E6XMM0wPsbeCqH6n87b8vDr/Ho=; fh=jdQ31Tz3LHgVfMSs0EEgQEi1BiId7RxGfLARZWSDsWQ=; b=YMiWadSGTKoPL5aa6jSy4Eh64KSDHAEI3fl476gu/MmyQ0wI1y98p1Du0Qp53w5ocH sSylsI/UfKGDwSfPWX6SUVBkGDxTXxmk4TK6xiJ7vddNLfZqSPxcld86yrTJ5kgH9Xiv o52yG8Rva1cC8qNOX+eqE59MlDa5dMY7e/HE9siC5pPxFip4F1MPIelziC5Wu3rbPktm 4F7zTZ9xSZvubcDAv7hn3MP+AgU0GTLrsoC5Waikt1EgK/eGooUdxrnCUKxrSrLDdGin ic7SY+Oezim5D8oGhF7dQwdSuSyAcrhsFF5KJk/n4x4T7gwHlEhJAS/0ZOR9aNGb9Yqw YFPA== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@outlook.com header.s=selector1 header.b=GgIHnoQR; arc=pass (i=1); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.34 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=outlook.com Received: from howler.vger.email (howler.vger.email. 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Mon, 9 Oct 2023 11:26:58 +0000 Received: from IA1PR20MB4953.namprd20.prod.outlook.com ([fe80::d050:882f:a8a7:8263]) by IA1PR20MB4953.namprd20.prod.outlook.com ([fe80::d050:882f:a8a7:8263%5]) with mapi id 15.20.6838.040; Mon, 9 Oct 2023 11:26:58 +0000 From: Inochi Amaoto To: Chao Wei , Chen Wang , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Paul Walmsley , Palmer Dabbelt , Albert Ou Cc: Jisheng Zhang , Inochi Amaoto , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org Subject: [PATCH v2 4/7] riscv: dts: sophgo: Separate common devices from cv1800b soc Date: Mon, 9 Oct 2023 19:26:35 +0800 Message-ID: X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231009112642.477337-1-inochiama@outlook.com> References: <20231009112642.477337-1-inochiama@outlook.com> X-TMN: [VoTnJ72mA8S040VgJxervUTWhdojVV3liCHQszPll70=] X-ClientProxiedBy: TYCP301CA0049.JPNP301.PROD.OUTLOOK.COM (2603:1096:400:384::13) To IA1PR20MB4953.namprd20.prod.outlook.com (2603:10b6:208:3af::19) X-Microsoft-Original-Message-ID: <20231009112642.477337-4-inochiama@outlook.com> MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: IA1PR20MB4953:EE_|PH0PR20MB6129:EE_ X-MS-Office365-Filtering-Correlation-Id: df777fea-78ed-462c-e53c-08dbc8baa61c X-Microsoft-Antispam: BCL:0; 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Mon, 09 Oct 2023 04:29:23 -0700 (PDT) X-Spam-Level: ** X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779277205823068646 X-GMAIL-MSGID: 1779277205823068646 Move the cpu and the common peripherals of CV181x and CV180x to new file. Signed-off-by: Inochi Amaoto Acked-by: Chen Wang --- arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 95 +------------------ .../dts/sophgo/{cv1800b.dtsi => cv180x.dtsi} | 19 +--- 2 files changed, 2 insertions(+), 112 deletions(-) copy arch/riscv/boot/dts/sophgo/{cv1800b.dtsi => cv180x.dtsi} (80%) -- 2.42.0 diff --git a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi index df40e87ee063..0904154f9829 100644 --- a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi +++ b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi @@ -3,106 +3,13 @@ * Copyright (C) 2023 Jisheng Zhang */ -#include +#include "cv180x.dtsi" / { compatible = "sophgo,cv1800b"; - #address-cells = <1>; - #size-cells = <1>; - - cpus: cpus { - #address-cells = <1>; - #size-cells = <0>; - timebase-frequency = <25000000>; - - cpu0: cpu@0 { - compatible = "thead,c906", "riscv"; - device_type = "cpu"; - reg = <0>; - d-cache-block-size = <64>; - d-cache-sets = <512>; - d-cache-size = <65536>; - i-cache-block-size = <64>; - i-cache-sets = <128>; - i-cache-size = <32768>; - mmu-type = "riscv,sv39"; - riscv,isa = "rv64imafdc"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr", - "zifencei", "zihpm"; - - cpu0_intc: interrupt-controller { - compatible = "riscv,cpu-intc"; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <1>; - }; - }; - }; - - osc: oscillator { - compatible = "fixed-clock"; - clock-output-names = "osc_25m"; - #clock-cells = <0>; - }; soc { - compatible = "simple-bus"; interrupt-parent = <&plic>; - #address-cells = <1>; - #size-cells = <1>; - dma-noncoherent; - ranges; - - uart0: serial@4140000 { - compatible = "snps,dw-apb-uart"; - reg = <0x04140000 0x100>; - interrupts = <44 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&osc>; - reg-shift = <2>; - reg-io-width = <4>; - status = "disabled"; - }; - - uart1: serial@4150000 { - compatible = "snps,dw-apb-uart"; - reg = <0x04150000 0x100>; - interrupts = <45 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&osc>; - reg-shift = <2>; - reg-io-width = <4>; - status = "disabled"; - }; - - uart2: serial@4160000 { - compatible = "snps,dw-apb-uart"; - reg = <0x04160000 0x100>; - interrupts = <46 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&osc>; - reg-shift = <2>; - reg-io-width = <4>; - status = "disabled"; - }; - - uart3: serial@4170000 { - compatible = "snps,dw-apb-uart"; - reg = <0x04170000 0x100>; - interrupts = <47 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&osc>; - reg-shift = <2>; - reg-io-width = <4>; - status = "disabled"; - }; - - uart4: serial@41c0000 { - compatible = "snps,dw-apb-uart"; - reg = <0x041c0000 0x100>; - interrupts = <48 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&osc>; - reg-shift = <2>; - reg-io-width = <4>; - status = "disabled"; - }; plic: interrupt-controller@70000000 { compatible = "sophgo,cv1800b-plic", "thead,c900-plic"; diff --git a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi b/arch/riscv/boot/dts/sophgo/cv180x.dtsi similarity index 80% copy from arch/riscv/boot/dts/sophgo/cv1800b.dtsi copy to arch/riscv/boot/dts/sophgo/cv180x.dtsi index df40e87ee063..ffaf51724c98 100644 --- a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi +++ b/arch/riscv/boot/dts/sophgo/cv180x.dtsi @@ -1,12 +1,12 @@ // SPDX-License-Identifier: (GPL-2.0 OR MIT) /* * Copyright (C) 2023 Jisheng Zhang + * Copyright (C) 2023 Inochi Amaoto */ #include / { - compatible = "sophgo,cv1800b"; #address-cells = <1>; #size-cells = <1>; @@ -48,7 +48,6 @@ osc: oscillator { soc { compatible = "simple-bus"; - interrupt-parent = <&plic>; #address-cells = <1>; #size-cells = <1>; dma-noncoherent; @@ -103,21 +102,5 @@ uart4: serial@41c0000 { reg-io-width = <4>; status = "disabled"; }; - - plic: interrupt-controller@70000000 { - compatible = "sophgo,cv1800b-plic", "thead,c900-plic"; - reg = <0x70000000 0x4000000>; - interrupts-extended = <&cpu0_intc 11>, <&cpu0_intc 9>; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - riscv,ndev = <101>; - }; - - clint: timer@74000000 { - compatible = "sophgo,cv1800b-clint", "thead,c900-clint"; - reg = <0x74000000 0x10000>; - interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>; - }; }; }; From patchwork Mon Oct 9 11:26:37 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Inochi Amaoto X-Patchwork-Id: 149971 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:a888:0:b0:403:3b70:6f57 with SMTP id x8csp1799868vqo; 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Mon, 09 Oct 2023 04:29:37 -0700 (PDT) X-Spam-Level: ** X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779277213391530557 X-GMAIL-MSGID: 1779277213391530557 Add initial device tree for the CV1812H RISC-V SoC by SOPHGO. Signed-off-by: Inochi Amaoto Acked-by: Chen Wang --- arch/riscv/boot/dts/sophgo/cv1812h.dtsi | 36 +++++++++++++++++++++++++ 1 file changed, 36 insertions(+) create mode 100644 arch/riscv/boot/dts/sophgo/cv1812h.dtsi -- 2.42.0 diff --git a/arch/riscv/boot/dts/sophgo/cv1812h.dtsi b/arch/riscv/boot/dts/sophgo/cv1812h.dtsi new file mode 100644 index 000000000000..3864d34b0100 --- /dev/null +++ b/arch/riscv/boot/dts/sophgo/cv1812h.dtsi @@ -0,0 +1,36 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright (C) 2023 Inochi Amaoto + */ + +#include +#include "cv180x.dtsi" + +/ { + compatible = "sophgo,cv1812h"; + + memory@80000000 { + device_type = "memory"; + reg = <0x80000000 0x10000000>; + }; + + soc { + interrupt-parent = <&plic>; + + plic: interrupt-controller@70000000 { + compatible = "sophgo,cv1812h-plic", "thead,c900-plic"; + reg = <0x70000000 0x4000000>; + interrupts-extended = <&cpu0_intc 11>, <&cpu0_intc 9>; + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <2>; + riscv,ndev = <101>; + }; + + clint: timer@74000000 { + compatible = "sophgo,cv1812h-clint", "thead,c900-clint"; + reg = <0x74000000 0x10000>; + interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>; + }; + }; +}; From patchwork Mon Oct 9 11:26:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Inochi Amaoto X-Patchwork-Id: 149975 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:a888:0:b0:403:3b70:6f57 with SMTP id x8csp1801128vqo; Mon, 9 Oct 2023 04:31:56 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGKzCCHLEDfSPYa0J8TVM4xcLOJXZfprv9btKNjfjDOSVeLGBub2awCI3U8B1Snh2VIe7U7 X-Received: by 2002:a05:6a20:7d94:b0:16b:e2e5:fe5e with SMTP id v20-20020a056a207d9400b0016be2e5fe5emr10401688pzj.31.1696851116546; Mon, 09 Oct 2023 04:31:56 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1696851116; cv=pass; d=google.com; s=arc-20160816; b=U8yRqdyvTxE9Hqvq7eyReai6vnHqHVj9rtAMDRuxXAju5NttJWueqGtuRV3z1zZbeK BmzOCSN8fXtKh0iP/vbQIF8UlYna2XFbKdA+CkeXxPWU/lAjgHSJJtpEkHzRo+UGX703 x6GAVeUKKKcckKVYoczuVhHRmMsIDmSwPZHAHmRnrGeM39FOxwfxqw91G2MkZFzbJai5 E+uJMw+ZC+F34G4kqnV/71I7HvdFbgGHwoPfVr2U/t3prcVhehyTfnPwaMrt9+TUBI9B 8XLSVLT08PdjgOOsx1pQ3MeOV+PdPkkaJYYXrq9hrTyTb6l7jFWjdRdNUc6PqNlZ6qyZ Tb4A== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:content-transfer-encoding :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Jl6q8EOE+QklzaGMm/oPqAWsf3LDO5ZIFVK02dU5XuE=; fh=OGvOkw3MWgiYZScLOy2UnDebf3bUtwJu/JxyM869cd4=; b=HarRvNLq/VFj/+b719qvKg18cIvcP27Pgt47AXn9yQczce7CfxU16/bvoo61xYRtgM ninDNt4/1OcwEpIrydfEj2yk2P10PxWPlsiq3bF/OATubbfVMoYWvDyk/+co83WbCuv/ e9Zyd5e2Ph/K+JLCY3yqMhJ7o+IdzhDovvyOGlFaHX9uOg4YQmz/TkfBCEolR4lHnHnp rVSlQklznLvimiJSJ2QcZvm5HVA84FBrSQEAXbX5gspPT/lyZVQwD3HNq8YhIBcRkXn5 z68pq/94cCdk5XzDZOVekITlUyDruHNNiiZDBN3iOnItN4MBZudZlbHm66ZkuhsQAUJ6 6ChQ== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@outlook.com header.s=selector1 header.b=gTr25GUT; arc=pass (i=1); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.34 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=outlook.com Received: from howler.vger.email (howler.vger.email. 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Mon, 09 Oct 2023 04:31:05 -0700 (PDT) X-Spam-Level: ** X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779277356173511232 X-GMAIL-MSGID: 1779277356173511232 Add initial device tree files for the Huashan Pi board. Note: The boot of CV1812H chip needs a rtos firmware for coprocessor to function properly. To make the soc happy, reserved the last 2M memory for the rtos firmware. Signed-off-by: Inochi Amaoto Link: https://en.sophgo.com/product/introduce/huashan.html Link: https://en.sophgo.com/product/introduce/cv181xH.html Link: https://github.com/milkv-duo/duo-buildroot-sdk/blob/develop/build/boards/cv181x/cv1812h_wevb_0007a_emmc_huashan/memmap.py#L15 Acked-by: Chen Wang --- arch/riscv/boot/dts/sophgo/Makefile | 1 + .../boot/dts/sophgo/cv1812h-huashan-pi.dts | 48 +++++++++++++++++++ 2 files changed, 49 insertions(+) create mode 100644 arch/riscv/boot/dts/sophgo/cv1812h-huashan-pi.dts -- 2.42.0 diff --git a/arch/riscv/boot/dts/sophgo/Makefile b/arch/riscv/boot/dts/sophgo/Makefile index 3fb65512c631..57ad82a61ea6 100644 --- a/arch/riscv/boot/dts/sophgo/Makefile +++ b/arch/riscv/boot/dts/sophgo/Makefile @@ -1,3 +1,4 @@ # SPDX-License-Identifier: GPL-2.0 dtb-$(CONFIG_ARCH_SOPHGO) += cv1800b-milkv-duo.dtb +dtb-$(CONFIG_ARCH_SOPHGO) += cv1812h-huashan-pi.dtb dtb-$(CONFIG_ARCH_SOPHGO) += sg2042-milkv-pioneer.dtb diff --git a/arch/riscv/boot/dts/sophgo/cv1812h-huashan-pi.dts b/arch/riscv/boot/dts/sophgo/cv1812h-huashan-pi.dts new file mode 100644 index 000000000000..aa361f3a86bb --- /dev/null +++ b/arch/riscv/boot/dts/sophgo/cv1812h-huashan-pi.dts @@ -0,0 +1,48 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright (C) 2023 Inochi Amaoto + */ + +/dts-v1/; + +#include "cv1812h.dtsi" + +/ { + model = "Huashan Pi"; + compatible = "sophgo,huashan-pi", "sophgo,cv1812h"; + + aliases { + gpio0 = &gpio0; + gpio1 = &gpio1; + gpio2 = &gpio2; + gpio3 = &gpio3; + serial0 = &uart0; + serial1 = &uart1; + serial2 = &uart2; + serial3 = &uart3; + serial4 = &uart4; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + coprocessor_rtos: region@8fe00000 { + reg = <0x8fe00000 0x200000>; + no-map; + }; + }; +}; + +&osc { + clock-frequency = <25000000>; +}; + +&uart0 { + status = "okay"; +};