From patchwork Sat Oct 7 15:47:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krishna Kurapati X-Patchwork-Id: 149595 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:a888:0:b0:403:3b70:6f57 with SMTP id x8csp992218vqo; Sat, 7 Oct 2023 08:49:33 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHWo1b980HUCwSAGUuT5LMvfKpsM1rFwDsHLocbDr7XFs8g+880sF8vVmBRjwF+JvxpzbQ9 X-Received: by 2002:a05:6358:24a6:b0:134:d617:e2c9 with SMTP id m38-20020a05635824a600b00134d617e2c9mr13019200rwc.29.1696693773739; Sat, 07 Oct 2023 08:49:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1696693773; cv=none; d=google.com; s=arc-20160816; b=o6ZW+IR7toIAD52dXAtxAKhJqDYWbcIy5rd/6JPbv929gW/P/RWTO0hS8GXagXX/o+ dzREZFR6k0uLieXtSl5CrBgyxXhpc9gxKx3cM/T0nDuFBkgu09qhgwE/fFMkTKAJUa2P +Vn8Sbifvg/7zUNcZ/Fa592fzCGoy73twBBZBI5ld1nzBAixm5wzHRycdrtt/AomYRqJ kzClSe38plGSCayqk5Dqhgkqu/1GWDwUhewfVirWAxWfWSLeaDGfBAmq2pK19Rq1AEAx rUEyHugDN08ZR8FYGDL+M0iyOm5Gezdm70f3hmanlHISw6QBLKDaMsexgZPtAmI2JPLF WcMg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=iGp7RLPWMRtSsyX+Drg+F/4CZ3y5ZJqv2KL0uZ06hfY=; fh=a++TWPJw3Cn9MYBczZLXAB+Eob7lKtyrQCXvx5EPkG8=; b=a4bUFdoAjL04wjk59go+7figNaY9G13Tw1L7SZo4TceplYDXl8a0CAtlLQM7Ph3/CU hujQ/ewbXBbRGeHqwtIGYB4TdfwvHO2v+ljdCv5NqLszJVTIpr1i/wbAyC6/XLsIcjvP 8IX5Xzg8G1bjqu1Lry2FQY0MTRWsnWYAI4a/vxncOF8uuW6F4mvWQvFcOBMwupYAIr3t XB83A8My4LA1NrKBjB6FrdzSLQ8J5ut4WGHbvSDbsNSgXIXNUeWyaObcHnfbY08mHCQ4 fYmFfv6B4woYTyEDNN4nLQBLSIHVFXTwuhUAhrJZW2FgF6emZUVNeWZB3NQpjo1NA6E6 PM3Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b="k/dnlyIa"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:5 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from groat.vger.email (groat.vger.email. [2620:137:e000::3:5]) by mx.google.com with ESMTPS id 38-20020a630f66000000b00577448019b5si5869944pgp.276.2023.10.07.08.49.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 07 Oct 2023 08:49:33 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:5 as permitted sender) client-ip=2620:137:e000::3:5; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b="k/dnlyIa"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:5 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by groat.vger.email (Postfix) with ESMTP id 6F10F80B28B0; Sat, 7 Oct 2023 08:49:28 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at groat.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344037AbjJGPs4 (ORCPT + 17 others); Sat, 7 Oct 2023 11:48:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51856 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1343934AbjJGPsv (ORCPT ); Sat, 7 Oct 2023 11:48:51 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4DD9AC2; Sat, 7 Oct 2023 08:48:50 -0700 (PDT) Received: from pps.filterd (m0279866.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 397Fi9UZ002969; Sat, 7 Oct 2023 15:48:32 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=iGp7RLPWMRtSsyX+Drg+F/4CZ3y5ZJqv2KL0uZ06hfY=; b=k/dnlyIa5Qhn/Tkqba9X7+OHuDtCEC8XuquW8cteStAzY9ZF+TdlbUUbudvXe/rnM/gc fxFHy4CRpszdPET1bZZUrrryRD5PW3AXNH2Ip7BcV2AXW8KGsG3sRKVZ5D8f7D8sERO6 d3Va9tFtDePS1RlKu5AroXH71i6RcMigfAh1l2wHYnFuoacn3FAoNwAXp6mgQx2gViX5 ZiRyQCVxMVPLsNgBaGp8KJlFU3suGoUC2HZD9cbNQCDGQt4qpMSzJxi5KDb4rg2T/YDL QFptZ8JGi4oHeriSbDtO34qSUKxKtNT26qa6s9qDw7LgbQ2jCwvlVD12Gt/w57gfFuQW GA== Received: from nalasppmta05.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3tk0mertvy-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Sat, 07 Oct 2023 15:48:32 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 397FmVxp006705 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Sat, 7 Oct 2023 15:48:31 GMT Received: from hu-kriskura-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.36; Sat, 7 Oct 2023 08:48:25 -0700 From: Krishna Kurapati To: Thinh Nguyen , Greg Kroah-Hartman , Philipp Zabel , "Andy Gross" , Bjorn Andersson , "Konrad Dybcio" , Rob Herring , Krzysztof Kozlowski , Felipe Balbi , Wesley Cheng , Johan Hovold CC: , , , , , , , , , Krishna Kurapati Subject: [PATCH v13 01/10] usb: dwc3: core: Access XHCI address space temporarily to read port info Date: Sat, 7 Oct 2023 21:17:57 +0530 Message-ID: <20231007154806.605-2-quic_kriskura@quicinc.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231007154806.605-1-quic_kriskura@quicinc.com> References: <20231007154806.605-1-quic_kriskura@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: z19lWWSOv6MUyN3QpQ-j36PgPM9RTaD6 X-Proofpoint-ORIG-GUID: z19lWWSOv6MUyN3QpQ-j36PgPM9RTaD6 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-10-07_12,2023-10-06_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 clxscore=1015 adultscore=0 mlxlogscore=999 spamscore=0 bulkscore=0 phishscore=0 lowpriorityscore=0 suspectscore=0 mlxscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2309180000 definitions=main-2310070143 X-Spam-Status: No, score=2.7 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, RCVD_IN_SBL_CSS,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on groat.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (groat.vger.email [0.0.0.0]); Sat, 07 Oct 2023 08:49:28 -0700 (PDT) X-Spam-Level: ** X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779112370367433135 X-GMAIL-MSGID: 1779112370367433135 Currently host-only capable DWC3 controllers support Multiport. Temporarily map XHCI address space for host-only controllers and parse XHCI Extended Capabilities registers to read number of usb2 ports and usb3 ports present on multiport controller. Each USB Port is at least HS capable. The port info for usb2 and usb3 phy are identified as num_usb2_ports and num_usb3_ports. The intention is as follows: Wherever we need to perform phy operations like: LOOP_OVER_NUMBER_OF_AVAILABLE_PORTS() { phy_set_mode(dwc->usb2_generic_phy[i], PHY_MODE_USB_HOST); phy_set_mode(dwc->usb3_generic_phy[i], PHY_MODE_USB_HOST); } If number of usb2 ports is 3, loop can go from index 0-2 for usb2_generic_phy. If number of usb3-ports is 2, we don't know for sure, if the first 2 ports are SS capable or some other ports like (2 and 3) are SS capable. So instead, num_usb2_ports is used to loop around all phy's (both hs and ss) for performing phy operations. If any usb3_generic_phy turns out to be NULL, phy operation just bails out. num_usb3_ports is used to modify GUSB3PIPECTL registers while setting up phy's as we need to know how many SS capable ports are there for this. Signed-off-by: Krishna Kurapati Acked-by: Thinh Nguyen --- drivers/usb/dwc3/core.c | 61 +++++++++++++++++++++++++++++++++++++++++ drivers/usb/dwc3/core.h | 5 ++++ 2 files changed, 66 insertions(+) diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index 44ee8526dc28..d7c5669ebd06 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -39,6 +39,7 @@ #include "io.h" #include "debug.h" +#include "../host/xhci-ext-caps.h" #define DWC3_DEFAULT_AUTOSUSPEND_DELAY 5000 /* ms */ @@ -1839,6 +1840,51 @@ static int dwc3_get_clocks(struct dwc3 *dwc) return 0; } +static int dwc3_read_port_info(struct dwc3 *dwc) +{ + void __iomem *base; + u8 major_revision; + u32 offset = 0; + u32 val; + + /* + * Remap xHCI address space to access XHCI ext cap regs, + * since it is needed to get port info. + */ + base = ioremap(dwc->xhci_resources[0].start, + resource_size(&dwc->xhci_resources[0])); + if (IS_ERR(base)) + return PTR_ERR(base); + + do { + offset = xhci_find_next_ext_cap(base, offset, + XHCI_EXT_CAPS_PROTOCOL); + if (!offset) + break; + + val = readl(base + offset); + major_revision = XHCI_EXT_PORT_MAJOR(val); + + val = readl(base + offset + 0x08); + if (major_revision == 0x03) { + dwc->num_usb3_ports += XHCI_EXT_PORT_COUNT(val); + } else if (major_revision <= 0x02) { + dwc->num_usb2_ports += XHCI_EXT_PORT_COUNT(val); + } else { + dev_err(dwc->dev, + "Unrecognized port major revision %d\n", + major_revision); + } + } while (1); + + dev_dbg(dwc->dev, "hs-ports: %u ss-ports: %u\n", + dwc->num_usb2_ports, dwc->num_usb3_ports); + + iounmap(base); + + return 0; +} + static int dwc3_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -1846,6 +1892,7 @@ static int dwc3_probe(struct platform_device *pdev) void __iomem *regs; struct dwc3 *dwc; int ret; + unsigned int hw_mode; dwc = devm_kzalloc(dev, sizeof(*dwc), GFP_KERNEL); if (!dwc) @@ -1926,6 +1973,20 @@ static int dwc3_probe(struct platform_device *pdev) goto err_disable_clks; } + /* + * Currently only DWC3 controllers that are host-only capable + * support Multiport. + */ + hw_mode = DWC3_GHWPARAMS0_MODE(dwc->hwparams.hwparams0); + if (hw_mode == DWC3_GHWPARAMS0_MODE_HOST) { + ret = dwc3_read_port_info(dwc); + if (ret) + goto err_disable_clks; + } else { + dwc->num_usb2_ports = 1; + dwc->num_usb3_ports = 1; + } + spin_lock_init(&dwc->lock); mutex_init(&dwc->mutex); diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index 6782ec8bfd64..2ea6df7e6571 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -1031,6 +1031,8 @@ struct dwc3_scratchpad_array { * @usb3_phy: pointer to USB3 PHY * @usb2_generic_phy: pointer to USB2 PHY * @usb3_generic_phy: pointer to USB3 PHY + * @num_usb2_ports: number of USB2 ports + * @num_usb3_ports: number of USB3 ports * @phys_ready: flag to indicate that PHYs are ready * @ulpi: pointer to ulpi interface * @ulpi_ready: flag to indicate that ULPI is initialized @@ -1174,6 +1176,9 @@ struct dwc3 { struct phy *usb2_generic_phy; struct phy *usb3_generic_phy; + u8 num_usb2_ports; + u8 num_usb3_ports; + bool phys_ready; struct ulpi *ulpi; From patchwork Sat Oct 7 15:47:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krishna Kurapati X-Patchwork-Id: 149599 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:a888:0:b0:403:3b70:6f57 with SMTP id x8csp992335vqo; Sat, 7 Oct 2023 08:49:53 -0700 (PDT) X-Google-Smtp-Source: AGHT+IG2iKaV7GPqVau/ujPwBTuneJ/uljJkCGUkmQtsqmZaZYTA6YqyrzCnPq3cVs+dW8keCq+F X-Received: by 2002:a05:6a20:549f:b0:16b:8498:7d29 with SMTP id i31-20020a056a20549f00b0016b84987d29mr5415273pzk.27.1696693793675; Sat, 07 Oct 2023 08:49:53 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1696693793; cv=none; d=google.com; s=arc-20160816; b=02wy3fdKF2PH9P+gmOnmDtbIKVGjj3DfocTro313q5Xpmqb2bJJKGd3M69MYqavVvD JRyS9Z1vkw9x5kWgaqCcxWCsE8eJRFI/BS2h3bxGgFjrLVntSfsGimb6t5Y64KE0NBuq lBOQTnWbugRl1lIPV8I/g5spyFHcc5qvHhZ0f1JXCNlVK9fYReYPupMAs+GomLuaW9yx 9tiPMH8FYXUsO1/bTodAUOdLe220UwYRkWRPFNBJdVWQ0vPybmaNA9BHDeVwfbVtqbWN Bxp8k3TM3ml90AMSZ1Q6q8zhA4K0UArTpYd9a/q2KIjjgPDsxPvFezMBeOB1Zm1wpkVB 4Qaw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=9ALIUoz1vkM6MhoUdR9nJ++NWyOo4YGcWioNI82djYU=; fh=a++TWPJw3Cn9MYBczZLXAB+Eob7lKtyrQCXvx5EPkG8=; b=XKTgBE3ArK5ptV1DvMV1io94UQtBWKLvaaJIk1Kg8Od2TqVsGlZE5j4qWKFvLPuPTt NAPrDKbj5xspx8fWAwG8dsnlybMcvWzPd03iz/GSZMkmYo0aOcIkOWcqcFVd94jwk8LY dHm3YW7jidnrJ/bwxRYRoTMSCW5o9LNc9IiNvcA0QthUvxTyBk3chdandfLfVEbI+bS4 fqw9VTDeubO4dFa+K7qaK9OWEg8bExk4eRNtSOoPXBCZtG0p4FZbULj6sZR+IvBJpK11 Wb3GnGWLxucPuVjy4cIQWW+KG27ZtjkMoGSwcBwaf9fSueXdJjBIQLPZamdHK/P5bkbg wjHg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=pzloFblL; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:8 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from fry.vger.email (fry.vger.email. [2620:137:e000::3:8]) by mx.google.com with ESMTPS id d19-20020a056a00199300b0068ffeb6a949si3896776pfl.73.2023.10.07.08.49.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 07 Oct 2023 08:49:53 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:8 as permitted sender) client-ip=2620:137:e000::3:8; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=pzloFblL; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:8 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by fry.vger.email (Postfix) with ESMTP id 98E0B804302A; Sat, 7 Oct 2023 08:49:47 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at fry.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344044AbjJGPtC (ORCPT + 17 others); Sat, 7 Oct 2023 11:49:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55940 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1343934AbjJGPs6 (ORCPT ); Sat, 7 Oct 2023 11:48:58 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 22B7FB9; Sat, 7 Oct 2023 08:48:58 -0700 (PDT) Received: from pps.filterd (m0279865.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 397FdCeB007664; Sat, 7 Oct 2023 15:48:39 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=9ALIUoz1vkM6MhoUdR9nJ++NWyOo4YGcWioNI82djYU=; b=pzloFblL6VGlSvWLw42aH65GguszTcoev09GlpoPoYHaI4bBZaLcfCSQSwV+jpbi/eK5 Ggfziz36aEG+bjiCrx3pqUztkf/VRoiSEkYtjbk6EmNs4HFV9K1gvMNEXe1WKFJwbyar z6VJGQ/5CX6dMyEi9YPAp8onMan9a4vyc5poqgql1nzol7h0gnAuX6N7sJuWoSrHIhhA Y8h9V+Vt1ljBpjS9pOeHN/XX6Hj4ChbifS9HZIlECE25ij4ltpwgEiW4wFD1FAnV3g5K d+sDfIwhhmVfxc0r1dghVUJE2YFBKZfNX+EaL1U5mpeI80yO7NdEU9OCAeEpkasfnA3X 5A== Received: from nalasppmta03.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3tjx9y10vq-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Sat, 07 Oct 2023 15:48:39 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 397FmcWs028624 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Sat, 7 Oct 2023 15:48:38 GMT Received: from hu-kriskura-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.36; Sat, 7 Oct 2023 08:48:32 -0700 From: Krishna Kurapati To: Thinh Nguyen , Greg Kroah-Hartman , Philipp Zabel , "Andy Gross" , Bjorn Andersson , "Konrad Dybcio" , Rob Herring , Krzysztof Kozlowski , Felipe Balbi , Wesley Cheng , Johan Hovold CC: , , , , , , , , , Krishna Kurapati Subject: [PATCH v13 02/10] usb: dwc3: core: Skip setting event buffers for host only controllers Date: Sat, 7 Oct 2023 21:17:58 +0530 Message-ID: <20231007154806.605-3-quic_kriskura@quicinc.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231007154806.605-1-quic_kriskura@quicinc.com> References: <20231007154806.605-1-quic_kriskura@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: T03puQC3Z5iMNuTtKK6pIibMHKMf9E87 X-Proofpoint-ORIG-GUID: T03puQC3Z5iMNuTtKK6pIibMHKMf9E87 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-10-07_12,2023-10-06_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 mlxscore=0 bulkscore=0 phishscore=0 clxscore=1015 impostorscore=0 malwarescore=0 suspectscore=0 spamscore=0 adultscore=0 lowpriorityscore=0 mlxlogscore=970 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2309180000 definitions=main-2310070143 X-Spam-Status: No, score=2.7 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, RCVD_IN_SBL_CSS,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on fry.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (fry.vger.email [0.0.0.0]); Sat, 07 Oct 2023 08:49:47 -0700 (PDT) X-Spam-Level: ** X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779112391031375403 X-GMAIL-MSGID: 1779112391031375403 On some SoC's like SA8295P where the tertiary controller is host-only capable, GEVTADDRHI/LO, GEVTSIZ, GEVTCOUNT registers are not accessible. Trying to access them leads to a crash. For DRD/Peripheral supported controllers, event buffer setup is done again in gadget_pullup. Skip setup or cleanup of event buffers if controller is host-only capable. Suggested-by: Johan Hovold Signed-off-by: Krishna Kurapati Acked-by: Thinh Nguyen Reviewed-by: Johan Hovold --- drivers/usb/dwc3/core.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index d7c5669ebd06..3e507e4cc542 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -486,6 +486,13 @@ static void dwc3_free_event_buffers(struct dwc3 *dwc) static int dwc3_alloc_event_buffers(struct dwc3 *dwc, unsigned int length) { struct dwc3_event_buffer *evt; + unsigned int hw_mode; + + hw_mode = DWC3_GHWPARAMS0_MODE(dwc->hwparams.hwparams0); + if (hw_mode == DWC3_GHWPARAMS0_MODE_HOST) { + dwc->ev_buf = NULL; + return 0; + } evt = dwc3_alloc_one_event_buffer(dwc, length); if (IS_ERR(evt)) { @@ -507,6 +514,9 @@ int dwc3_event_buffers_setup(struct dwc3 *dwc) { struct dwc3_event_buffer *evt; + if (!dwc->ev_buf) + return 0; + evt = dwc->ev_buf; evt->lpos = 0; dwc3_writel(dwc->regs, DWC3_GEVNTADRLO(0), @@ -524,6 +534,9 @@ void dwc3_event_buffers_cleanup(struct dwc3 *dwc) { struct dwc3_event_buffer *evt; + if (!dwc->ev_buf) + return; + evt = dwc->ev_buf; evt->lpos = 0; From patchwork Sat Oct 7 15:47:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krishna Kurapati X-Patchwork-Id: 149604 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:a888:0:b0:403:3b70:6f57 with SMTP id x8csp992520vqo; Sat, 7 Oct 2023 08:50:27 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFkac8/tn3fr+aXsWX/urodo65/mCKznDecrFqpAWjMnT9saa/MGeuTPFhSXbiKWUy5ngi1 X-Received: by 2002:a05:6a00:15c6:b0:68e:45df:4648 with SMTP id o6-20020a056a0015c600b0068e45df4648mr12957429pfu.23.1696693827537; Sat, 07 Oct 2023 08:50:27 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1696693827; cv=none; d=google.com; s=arc-20160816; b=L52lyuSixi21wdOo4u3oNt2YsS1PvoQ0vHBjQr3C1OzGaUmjDPnsdCQL3mJMP9HL7k SBc6hc2GP6yxR9RdskBJifjD1ugCO5java/svMn/N3bqf2ZKsbGu7kPIthNORX+7LWxj yrL8hQ6XrWUNdYWMRkkY7zISi2Glq0LKIOYnnDH9Hfm+XZ9UkkTmOZAuSqAuZAv3S9VY +87fWnRfVa1RL+UY4sA4dmDfqRVQWVnNcH23nkFhW5a1100EFZ7bwxy7jbNXLnkTUeBZ z4zLv0oIrvUOWIcBnqqxKCg4jEs+4EQRHetB62NzW/7Yh/oLbNtollUJ1RIneUvV+7oz 2J8g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=QGZg872S2KAy+R+M4G8NPmeLe7PL4Upy8n8jMt/lscA=; fh=2529dmQPPsEoo/qUSPY5XG0m55dQRovDUgC8WrARaPo=; b=F2iDN/9KH8xwsQmKX/d+s0FbxeGNcYfK+VHkdeHAa+8BirdobzUW/LhpKshqpQPTY0 dBXDnSbZueix1m3wPHUdg4nsxwvurtFMRrF6LQHF4Svhm327gLoLsThotzXK+Rd6lhPn fJvJTiUhP3FNTNC7V7+k62h6QX5vCv005cGJRIgi+3sx6AP/t1E2TyEkfDgGqSmnUQmm bx9RvP3tKg67bd9XjiZfx25AIe7W+Vgs0DB/0LdBX9koteHFVrj/SPsseaurulOW5MGa WqI3sOCgj2eaZT944PUhlCazenp6m3dNyDELC7RfSMXmffOOcCDhv03ONbkTuDxyN80J eX1Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=cSPBfoBQ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:3 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from lipwig.vger.email (lipwig.vger.email. [2620:137:e000::3:3]) by mx.google.com with ESMTPS id s1-20020a056a00194100b0069100d1fc37si3966037pfk.49.2023.10.07.08.50.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 07 Oct 2023 08:50:27 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:3 as permitted sender) client-ip=2620:137:e000::3:3; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=cSPBfoBQ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:3 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by lipwig.vger.email (Postfix) with ESMTP id 4EF00805699B; Sat, 7 Oct 2023 08:50:24 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at lipwig.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344085AbjJGPtv (ORCPT + 17 others); Sat, 7 Oct 2023 11:49:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51240 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344089AbjJGPtm (ORCPT ); Sat, 7 Oct 2023 11:49:42 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6F2F1BA; Sat, 7 Oct 2023 08:49:36 -0700 (PDT) Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 397FULg8013621; Sat, 7 Oct 2023 15:49:23 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=QGZg872S2KAy+R+M4G8NPmeLe7PL4Upy8n8jMt/lscA=; b=cSPBfoBQ6Mbo24qs20ChJw5I03W2eg4bOFKHt+WHc3hTbKYQb+quApLLKpme3Ay06kag cIFPCVWluhn8LphSoy/uZi/I76SBMocF4AJ+ifO+6G3o2Vkv/FgwG4eE7qvZJixXzdTY VBaFquX/Am/jZRiZYG9YGsRimaeL3ziGueO6PFGj31QPuWVIRruJTQ1Z2PymTnKlWrHW uKEPsl+CWDUc1lcZY3j4e5vUajYR3oOn2lRgvUC0gTE2hWPpE7nuaZoL2aNGvSiVD2ym ci4t9dfiD4h3x6EdQY/hHBXkUaan5imYlh8dyLzroX0yLMk5s6savqpqoolxjJNUN2lR Lg== Received: from nalasppmta02.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3tk0gugu06-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Sat, 07 Oct 2023 15:48:46 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 397FmkZ6018979 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Sat, 7 Oct 2023 15:48:46 GMT Received: from hu-kriskura-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.36; Sat, 7 Oct 2023 08:48:39 -0700 From: Krishna Kurapati To: Thinh Nguyen , Greg Kroah-Hartman , Philipp Zabel , "Andy Gross" , Bjorn Andersson , "Konrad Dybcio" , Rob Herring , Krzysztof Kozlowski , Felipe Balbi , Wesley Cheng , Johan Hovold CC: , , , , , , , , , Harsh Agarwal , kernel test robot , Krishna Kurapati Subject: [PATCH v13 03/10] usb: dwc3: core: Refactor PHY logic to support Multiport Controller Date: Sat, 7 Oct 2023 21:17:59 +0530 Message-ID: <20231007154806.605-4-quic_kriskura@quicinc.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231007154806.605-1-quic_kriskura@quicinc.com> References: <20231007154806.605-1-quic_kriskura@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: 70KSvNugi4j_mB4i9z-4ZoXhuzAJSf-7 X-Proofpoint-GUID: 70KSvNugi4j_mB4i9z-4ZoXhuzAJSf-7 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-10-07_12,2023-10-06_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 clxscore=1015 impostorscore=0 suspectscore=0 adultscore=0 bulkscore=0 mlxlogscore=790 spamscore=0 malwarescore=0 mlxscore=0 priorityscore=1501 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2309180000 definitions=main-2310070144 X-Spam-Status: No, score=2.7 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, RCVD_IN_SBL_CSS,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lipwig.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (lipwig.vger.email [0.0.0.0]); Sat, 07 Oct 2023 08:50:24 -0700 (PDT) X-Spam-Level: ** X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779112426858951733 X-GMAIL-MSGID: 1779112426858951733 From: Harsh Agarwal Currently the DWC3 driver supports only single port controller which requires at most one HS and one SS PHY. But the DWC3 USB controller can be connected to multiple ports and each port can have their own PHYs. Each port of the multiport controller can either be HS+SS capable or HS only capable Proper quantification of them is required to modify GUSB2PHYCFG and GUSB3PIPECTL registers appropriately. Add support for detecting, obtaining and configuring phy's supported by a multiport controller and. Limit the max number of ports supported to 4 as only SC8280 which is a quad port controller supports Multiport currently. Reported-by: kernel test robot Closes: https://lore.kernel.org/oe-kbuild-all/202309200156.CxQ3yaLY-lkp@intel.com/ Co-developed-by: Harsh Agarwal Signed-off-by: Harsh Agarwal Co-developed-by:Krishna Kurapati Signed-off-by: Krishna Kurapati --- Changes in v13: Compiler issues found by kernel test robot have been fixed and tags added. So removing maintainers reviewed-by tag as we have made a minor change in the patch. drivers/usb/dwc3/core.c | 252 +++++++++++++++++++++++++++------------- drivers/usb/dwc3/core.h | 11 +- drivers/usb/dwc3/drd.c | 15 ++- 3 files changed, 190 insertions(+), 88 deletions(-) diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index 3e507e4cc542..f380cbf908a9 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -124,6 +124,7 @@ static void __dwc3_set_mode(struct work_struct *work) int ret; u32 reg; u32 desired_dr_role; + int i; mutex_lock(&dwc->mutex); spin_lock_irqsave(&dwc->lock, flags); @@ -201,8 +202,10 @@ static void __dwc3_set_mode(struct work_struct *work) } else { if (dwc->usb2_phy) otg_set_vbus(dwc->usb2_phy->otg, true); - phy_set_mode(dwc->usb2_generic_phy, PHY_MODE_USB_HOST); - phy_set_mode(dwc->usb3_generic_phy, PHY_MODE_USB_HOST); + for (i = 0; i < dwc->num_usb2_ports; i++) { + phy_set_mode(dwc->usb2_generic_phy[i], PHY_MODE_USB_HOST); + phy_set_mode(dwc->usb3_generic_phy[i], PHY_MODE_USB_HOST); + } if (dwc->dis_split_quirk) { reg = dwc3_readl(dwc->regs, DWC3_GUCTL3); reg |= DWC3_GUCTL3_SPLITDISABLE; @@ -217,8 +220,8 @@ static void __dwc3_set_mode(struct work_struct *work) if (dwc->usb2_phy) otg_set_vbus(dwc->usb2_phy->otg, false); - phy_set_mode(dwc->usb2_generic_phy, PHY_MODE_USB_DEVICE); - phy_set_mode(dwc->usb3_generic_phy, PHY_MODE_USB_DEVICE); + phy_set_mode(dwc->usb2_generic_phy[0], PHY_MODE_USB_DEVICE); + phy_set_mode(dwc->usb3_generic_phy[0], PHY_MODE_USB_DEVICE); ret = dwc3_gadget_init(dwc); if (ret) @@ -589,22 +592,14 @@ static int dwc3_core_ulpi_init(struct dwc3 *dwc) return ret; } -/** - * dwc3_phy_setup - Configure USB PHY Interface of DWC3 Core - * @dwc: Pointer to our controller context structure - * - * Returns 0 on success. The USB PHY interfaces are configured but not - * initialized. The PHY interfaces and the PHYs get initialized together with - * the core in dwc3_core_init. - */ -static int dwc3_phy_setup(struct dwc3 *dwc) +static int dwc3_ss_phy_setup(struct dwc3 *dwc, int index) { unsigned int hw_mode; u32 reg; hw_mode = DWC3_GHWPARAMS0_MODE(dwc->hwparams.hwparams0); - reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0)); + reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(index)); /* * Make sure UX_EXIT_PX is cleared as that causes issues with some @@ -659,9 +654,19 @@ static int dwc3_phy_setup(struct dwc3 *dwc) if (dwc->dis_del_phy_power_chg_quirk) reg &= ~DWC3_GUSB3PIPECTL_DEPOCHANGE; - dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg); + dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(index), reg); - reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0)); + return 0; +} + +static int dwc3_hs_phy_setup(struct dwc3 *dwc, int index) +{ + unsigned int hw_mode; + u32 reg; + + hw_mode = DWC3_GHWPARAMS0_MODE(dwc->hwparams.hwparams0); + + reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(index)); /* Select the HS PHY interface */ switch (DWC3_GHWPARAMS3_HSPHY_IFC(dwc->hwparams.hwparams3)) { @@ -673,7 +678,7 @@ static int dwc3_phy_setup(struct dwc3 *dwc) } else if (dwc->hsphy_interface && !strncmp(dwc->hsphy_interface, "ulpi", 4)) { reg |= DWC3_GUSB2PHYCFG_ULPI_UTMI; - dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg); + dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(index), reg); } else { /* Relying on default value. */ if (!(reg & DWC3_GUSB2PHYCFG_ULPI_UTMI)) @@ -740,7 +745,35 @@ static int dwc3_phy_setup(struct dwc3 *dwc) if (dwc->ulpi_ext_vbus_drv) reg |= DWC3_GUSB2PHYCFG_ULPIEXTVBUSDRV; - dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg); + dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(index), reg); + + return 0; +} + +/** + * dwc3_phy_setup - Configure USB PHY Interface of DWC3 Core + * @dwc: Pointer to our controller context structure + * + * Returns 0 on success. The USB PHY interfaces are configured but not + * initialized. The PHY interfaces and the PHYs get initialized together with + * the core in dwc3_core_init. + */ +static int dwc3_phy_setup(struct dwc3 *dwc) +{ + int i; + int ret; + + for (i = 0; i < dwc->num_usb3_ports; i++) { + ret = dwc3_ss_phy_setup(dwc, i); + if (ret) + return ret; + } + + for (i = 0; i < dwc->num_usb2_ports; i++) { + ret = dwc3_hs_phy_setup(dwc, i); + if (ret) + return ret; + } return 0; } @@ -748,23 +781,32 @@ static int dwc3_phy_setup(struct dwc3 *dwc) static int dwc3_phy_init(struct dwc3 *dwc) { int ret; + int i; + int j; usb_phy_init(dwc->usb2_phy); usb_phy_init(dwc->usb3_phy); - ret = phy_init(dwc->usb2_generic_phy); - if (ret < 0) - goto err_shutdown_usb3_phy; + for (i = 0; i < dwc->num_usb2_ports; i++) { + ret = phy_init(dwc->usb2_generic_phy[i]); + if (ret < 0) + goto err_exit_phy; - ret = phy_init(dwc->usb3_generic_phy); - if (ret < 0) - goto err_exit_usb2_phy; + ret = phy_init(dwc->usb3_generic_phy[i]); + if (ret < 0) { + phy_exit(dwc->usb2_generic_phy[i]); + goto err_exit_phy; + } + } return 0; -err_exit_usb2_phy: - phy_exit(dwc->usb2_generic_phy); -err_shutdown_usb3_phy: +err_exit_phy: + for (j = i - 1; j >= 0; j--) { + phy_exit(dwc->usb2_generic_phy[j]); + phy_exit(dwc->usb3_generic_phy[j]); + } + usb_phy_shutdown(dwc->usb3_phy); usb_phy_shutdown(dwc->usb2_phy); @@ -773,8 +815,12 @@ static int dwc3_phy_init(struct dwc3 *dwc) static void dwc3_phy_exit(struct dwc3 *dwc) { - phy_exit(dwc->usb3_generic_phy); - phy_exit(dwc->usb2_generic_phy); + int i; + + for (i = 0; i < dwc->num_usb2_ports; i++) { + phy_exit(dwc->usb3_generic_phy[i]); + phy_exit(dwc->usb2_generic_phy[i]); + } usb_phy_shutdown(dwc->usb3_phy); usb_phy_shutdown(dwc->usb2_phy); @@ -783,23 +829,32 @@ static void dwc3_phy_exit(struct dwc3 *dwc) static int dwc3_phy_power_on(struct dwc3 *dwc) { int ret; + int i; + int j; usb_phy_set_suspend(dwc->usb2_phy, 0); usb_phy_set_suspend(dwc->usb3_phy, 0); - ret = phy_power_on(dwc->usb2_generic_phy); - if (ret < 0) - goto err_suspend_usb3_phy; + for (i = 0; i < dwc->num_usb2_ports; i++) { + ret = phy_power_on(dwc->usb2_generic_phy[i]); + if (ret < 0) + goto err_power_off_phy; - ret = phy_power_on(dwc->usb3_generic_phy); - if (ret < 0) - goto err_power_off_usb2_phy; + ret = phy_power_on(dwc->usb3_generic_phy[i]); + if (ret < 0) { + phy_power_off(dwc->usb2_generic_phy[i]); + goto err_power_off_phy; + } + } return 0; -err_power_off_usb2_phy: - phy_power_off(dwc->usb2_generic_phy); -err_suspend_usb3_phy: +err_power_off_phy: + for (j = i - 1; j >= 0; j--) { + phy_power_off(dwc->usb2_generic_phy[j]); + phy_power_off(dwc->usb3_generic_phy[j]); + } + usb_phy_set_suspend(dwc->usb3_phy, 1); usb_phy_set_suspend(dwc->usb2_phy, 1); @@ -808,8 +863,12 @@ static int dwc3_phy_power_on(struct dwc3 *dwc) static void dwc3_phy_power_off(struct dwc3 *dwc) { - phy_power_off(dwc->usb3_generic_phy); - phy_power_off(dwc->usb2_generic_phy); + int i; + + for (i = 0; i < dwc->num_usb2_ports; i++) { + phy_power_off(dwc->usb3_generic_phy[i]); + phy_power_off(dwc->usb2_generic_phy[i]); + } usb_phy_set_suspend(dwc->usb3_phy, 1); usb_phy_set_suspend(dwc->usb2_phy, 1); @@ -1187,6 +1246,7 @@ static int dwc3_core_init(struct dwc3 *dwc) unsigned int hw_mode; u32 reg; int ret; + int i; hw_mode = DWC3_GHWPARAMS0_MODE(dwc->hwparams.hwparams0); @@ -1230,15 +1290,19 @@ static int dwc3_core_init(struct dwc3 *dwc) if (hw_mode == DWC3_GHWPARAMS0_MODE_DRD && !DWC3_VER_IS_WITHIN(DWC3, ANY, 194A)) { if (!dwc->dis_u3_susphy_quirk) { - reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0)); - reg |= DWC3_GUSB3PIPECTL_SUSPHY; - dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg); + for (i = 0; i < dwc->num_usb3_ports; i++) { + reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(i)); + reg |= DWC3_GUSB3PIPECTL_SUSPHY; + dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(i), reg); + } } if (!dwc->dis_u2_susphy_quirk) { - reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0)); - reg |= DWC3_GUSB2PHYCFG_SUSPHY; - dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg); + for (i = 0; i < dwc->num_usb2_ports; i++) { + reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(i)); + reg |= DWC3_GUSB2PHYCFG_SUSPHY; + dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(i), reg); + } } } @@ -1346,7 +1410,9 @@ static int dwc3_core_get_phy(struct dwc3 *dwc) { struct device *dev = dwc->dev; struct device_node *node = dev->of_node; + char phy_name[13]; int ret; + int i; if (node) { dwc->usb2_phy = devm_usb_get_phy_by_phandle(dev, "usb-phy", 0); @@ -1372,22 +1438,36 @@ static int dwc3_core_get_phy(struct dwc3 *dwc) return dev_err_probe(dev, ret, "no usb3 phy configured\n"); } - dwc->usb2_generic_phy = devm_phy_get(dev, "usb2-phy"); - if (IS_ERR(dwc->usb2_generic_phy)) { - ret = PTR_ERR(dwc->usb2_generic_phy); - if (ret == -ENOSYS || ret == -ENODEV) - dwc->usb2_generic_phy = NULL; + for (i = 0; i < dwc->num_usb2_ports; i++) { + if (dwc->num_usb2_ports == 1) + sprintf(phy_name, "usb2-phy"); else - return dev_err_probe(dev, ret, "no usb2 phy configured\n"); - } + sprintf(phy_name, "usb2-port%d", i); - dwc->usb3_generic_phy = devm_phy_get(dev, "usb3-phy"); - if (IS_ERR(dwc->usb3_generic_phy)) { - ret = PTR_ERR(dwc->usb3_generic_phy); - if (ret == -ENOSYS || ret == -ENODEV) - dwc->usb3_generic_phy = NULL; + dwc->usb2_generic_phy[i] = devm_phy_get(dev, phy_name); + if (IS_ERR(dwc->usb2_generic_phy[i])) { + ret = PTR_ERR(dwc->usb2_generic_phy[i]); + if (ret == -ENOSYS || ret == -ENODEV) + dwc->usb2_generic_phy[i] = NULL; + else + return dev_err_probe(dev, ret, + "failed to lookup phy %s\n", phy_name); + } + + if (dwc->num_usb2_ports == 1) + sprintf(phy_name, "usb3-phy"); else - return dev_err_probe(dev, ret, "no usb3 phy configured\n"); + sprintf(phy_name, "usb3-port%d", i); + + dwc->usb3_generic_phy[i] = devm_phy_get(dev, phy_name); + if (IS_ERR(dwc->usb3_generic_phy[i])) { + ret = PTR_ERR(dwc->usb3_generic_phy[i]); + if (ret == -ENOSYS || ret == -ENODEV) + dwc->usb3_generic_phy[i] = NULL; + else + return dev_err_probe(dev, ret, + "failed to lookup phy %s\n", phy_name); + } } return 0; @@ -1397,6 +1477,7 @@ static int dwc3_core_init_mode(struct dwc3 *dwc) { struct device *dev = dwc->dev; int ret; + int i; switch (dwc->dr_mode) { case USB_DR_MODE_PERIPHERAL: @@ -1404,8 +1485,8 @@ static int dwc3_core_init_mode(struct dwc3 *dwc) if (dwc->usb2_phy) otg_set_vbus(dwc->usb2_phy->otg, false); - phy_set_mode(dwc->usb2_generic_phy, PHY_MODE_USB_DEVICE); - phy_set_mode(dwc->usb3_generic_phy, PHY_MODE_USB_DEVICE); + phy_set_mode(dwc->usb2_generic_phy[0], PHY_MODE_USB_DEVICE); + phy_set_mode(dwc->usb3_generic_phy[0], PHY_MODE_USB_DEVICE); ret = dwc3_gadget_init(dwc); if (ret) @@ -1416,8 +1497,10 @@ static int dwc3_core_init_mode(struct dwc3 *dwc) if (dwc->usb2_phy) otg_set_vbus(dwc->usb2_phy->otg, true); - phy_set_mode(dwc->usb2_generic_phy, PHY_MODE_USB_HOST); - phy_set_mode(dwc->usb3_generic_phy, PHY_MODE_USB_HOST); + for (i = 0; i < dwc->num_usb2_ports; i++) { + phy_set_mode(dwc->usb2_generic_phy[i], PHY_MODE_USB_HOST); + phy_set_mode(dwc->usb3_generic_phy[i], PHY_MODE_USB_HOST); + } ret = dwc3_host_init(dwc); if (ret) @@ -1892,9 +1975,12 @@ static int dwc3_read_port_info(struct dwc3 *dwc) dev_dbg(dwc->dev, "hs-ports: %u ss-ports: %u\n", dwc->num_usb2_ports, dwc->num_usb3_ports); - iounmap(base); + if ((dwc->num_usb2_ports > DWC3_MAX_PORTS) || + (dwc->num_usb3_ports > DWC3_MAX_PORTS)) + return -ENOMEM; + return 0; } @@ -2130,6 +2216,7 @@ static int dwc3_suspend_common(struct dwc3 *dwc, pm_message_t msg) { unsigned long flags; u32 reg; + int i; switch (dwc->current_dr_role) { case DWC3_GCTL_PRTCAP_DEVICE: @@ -2148,17 +2235,21 @@ static int dwc3_suspend_common(struct dwc3 *dwc, pm_message_t msg) /* Let controller to suspend HSPHY before PHY driver suspends */ if (dwc->dis_u2_susphy_quirk || dwc->dis_enblslpm_quirk) { - reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0)); - reg |= DWC3_GUSB2PHYCFG_ENBLSLPM | - DWC3_GUSB2PHYCFG_SUSPHY; - dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg); + for (i = 0; i < dwc->num_usb2_ports; i++) { + reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(i)); + reg |= DWC3_GUSB2PHYCFG_ENBLSLPM | + DWC3_GUSB2PHYCFG_SUSPHY; + dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(i), reg); + } /* Give some time for USB2 PHY to suspend */ usleep_range(5000, 6000); } - phy_pm_runtime_put_sync(dwc->usb2_generic_phy); - phy_pm_runtime_put_sync(dwc->usb3_generic_phy); + for (i = 0; i < dwc->num_usb2_ports; i++) { + phy_pm_runtime_put_sync(dwc->usb2_generic_phy[i]); + phy_pm_runtime_put_sync(dwc->usb3_generic_phy[i]); + } break; case DWC3_GCTL_PRTCAP_OTG: /* do nothing during runtime_suspend */ @@ -2188,6 +2279,7 @@ static int dwc3_resume_common(struct dwc3 *dwc, pm_message_t msg) unsigned long flags; int ret; u32 reg; + int i; switch (dwc->current_dr_role) { case DWC3_GCTL_PRTCAP_DEVICE: @@ -2207,17 +2299,21 @@ static int dwc3_resume_common(struct dwc3 *dwc, pm_message_t msg) break; } /* Restore GUSB2PHYCFG bits that were modified in suspend */ - reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0)); - if (dwc->dis_u2_susphy_quirk) - reg &= ~DWC3_GUSB2PHYCFG_SUSPHY; + for (i = 0; i < dwc->num_usb2_ports; i++) { + reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(i)); + if (dwc->dis_u2_susphy_quirk) + reg &= ~DWC3_GUSB2PHYCFG_SUSPHY; - if (dwc->dis_enblslpm_quirk) - reg &= ~DWC3_GUSB2PHYCFG_ENBLSLPM; + if (dwc->dis_enblslpm_quirk) + reg &= ~DWC3_GUSB2PHYCFG_ENBLSLPM; - dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg); + dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(i), reg); + } - phy_pm_runtime_get_sync(dwc->usb2_generic_phy); - phy_pm_runtime_get_sync(dwc->usb3_generic_phy); + for (i = 0; i < dwc->num_usb2_ports; i++) { + phy_pm_runtime_get_sync(dwc->usb2_generic_phy[i]); + phy_pm_runtime_get_sync(dwc->usb3_generic_phy[i]); + } break; case DWC3_GCTL_PRTCAP_OTG: /* nothing to do on runtime_resume */ diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index 2ea6df7e6571..fc5d15edab1c 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -33,6 +33,9 @@ #include +/* Number of ports supported by a multiport controller */ +#define DWC3_MAX_PORTS 4 + #define DWC3_MSG_MAX 500 /* Global constants */ @@ -1029,8 +1032,8 @@ struct dwc3_scratchpad_array { * @usb_psy: pointer to power supply interface. * @usb2_phy: pointer to USB2 PHY * @usb3_phy: pointer to USB3 PHY - * @usb2_generic_phy: pointer to USB2 PHY - * @usb3_generic_phy: pointer to USB3 PHY + * @usb2_generic_phy: pointer to array of USB2 PHY + * @usb3_generic_phy: pointer to array of USB3 PHY * @num_usb2_ports: number of USB2 ports * @num_usb3_ports: number of USB3 ports * @phys_ready: flag to indicate that PHYs are ready @@ -1173,8 +1176,8 @@ struct dwc3 { struct usb_phy *usb2_phy; struct usb_phy *usb3_phy; - struct phy *usb2_generic_phy; - struct phy *usb3_generic_phy; + struct phy *usb2_generic_phy[DWC3_MAX_PORTS]; + struct phy *usb3_generic_phy[DWC3_MAX_PORTS]; u8 num_usb2_ports; u8 num_usb3_ports; diff --git a/drivers/usb/dwc3/drd.c b/drivers/usb/dwc3/drd.c index 039bf241769a..9aec41f1ad43 100644 --- a/drivers/usb/dwc3/drd.c +++ b/drivers/usb/dwc3/drd.c @@ -331,6 +331,7 @@ void dwc3_otg_update(struct dwc3 *dwc, bool ignore_idstatus) u32 reg; int id; unsigned long flags; + int i; if (dwc->dr_mode != USB_DR_MODE_OTG) return; @@ -386,9 +387,12 @@ void dwc3_otg_update(struct dwc3 *dwc, bool ignore_idstatus) } else { if (dwc->usb2_phy) otg_set_vbus(dwc->usb2_phy->otg, true); - if (dwc->usb2_generic_phy) - phy_set_mode(dwc->usb2_generic_phy, - PHY_MODE_USB_HOST); + for (i = 0; i < dwc->num_usb2_ports; i++) { + if (dwc->usb2_generic_phy[i]) { + phy_set_mode(dwc->usb2_generic_phy[i], + PHY_MODE_USB_HOST); + } + } } break; case DWC3_OTG_ROLE_DEVICE: @@ -400,9 +404,8 @@ void dwc3_otg_update(struct dwc3 *dwc, bool ignore_idstatus) if (dwc->usb2_phy) otg_set_vbus(dwc->usb2_phy->otg, false); - if (dwc->usb2_generic_phy) - phy_set_mode(dwc->usb2_generic_phy, - PHY_MODE_USB_DEVICE); + if (dwc->usb2_generic_phy[0]) + phy_set_mode(dwc->usb2_generic_phy[0], PHY_MODE_USB_DEVICE); ret = dwc3_gadget_init(dwc); if (ret) dev_err(dwc->dev, "failed to initialize peripheral\n"); From patchwork Sat Oct 7 15:48:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krishna Kurapati X-Patchwork-Id: 149603 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:a888:0:b0:403:3b70:6f57 with SMTP id x8csp992507vqo; Sat, 7 Oct 2023 08:50:24 -0700 (PDT) X-Google-Smtp-Source: AGHT+IE9KcxvePlad6aA119BXdNg6wYV2XFJ164Jo2cB6TqIg3tu0yVHPLVkrB0xl0mWZVmiyg4u X-Received: by 2002:a17:902:744b:b0:1c3:d9ed:a410 with SMTP id e11-20020a170902744b00b001c3d9eda410mr11047914plt.59.1696693823788; Sat, 07 Oct 2023 08:50:23 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1696693823; cv=none; d=google.com; s=arc-20160816; b=LWH98wWv5os7IpuFJWRs0BBLzwKvy6fkOflkxCAf4Jqr7E8jhNv6p7YxhLz+pZjneN EEPVkW58aU2TTPrFSfL6So5mTqLf78qmGVAM3Cq1Hh3zIGRMLpF2HDE/qluWYRipTEkp sgLYNEdUNzGd9cZJY9wa1bRtLYRFwscPCQpXfhX/eJmyCZesdC4fehFxNjCPkSSWGgkE 8/NCW0gVb6i2T43wf6l7e+NHYcFZ21Q3ICFJytkTe9JpxbUwHZfmneyNHzQAbHcE9jMz qiYbTx2c+rBdkkcl7DS0cEdFqP8n9InTCYZ5IuzOpXxgWcqYwlD+KbIAnOS258iQtjIE 9F4A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=9WxrQs2qZgO3q9GeP0KZrPxayPz5KdCbKHg0xT93Fxw=; fh=U3TpUTfr8nibyjEi3WZD3oXUE7YIGSP1gcP9+EYvwSo=; b=in5koS+IfiQtrnyzpi4rvle48uxdHeOwdXXHPuAMVKinQc54AD5HnPDRfRe2TXEL82 LSQ4xcdbOTi5XBpeQlnh/FUy5gqfej+NfeldMrZpKuaffP3KwkcOk795ZQdy9nk+ul91 XGvf1vhbzD3H0fybmmh0H8yaXYEwCG1pcmor5lDPfFE87qJwbaUR9Y/kWWADAbrxfAnO U3d9Xp9GmOS8WabQu737YVRaiariVLybE3ghCqP2ufS6Tl6nH8CglMSmsbcoKCHIvybC bvIGwsAZFc7hTHAX6KiHBh3zAhEKUEQb5pApBbsGTRowAxri2lxlhApuDPhb+h1fEW8i K/5g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=io9T2jdP; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.35 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from groat.vger.email (groat.vger.email. [23.128.96.35]) by mx.google.com with ESMTPS id z8-20020a1709027e8800b001c6138350b4si3778139pla.431.2023.10.07.08.50.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 07 Oct 2023 08:50:23 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.35 as permitted sender) client-ip=23.128.96.35; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=io9T2jdP; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.35 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by groat.vger.email (Postfix) with ESMTP id 9872780B28A1; Sat, 7 Oct 2023 08:50:21 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at groat.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344038AbjJGPtg (ORCPT + 17 others); Sat, 7 Oct 2023 11:49:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40880 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344056AbjJGPtb (ORCPT ); Sat, 7 Oct 2023 11:49:31 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 69982F4; Sat, 7 Oct 2023 08:49:29 -0700 (PDT) Received: from pps.filterd (m0279867.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 397FkKSc014847; Sat, 7 Oct 2023 15:49:16 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=9WxrQs2qZgO3q9GeP0KZrPxayPz5KdCbKHg0xT93Fxw=; b=io9T2jdPX0NGkbYuYM8SIAwQt488n7AYUDG7pSGahvnvdHwDKoMczRO47qT6vC3/YP6K XmBv0SvxFVlvzptkWUI/M4lt5Z/8SHARmAGSdxJa34AbGgYMZjoqIN4RLbFzYo8RNO4j vi6FIKA7/ydLOeq0Hjy8bXCVFNYgYRjHg07T32x4YMwJSuhd2lVFDU3UBfAnj652a5bG OhM++iiejzCceC6JVl9LkXFUEz8m7NygNJ3f31sGNjm3QmDDzydRC8gdYAp6Ia6lA21N 7zC0ArRYsvJffK4G6qIiZKs3bLZHV5NgWjZ3gOmGe7KtjUDAZomYtPZiUG4fLP7ZUiK+ jg== Received: from nalasppmta04.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3tjw1m93v2-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Sat, 07 Oct 2023 15:49:16 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 397FmrxK002673 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Sat, 7 Oct 2023 15:48:53 GMT Received: from hu-kriskura-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.36; Sat, 7 Oct 2023 08:48:46 -0700 From: Krishna Kurapati To: Thinh Nguyen , Greg Kroah-Hartman , Philipp Zabel , "Andy Gross" , Bjorn Andersson , "Konrad Dybcio" , Rob Herring , Krzysztof Kozlowski , Felipe Balbi , Wesley Cheng , Johan Hovold CC: , , , , , , , , , Krishna Kurapati , Bjorn Andersson Subject: [PATCH v13 04/10] usb: dwc3: qcom: Add helper function to request threaded IRQ Date: Sat, 7 Oct 2023 21:18:00 +0530 Message-ID: <20231007154806.605-5-quic_kriskura@quicinc.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231007154806.605-1-quic_kriskura@quicinc.com> References: <20231007154806.605-1-quic_kriskura@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: acBGyYoHgUqrnuXt42guZN53pvT5Cd1A X-Proofpoint-ORIG-GUID: acBGyYoHgUqrnuXt42guZN53pvT5Cd1A X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-10-07_12,2023-10-06_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 phishscore=0 clxscore=1015 lowpriorityscore=0 priorityscore=1501 adultscore=0 mlxlogscore=687 spamscore=0 impostorscore=0 suspectscore=0 malwarescore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2309180000 definitions=main-2310070144 X-Spam-Status: No, score=2.7 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, RCVD_IN_SBL_CSS,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on groat.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (groat.vger.email [0.0.0.0]); Sat, 07 Oct 2023 08:50:21 -0700 (PDT) X-Spam-Level: ** X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779112422775816964 X-GMAIL-MSGID: 1779112422775816964 Cleanup setup irq call by implementing a new prep_irq helper function and using it to request threaded IRQ's. Signed-off-by: Krishna Kurapati Reviewed-by: Bjorn Andersson --- drivers/usb/dwc3/dwc3-qcom.c | 59 ++++++++++++++++-------------------- 1 file changed, 26 insertions(+), 33 deletions(-) diff --git a/drivers/usb/dwc3/dwc3-qcom.c b/drivers/usb/dwc3/dwc3-qcom.c index 3de43df6bbe8..ef2006db7601 100644 --- a/drivers/usb/dwc3/dwc3-qcom.c +++ b/drivers/usb/dwc3/dwc3-qcom.c @@ -535,6 +535,24 @@ static int dwc3_qcom_get_irq(struct platform_device *pdev, return ret; } +static int dwc3_qcom_prep_irq(struct dwc3_qcom *qcom, char *irq_name, + char *disp_name, int irq) +{ + int ret; + + /* Keep wakeup interrupts disabled until suspend */ + irq_set_status_flags(irq, IRQ_NOAUTOEN); + ret = devm_request_threaded_irq(qcom->dev, irq, NULL, + qcom_dwc3_resume_irq, + IRQF_TRIGGER_HIGH | IRQF_ONESHOT, + disp_name, qcom); + + if (ret) + dev_err(qcom->dev, "%s failed: %d\n", irq_name, ret); + + return ret; +} + static int dwc3_qcom_setup_irq(struct platform_device *pdev) { struct dwc3_qcom *qcom = platform_get_drvdata(pdev); @@ -545,61 +563,36 @@ static int dwc3_qcom_setup_irq(struct platform_device *pdev) irq = dwc3_qcom_get_irq(pdev, "hs_phy_irq", pdata ? pdata->hs_phy_irq_index : -1); if (irq > 0) { - /* Keep wakeup interrupts disabled until suspend */ - irq_set_status_flags(irq, IRQ_NOAUTOEN); - ret = devm_request_threaded_irq(qcom->dev, irq, NULL, - qcom_dwc3_resume_irq, - IRQF_TRIGGER_HIGH | IRQF_ONESHOT, - "qcom_dwc3 HS", qcom); - if (ret) { - dev_err(qcom->dev, "hs_phy_irq failed: %d\n", ret); + ret = dwc3_qcom_prep_irq(qcom, "hs_phy_irq", "qcom_dwc3 HS", irq); + if (ret) return ret; - } qcom->hs_phy_irq = irq; } irq = dwc3_qcom_get_irq(pdev, "dp_hs_phy_irq", pdata ? pdata->dp_hs_phy_irq_index : -1); if (irq > 0) { - irq_set_status_flags(irq, IRQ_NOAUTOEN); - ret = devm_request_threaded_irq(qcom->dev, irq, NULL, - qcom_dwc3_resume_irq, - IRQF_TRIGGER_HIGH | IRQF_ONESHOT, - "qcom_dwc3 DP_HS", qcom); - if (ret) { - dev_err(qcom->dev, "dp_hs_phy_irq failed: %d\n", ret); + ret = dwc3_qcom_prep_irq(qcom, "dp_hs_phy_irq", "qcom_dwc3 DP_HS", irq); + if (ret) return ret; - } qcom->dp_hs_phy_irq = irq; } irq = dwc3_qcom_get_irq(pdev, "dm_hs_phy_irq", pdata ? pdata->dm_hs_phy_irq_index : -1); if (irq > 0) { - irq_set_status_flags(irq, IRQ_NOAUTOEN); - ret = devm_request_threaded_irq(qcom->dev, irq, NULL, - qcom_dwc3_resume_irq, - IRQF_TRIGGER_HIGH | IRQF_ONESHOT, - "qcom_dwc3 DM_HS", qcom); - if (ret) { - dev_err(qcom->dev, "dm_hs_phy_irq failed: %d\n", ret); + ret = dwc3_qcom_prep_irq(qcom, "dm_hs_phy_irq", "qcom_dwc3 DM_HS", irq); + if (ret) return ret; - } qcom->dm_hs_phy_irq = irq; } irq = dwc3_qcom_get_irq(pdev, "ss_phy_irq", pdata ? pdata->ss_phy_irq_index : -1); if (irq > 0) { - irq_set_status_flags(irq, IRQ_NOAUTOEN); - ret = devm_request_threaded_irq(qcom->dev, irq, NULL, - qcom_dwc3_resume_irq, - IRQF_TRIGGER_HIGH | IRQF_ONESHOT, - "qcom_dwc3 SS", qcom); - if (ret) { - dev_err(qcom->dev, "ss_phy_irq failed: %d\n", ret); + ret = dwc3_qcom_prep_irq(qcom, "ss_phy_irq", "qcom_dwc3 SS", irq); + if (ret) return ret; - } qcom->ss_phy_irq = irq; } From patchwork Sat Oct 7 15:48:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krishna Kurapati X-Patchwork-Id: 149600 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:a888:0:b0:403:3b70:6f57 with SMTP id x8csp992360vqo; Sat, 7 Oct 2023 08:49:56 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEzbWyVvTgFsJFLEN/4h0NaC1PaYF/bJyW3GvsH6wcWPVW+0fMWO1sx271rvTC8ydCqR9p0 X-Received: by 2002:a05:6a20:3d13:b0:160:a752:59e with SMTP id y19-20020a056a203d1300b00160a752059emr13037495pzi.40.1696693796282; Sat, 07 Oct 2023 08:49:56 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1696693796; cv=none; d=google.com; s=arc-20160816; b=wLxF4CdwPUK3zp5l+zykw0vVFoYXQzmynQID2LBLnMrLiBZzCvbveyBe5lQmmTobjq q8vD0/NrmsLAZgFvRojidWmX/AJtxDPmNr5z3A6L+xPra+9zF8LLp32EnI27o9vZg8+2 MAWmWP1X03Edvx4OcYb4K7OAY10xKNkQcdyGiIIlESfOXW13hITuyhVoubMOcrI0o1Gu U2MmPbraZe78yU/ri7I2w4ghOhB1M2Uugo7MPnquXQp1/jFKzIt/aZnGifyxASxEaibh EtRP9jgvksYvzZCD3saPcJ62VqkZMTBGQ51zJH+IVHkYHa8FEnAL5VTYjocEdLaMlrdB UtxQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=WURVkSQ1wiWfAkymc7P79m2VEzqQnui4OLBs8zC1Yes=; fh=a++TWPJw3Cn9MYBczZLXAB+Eob7lKtyrQCXvx5EPkG8=; b=xv413VV9MPn25S7GuRtdy02cj7W3aiyz4YJMFk8AsIO5mi5g4H8XiMMHWJkm/ky2jM z66H3e1YNHUnjdGkMEmC5RzIkTlb0Mxa77gHsrq+P8vxt6v3CD1Ua/JrQZ3pALQ27AHb KGZ87OxZQ6CjXaJKtyDQXjv9INQoKuaSmQeutKcwu+OxE7P5Sc2O27B0CgnOqon+tAC5 U2W90munC8IE6WzVKKX9fjPR92qf+jGweBczud+XI8ElELROqXOLf1J1VaAF1F2pTBRv SUjoH0EI6f0nRPmoccnPIMQP42Crv7EwVKWvWibeBKHh3KxWw4VrtzrAT2KBZLaAV5nP oxKQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=B1bAz13O; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.35 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from groat.vger.email (groat.vger.email. [23.128.96.35]) by mx.google.com with ESMTPS id o13-20020a17090ac08d00b00274abe06b0asi5866166pjs.127.2023.10.07.08.49.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 07 Oct 2023 08:49:56 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.35 as permitted sender) client-ip=23.128.96.35; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=B1bAz13O; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.35 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by groat.vger.email (Postfix) with ESMTP id D3D1180B28AD; Sat, 7 Oct 2023 08:49:50 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at groat.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344065AbjJGPtd (ORCPT + 17 others); Sat, 7 Oct 2023 11:49:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36652 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344054AbjJGPt3 (ORCPT ); Sat, 7 Oct 2023 11:49:29 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 87806D6; Sat, 7 Oct 2023 08:49:26 -0700 (PDT) Received: from pps.filterd (m0279862.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 397FhYeW023644; Sat, 7 Oct 2023 15:49:14 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=WURVkSQ1wiWfAkymc7P79m2VEzqQnui4OLBs8zC1Yes=; b=B1bAz13Oj1hmFyv1OXE/6hpsCKPEh2g5ouc8Y3xNdcxqU4kumAc4uIR/rJLYPNZ0xiyO 6PqxOlMPWeLpna8Sf/dB3StLJUuob99gwVbDLoyap9P1407pf1DBpmyVlpOR9VoX5us1 PRvEGIpKg2t1izsmPZpUJQ8Kn6F8kdpqmIG+qeGIzzhZQb92cVh/ZjMIaLlnwUPiZqxY D1968cIREdp3np7Zf3MJKmVXQwSAaVeqqi+T2AXUkgcmUONOkCMwclJS7OfLQkM7IcDu KtMEkMKP3UMzN/iXqxGoVitwivBHMkX/QnZTb1CZcJIhRNho1CwlFFTEbJhPV4wZKuFF Vw== Received: from nalasppmta01.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3tk03q0v0f-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Sat, 07 Oct 2023 15:49:14 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 397FmxkZ032422 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Sat, 7 Oct 2023 15:48:59 GMT Received: from hu-kriskura-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.36; Sat, 7 Oct 2023 08:48:53 -0700 From: Krishna Kurapati To: Thinh Nguyen , Greg Kroah-Hartman , Philipp Zabel , "Andy Gross" , Bjorn Andersson , "Konrad Dybcio" , Rob Herring , Krzysztof Kozlowski , Felipe Balbi , Wesley Cheng , Johan Hovold CC: , , , , , , , , , Krishna Kurapati Subject: [PATCH v13 05/10] usb: dwc3: qcom: Refactor IRQ handling in QCOM Glue driver Date: Sat, 7 Oct 2023 21:18:01 +0530 Message-ID: <20231007154806.605-6-quic_kriskura@quicinc.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231007154806.605-1-quic_kriskura@quicinc.com> References: <20231007154806.605-1-quic_kriskura@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: WARq_IpNBppBhEro7fXyClVGe2nwmp8g X-Proofpoint-GUID: WARq_IpNBppBhEro7fXyClVGe2nwmp8g X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-10-07_12,2023-10-06_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 spamscore=0 priorityscore=1501 bulkscore=0 lowpriorityscore=0 mlxlogscore=818 adultscore=0 suspectscore=0 phishscore=0 mlxscore=0 impostorscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2309180000 definitions=main-2310070144 X-Spam-Status: No, score=2.7 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, RCVD_IN_SBL_CSS,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on groat.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (groat.vger.email [0.0.0.0]); Sat, 07 Oct 2023 08:49:50 -0700 (PDT) X-Spam-Level: ** X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779112394148435831 X-GMAIL-MSGID: 1779112394148435831 Refactor setup_irq call to facilitate reading multiport IRQ's along with non mulitport ones. Read through the interrupt-names property to figure out, the type of interrupt (DP/DM/HS/SS) and to which port it belongs. Also keep track of port index to calculate port count based on interrupts provided as input in DT. Signed-off-by: Krishna Kurapati --- drivers/usb/dwc3/dwc3-qcom.c | 210 +++++++++++++++++++++++++---------- 1 file changed, 154 insertions(+), 56 deletions(-) diff --git a/drivers/usb/dwc3/dwc3-qcom.c b/drivers/usb/dwc3/dwc3-qcom.c index ef2006db7601..863892284146 100644 --- a/drivers/usb/dwc3/dwc3-qcom.c +++ b/drivers/usb/dwc3/dwc3-qcom.c @@ -53,14 +53,25 @@ #define APPS_USB_AVG_BW 0 #define APPS_USB_PEAK_BW MBps_to_icc(40) +#define NUM_PHY_IRQ 4 + +enum dwc3_qcom_ph_index { + DP_HS_PHY_IRQ_INDEX = 0, + DM_HS_PHY_IRQ_INDEX, + SS_PHY_IRQ_INDEX, + HS_PHY_IRQ_INDEX, +}; + struct dwc3_acpi_pdata { u32 qscratch_base_offset; u32 qscratch_base_size; u32 dwc3_core_base_size; + /* + * The phy_irq_index corresponds to ACPI indexes of (in order) DP/DM/SS + * IRQ's respectively. + */ + int phy_irq_index[NUM_PHY_IRQ - 1]; int hs_phy_irq_index; - int dp_hs_phy_irq_index; - int dm_hs_phy_irq_index; - int ss_phy_irq_index; bool is_urs; }; @@ -73,10 +84,12 @@ struct dwc3_qcom { int num_clocks; struct reset_control *resets; + /* + * The phy_irq corresponds to IRQ's registered for (in order) DP/DM/SS + * respectively. + */ + int phy_irq[NUM_PHY_IRQ - 1][DWC3_MAX_PORTS]; int hs_phy_irq; - int dp_hs_phy_irq; - int dm_hs_phy_irq; - int ss_phy_irq; enum usb_device_speed usb2_speed; struct extcon_dev *edev; @@ -91,6 +104,7 @@ struct dwc3_qcom { bool pm_suspended; struct icc_path *icc_path_ddr; struct icc_path *icc_path_apps; + int num_ports; }; static inline void dwc3_qcom_setbits(void __iomem *base, u32 offset, u32 val) @@ -375,16 +389,16 @@ static void dwc3_qcom_disable_interrupts(struct dwc3_qcom *qcom) dwc3_qcom_disable_wakeup_irq(qcom->hs_phy_irq); if (qcom->usb2_speed == USB_SPEED_LOW) { - dwc3_qcom_disable_wakeup_irq(qcom->dm_hs_phy_irq); + dwc3_qcom_disable_wakeup_irq(qcom->phy_irq[DM_HS_PHY_IRQ_INDEX][0]); } else if ((qcom->usb2_speed == USB_SPEED_HIGH) || (qcom->usb2_speed == USB_SPEED_FULL)) { - dwc3_qcom_disable_wakeup_irq(qcom->dp_hs_phy_irq); + dwc3_qcom_disable_wakeup_irq(qcom->phy_irq[DP_HS_PHY_IRQ_INDEX][0]); } else { - dwc3_qcom_disable_wakeup_irq(qcom->dp_hs_phy_irq); - dwc3_qcom_disable_wakeup_irq(qcom->dm_hs_phy_irq); + dwc3_qcom_disable_wakeup_irq(qcom->phy_irq[DP_HS_PHY_IRQ_INDEX][0]); + dwc3_qcom_disable_wakeup_irq(qcom->phy_irq[DM_HS_PHY_IRQ_INDEX][0]); } - dwc3_qcom_disable_wakeup_irq(qcom->ss_phy_irq); + dwc3_qcom_disable_wakeup_irq(qcom->phy_irq[SS_PHY_IRQ_INDEX][0]); } static void dwc3_qcom_enable_interrupts(struct dwc3_qcom *qcom) @@ -401,20 +415,20 @@ static void dwc3_qcom_enable_interrupts(struct dwc3_qcom *qcom) */ if (qcom->usb2_speed == USB_SPEED_LOW) { - dwc3_qcom_enable_wakeup_irq(qcom->dm_hs_phy_irq, + dwc3_qcom_enable_wakeup_irq(qcom->phy_irq[DM_HS_PHY_IRQ_INDEX][0], IRQ_TYPE_EDGE_FALLING); } else if ((qcom->usb2_speed == USB_SPEED_HIGH) || (qcom->usb2_speed == USB_SPEED_FULL)) { - dwc3_qcom_enable_wakeup_irq(qcom->dp_hs_phy_irq, + dwc3_qcom_enable_wakeup_irq(qcom->phy_irq[DP_HS_PHY_IRQ_INDEX][0], IRQ_TYPE_EDGE_FALLING); } else { - dwc3_qcom_enable_wakeup_irq(qcom->dp_hs_phy_irq, + dwc3_qcom_enable_wakeup_irq(qcom->phy_irq[DP_HS_PHY_IRQ_INDEX][0], IRQ_TYPE_EDGE_RISING); - dwc3_qcom_enable_wakeup_irq(qcom->dm_hs_phy_irq, + dwc3_qcom_enable_wakeup_irq(qcom->phy_irq[DM_HS_PHY_IRQ_INDEX][0], IRQ_TYPE_EDGE_RISING); } - dwc3_qcom_enable_wakeup_irq(qcom->ss_phy_irq, 0); + dwc3_qcom_enable_wakeup_irq(qcom->phy_irq[SS_PHY_IRQ_INDEX][0], 0); } static int dwc3_qcom_suspend(struct dwc3_qcom *qcom, bool wakeup) @@ -535,8 +549,8 @@ static int dwc3_qcom_get_irq(struct platform_device *pdev, return ret; } -static int dwc3_qcom_prep_irq(struct dwc3_qcom *qcom, char *irq_name, - char *disp_name, int irq) +static int dwc3_qcom_prep_irq(struct dwc3_qcom *qcom, const char *irq_name, + const char *disp_name, int irq) { int ret; @@ -553,47 +567,135 @@ static int dwc3_qcom_prep_irq(struct dwc3_qcom *qcom, char *irq_name, return ret; } +static int dwc3_qcom_get_irq_index(const char *irq_name) +{ + /* + * If we are reading IRQ not supported by the driver + * like pwr_event_irq, then return -1 indicating the next + * helper function to skip processing IRQ name further. + */ + int irq_index = -1; + + if (strncmp(irq_name, "dp_hs_phy", strlen("dp_hs_phy")) == 0) + irq_index = DP_HS_PHY_IRQ_INDEX; + else if (strncmp(irq_name, "dm_hs_phy", strlen("dm_hs_phy")) == 0) + irq_index = DM_HS_PHY_IRQ_INDEX; + else if (strncmp(irq_name, "ss_phy", strlen("ss_phy")) == 0) + irq_index = SS_PHY_IRQ_INDEX; + else if (strncmp(irq_name, "hs_phy", strlen("hs_phy")) == 0) + irq_index = HS_PHY_IRQ_INDEX; + return irq_index; +} + +static int dwc3_qcom_get_port_index(const char *irq_name, int irq_index) +{ + int port_index = -1; + + switch (irq_index) { + case DP_HS_PHY_IRQ_INDEX: + if (strcmp(irq_name, "dp_hs_phy_irq") == 0) + port_index = 1; + else + sscanf(irq_name, "dp_hs_phy_%d", &port_index); + break; + + case DM_HS_PHY_IRQ_INDEX: + if (strcmp(irq_name, "dm_hs_phy_irq") == 0) + port_index = 1; + else + sscanf(irq_name, "dm_hs_phy_%d", &port_index); + break; + + case SS_PHY_IRQ_INDEX: + if (strcmp(irq_name, "ss_phy_irq") == 0) + port_index = 1; + else + sscanf(irq_name, "ss_phy_%d", &port_index); + break; + + case HS_PHY_IRQ_INDEX: + port_index = 1; + break; + } + + if (port_index > DWC3_MAX_PORTS) + port_index = -1; + + return port_index; +} + +static int dwc3_qcom_get_acpi_index(struct dwc3_qcom *qcom, int irq_index, + int port_index) +{ + const struct dwc3_acpi_pdata *pdata = qcom->acpi_pdata; + int acpi_index = -1; + + /* + * Currently multiport supported targets don't have an ACPI variant. + * So return -1 if we are not dealing with first port of the controller. + */ + if ((pdata == NULL) || (port_index != 1)) + goto done; + + if (irq_index == HS_PHY_IRQ_INDEX) + acpi_index = pdata->hs_phy_irq_index; + else + acpi_index = pdata->phy_irq_index[irq_index]; + +done: + return acpi_index; +} + static int dwc3_qcom_setup_irq(struct platform_device *pdev) { struct dwc3_qcom *qcom = platform_get_drvdata(pdev); - const struct dwc3_acpi_pdata *pdata = qcom->acpi_pdata; + struct device_node *np = pdev->dev.of_node; + const char **irq_names; + int port_index; + int acpi_index; + int irq_count; + int irq_index; int irq; int ret; + int i; - irq = dwc3_qcom_get_irq(pdev, "hs_phy_irq", - pdata ? pdata->hs_phy_irq_index : -1); - if (irq > 0) { - ret = dwc3_qcom_prep_irq(qcom, "hs_phy_irq", "qcom_dwc3 HS", irq); - if (ret) - return ret; - qcom->hs_phy_irq = irq; - } + irq_count = of_property_count_strings(np, "interrupt-names"); + irq_names = devm_kzalloc(&pdev->dev, sizeof(*irq_names) * irq_count, GFP_KERNEL); + if (!irq_names) + return -ENOMEM; - irq = dwc3_qcom_get_irq(pdev, "dp_hs_phy_irq", - pdata ? pdata->dp_hs_phy_irq_index : -1); - if (irq > 0) { - ret = dwc3_qcom_prep_irq(qcom, "dp_hs_phy_irq", "qcom_dwc3 DP_HS", irq); - if (ret) - return ret; - qcom->dp_hs_phy_irq = irq; - } + ret = of_property_read_string_array(np, "interrupt-names", + irq_names, irq_count); + for (i = 0; i < irq_count; i++) { + irq_index = dwc3_qcom_get_irq_index(irq_names[i]); + if (irq_index == -1) { + dev_dbg(&pdev->dev, "Invalid IRQ not handled"); + continue; + } - irq = dwc3_qcom_get_irq(pdev, "dm_hs_phy_irq", - pdata ? pdata->dm_hs_phy_irq_index : -1); - if (irq > 0) { - ret = dwc3_qcom_prep_irq(qcom, "dm_hs_phy_irq", "qcom_dwc3 DM_HS", irq); - if (ret) - return ret; - qcom->dm_hs_phy_irq = irq; - } + port_index = dwc3_qcom_get_port_index(irq_names[i], irq_index); + if (port_index == -1) { + dev_dbg(&pdev->dev, "Port index invalid. IRQ not handled"); + continue; + } - irq = dwc3_qcom_get_irq(pdev, "ss_phy_irq", - pdata ? pdata->ss_phy_irq_index : -1); - if (irq > 0) { - ret = dwc3_qcom_prep_irq(qcom, "ss_phy_irq", "qcom_dwc3 SS", irq); - if (ret) - return ret; - qcom->ss_phy_irq = irq; + acpi_index = dwc3_qcom_get_acpi_index(qcom, irq_index, port_index); + + irq = dwc3_qcom_get_irq(pdev, irq_names[i], acpi_index); + if (irq > 0) { + ret = dwc3_qcom_prep_irq(qcom, irq_names[i], + irq_names[i], irq); + if (ret) + return ret; + + if (irq_index == HS_PHY_IRQ_INDEX) + qcom->hs_phy_irq = irq; + else + qcom->phy_irq[irq_index][port_index-1] = irq; + + if (qcom->num_ports < port_index) + qcom->num_ports = port_index; + } } return 0; @@ -1026,20 +1128,16 @@ static const struct dwc3_acpi_pdata sdm845_acpi_pdata = { .qscratch_base_offset = SDM845_QSCRATCH_BASE_OFFSET, .qscratch_base_size = SDM845_QSCRATCH_SIZE, .dwc3_core_base_size = SDM845_DWC3_CORE_SIZE, + .phy_irq_index = {4, 3, 2}, .hs_phy_irq_index = 1, - .dp_hs_phy_irq_index = 4, - .dm_hs_phy_irq_index = 3, - .ss_phy_irq_index = 2 }; static const struct dwc3_acpi_pdata sdm845_acpi_urs_pdata = { .qscratch_base_offset = SDM845_QSCRATCH_BASE_OFFSET, .qscratch_base_size = SDM845_QSCRATCH_SIZE, .dwc3_core_base_size = SDM845_DWC3_CORE_SIZE, + .phy_irq_index = {4, 3, 2}, .hs_phy_irq_index = 1, - .dp_hs_phy_irq_index = 4, - .dm_hs_phy_irq_index = 3, - .ss_phy_irq_index = 2, .is_urs = true, }; From patchwork Sat Oct 7 15:48:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krishna Kurapati X-Patchwork-Id: 149596 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:a888:0:b0:403:3b70:6f57 with SMTP id x8csp992282vqo; Sat, 7 Oct 2023 08:49:43 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEii9U70T8RUMaLb4xp1S6AEhxj9RRsCWTCOixvOIErP+mX7j6/DfYFuqiDkPlfbssLgRU0 X-Received: by 2002:a05:6a20:2445:b0:14e:3ba7:2933 with SMTP id t5-20020a056a20244500b0014e3ba72933mr12031364pzc.54.1696693783636; Sat, 07 Oct 2023 08:49:43 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1696693783; cv=none; d=google.com; s=arc-20160816; b=iaBQ5uPravvmooBMjEpr0IKjPiRJsRWZW82r/KD9GDZuNP+R1Rlxc/hXUy9/C6DBlC yho1wAX5a4xDCWNl+5tjlGvQJn3FRJR+tWarLNVvPODvW/CAwlnlLauMh2DdU6kF6f0Z Vhee4VGG1tVDwDYbl7C20pC8pEmnEVFHdiJ25n7QI5jovf3V3vCaGqcyBddUGP5n5vDh TEcpMPgSc0I1DQh6XLEEgazO5Ex4RQzmEyip8TVennE8zWjnjm0dbKtp9o3c+mwptPSv 60P1OEajhNNbTBpare4wC905bF0z3QaEEA1AJ0eONxiy2qeY0T5VL5HfoxHC1Dae32hB 5S8Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=J4NP7JDmyt+wbcbtOopTBz9Qmtzk9G5xhxbI3dCwcv4=; fh=a++TWPJw3Cn9MYBczZLXAB+Eob7lKtyrQCXvx5EPkG8=; b=LBOcTUFzVJ/lya2Fd1OJwyu91SD2UcU9VZkIbIcHzNjxBZC4CDQroX7YYg0RUYQlXi E8vqIRujKE/NC6KJLQcbLCvmdPdVuO9Gq/dq0i3gQG+cbxFtUHP4qvScx6mYmS+A61I8 RgXZu07wV+5ZBpx63WAmxI570XvSWxHAub0Ih7EmxbT0YZsT7+K2GlXLzx0Di144an8x 06ut3QQcXT/kkRz6xNBkq5ehwrBn7bLRSObRXjX9ZSvPOFKWLWiULoN8+GYHlzdKqHpZ 1Wa3tNVWomebxj3m3MdQnqSfVemKAdoo+8vn+zPoYVJSLzIBA1cQDjkkh22mVeHBmrxX /8JA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=bq6dyV9G; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:6 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from pete.vger.email (pete.vger.email. [2620:137:e000::3:6]) by mx.google.com with ESMTPS id r29-20020a638f5d000000b0058d551255c0si1169325pgn.79.2023.10.07.08.49.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 07 Oct 2023 08:49:43 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:6 as permitted sender) client-ip=2620:137:e000::3:6; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=bq6dyV9G; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:6 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by pete.vger.email (Postfix) with ESMTP id 6A4EA8027B5A; Sat, 7 Oct 2023 08:49:36 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at pete.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1343997AbjJGPtT (ORCPT + 17 others); Sat, 7 Oct 2023 11:49:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45218 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344062AbjJGPtR (ORCPT ); Sat, 7 Oct 2023 11:49:17 -0400 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2C1CEBC; Sat, 7 Oct 2023 08:49:16 -0700 (PDT) Received: from pps.filterd (m0279871.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 397FX0in019228; Sat, 7 Oct 2023 15:49:08 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=J4NP7JDmyt+wbcbtOopTBz9Qmtzk9G5xhxbI3dCwcv4=; b=bq6dyV9GOmh5M+TrQhd3cxlTsvGTIF7EXTKDLNFlKN6bHt6bG58/6JrUS1j2lWIJkaMy 7g1CfuOPRSM8BrVsJnAIWmSxbpmDGJORXWiLP7ghTa5IkbN/pjNpHzVFZdRg45krczme dclSoWhnEFdONLLSkOSeGkHulsunPuKQMKkqNTGLVdeErvzuhS3lQ/0NLKcyDYjd95+V Pz7ahyAK68V46p8zEqQv45zk1wFwQ59aJIFjlor91kZQ8zNQeogpV3/grk2kYqI84Hlx IiNBk/bPkALtKEj/3k0vT9OCBNtNWY5zmHraGsLBbQFRf+aRvcL8fa0QaRZ0jxZDeW51 HQ== Received: from nalasppmta03.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3tjxx88yfk-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Sat, 07 Oct 2023 15:49:07 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 397Fn6tW028797 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Sat, 7 Oct 2023 15:49:06 GMT Received: from hu-kriskura-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.36; Sat, 7 Oct 2023 08:49:00 -0700 From: Krishna Kurapati To: Thinh Nguyen , Greg Kroah-Hartman , Philipp Zabel , "Andy Gross" , Bjorn Andersson , "Konrad Dybcio" , Rob Herring , Krzysztof Kozlowski , Felipe Balbi , Wesley Cheng , Johan Hovold CC: , , , , , , , , , Krishna Kurapati Subject: [PATCH v13 06/10] usb: dwc3: qcom: Enable wakeup for applicable ports of multiport Date: Sat, 7 Oct 2023 21:18:02 +0530 Message-ID: <20231007154806.605-7-quic_kriskura@quicinc.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231007154806.605-1-quic_kriskura@quicinc.com> References: <20231007154806.605-1-quic_kriskura@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: JdczK7afancdIcBpmVGkdTP1YJQiM0tp X-Proofpoint-ORIG-GUID: JdczK7afancdIcBpmVGkdTP1YJQiM0tp X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-10-07_12,2023-10-06_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 bulkscore=0 impostorscore=0 suspectscore=0 phishscore=0 priorityscore=1501 mlxscore=0 spamscore=0 mlxlogscore=779 adultscore=0 lowpriorityscore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2309180000 definitions=main-2310070143 X-Spam-Status: No, score=2.7 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, RCVD_IN_SBL_CSS,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on pete.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (pete.vger.email [0.0.0.0]); Sat, 07 Oct 2023 08:49:36 -0700 (PDT) X-Spam-Level: ** X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779112381261639706 X-GMAIL-MSGID: 1779112381261639706 Currently wakeup is supported by only single port controllers. Read speed of each port and accordingly enable IRQ's for those ports. Signed-off-by: Krishna Kurapati --- drivers/usb/dwc3/dwc3-qcom.c | 65 +++++++++++++++++++----------------- 1 file changed, 35 insertions(+), 30 deletions(-) diff --git a/drivers/usb/dwc3/dwc3-qcom.c b/drivers/usb/dwc3/dwc3-qcom.c index 863892284146..651b9775a0c2 100644 --- a/drivers/usb/dwc3/dwc3-qcom.c +++ b/drivers/usb/dwc3/dwc3-qcom.c @@ -90,7 +90,7 @@ struct dwc3_qcom { */ int phy_irq[NUM_PHY_IRQ - 1][DWC3_MAX_PORTS]; int hs_phy_irq; - enum usb_device_speed usb2_speed; + enum usb_device_speed usb2_speed[DWC3_MAX_PORTS]; struct extcon_dev *edev; struct extcon_dev *host_edev; @@ -335,7 +335,8 @@ static bool dwc3_qcom_is_host(struct dwc3_qcom *qcom) return dwc->xhci; } -static enum usb_device_speed dwc3_qcom_read_usb2_speed(struct dwc3_qcom *qcom) +static enum usb_device_speed dwc3_qcom_read_usb2_speed(struct dwc3_qcom *qcom, + int port_index) { struct dwc3 *dwc = platform_get_drvdata(qcom->dwc3); struct usb_device *udev; @@ -348,12 +349,10 @@ static enum usb_device_speed dwc3_qcom_read_usb2_speed(struct dwc3_qcom *qcom) /* * It is possible to query the speed of all children of - * USB2.0 root hub via usb_hub_for_each_child(). DWC3 code - * currently supports only 1 port per controller. So - * this is sufficient. + * USB2.0 root hub via usb_hub_for_each_child(). */ #ifdef CONFIG_USB - udev = usb_hub_find_child(hcd->self.root_hub, 1); + udev = usb_hub_find_child(hcd->self.root_hub, port_index + 1); #else udev = NULL; #endif @@ -386,23 +385,29 @@ static void dwc3_qcom_disable_wakeup_irq(int irq) static void dwc3_qcom_disable_interrupts(struct dwc3_qcom *qcom) { + int i; + dwc3_qcom_disable_wakeup_irq(qcom->hs_phy_irq); - if (qcom->usb2_speed == USB_SPEED_LOW) { - dwc3_qcom_disable_wakeup_irq(qcom->phy_irq[DM_HS_PHY_IRQ_INDEX][0]); - } else if ((qcom->usb2_speed == USB_SPEED_HIGH) || - (qcom->usb2_speed == USB_SPEED_FULL)) { - dwc3_qcom_disable_wakeup_irq(qcom->phy_irq[DP_HS_PHY_IRQ_INDEX][0]); - } else { - dwc3_qcom_disable_wakeup_irq(qcom->phy_irq[DP_HS_PHY_IRQ_INDEX][0]); - dwc3_qcom_disable_wakeup_irq(qcom->phy_irq[DM_HS_PHY_IRQ_INDEX][0]); - } + for (i = 0; i < qcom->num_ports; i++) { + if (qcom->usb2_speed[i] == USB_SPEED_LOW) { + dwc3_qcom_disable_wakeup_irq(qcom->phy_irq[DM_HS_PHY_IRQ_INDEX][i]); + } else if ((qcom->usb2_speed[i] == USB_SPEED_HIGH) || + (qcom->usb2_speed[i] == USB_SPEED_FULL)) { + dwc3_qcom_disable_wakeup_irq(qcom->phy_irq[DP_HS_PHY_IRQ_INDEX][i]); + } else { + dwc3_qcom_disable_wakeup_irq(qcom->phy_irq[DP_HS_PHY_IRQ_INDEX][i]); + dwc3_qcom_disable_wakeup_irq(qcom->phy_irq[DM_HS_PHY_IRQ_INDEX][i]); + } - dwc3_qcom_disable_wakeup_irq(qcom->phy_irq[SS_PHY_IRQ_INDEX][0]); + dwc3_qcom_disable_wakeup_irq(qcom->phy_irq[SS_PHY_IRQ_INDEX][i]); + } } static void dwc3_qcom_enable_interrupts(struct dwc3_qcom *qcom) { + int i; + dwc3_qcom_enable_wakeup_irq(qcom->hs_phy_irq, 0); /* @@ -413,22 +418,24 @@ static void dwc3_qcom_enable_interrupts(struct dwc3_qcom *qcom) * disconnect and remote wakeup. When no device is connected, configure both * DP and DM lines as rising edge to detect HS/HS/LS device connect scenario. */ - - if (qcom->usb2_speed == USB_SPEED_LOW) { - dwc3_qcom_enable_wakeup_irq(qcom->phy_irq[DM_HS_PHY_IRQ_INDEX][0], + for (i = 0; i < qcom->num_ports; i++) { + qcom->usb2_speed[i] = dwc3_qcom_read_usb2_speed(qcom, i); + if (qcom->usb2_speed[i] == USB_SPEED_LOW) { + dwc3_qcom_enable_wakeup_irq(qcom->phy_irq[DM_HS_PHY_IRQ_INDEX][i], IRQ_TYPE_EDGE_FALLING); - } else if ((qcom->usb2_speed == USB_SPEED_HIGH) || - (qcom->usb2_speed == USB_SPEED_FULL)) { - dwc3_qcom_enable_wakeup_irq(qcom->phy_irq[DP_HS_PHY_IRQ_INDEX][0], + } else if ((qcom->usb2_speed[i] == USB_SPEED_HIGH) || + (qcom->usb2_speed[i] == USB_SPEED_FULL)) { + dwc3_qcom_enable_wakeup_irq(qcom->phy_irq[DP_HS_PHY_IRQ_INDEX][i], IRQ_TYPE_EDGE_FALLING); - } else { - dwc3_qcom_enable_wakeup_irq(qcom->phy_irq[DP_HS_PHY_IRQ_INDEX][0], + } else { + dwc3_qcom_enable_wakeup_irq(qcom->phy_irq[DP_HS_PHY_IRQ_INDEX][i], IRQ_TYPE_EDGE_RISING); - dwc3_qcom_enable_wakeup_irq(qcom->phy_irq[DM_HS_PHY_IRQ_INDEX][0], + dwc3_qcom_enable_wakeup_irq(qcom->phy_irq[DM_HS_PHY_IRQ_INDEX][i], IRQ_TYPE_EDGE_RISING); - } + } - dwc3_qcom_enable_wakeup_irq(qcom->phy_irq[SS_PHY_IRQ_INDEX][0], 0); + dwc3_qcom_enable_wakeup_irq(qcom->phy_irq[SS_PHY_IRQ_INDEX][i], 0); + } } static int dwc3_qcom_suspend(struct dwc3_qcom *qcom, bool wakeup) @@ -454,10 +461,8 @@ static int dwc3_qcom_suspend(struct dwc3_qcom *qcom, bool wakeup) * The role is stable during suspend as role switching is done from a * freezable workqueue. */ - if (dwc3_qcom_is_host(qcom) && wakeup) { - qcom->usb2_speed = dwc3_qcom_read_usb2_speed(qcom); + if (dwc3_qcom_is_host(qcom) && wakeup) dwc3_qcom_enable_interrupts(qcom); - } qcom->is_suspended = true; From patchwork Sat Oct 7 15:48:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krishna Kurapati X-Patchwork-Id: 149598 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:a888:0:b0:403:3b70:6f57 with SMTP id x8csp992301vqo; Sat, 7 Oct 2023 08:49:46 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEvZx1unvqfCLkbmlI/LCOpqbYx0ZmyOvFlSLxjop8DRCmZZVYVHtWuiHbqIBVVt9ezOygW X-Received: by 2002:a05:6e02:1ca6:b0:34c:bc10:2573 with SMTP id x6-20020a056e021ca600b0034cbc102573mr13127924ill.3.1696693785794; Sat, 07 Oct 2023 08:49:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1696693785; cv=none; d=google.com; s=arc-20160816; b=sisPm0hEXBlNl7jko32aDd84l979gOojVvddVrHL9LfoBp3+/UXgIHPx/xek+uqXKy uuIpUGXIn+1Ju93S7UDIEsqafkteuobZ+/KkPO66RiGzzLIYR8b5OKBkZc11tXWlonwU TfxZ0pCdQrOldEHwSdFaz3LpOMNN1hvR/RsPBqDInl17UUxrBo7mGgLjXY0xLSDWjII4 x1T8Ebsi9dA6dQ8f1DlhGD2frDIunPX43qGajF3AOEOXnxZWD3HjZOb73SgKazb27czA 65FpxEBrs4bQETNK6tp6gxHhqx3H36s/wIMuECU8DxNtUs+IBjz9fNG8oNJFPNIKrspo zc0A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=k1NDylHKSYeI5UYWFLGJ4cy2Wuo0jxcJAkPAngncU30=; fh=a++TWPJw3Cn9MYBczZLXAB+Eob7lKtyrQCXvx5EPkG8=; b=eRhDJU4zHhne+IgZ5PvJMxW9wBkmdqilJxsJUe4keC3z3TX0kkwf6UXP+JwMeFSTbe vZmxTUKb9ZtAQv3pRtZf+NbMfWDnqVOlYg7HOMYtbOgTMZ+BD77m0FnOUCjY9JMtmVTj K5q2R7mQ5Lp1JYB92h4MrzYqO0Kru1No8eYjsiJBM1Odohgq2zvdLaEbo4R9IMoMWeHe 0FuUf8UbwlyoPD6Y+ZgSboveAVBJzXgIBAsbaGHU5mvDQQL+YFl42l9/eJ+aLY9FddvQ 2WdUoWsROgAbJcNiOzJSAAalC7RBGKwZMgo38Lw7MM4LpZpOfUuAYKiyu+zMrSUwAJEZ tdSg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=Y88vhYm8; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:5 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from groat.vger.email (groat.vger.email. [2620:137:e000::3:5]) by mx.google.com with ESMTPS id bx16-20020a056a00429000b0069338b22c0csi3681733pfb.359.2023.10.07.08.49.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 07 Oct 2023 08:49:45 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:5 as permitted sender) client-ip=2620:137:e000::3:5; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=Y88vhYm8; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:5 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by groat.vger.email (Postfix) with ESMTP id 8B27D80B28A1; Sat, 7 Oct 2023 08:49:38 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at groat.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344017AbjJGPt0 (ORCPT + 17 others); Sat, 7 Oct 2023 11:49:26 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40850 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344053AbjJGPtY (ORCPT ); Sat, 7 Oct 2023 11:49:24 -0400 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C7950DF; Sat, 7 Oct 2023 08:49:22 -0700 (PDT) Received: from pps.filterd (m0279872.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 397FNpes016503; Sat, 7 Oct 2023 15:49:14 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=k1NDylHKSYeI5UYWFLGJ4cy2Wuo0jxcJAkPAngncU30=; b=Y88vhYm8L8sT4GZgtMHPj0b390RYdw28BmS7jaytKvqYV1R/OGkUuPoS5+rOFsexLa4S NXUSpYsFWjfzsvtpwhz+cZd/hfYlhZneqEeKhVAUD16TNwumxlcIEYAm22+0RN9lrz6d sdAw8OjDriwU3rAes5VBhS5fRjOgVJhW/eh6Km4q0jML8yhXt+lBaIi2fEzMYHhwvHT+ UU5uMtNBS68SbDWOFH6t32VL+dXpS8SmUDB1ZyZ9zUOKxKDhCRC8kywgGk8nY6dA/PER AT03kt5rkLTsimsPlcibWYtcUrqkVVxpoZhCvshKhIuP6iJqfCAtE2gJw1WIKfC+DGvC 1A== Received: from nalasppmta04.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3tjyqc8x78-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Sat, 07 Oct 2023 15:49:14 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 397FnDlG003220 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Sat, 7 Oct 2023 15:49:13 GMT Received: from hu-kriskura-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.36; Sat, 7 Oct 2023 08:49:07 -0700 From: Krishna Kurapati To: Thinh Nguyen , Greg Kroah-Hartman , Philipp Zabel , "Andy Gross" , Bjorn Andersson , "Konrad Dybcio" , Rob Herring , Krzysztof Kozlowski , Felipe Balbi , Wesley Cheng , Johan Hovold CC: , , , , , , , , , Krishna Kurapati Subject: [PATCH v13 07/10] usb: dwc3: qcom: Add multiport suspend/resume support for wrapper Date: Sat, 7 Oct 2023 21:18:03 +0530 Message-ID: <20231007154806.605-8-quic_kriskura@quicinc.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231007154806.605-1-quic_kriskura@quicinc.com> References: <20231007154806.605-1-quic_kriskura@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: RaxiRJJM0eIqYDaqgQSyQ3fvy4IzSN_H X-Proofpoint-ORIG-GUID: RaxiRJJM0eIqYDaqgQSyQ3fvy4IzSN_H X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-10-07_12,2023-10-06_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 spamscore=0 clxscore=1015 priorityscore=1501 mlxlogscore=886 phishscore=0 suspectscore=0 mlxscore=0 malwarescore=0 bulkscore=0 lowpriorityscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2309180000 definitions=main-2310070143 X-Spam-Status: No, score=2.7 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, RCVD_IN_SBL_CSS,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on groat.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (groat.vger.email [0.0.0.0]); Sat, 07 Oct 2023 08:49:38 -0700 (PDT) X-Spam-Level: ** X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779112383076371205 X-GMAIL-MSGID: 1779112383076371205 QCOM SoC SA8295P's tertiary quad port controller supports 2 HS+SS ports and 2 HS only ports. Add support for configuring PWR_EVENT_IRQ's for all the ports during suspend/resume. Signed-off-by: Krishna Kurapati --- drivers/usb/dwc3/dwc3-qcom.c | 35 ++++++++++++++++++++++++++++------- 1 file changed, 28 insertions(+), 7 deletions(-) diff --git a/drivers/usb/dwc3/dwc3-qcom.c b/drivers/usb/dwc3/dwc3-qcom.c index 651b9775a0c2..dbd4239e61c9 100644 --- a/drivers/usb/dwc3/dwc3-qcom.c +++ b/drivers/usb/dwc3/dwc3-qcom.c @@ -37,7 +37,11 @@ #define PIPE3_PHYSTATUS_SW BIT(3) #define PIPE_UTMI_CLK_DIS BIT(8) -#define PWR_EVNT_IRQ_STAT_REG 0x58 +#define PWR_EVNT_IRQ1_STAT_REG 0x58 +#define PWR_EVNT_IRQ2_STAT_REG 0x1dc +#define PWR_EVNT_IRQ3_STAT_REG 0x228 +#define PWR_EVNT_IRQ4_STAT_REG 0x238 + #define PWR_EVNT_LPM_IN_L2_MASK BIT(4) #define PWR_EVNT_LPM_OUT_L2_MASK BIT(5) @@ -107,6 +111,19 @@ struct dwc3_qcom { int num_ports; }; +/* + * Currently non-multiport controller have only one PWR_EVENT_IRQ register, + * but multiport controllers like SA8295 contain upto 4 of them. + */ +#define NUM_PWR_EVENT_STAT_REGS 4 + +static u32 pwr_evnt_irq_stat_reg_offset[NUM_PWR_EVENT_STAT_REGS] = { + PWR_EVNT_IRQ1_STAT_REG, + PWR_EVNT_IRQ2_STAT_REG, + PWR_EVNT_IRQ3_STAT_REG, + PWR_EVNT_IRQ4_STAT_REG, +}; + static inline void dwc3_qcom_setbits(void __iomem *base, u32 offset, u32 val) { u32 reg; @@ -446,9 +463,11 @@ static int dwc3_qcom_suspend(struct dwc3_qcom *qcom, bool wakeup) if (qcom->is_suspended) return 0; - val = readl(qcom->qscratch_base + PWR_EVNT_IRQ_STAT_REG); - if (!(val & PWR_EVNT_LPM_IN_L2_MASK)) - dev_err(qcom->dev, "HS-PHY not in L2\n"); + for (i = 0; i < qcom->num_ports; i++) { + val = readl(qcom->qscratch_base + pwr_evnt_irq_stat_reg_offset[i]); + if (!(val & PWR_EVNT_LPM_IN_L2_MASK)) + dev_err(qcom->dev, "HS-PHY not in L2\n"); + } for (i = qcom->num_clocks - 1; i >= 0; i--) clk_disable_unprepare(qcom->clks[i]); @@ -494,9 +513,11 @@ static int dwc3_qcom_resume(struct dwc3_qcom *qcom, bool wakeup) dev_warn(qcom->dev, "failed to enable interconnect: %d\n", ret); /* Clear existing events from PHY related to L2 in/out */ - dwc3_qcom_setbits(qcom->qscratch_base, PWR_EVNT_IRQ_STAT_REG, - PWR_EVNT_LPM_IN_L2_MASK | PWR_EVNT_LPM_OUT_L2_MASK); - + for (i = 0; i < qcom->num_ports; i++) { + dwc3_qcom_setbits(qcom->qscratch_base, + pwr_evnt_irq_stat_reg_offset[i], + PWR_EVNT_LPM_IN_L2_MASK | PWR_EVNT_LPM_OUT_L2_MASK); + } qcom->is_suspended = false; return 0; From patchwork Sat Oct 7 15:48:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krishna Kurapati X-Patchwork-Id: 149601 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:a888:0:b0:403:3b70:6f57 with SMTP id x8csp992435vqo; Sat, 7 Oct 2023 08:50:09 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHamC3SzVITY1EC+QVfu6QzsGuhudFHJ2qkypUANVnUGpSkUk4n3L7yCzH9owQYxezViWH6 X-Received: by 2002:a92:c503:0:b0:352:a1ed:133a with SMTP id r3-20020a92c503000000b00352a1ed133amr11246242ilg.13.1696693809597; Sat, 07 Oct 2023 08:50:09 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1696693809; cv=none; d=google.com; s=arc-20160816; b=hji5SVARbshuAhFaWy5CJjey4D0r3/UCsGOPnW9ByyWpu8jahJT8wB1rIz+ok8F9ae 2TP0neC8Z9oWSIhu9qlFlOm2BjvLvJ9pD1Mvq/fjMjV2h1+eniqNEIc7SbXJi96nCSlN GIzHtr99BGhO6zu5sFKMT3qUkZrUldmm/8tFh9w/6e7i7Es0U+sWwv5FF3SbWtqpI/5k SEnElHsUogoOCPCQJFP2ivVTDrBZAl5tvpqNRVkrx9ByTJkSZewnuqZh8tL3bfjKWzOt wCUGiyyjdjFEBE0zjILVr8MBvJLsB938WCQpTryCviBNG4ZGiwTv8rlwNRQs2lIHDsjo PMFA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Vm6/beh37pkkn0zP3p4q9CGviZ7kq24pbbDiJJCKqj0=; fh=a++TWPJw3Cn9MYBczZLXAB+Eob7lKtyrQCXvx5EPkG8=; b=tOG8C1/4fQ+5TZbR6Om/YF7ovggJ9IVM0zVOEGAWlAdX6/a2oS5iPsKD7tFwH5pDOC SCz3m3Wnk/hBITqG5mywvTdpS7uf4bqTVV/jgXtv2CCR54vWRAhBWyzfKg7ukA/HK3cK b0e0tlF1nfjAt2bqa5Oq/R77qRUmipQ79wcSCVNkevzMsVTFJro/CFGVwazAaZ5IJn7K 4VXASVQRS/c4a36dmuHcr7lf6D2KVS7ujoX1lAy3i+wDURytuSMme1G2zU2AVRR2srN7 T2qr0MWNTlDpeZAM+NNQUIZh4ksad/ba0/hy1HYzJBcr+4pqgtMN7YF0gU0V+7LXM2P3 c7TA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=BtIO1q1A; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from snail.vger.email (snail.vger.email. [2620:137:e000::3:7]) by mx.google.com with ESMTPS id m1-20020a17090ade0100b0026b51ae4574si8221581pjv.36.2023.10.07.08.50.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 07 Oct 2023 08:50:09 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) client-ip=2620:137:e000::3:7; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=BtIO1q1A; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by snail.vger.email (Postfix) with ESMTP id E658A804597D; Sat, 7 Oct 2023 08:50:08 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at snail.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344060AbjJGPuB (ORCPT + 17 others); Sat, 7 Oct 2023 11:50:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36694 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344089AbjJGPtx (ORCPT ); Sat, 7 Oct 2023 11:49:53 -0400 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ACAE1F2; Sat, 7 Oct 2023 08:49:44 -0700 (PDT) Received: from pps.filterd (m0279872.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 397FmTXs025327; Sat, 7 Oct 2023 15:49:20 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=Vm6/beh37pkkn0zP3p4q9CGviZ7kq24pbbDiJJCKqj0=; b=BtIO1q1AzbsOlq3rXKEKiMX+BL6pmohqM7z5PLurBUkcnkZHSmWlOC5VqBeKLJ+EPTDz pKiwQrj1M1S50PN0IpnoZorXo+8IkYRAFh8OQdJTiaW9aT1KurpHFkO+Jqk2qupwmKSA SZS9c597tpGEQsLOHOBillQ3Dyr21GuwHnqbIeTBU3K5QuQF87PY/I7g9ev5/af4/KMJ 3hgKgBSYUuNautB/t5pHnf/tCgfU46v3tSl8WCznwqTMZWW3tCf4Fhe64Yx+CMbIHJ7B y6y+8ZrP2VYwRIgKLg3clIRucGV7Dcx1O5NEcbEDk+2vTLoWy270TwjEsY1+HcLgJFnW lA== Received: from nalasppmta01.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3tjyqc8x7c-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Sat, 07 Oct 2023 15:49:20 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 397FnJpI032597 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Sat, 7 Oct 2023 15:49:19 GMT Received: from hu-kriskura-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.36; Sat, 7 Oct 2023 08:49:13 -0700 From: Krishna Kurapati To: Thinh Nguyen , Greg Kroah-Hartman , Philipp Zabel , "Andy Gross" , Bjorn Andersson , "Konrad Dybcio" , Rob Herring , Krzysztof Kozlowski , Felipe Balbi , Wesley Cheng , Johan Hovold CC: , , , , , , , , , Krishna Kurapati Subject: [PATCH v13 08/10] arm64: dts: qcom: sc8280xp: Add multiport controller node for SC8280 Date: Sat, 7 Oct 2023 21:18:04 +0530 Message-ID: <20231007154806.605-9-quic_kriskura@quicinc.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231007154806.605-1-quic_kriskura@quicinc.com> References: <20231007154806.605-1-quic_kriskura@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: K47z6aZMOq293ea1bkeYDsnU5d6G_5z7 X-Proofpoint-ORIG-GUID: K47z6aZMOq293ea1bkeYDsnU5d6G_5z7 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-10-07_12,2023-10-06_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 spamscore=0 clxscore=1015 priorityscore=1501 mlxlogscore=999 phishscore=0 suspectscore=0 mlxscore=0 malwarescore=0 bulkscore=0 lowpriorityscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2309180000 definitions=main-2310070143 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Sat, 07 Oct 2023 08:50:08 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779112407880432790 X-GMAIL-MSGID: 1779112407880432790 Add USB and DWC3 node for tertiary port of SC8280 along with multiport IRQ's and phy's. This will be used as a base for SA8295P and SA8295-Ride platforms. Signed-off-by: Krishna Kurapati --- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 84 ++++++++++++++++++++++++++ 1 file changed, 84 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index cad59af7ccef..5f64f75b07db 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -3330,6 +3330,90 @@ system-cache-controller@9200000 { interrupts = ; }; + usb_2: usb@a4f8800 { + compatible = "qcom,sc8280xp-dwc3-mp", "qcom,dwc3"; + reg = <0 0x0a4f8800 0 0x400>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + clocks = <&gcc GCC_CFG_NOC_USB3_MP_AXI_CLK>, + <&gcc GCC_USB30_MP_MASTER_CLK>, + <&gcc GCC_AGGRE_USB3_MP_AXI_CLK>, + <&gcc GCC_USB30_MP_SLEEP_CLK>, + <&gcc GCC_USB30_MP_MOCK_UTMI_CLK>, + <&gcc GCC_AGGRE_USB_NOC_AXI_CLK>, + <&gcc GCC_AGGRE_USB_NOC_NORTH_AXI_CLK>, + <&gcc GCC_AGGRE_USB_NOC_SOUTH_AXI_CLK>, + <&gcc GCC_SYS_NOC_USB_AXI_CLK>; + clock-names = "cfg_noc", "core", "iface", "sleep", "mock_utmi", + "noc_aggr", "noc_aggr_north", "noc_aggr_south", "noc_sys"; + + assigned-clocks = <&gcc GCC_USB30_MP_MOCK_UTMI_CLK>, + <&gcc GCC_USB30_MP_MASTER_CLK>; + assigned-clock-rates = <19200000>, <200000000>; + + interrupts-extended = <&pdc 127 IRQ_TYPE_EDGE_RISING>, + <&pdc 126 IRQ_TYPE_EDGE_RISING>, + <&pdc 129 IRQ_TYPE_EDGE_RISING>, + <&pdc 128 IRQ_TYPE_EDGE_RISING>, + <&pdc 131 IRQ_TYPE_EDGE_RISING>, + <&pdc 130 IRQ_TYPE_EDGE_RISING>, + <&pdc 133 IRQ_TYPE_EDGE_RISING>, + <&pdc 132 IRQ_TYPE_EDGE_RISING>, + <&pdc 16 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 17 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 857 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 856 IRQ_TYPE_LEVEL_HIGH>; + + interrupt-names = "dp_hs_phy_1", "dm_hs_phy_1", + "dp_hs_phy_2", "dm_hs_phy_2", + "dp_hs_phy_3", "dm_hs_phy_3", + "dp_hs_phy_4", "dm_hs_phy_4", + "ss_phy_1", "ss_phy_2", + "pwr_event_1", + "pwr_event_2", + "pwr_event_3", + "pwr_event_4"; + + power-domains = <&gcc USB30_MP_GDSC>; + required-opps = <&rpmhpd_opp_nom>; + + resets = <&gcc GCC_USB30_MP_BCR>; + + interconnects = <&aggre1_noc MASTER_USB3_MP 0 &mc_virt SLAVE_EBI1 0>, + <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3_MP 0>; + interconnect-names = "usb-ddr", "apps-usb"; + + wakeup-source; + + status = "disabled"; + + usb_2_dwc3: usb@a400000 { + compatible = "snps,dwc3"; + reg = <0 0x0a400000 0 0xcd00>; + interrupts = ; + iommus = <&apps_smmu 0x800 0x0>; + phys = <&usb_2_hsphy0>, <&usb_2_qmpphy0>, + <&usb_2_hsphy1>, <&usb_2_qmpphy1>, + <&usb_2_hsphy2>, + <&usb_2_hsphy3>; + phy-names = "usb2-port0", "usb3-port0", + "usb2-port1", "usb3-port1", + "usb2-port2", + "usb2-port3"; + + /* + * Multiport controllers are host only contollers, so + * the dr_mode can be defaulted to host irrespective of + * the platform. + */ + dr_mode = "host"; + }; + }; + usb_0: usb@a6f8800 { compatible = "qcom,sc8280xp-dwc3", "qcom,dwc3"; reg = <0 0x0a6f8800 0 0x400>; From patchwork Sat Oct 7 15:48:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krishna Kurapati X-Patchwork-Id: 149602 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:a888:0:b0:403:3b70:6f57 with SMTP id x8csp992469vqo; Sat, 7 Oct 2023 08:50:14 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHhKVuB6QSS8vl50SGFZ0Ig8D/1kbF+xJ1+ZCsSSSRGdASU2xsWLOO4BcAlG/HhAHOni9+j X-Received: by 2002:a17:903:2788:b0:1bf:8779:e03f with SMTP id jw8-20020a170903278800b001bf8779e03fmr9737715plb.68.1696693814619; Sat, 07 Oct 2023 08:50:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1696693814; cv=none; d=google.com; s=arc-20160816; b=RQlPVOntMv1plUv8f//o37x4UmlHVKek7uBC9p1hhRXpC3PEpWV4LVp4jIrylUfZOV rjmyeArGZg7IXtjk9c+kjNbdpwF56HQWdAAvNZuZ28MMwRd83ohp+A4zm8IPfw0TxqCq aVGmcc72RU0YA70T3TBHyuNgSQizaVi8raalI4RZzXfHSSDEMubJkxqc31qVEl2qzLUB xsphDebRqvXg979WMecD4BCffLi1ACHw5qSlPZMf6x0Mgp3Hmqgs1kShZ4P6X1VKinLe Nth+wEuC1N3DoXjgdbTH77ey4qvKM/y83Ovqb+cbVc/l2qPkVK/RIZLO8+uIveR69Ac2 9M1Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Fuzy6d/WfK7x+W50JKdXmqqx1uQn1cfz6acDKkP/xcA=; fh=a++TWPJw3Cn9MYBczZLXAB+Eob7lKtyrQCXvx5EPkG8=; b=dQEpUQ2rdBIxrHKJhRfKQkiMRx9JRD6h3DHAq+l6RWARpAoaW693pau7xQVtiMp7Ko +6cWLXFqKxW9rpnmukGH8+DePcu2W7yqU9f650I/NyBPrA3Kn9FQ+S6g1Kwq68XRybue YjSByhvXyRj/ZyIoS8PPVq+h9n9ljtbOUk/ORgY4GdJFWqdhBbdDccybjzavkJLr8P69 CQbeDvcWoZbxenrFG4sDyF4nOukctf/zbXIhgIw3GQ3sfEJ170Z6YG8Iv8GHpsxnMA5C sWN14fV6qEOM6/3cXqfsrcTDhSQzw5ahWVNJL8F2A8BNn2Ud80vU0+Cfee3IeSHY1jvD m1Hg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b="Ga/FaP9e"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.32 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from agentk.vger.email (agentk.vger.email. [23.128.96.32]) by mx.google.com with ESMTPS id c14-20020a170903234e00b001c60ec1e662si6424598plh.29.2023.10.07.08.50.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 07 Oct 2023 08:50:14 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.32 as permitted sender) client-ip=23.128.96.32; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b="Ga/FaP9e"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.32 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by agentk.vger.email (Postfix) with ESMTP id BFECB803D8D3; Sat, 7 Oct 2023 08:50:12 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at agentk.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344073AbjJGPtr (ORCPT + 17 others); Sat, 7 Oct 2023 11:49:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51202 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344083AbjJGPtk (ORCPT ); Sat, 7 Oct 2023 11:49:40 -0400 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4F7D4F4; Sat, 7 Oct 2023 08:49:37 -0700 (PDT) Received: from pps.filterd (m0279871.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 397FlgSH011667; Sat, 7 Oct 2023 15:49:26 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=Fuzy6d/WfK7x+W50JKdXmqqx1uQn1cfz6acDKkP/xcA=; b=Ga/FaP9efVNcbirFuW/Zyy1/cy7dEA6X2e9KIijhxMoBKJEA1c80vcOLBpfGiz4Qaa9g Jg4EK4Rs6DfsyS8EDbjD0zFTo34zsTFGgL5T11vo3/82CnFhuy2NoYZb7OJd0+a7vr8Q ZVgzkIJM8jqAa2JcXNtYxoBbmSB8aS5Mgw9xNxD3SKyFsNWxw2IO6c/Y4K/t2MDF8skc ekug7ykqVHVw6ROFmo1LhaztZW+r2t6UW6Vss/SLreeaxe5NbHWhi4a7JITYJRtOTHWz EhJxxwMi2mIOhCtZvPg80FicH459p9uB3q+OkLwHFnUSvhe2BO5y7NBLXqB6BLsbtWu7 xw== Received: from nalasppmta01.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3tjxx88yg1-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Sat, 07 Oct 2023 15:49:26 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 397FnP6J000581 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Sat, 7 Oct 2023 15:49:25 GMT Received: from hu-kriskura-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.36; Sat, 7 Oct 2023 08:49:19 -0700 From: Krishna Kurapati To: Thinh Nguyen , Greg Kroah-Hartman , Philipp Zabel , "Andy Gross" , Bjorn Andersson , "Konrad Dybcio" , Rob Herring , Krzysztof Kozlowski , Felipe Balbi , Wesley Cheng , Johan Hovold CC: , , , , , , , , , Krishna Kurapati Subject: [PATCH v13 09/10] arm64: dts: qcom: sa8295p: Enable tertiary controller and its 4 USB ports Date: Sat, 7 Oct 2023 21:18:05 +0530 Message-ID: <20231007154806.605-10-quic_kriskura@quicinc.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231007154806.605-1-quic_kriskura@quicinc.com> References: <20231007154806.605-1-quic_kriskura@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: Z0l39h7P2STZosw3fUvru2SxFFTewxYQ X-Proofpoint-ORIG-GUID: Z0l39h7P2STZosw3fUvru2SxFFTewxYQ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-10-07_12,2023-10-06_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 bulkscore=0 impostorscore=0 suspectscore=0 phishscore=0 priorityscore=1501 mlxscore=0 spamscore=0 mlxlogscore=798 adultscore=0 lowpriorityscore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2309180000 definitions=main-2310070143 X-Spam-Status: No, score=2.7 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, RCVD_IN_SBL_CSS,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on agentk.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (agentk.vger.email [0.0.0.0]); Sat, 07 Oct 2023 08:50:12 -0700 (PDT) X-Spam-Level: ** X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779112413005713262 X-GMAIL-MSGID: 1779112413005713262 Enable tertiary controller for SA8295P (based on SC8280XP). Add pinctrl support for usb ports to provide VBUS to connected peripherals. Signed-off-by: Krishna Kurapati Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sa8295p-adp.dts | 49 ++++++++++++++++++++++++ 1 file changed, 49 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts index fd253942e5e5..271000163823 100644 --- a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts +++ b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts @@ -9,6 +9,7 @@ #include #include #include +#include #include "sa8540p.dtsi" #include "sa8540p-pmics.dtsi" @@ -584,6 +585,16 @@ &usb_1_qmpphy { status = "okay"; }; +&usb_2 { + pinctrl-0 = <&usb2_en_state>, + <&usb3_en_state>, + <&usb4_en_state>, + <&usb5_en_state>; + pinctrl-names = "default"; + + status = "okay"; +}; + &usb_2_hsphy0 { vdda-pll-supply = <&vreg_l5a>; vdda18-supply = <&vreg_l7g>; @@ -729,3 +740,41 @@ wake-n-pins { }; }; }; + +&pmm8540c_gpios { + usb2_en_state: usb2-en-state { + pins = "gpio9"; + function = "normal"; + qcom,drive-strength = ; + output-high; + power-source = <0>; + }; +}; + +&pmm8540e_gpios { + usb3_en_state: usb3-en-state { + pins = "gpio5"; + function = "normal"; + qcom,drive-strength = ; + output-high; + power-source = <0>; + }; +}; + +&pmm8540g_gpios { + usb4_en_state: usb4-en-state { + pins = "gpio5"; + function = "normal"; + qcom,drive-strength = ; + output-high; + power-source = <0>; + }; + + usb5_en_state: usb5-en-state { + pins = "gpio9"; + function = "normal"; + qcom,drive-strength = ; + output-high; + power-source = <0>; + }; +}; From patchwork Sat Oct 7 15:48:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krishna Kurapati X-Patchwork-Id: 149605 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:a888:0:b0:403:3b70:6f57 with SMTP id x8csp992540vqo; Sat, 7 Oct 2023 08:50:32 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHfKa5k//wKK83lmTCig/XMKoc1PUapTrCP9cbZiwMABYEgDsFGrw3aoRwxIgOdZg4c+HuK X-Received: by 2002:a17:902:7d92:b0:1c3:2ee6:3802 with SMTP id a18-20020a1709027d9200b001c32ee63802mr9054823plm.47.1696693831765; Sat, 07 Oct 2023 08:50:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1696693831; cv=none; d=google.com; s=arc-20160816; b=nf8jlx4Fxe3NbxCCIfjr0mgQ4XhmRyomnbJjoQDdWtjAgtFiA1C/U8b0YecGZaJvl4 YVBuXI08VJwQ1W6qbbeOT7IfZwLeuQgAJo07zzo6uAGf7I09vPS+lGjY/RBguJo09rc2 7Zqncy2WZ7iRo+YZ0HXC/HI9vIPlgNuwlORILnon7hq4KlrBJZ8sPEYHoyc/h9kDfRQG swqa8CUHzBNKIppgihcGrlocKkdKyQXkLv6aVe2NOBPZBrnZtKMqNSC5GV416g7U0uTq 597CoHqC0WdIB1rPOgjJxCpVqNltIe/YQNi9oJaOZbD0CQPaYluDm48kKRpUke5TG7Ke LsGg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=ru5jfmYWa9vHMjM+QOrIHJoVV6lz6+EGc5Ri10pd6sk=; fh=a++TWPJw3Cn9MYBczZLXAB+Eob7lKtyrQCXvx5EPkG8=; b=HtYO2UzrrYWnMpqgToBoDxD581HbyyKJON9sXtuKZdqTd0xtiy5QoBw40t/VCRTYOB 61W87B5sFgBiThKCXhzxX7WNHVZSuXPnca+ADW7a7rxcNWlIzw4QmMuxx3nzE6BzM72U TOmE+Tq34sg0Fm96oYsLSiLkh5mcvfAy+dvBi20L45gl1Y1q/AZS4ehYlaycLa7KmLUQ DjzUfIBJK0/fLs44D5VmZliiovo3r/ZvuyrHEoMpLyjsxry2X6ECMSFCDPPbVMcsLlpA TFliIeA2oQsg4C0YmkpuKNKGQDMaw7+W2Ft31SI3I8NYgj0W5fY26OFAK6fmxHDMRr0O tI8A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=WfO49cTe; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.32 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from agentk.vger.email (agentk.vger.email. [23.128.96.32]) by mx.google.com with ESMTPS id kv7-20020a17090328c700b001b8c4168e20si5909024plb.58.2023.10.07.08.50.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 07 Oct 2023 08:50:31 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.32 as permitted sender) client-ip=23.128.96.32; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=WfO49cTe; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.32 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by agentk.vger.email (Postfix) with ESMTP id D9C31803D8D9; Sat, 7 Oct 2023 08:50:29 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at agentk.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344115AbjJGPuE (ORCPT + 17 others); Sat, 7 Oct 2023 11:50:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36668 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344097AbjJGPtx (ORCPT ); Sat, 7 Oct 2023 11:49:53 -0400 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A7BCBCA; Sat, 7 Oct 2023 08:49:45 -0700 (PDT) Received: from pps.filterd (m0279871.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 397FlgSI011667; Sat, 7 Oct 2023 15:49:32 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=ru5jfmYWa9vHMjM+QOrIHJoVV6lz6+EGc5Ri10pd6sk=; b=WfO49cTeXsnXpnFBqKtpS+/IXpqbmLfzTrPvWn+F0EaR7OHarOWGbx8XAeiajlNw4Z++ 00CKyr2tcBOnp6SPPSonkPPs63gO9QVKzihVotjf1gwQ9dqmgaWb4NrWSINgHmBkplZ0 3WISK0sKCecrfLZMT4zP62pQA7/u+aVlMrqxqcnVAHDCPJrLEKY82aBccO9fvk0+hZTq xIDFl4oSPdtVqZ4N8UEJwpWQ4BM9rUWQqBMva0KuNC3Syo/K/8a2yvQzwPrAqQpBQYPf 401nLcjezcxldtgLhBVt3vxMkCd/Zdl492MaxtBs+rGH/9klpy/XA5PRkvxTYR2j1qG5 eA== Received: from nalasppmta03.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3tjxx88yg5-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Sat, 07 Oct 2023 15:49:32 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 397FnV2I029276 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Sat, 7 Oct 2023 15:49:31 GMT Received: from hu-kriskura-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.36; Sat, 7 Oct 2023 08:49:25 -0700 From: Krishna Kurapati To: Thinh Nguyen , Greg Kroah-Hartman , Philipp Zabel , "Andy Gross" , Bjorn Andersson , "Konrad Dybcio" , Rob Herring , Krzysztof Kozlowski , Felipe Balbi , Wesley Cheng , Johan Hovold CC: , , , , , , , , , Krishna Kurapati Subject: [PATCH v13 10/10] arm64: dts: qcom: sa8540-ride: Enable first port of tertiary usb controller Date: Sat, 7 Oct 2023 21:18:06 +0530 Message-ID: <20231007154806.605-11-quic_kriskura@quicinc.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231007154806.605-1-quic_kriskura@quicinc.com> References: <20231007154806.605-1-quic_kriskura@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: y-X6bI1sFiL9Y0vzY8sS68XNeUgKB9Sp X-Proofpoint-ORIG-GUID: y-X6bI1sFiL9Y0vzY8sS68XNeUgKB9Sp X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-10-07_12,2023-10-06_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 bulkscore=0 impostorscore=0 suspectscore=0 phishscore=0 priorityscore=1501 mlxscore=0 spamscore=0 mlxlogscore=925 adultscore=0 lowpriorityscore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2309180000 definitions=main-2310070143 X-Spam-Status: No, score=2.7 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, RCVD_IN_SBL_CSS,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on agentk.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (agentk.vger.email [0.0.0.0]); Sat, 07 Oct 2023 08:50:29 -0700 (PDT) X-Spam-Level: ** X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779112431419830456 X-GMAIL-MSGID: 1779112431419830456 From: Andrew Halaney There is now support for the multiport USB controller this uses so enable it. The board only has a single port hooked up (despite it being wired up to the multiport IP on the SoC). There's also a USB 2.0 mux hooked up, which by default on boot is selected to mux properly. Grab the gpio controlling that and ensure it stays in the right position so USB 2.0 continues to be routed from the external port to the SoC. Co-developed-by: Andrew Halaney Signed-off-by: Andrew Halaney [Krishna: Rebased on top of usb-next] Co-developed-by: Krishna Kurapati Signed-off-by: Krishna Kurapati Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sa8540p-ride.dts | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts index b04f72ec097c..6904a4c201ff 100644 --- a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts +++ b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts @@ -503,6 +503,18 @@ &usb_2_qmpphy0 { status = "okay"; }; +&usb_2 { + pinctrl-0 = <&usb2_en_state>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&usb_2_dwc3 { + phy-names = "usb2-port0", "usb3-port0"; + phys = <&usb_2_hsphy0>, <&usb_2_qmpphy0>; +}; + &xo_board_clk { clock-frequency = <38400000>; }; @@ -655,4 +667,13 @@ wake-pins { bias-pull-up; }; }; + + usb2_en_state: usb2-en-state { + /* TS3USB221A USB2.0 mux select */ + pins = "gpio24"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + output-low; + }; };