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[8.43.85.97]) by mx.google.com with ESMTPS id j14-20020a05640211ce00b0043f8f566b38si5066519edw.2.2022.08.24.01.05.53 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Aug 2022 01:06:08 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=ZcODCGMD; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gnu.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 004E9385703C for ; Wed, 24 Aug 2022 08:05:37 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 004E9385703C DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1661328337; bh=ROSiw1vUmRVffE2jvzfexqwa286nGUvgj4HeahDzVIw=; h=Date:To:Subject:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:Cc:From; b=ZcODCGMDrxGDil5gRhetVOpOr0c03vy96EzAsiHOoc08Cq7yXjM3Yg7xi2ToZLlkx aIEH5l20yF64P8YCc/SwxyM22i2pIH3l2AaER8ePcn1ZaBXq+BDXUSMyVbeenSGZZu p/P0RUNCrwKWw00KgvS3XMkHexbIvRtsPOlx+wUc= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by sourceware.org (Postfix) with ESMTPS id D89C7385703A for ; Wed, 24 Aug 2022 08:04:52 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org D89C7385703A Received: from mimecast-mx02.redhat.com (mimecast-mx02.redhat.com [66.187.233.88]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id us-mta-613-eRJmPqc6PaO7kli4Nl-agg-1; Wed, 24 Aug 2022 04:04:48 -0400 X-MC-Unique: eRJmPqc6PaO7kli4Nl-agg-1 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.rdu2.redhat.com [10.11.54.1]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 366F08041BE; Wed, 24 Aug 2022 08:04:48 +0000 (UTC) Received: from tucnak.zalov.cz (unknown [10.39.192.41]) by smtp.corp.redhat.com (Postfix) with ESMTPS id E7D05404C6ED; Wed, 24 Aug 2022 08:04:46 +0000 (UTC) Received: from tucnak.zalov.cz (localhost [127.0.0.1]) by tucnak.zalov.cz (8.17.1/8.17.1) with ESMTPS id 27O84iUt2513362 (version=TLSv1.3 cipher=TLS_AES_256_GCM_SHA384 bits=256 verify=NOT); Wed, 24 Aug 2022 10:04:44 +0200 Received: (from jakub@localhost) by tucnak.zalov.cz (8.17.1/8.17.1/Submit) id 27O84hcB2513361; Wed, 24 Aug 2022 10:04:43 +0200 Date: Wed, 24 Aug 2022 10:04:43 +0200 To: Hongtao Liu Subject: [committed] i386: Fix up mode iterators that weren't expanded [PR106721] Message-ID: MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.11.54.1 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Disposition: inline X-Spam-Status: No, score=-4.0 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, KAM_SHORT, RCVD_IN_DNSWL_LOW, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Jakub Jelinek via Gcc-patches From: Jakub Jelinek Reply-To: Jakub Jelinek Cc: gcc-patches@gcc.gnu.org Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1742029055133648346?= X-GMAIL-MSGID: =?utf-8?q?1742029055133648346?= Hi! Currently, when md file reader sees and something is valid mode (or code) attribute but which doesn't include case for the current mode (or code), it just keeps the untouched. I went through all cases matching <[a-zA-Z] in tmp-mddump.md after make mddump. Most of the cases were related to the recent V*BF mode additions, some to V*HF mode too, and there was one typo. Bootstrapped/regtested on x86_64-linux and i686-linux, preapproved in bugzilla with the request to use i instead of f for V*[BH]F (similarly to V*HI mode). 2022-08-24 Jakub Jelinek PR target/106721 * config/i386/sse.md (shuffletype): Add V32BF, V16BF and V8BF entries. Change V32HF, V16HF and V8HF entries from "f" to "i". (iptr): Add V32BF, V16BF, V8BF and BF entries. (i128vldq): Add V16HF and V16BF entries. (avx512er_vmrcp28): Fix typo, mask_opernad3 -> mask_operand3. * gcc.target/i386/avx512vl-pr106721.c: New test. Jakub --- gcc/config/i386/sse.md.jj 2022-08-19 16:00:05.042390249 +0200 +++ gcc/config/i386/sse.md 2022-08-24 09:40:50.159956792 +0200 @@ -747,7 +747,8 @@ (V8HI "avx512vl") (V16HI "avx512vl") (V32HI "avx512bw")]) (define_mode_attr shuffletype - [(V32HF "f") (V16HF "f") (V8HF "f") + [(V32HF "i") (V16HF "i") (V8HF "i") + (V32BF "i") (V16BF "i") (V8BF "i") (V16SF "f") (V16SI "i") (V8DF "f") (V8DI "i") (V8SF "f") (V8SI "i") (V4DF "f") (V4DI "i") (V4SF "f") (V4SI "i") (V2DF "f") (V2DI "i") @@ -1136,10 +1137,10 @@ [(V64QI "b") (V32HI "w") (V16SI "k") (V8DI "q") (V32QI "b") (V16HI "w") (V8SI "k") (V4DI "q") (V16QI "b") (V8HI "w") (V4SI "k") (V2DI "q") - (V32HF "w") (V16SF "k") (V8DF "q") - (V16HF "w") (V8SF "k") (V4DF "q") - (V8HF "w") (V4SF "k") (V2DF "q") - (HF "w") (SF "k") (DF "q")]) + (V32HF "w") (V32BF "w") (V16SF "k") (V8DF "q") + (V16HF "w") (V16BF "w") (V8SF "k") (V4DF "q") + (V8HF "w") (V8BF "w") (V4SF "k") (V2DF "q") + (HF "w") (BF "w") (SF "k") (DF "q")]) ;; Mapping of vector modes to VPTERNLOG suffix (define_mode_attr ternlogsuffix @@ -1251,7 +1252,7 @@ ;; For 256-bit modes for TARGET_AVX512VL && TARGET_AVX512DQ ;; i32x4, f32x4, i64x2 or f64x2 suffixes. (define_mode_attr i128vldq - [(V8SF "f32x4") (V4DF "f64x2") + [(V16HF "i32x4") (V16BF "i32x4") (V8SF "f32x4") (V4DF "f64x2") (V32QI "i32x4") (V16HI "i32x4") (V8SI "i32x4") (V4DI "i64x2")]) ;; Mix-n-match @@ -23897,7 +23898,7 @@ (match_operand:VF_128 2 "register_operand" "v") (const_int 1)))] "TARGET_AVX512ER" - "vrcp28\t{%1, %2, %0|%0, %2, %1}" + "vrcp28\t{%1, %2, %0|%0, %2, %1}" [(set_attr "length_immediate" "1") (set_attr "prefix" "evex") (set_attr "type" "sse") --- gcc/testsuite/gcc.target/i386/avx512vl-pr106721.c.jj 2022-08-23 13:31:57.590639970 +0200 +++ gcc/testsuite/gcc.target/i386/avx512vl-pr106721.c 2022-08-23 13:31:31.271994165 +0200 @@ -0,0 +1,19 @@ +/* PR target/106721 */ +/* { dg-do assemble { target avx512vl } } */ +/* { dg-options "-O3 -mavx512vl" } */ + +typedef __bf16 __m256bf16 __attribute__((__vector_size__(32))); +void (*bar) (__m256bf16, __m256bf16, __m256bf16); +__m256bf16 a; +volatile __bf16 b, c, d, e, f, g, h; + +void +foo (void) +{ + __m256bf16 x[8]; + int i; + for (i = 0; i < 8; i++) + x[i] = (__m256bf16) { b, c, d, e, f, g, h }; + a = x[6]; + bar (x[0], x[6], x[7]); +}