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[2620:137:e000::1:20]) by mx.google.com with ESMTP id hd15-20020a170907968f00b00783a5f78700si869613ejc.226.2022.11.04.18.36.47; Fri, 04 Nov 2022 18:37:11 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@bewilderbeest.net header.s=thorn header.b=CGBMyJP9; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=bewilderbeest.net Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229495AbiKEBdc (ORCPT + 99 others); Fri, 4 Nov 2022 21:33:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60172 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229626AbiKEBda (ORCPT ); Fri, 4 Nov 2022 21:33:30 -0400 Received: from thorn.bewilderbeest.net (thorn.bewilderbeest.net [IPv6:2605:2700:0:5::4713:9cab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3C6E4BC29; Fri, 4 Nov 2022 18:33:29 -0700 (PDT) Received: from hatter.bewilderbeest.net (97-113-250-99.tukw.qwest.net [97.113.250.99]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: zev) by thorn.bewilderbeest.net (Postfix) with ESMTPSA id EBDE491A; Fri, 4 Nov 2022 18:33:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bewilderbeest.net; s=thorn; t=1667612009; bh=havEPQ5Zc7FUigJMnjIkknNS7EN8eM/Wdjj1wV/opao=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=CGBMyJP9v0UTGEWC6qTVqeU1LgFCjmouzNrHdBYlgpcVCkbKiPRdtTVQTVkbJHMy5 kjOrik6cieDTnTheOMWYQ6tDDTnVDnZP2fXTUoQjmFAgn2ZY4RvTim1JaBNYwVKoj1 XmS1QEOt2YpdzsFhD2AKg2p/QHpmgiuWO1MkCtrs= From: Zev Weiss To: linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, soc@kernel.org Cc: Zev Weiss , Andrew Jeffery , Arnd Bergmann , Joel Stanley , Krzysztof Kozlowski , Olof Johansson , Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org Subject: [PATCH 1/2] dt-bindings: arm: aspeed: document Delta AHE-50DC BMC Date: Fri, 4 Nov 2022 18:33:20 -0700 Message-Id: <20221105013321.2719-2-zev@bewilderbeest.net> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221105013321.2719-1-zev@bewilderbeest.net> References: <20221105013321.2719-1-zev@bewilderbeest.net> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748618162987033658?= X-GMAIL-MSGID: =?utf-8?q?1748618162987033658?= Document Delta AHE-50DC BMC board compatible. Signed-off-by: Zev Weiss Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml b/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml index 217a1d674863..272626937ecd 100644 --- a/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml +++ b/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml @@ -17,6 +17,7 @@ properties: - description: AST2400 based boards items: - enum: + - delta,ahe50dc-bmc - facebook,galaxy100-bmc - facebook,wedge100-bmc - facebook,wedge40-bmc From patchwork Sat Nov 5 01:33:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zev Weiss X-Patchwork-Id: 15869 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp746218wru; Fri, 4 Nov 2022 18:36:35 -0700 (PDT) X-Google-Smtp-Source: AMsMyM46d3jCNR4cjESM+odsJojrpkyX5ykwLjJRFK7+OC/Ovr/SZu14emwGnLR6SJiLxl9jcCsI X-Received: by 2002:a05:6402:2202:b0:461:8143:1177 with SMTP id cq2-20020a056402220200b0046181431177mr38557985edb.210.1667612195173; Fri, 04 Nov 2022 18:36:35 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1667612195; cv=none; d=google.com; s=arc-20160816; b=RjwU8iqi+avI7AF2dHohAZYUICO9ZgJ9Qto48TdfE1tQN097yeOJ/s8dbG6VzUMin0 Q23YgzahhTPBl+GQWvDJDRk8QUbiM+18AzMGAmYHKmxX9N5mRF/N46Fd6+xK+6qHnRHz h2l+RCXBkcIqzjbKfitPNG1ynehdV6sh2dBjn79PcP5JiEP26cy7Mt4F8X0evAHv65IO B2v4xgDsl777hXhdfZOhy/mSfBwTbbNn7rbhfMK4XMyHMCL5I5u0GAdQGPSrbAastu4x mPdWElowCk3mS+j5JCIZ5eoVGu3xWJHc94svd0A3NGZN6vRcIgdFXslWQsFPBr2VnijY CBkw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=xgj6+RyP3+fdYbeBqCZfgI9FNhKfXrZXMEXZaUMUS9k=; b=an71GUiaiORUXw5rg9sRUMWujCgKk2rUMvazHbhZxqQ8lKxZoxS4ZllsHl0Fms+fU1 +5Rcq7poTRTINZ1aNUTr2kV2gyyMfsn3eMapuiCYV4o7nZ3Jx5WUuSR/VAqgkiduhTij qZ/0YEji2IUopyBWf5GPZieGxvZEmNfiMh1jkiFXOkruxWwc78rFTakfM8M/gTeWTlMs 8YjiGKtErcZd2Zt0AsEkWGU1HCU1Ykc5lGd34mBk71xF741bA+JiE1swPZ2Gnju6N088 xY/ZtxIsZDbG5fcs1dR4xs2RPBg0GOjVgEExYkscEtQ6r/cXbJdOdL3508sR3h2AyjHj 9/Yg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@bewilderbeest.net header.s=thorn header.b=f8FtSEp9; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=bewilderbeest.net Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id s6-20020a170906bc4600b0070fc7c9d71dsi476825ejv.989.2022.11.04.18.36.11; Fri, 04 Nov 2022 18:36:35 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@bewilderbeest.net header.s=thorn header.b=f8FtSEp9; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=bewilderbeest.net Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229649AbiKEBdg (ORCPT + 99 others); Fri, 4 Nov 2022 21:33:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60200 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229628AbiKEBdb (ORCPT ); Fri, 4 Nov 2022 21:33:31 -0400 Received: from thorn.bewilderbeest.net (thorn.bewilderbeest.net [IPv6:2605:2700:0:5::4713:9cab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3CBE426AD7; Fri, 4 Nov 2022 18:33:29 -0700 (PDT) Received: from hatter.bewilderbeest.net (97-113-250-99.tukw.qwest.net [97.113.250.99]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: zev) by thorn.bewilderbeest.net (Postfix) with ESMTPSA id 5E3C59EF; Fri, 4 Nov 2022 18:33:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bewilderbeest.net; s=thorn; t=1667612009; bh=xgj6+RyP3+fdYbeBqCZfgI9FNhKfXrZXMEXZaUMUS9k=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=f8FtSEp9bwgnnilDdnQjG/XxFHKBdZR0grBzDTLwRRgO7PM4R1y8WrScqMtDqn435 gHpR5T1Ck5t37mtr5h5eGGrzCcJXnPSgQ341TbLVsJm5wuDt3KTwR29IR1ZSzK5Ggv cgLii24noEoWXBYcF9wQir+maOW2UJyLSkjAOUow= From: Zev Weiss To: linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, soc@kernel.org Cc: Zev Weiss , Andrew Jeffery , Arnd Bergmann , Joel Stanley , Krzysztof Kozlowski , Olof Johansson , Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org Subject: [PATCH 2/2] ARM: dts: aspeed: Add Delta AHE-50DC BMC Date: Fri, 4 Nov 2022 18:33:21 -0700 Message-Id: <20221105013321.2719-3-zev@bewilderbeest.net> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221105013321.2719-1-zev@bewilderbeest.net> References: <20221105013321.2719-1-zev@bewilderbeest.net> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748618124901295381?= X-GMAIL-MSGID: =?utf-8?q?1748618124901295381?= This is a 1U Open19 power shelf with six PSUs and 50 12VDC outputs via LM25066 efuses. It's managed by a pair of AST1250 BMCs in a redundant active/active configuration using a PCA9541 on each I2C bus to arbitrate access between the two. Signed-off-by: Zev Weiss --- arch/arm/boot/dts/Makefile | 1 + .../arm/boot/dts/aspeed-bmc-delta-ahe50dc.dts | 1094 +++++++++++++++++ 2 files changed, 1095 insertions(+) create mode 100644 arch/arm/boot/dts/aspeed-bmc-delta-ahe50dc.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 6aa7dc4db2fc..8961fbb2c0bc 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1588,6 +1588,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \ aspeed-bmc-asrock-e3c246d4i.dtb \ aspeed-bmc-asrock-romed8hm3.dtb \ aspeed-bmc-bytedance-g220a.dtb \ + aspeed-bmc-delta-ahe50dc.dtb \ aspeed-bmc-facebook-bletchley.dtb \ aspeed-bmc-facebook-cloudripper.dtb \ aspeed-bmc-facebook-cmm.dtb \ diff --git a/arch/arm/boot/dts/aspeed-bmc-delta-ahe50dc.dts b/arch/arm/boot/dts/aspeed-bmc-delta-ahe50dc.dts new file mode 100644 index 000000000000..3f1b7eb724d1 --- /dev/null +++ b/arch/arm/boot/dts/aspeed-bmc-delta-ahe50dc.dts @@ -0,0 +1,1094 @@ +// SPDX-License-Identifier: GPL-2.0+ +/dts-v1/; + +#include "aspeed-g4.dtsi" +#include + +/{ + model = "Delta Power AHE-50DC"; + compatible = "delta,ahe50dc-bmc", "aspeed,ast2400"; + + aliases { + serial4 = &uart5; + + /* + * pca9541-arbitrated logical i2c buses are numbered as the + * corresponding physical bus plus 20 + */ + i2c20 = &i2carb0; + i2c21 = &i2carb1; + i2c22 = &i2carb2; + i2c23 = &i2carb3; + i2c24 = &i2carb4; + i2c26 = &i2carb6; + i2c27 = &i2carb7; + i2c28 = &i2carb8; + i2c32 = &i2carb12; + }; + + chosen { + stdout-path = &uart3; + bootargs = "console=ttyS2,115200n8 earlycon"; + }; + + memory@40000000 { + reg = <0x40000000 0x10000000>; + }; + + leds { + compatible = "gpio-leds"; + + heartbeat { + gpios = <&gpio ASPEED_GPIO(P, 0) GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + }; + + panic { + gpios = <&gpio ASPEED_GPIO(P, 2) GPIO_ACTIVE_HIGH>; + linux,default-trigger = "panic"; + }; + }; + + iio-hwmon { + compatible = "iio-hwmon"; + io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, <&adc 4>, + <&adc 5>, <&adc 6>, <&adc 7>, <&adc 8>, <&adc 9>; + }; + + efuse01 { + compatible = "regulator-output"; + vout-supply = <&efuse01>; + }; + + efuse02 { + compatible = "regulator-output"; + vout-supply = <&efuse02>; + }; + + efuse03 { + compatible = "regulator-output"; + vout-supply = <&efuse03>; + }; + + efuse04 { + compatible = "regulator-output"; + vout-supply = <&efuse04>; + }; + + efuse05 { + compatible = "regulator-output"; + vout-supply = <&efuse05>; + }; + + efuse06 { + compatible = "regulator-output"; + vout-supply = <&efuse06>; + }; + + efuse07 { + compatible = "regulator-output"; + vout-supply = <&efuse07>; + }; + + efuse08 { + compatible = "regulator-output"; + vout-supply = <&efuse08>; + }; + + efuse09 { + compatible = "regulator-output"; + vout-supply = <&efuse09>; + }; + + efuse10 { + compatible = "regulator-output"; + vout-supply = <&efuse10>; + }; + + efuse11 { + compatible = "regulator-output"; + vout-supply = <&efuse11>; + }; + + efuse12 { + compatible = "regulator-output"; + vout-supply = <&efuse12>; + }; + + efuse13 { + compatible = "regulator-output"; + vout-supply = <&efuse13>; + }; + + efuse14 { + compatible = "regulator-output"; + vout-supply = <&efuse14>; + }; + + efuse15 { + compatible = "regulator-output"; + vout-supply = <&efuse15>; + }; + + efuse16 { + compatible = "regulator-output"; + vout-supply = <&efuse16>; + }; + + efuse17 { + compatible = "regulator-output"; + vout-supply = <&efuse17>; + }; + + efuse18 { + compatible = "regulator-output"; + vout-supply = <&efuse18>; + }; + + efuse19 { + compatible = "regulator-output"; + vout-supply = <&efuse19>; + }; + + efuse20 { + compatible = "regulator-output"; + vout-supply = <&efuse20>; + }; + + efuse21 { + compatible = "regulator-output"; + vout-supply = <&efuse21>; + }; + + efuse22 { + compatible = "regulator-output"; + vout-supply = <&efuse22>; + }; + + efuse23 { + compatible = "regulator-output"; + vout-supply = <&efuse23>; + }; + + efuse24 { + compatible = "regulator-output"; + vout-supply = <&efuse24>; + }; + + efuse25 { + compatible = "regulator-output"; + vout-supply = <&efuse25>; + }; + + efuse26 { + compatible = "regulator-output"; + vout-supply = <&efuse26>; + }; + + efuse27 { + compatible = "regulator-output"; + vout-supply = <&efuse27>; + }; + + efuse28 { + compatible = "regulator-output"; + vout-supply = <&efuse28>; + }; + + efuse29 { + compatible = "regulator-output"; + vout-supply = <&efuse29>; + }; + + efuse30 { + compatible = "regulator-output"; + vout-supply = <&efuse30>; + }; + + efuse31 { + compatible = "regulator-output"; + vout-supply = <&efuse31>; + }; + + efuse32 { + compatible = "regulator-output"; + vout-supply = <&efuse32>; + }; + + efuse33 { + compatible = "regulator-output"; + vout-supply = <&efuse33>; + }; + + efuse34 { + compatible = "regulator-output"; + vout-supply = <&efuse34>; + }; + + efuse35 { + compatible = "regulator-output"; + vout-supply = <&efuse35>; + }; + + efuse36 { + compatible = "regulator-output"; + vout-supply = <&efuse36>; + }; + + efuse37 { + compatible = "regulator-output"; + vout-supply = <&efuse37>; + }; + + efuse38 { + compatible = "regulator-output"; + vout-supply = <&efuse38>; + }; + + efuse39 { + compatible = "regulator-output"; + vout-supply = <&efuse39>; + }; + + efuse40 { + compatible = "regulator-output"; + vout-supply = <&efuse40>; + }; + + efuse41 { + compatible = "regulator-output"; + vout-supply = <&efuse41>; + }; + + efuse42 { + compatible = "regulator-output"; + vout-supply = <&efuse42>; + }; + + efuse43 { + compatible = "regulator-output"; + vout-supply = <&efuse43>; + }; + + efuse44 { + compatible = "regulator-output"; + vout-supply = <&efuse44>; + }; + + efuse45 { + compatible = "regulator-output"; + vout-supply = <&efuse45>; + }; + + efuse46 { + compatible = "regulator-output"; + vout-supply = <&efuse46>; + }; + + efuse47 { + compatible = "regulator-output"; + vout-supply = <&efuse47>; + }; + + efuse48 { + compatible = "regulator-output"; + vout-supply = <&efuse48>; + }; + + efuse49 { + compatible = "regulator-output"; + vout-supply = <&efuse49>; + }; + + efuse50 { + compatible = "regulator-output"; + vout-supply = <&efuse50>; + }; +}; + +&fmc { + status = "okay"; + + flash@0 { + status = "okay"; + m25p,fast-read; + label = "flash0"; + spi-max-frequency = <50000000>; // 50 MHz +#include "openbmc-flash-layout.dtsi" + }; +}; + +&uart3 { + status = "okay"; +}; + +&mac1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>; +}; + +&i2c0 { + status = "okay"; + bus-frequency = <200000>; + + pca9541@79 { + compatible = "nxp,pca9541"; + reg = <0x79>; + + i2carb0: i2c-arb { + #address-cells = <1>; + #size-cells = <0>; + + /* lm25066 efuses @ 10-17, 40-47, 50-57 */ + efuse@10 { + compatible = "lm25066"; + reg = <0x10>; + shunt-resistor-micro-ohms = <675>; + regulators { + efuse03: vout0 { + regulator-name = "efuse03-reg"; + }; + }; + }; + + efuse@11 { + compatible = "lm25066"; + reg = <0x11>; + shunt-resistor-micro-ohms = <675>; + regulators { + efuse04: vout0 { + regulator-name = "efuse04-reg"; + }; + }; + }; + + efuse@12 { + compatible = "lm25066"; + reg = <0x12>; + shunt-resistor-micro-ohms = <675>; + regulators { + efuse01: vout0 { + regulator-name = "efuse01-reg"; + }; + }; + }; + + efuse@13 { + compatible = "lm25066"; + reg = <0x13>; + shunt-resistor-micro-ohms = <675>; + regulators { + efuse02: vout0 { + regulator-name = "efuse02-reg"; + }; + }; + }; + + efuse@14 { + compatible = "lm25066"; + reg = <0x14>; + shunt-resistor-micro-ohms = <675>; + regulators { + efuse13: vout0 { + regulator-name = "efuse13-reg"; + }; + }; + }; + + efuse@15 { + compatible = "lm25066"; + reg = <0x15>; + shunt-resistor-micro-ohms = <675>; + regulators { + efuse14: vout0 { + regulator-name = "efuse14-reg"; + }; + }; + }; + + efuse@16 { + compatible = "lm25066"; + reg = <0x16>; + shunt-resistor-micro-ohms = <675>; + regulators { + efuse15: vout0 { + regulator-name = "efuse15-reg"; + }; + }; + }; + + efuse@17 { + compatible = "lm25066"; + reg = <0x17>; + shunt-resistor-micro-ohms = <675>; + regulators { + efuse16: vout0 { + regulator-name = "efuse16-reg"; + }; + }; + }; + + efuse@40 { + compatible = "lm25066"; + reg = <0x40>; + shunt-resistor-micro-ohms = <675>; + regulators { + efuse12: vout0 { + regulator-name = "efuse12-reg"; + }; + }; + }; + + efuse@41 { + compatible = "lm25066"; + reg = <0x41>; + shunt-resistor-micro-ohms = <675>; + regulators { + efuse11: vout0 { + regulator-name = "efuse11-reg"; + }; + }; + }; + + efuse@42 { + compatible = "lm25066"; + reg = <0x42>; + shunt-resistor-micro-ohms = <675>; + regulators { + efuse10: vout0 { + regulator-name = "efuse10-reg"; + }; + }; + }; + + efuse@43 { + compatible = "lm25066"; + reg = <0x43>; + shunt-resistor-micro-ohms = <675>; + regulators { + efuse09: vout0 { + regulator-name = "efuse09-reg"; + }; + }; + }; + + efuse@44 { + compatible = "lm25066"; + reg = <0x44>; + shunt-resistor-micro-ohms = <675>; + regulators { + efuse08: vout0 { + regulator-name = "efuse08-reg"; + }; + }; + }; + + efuse@45 { + compatible = "lm25066"; + reg = <0x45>; + shunt-resistor-micro-ohms = <675>; + regulators { + efuse07: vout0 { + regulator-name = "efuse07-reg"; + }; + }; + }; + + efuse@46 { + compatible = "lm25066"; + reg = <0x46>; + shunt-resistor-micro-ohms = <675>; + regulators { + efuse05: vout0 { + regulator-name = "efuse05-reg"; + }; + }; + }; + + efuse@47 { + compatible = "lm25066"; + reg = <0x47>; + shunt-resistor-micro-ohms = <675>; + regulators { + efuse06: vout0 { + regulator-name = "efuse06-reg"; + }; + }; + }; + + efuse@50 { + compatible = "lm25066"; + reg = <0x50>; + shunt-resistor-micro-ohms = <675>; + regulators { + efuse17: vout0 { + regulator-name = "efuse17-reg"; + }; + }; + }; + + efuse@51 { + compatible = "lm25066"; + reg = <0x51>; + shunt-resistor-micro-ohms = <675>; + regulators { + efuse18: vout0 { + regulator-name = "efuse18-reg"; + }; + }; + }; + + efuse@52 { + compatible = "lm25066"; + reg = <0x52>; + shunt-resistor-micro-ohms = <675>; + regulators { + efuse20: vout0 { + regulator-name = "efuse20-reg"; + }; + }; + }; + + efuse@53 { + compatible = "lm25066"; + reg = <0x53>; + shunt-resistor-micro-ohms = <675>; + regulators { + efuse19: vout0 { + regulator-name = "efuse19-reg"; + }; + }; + }; + + efuse@54 { + compatible = "lm25066"; + reg = <0x54>; + shunt-resistor-micro-ohms = <675>; + regulators { + efuse22: vout0 { + regulator-name = "efuse22-reg"; + }; + }; + }; + + efuse@55 { + compatible = "lm25066"; + reg = <0x55>; + shunt-resistor-micro-ohms = <675>; + regulators { + efuse21: vout0 { + regulator-name = "efuse21-reg"; + }; + }; + }; + + efuse@56 { + compatible = "lm25066"; + reg = <0x56>; + shunt-resistor-micro-ohms = <675>; + regulators { + efuse24: vout0 { + regulator-name = "efuse24-reg"; + }; + }; + }; + + efuse@57 { + compatible = "lm25066"; + reg = <0x57>; + shunt-resistor-micro-ohms = <675>; + regulators { + efuse23: vout0 { + regulator-name = "efuse23-reg"; + }; + }; + }; + }; + }; +}; + +&i2c1 { + status = "okay"; + bus-frequency = <200000>; + + pca9541@72 { + compatible = "nxp,pca9541"; + reg = <0x72>; + + i2carb1: i2c-arb { + #address-cells = <1>; + #size-cells = <0>; + }; + }; +}; + +&i2c2 { + status = "okay"; + bus-frequency = <200000>; + + pca9541@73 { + compatible = "nxp,pca9541"; + reg = <0x73>; + + i2carb2: i2c-arb { + #address-cells = <1>; + #size-cells = <0>; + }; + }; +}; + +&i2c3 { + status = "okay"; + bus-frequency = <200000>; + + pca9541@74 { + compatible = "nxp,pca9541"; + reg = <0x74>; + + i2carb3: i2c-arb { + #address-cells = <1>; + #size-cells = <0>; + }; + }; +}; + +&i2c4 { + status = "okay"; + bus-frequency = <200000>; + + pca9541@7a { + compatible = "nxp,pca9541"; + reg = <0x7a>; + + i2carb4: i2c-arb { + #address-cells = <1>; + #size-cells = <0>; + + gpio@20 { + compatible = "nxp,pca9534"; + reg = <0x20>; + gpio-controller; + #gpio-cells = <2>; + }; + + /* lm25066 efuses @ 10-17, 40-47, 50-57, 59, 5a */ + efuse@10 { + compatible = "lm25066"; + reg = <0x10>; + shunt-resistor-micro-ohms = <675>; + regulators { + efuse27: vout0 { + regulator-name = "efuse27-reg"; + }; + }; + }; + + efuse@11 { + compatible = "lm25066"; + reg = <0x11>; + shunt-resistor-micro-ohms = <675>; + regulators { + efuse28: vout0 { + regulator-name = "efuse28-reg"; + }; + }; + }; + + efuse@12 { + compatible = "lm25066"; + reg = <0x12>; + shunt-resistor-micro-ohms = <675>; + regulators { + efuse25: vout0 { + regulator-name = "efuse25-reg"; + }; + }; + }; + + efuse@13 { + compatible = "lm25066"; + reg = <0x13>; + shunt-resistor-micro-ohms = <675>; + regulators { + efuse26: vout0 { + regulator-name = "efuse26-reg"; + }; + }; + }; + + efuse@14 { + compatible = "lm25066"; + reg = <0x14>; + shunt-resistor-micro-ohms = <675>; + regulators { + efuse37: vout0 { + regulator-name = "efuse37-reg"; + }; + }; + }; + + efuse@15 { + compatible = "lm25066"; + reg = <0x15>; + shunt-resistor-micro-ohms = <675>; + regulators { + efuse38: vout0 { + regulator-name = "efuse38-reg"; + }; + }; + }; + + efuse@16 { + compatible = "lm25066"; + reg = <0x16>; + shunt-resistor-micro-ohms = <675>; + regulators { + efuse39: vout0 { + regulator-name = "efuse39-reg"; + }; + }; + }; + + efuse@17 { + compatible = "lm25066"; + reg = <0x17>; + shunt-resistor-micro-ohms = <675>; + regulators { + efuse40: vout0 { + regulator-name = "efuse40-reg"; + }; + }; + }; + + efuse@40 { + compatible = "lm25066"; + reg = <0x40>; + shunt-resistor-micro-ohms = <675>; + regulators { + efuse36: vout0 { + regulator-name = "efuse36-reg"; + }; + }; + }; + + efuse@41 { + compatible = "lm25066"; + reg = <0x41>; + shunt-resistor-micro-ohms = <675>; + regulators { + efuse35: vout0 { + regulator-name = "efuse35-reg"; + }; + }; + }; + + efuse@42 { + compatible = "lm25066"; + reg = <0x42>; + shunt-resistor-micro-ohms = <675>; + regulators { + efuse34: vout0 { + regulator-name = "efuse34-reg"; + }; + }; + }; + + efuse@43 { + compatible = "lm25066"; + reg = <0x43>; + shunt-resistor-micro-ohms = <675>; + regulators { + efuse33: vout0 { + regulator-name = "efuse33-reg"; + }; + }; + }; + + efuse@44 { + compatible = "lm25066"; + reg = <0x44>; + shunt-resistor-micro-ohms = <675>; + regulators { + efuse32: vout0 { + regulator-name = "efuse32-reg"; + }; + }; + }; + + efuse@45 { + compatible = "lm25066"; + reg = <0x45>; + shunt-resistor-micro-ohms = <675>; + regulators { + efuse31: vout0 { + regulator-name = "efuse31-reg"; + }; + }; + }; + + efuse@46 { + compatible = "lm25066"; + reg = <0x46>; + shunt-resistor-micro-ohms = <675>; + regulators { + efuse29: vout0 { + regulator-name = "efuse29-reg"; + }; + }; + }; + + efuse@47 { + compatible = "lm25066"; + reg = <0x47>; + shunt-resistor-micro-ohms = <675>; + regulators { + efuse30: vout0 { + regulator-name = "efuse30-reg"; + }; + }; + }; + + efuse@50 { + compatible = "lm25066"; + reg = <0x50>; + shunt-resistor-micro-ohms = <675>; + regulators { + efuse41: vout0 { + regulator-name = "efuse41-reg"; + }; + }; + }; + + efuse@51 { + compatible = "lm25066"; + reg = <0x51>; + shunt-resistor-micro-ohms = <675>; + regulators { + efuse42: vout0 { + regulator-name = "efuse42-reg"; + }; + }; + }; + + efuse@52 { + compatible = "lm25066"; + reg = <0x52>; + shunt-resistor-micro-ohms = <675>; + regulators { + efuse44: vout0 { + regulator-name = "efuse44-reg"; + }; + }; + }; + + efuse@53 { + compatible = "lm25066"; + reg = <0x53>; + shunt-resistor-micro-ohms = <675>; + regulators { + efuse43: vout0 { + regulator-name = "efuse43-reg"; + }; + }; + }; + + efuse@54 { + compatible = "lm25066"; + reg = <0x54>; + shunt-resistor-micro-ohms = <675>; + regulators { + efuse46: vout0 { + regulator-name = "efuse46-reg"; + }; + }; + }; + + efuse@55 { + compatible = "lm25066"; + reg = <0x55>; + shunt-resistor-micro-ohms = <675>; + regulators { + efuse45: vout0 { + regulator-name = "efuse45-reg"; + }; + }; + }; + + efuse@56 { + compatible = "lm25066"; + reg = <0x56>; + shunt-resistor-micro-ohms = <675>; + regulators { + efuse48: vout0 { + regulator-name = "efuse48-reg"; + }; + }; + }; + + efuse@57 { + compatible = "lm25066"; + reg = <0x57>; + shunt-resistor-micro-ohms = <675>; + regulators { + efuse47: vout0 { + regulator-name = "efuse47-reg"; + }; + }; + }; + + efuse@59 { + compatible = "lm25066"; + reg = <0x59>; + shunt-resistor-micro-ohms = <675>; + regulators { + efuse49: vout0 { + regulator-name = "efuse49-reg"; + }; + }; + }; + + efuse@5a { + compatible = "lm25066"; + reg = <0x5a>; + shunt-resistor-micro-ohms = <675>; + regulators { + efuse50: vout0 { + regulator-name = "efuse50-reg"; + }; + }; + }; + }; + }; +}; + +&i2c6 { + status = "okay"; + bus-frequency = <200000>; + + pca9541@75 { + compatible = "nxp,pca9541"; + reg = <0x75>; + + i2carb6: i2c-arb { + #address-cells = <1>; + #size-cells = <0>; + }; + }; +}; + +&i2c7 { + status = "okay"; + bus-frequency = <200000>; + + pca9541@76 { + compatible = "nxp,pca9541"; + reg = <0x76>; + + i2carb7: i2c-arb { + #address-cells = <1>; + #size-cells = <0>; + }; + }; +}; + +&i2c8 { + status = "okay"; + bus-frequency = <200000>; + + pca9541@7c { + compatible = "nxp,pca9541"; + reg = <0x7c>; + + i2carb8: i2c-arb { + #address-cells = <1>; + #size-cells = <0>; + + fancontrol@30 { + compatible = "delta,ahe50dc-fan"; + reg = <0x30>; + }; + + /* Baseboard FRU eeprom */ + eeprom@50 { + compatible = "atmel,24c02"; + reg = <0x50>; + }; + }; + }; +}; + +&i2c12 { + status = "okay"; + bus-frequency = <200000>; + + pca9541@71 { + compatible = "nxp,pca9541"; + reg = <0x71>; + + i2carb12: i2c-arb { + #address-cells = <1>; + #size-cells = <0>; + }; + }; +}; + +&gpio { + status = "okay"; + gpio-line-names = + /* A */ "", "", "", "", "", "", "", "", + /* B */ "", "", "", "", "", "", "", "", + /* C */ "RESET_PEER_N", "HEARTBEAT_OUT", "", "", "", "", "", "", + /* D */ "", "", "", "", "", "", "", "", + /* E */ "DOOM_N", "", "", "", "", "LED_PWR_BLUE", "", "", + /* F */ "", "", "", "", "", "", "", "", + /* G */ "", "", "", "", "", "", "", "", + /* H */ "", "", "", "", "", "", "", "", + /* I */ "", "", "", "", "", "", "", "", + /* J */ "", "", "BMC_ID", "", "", "", "", "", + /* K */ "", "", "", "", "", "", "", "", + /* L */ "", "", "", "", "", "", "", "", + /* M */ "", "", "", "", "", "", "", "", + /* N */ "", "", "", "", "", "", "", "", + /* O */ "", "", "", "", "", "", "", "", + /* P */ "LED_GREEN", "", "LED_RED", "", "", "", "", "", + /* Q */ "", "", "", "", "", "", "", "", + /* R */ "", "", "", "", "", "", "", "", + /* S */ "", "", "", "", "", "", "", "", + /* T */ "", "", "", "", "", "", "", "", + /* U */ "", "", "", "", "", "", "", "", + /* V */ "", "", "", "", "", "", "", "", + /* W */ "", "", "", "", "", "", "", "", + /* X */ "", "", "", "", "", "", "", "", + /* Y */ "HEARTBEAT_IN", "BOARDREV0", "BOARDREV1", "", + /* Z */ "", "", "", "", "", "", "", "", + /* AA */ "", "", "", "", "", "", "", "", + /* AB */ "", "", "", ""; + + /* + * I don't rightly know what this GPIO really *is*, but setting it to + * zero causes the fans to run at full speed, after which setting it + * back to one causes a power output glitch, so install a hog to keep + * it at one as a failsafe to ensure nothing accidentally touches it. + */ + doom-guardrail { + gpio-hog; + gpios = ; + output-low; + }; +}; + +&adc { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_adc0_default + &pinctrl_adc1_default + &pinctrl_adc2_default + &pinctrl_adc3_default + &pinctrl_adc4_default + &pinctrl_adc5_default + &pinctrl_adc6_default + &pinctrl_adc7_default + &pinctrl_adc8_default + &pinctrl_adc9_default>; +};