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Tue, 3 Oct 2023 04:11:52 -0500 Received: from DFLE110.ent.ti.com (10.64.6.31) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Tue, 3 Oct 2023 04:11:52 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE110.ent.ti.com (10.64.6.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Tue, 3 Oct 2023 04:11:52 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 3939BpSY019173; Tue, 3 Oct 2023 04:11:52 -0500 From: Jai Luthra Date: Tue, 3 Oct 2023 14:41:30 +0530 Subject: [PATCH v3 1/6] arm64: dts: ti: k3-am62a-main: Add nodes for McASP MIME-Version: 1.0 Message-ID: <20231003-mcasp_am62a-v3-1-2b631ff319ca@ti.com> References: <20231003-mcasp_am62a-v3-0-2b631ff319ca@ti.com> In-Reply-To: <20231003-mcasp_am62a-v3-0-2b631ff319ca@ti.com> To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Catalin Marinas , Will Deacon CC: , , , , , Jai Luthra , Jayesh Choudhary X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; 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a=openpgp; fpr=4DE0D818E5D575E8D45AAFC543DE91F9249A7145 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Tue, 03 Oct 2023 02:12:26 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1778724999000908594 X-GMAIL-MSGID: 1778724999000908594 Same as AM62, AM62A has three instances of McASP which can be used for transmitting or receiving digital audio in various formats. Reviewed-by: Jayesh Choudhary Reviewed-by: Devarsh Thakkar Signed-off-by: Jai Luthra --- arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 60 +++++++++++++++++++++++++++++++ 1 file changed, 60 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi index 3198af08fb9f..4ae7fdc5221b 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi @@ -816,4 +816,64 @@ ecap2: pwm@23120000 { clock-names = "fck"; status = "disabled"; }; + + mcasp0: audio-controller@2b00000 { + compatible = "ti,am33xx-mcasp-audio"; + reg = <0x00 0x02b00000 0x00 0x2000>, + <0x00 0x02b08000 0x00 0x400>; + reg-names = "mpu", "dat"; + interrupts = , + ; + interrupt-names = "tx", "rx"; + + dmas = <&main_bcdma 0 0xc500 0>, <&main_bcdma 0 0x4500 0>; + dma-names = "tx", "rx"; + + clocks = <&k3_clks 190 0>; + clock-names = "fck"; + assigned-clocks = <&k3_clks 190 0>; + assigned-clock-parents = <&k3_clks 190 2>; + power-domains = <&k3_pds 190 TI_SCI_PD_EXCLUSIVE>; + status = "disabled"; + }; + + mcasp1: audio-controller@2b10000 { + compatible = "ti,am33xx-mcasp-audio"; + reg = <0x00 0x02b10000 0x00 0x2000>, + <0x00 0x02b18000 0x00 0x400>; + reg-names = "mpu", "dat"; + interrupts = , + ; + interrupt-names = "tx", "rx"; + + dmas = <&main_bcdma 0 0xc501 0>, <&main_bcdma 0 0x4501 0>; + dma-names = "tx", "rx"; + + clocks = <&k3_clks 191 0>; + clock-names = "fck"; + assigned-clocks = <&k3_clks 191 0>; + assigned-clock-parents = <&k3_clks 191 2>; + power-domains = <&k3_pds 191 TI_SCI_PD_EXCLUSIVE>; + status = "disabled"; + }; + + mcasp2: audio-controller@2b20000 { + compatible = "ti,am33xx-mcasp-audio"; + reg = <0x00 0x02b20000 0x00 0x2000>, + <0x00 0x02b28000 0x00 0x400>; + reg-names = "mpu", "dat"; + interrupts = , + ; + interrupt-names = "tx", "rx"; + + dmas = <&main_bcdma 0 0xc502 0>, <&main_bcdma 0 0x4502 0>; + dma-names = "tx", "rx"; + + clocks = <&k3_clks 192 0>; + clock-names = "fck"; + assigned-clocks = <&k3_clks 192 0>; + assigned-clock-parents = <&k3_clks 192 2>; + power-domains = <&k3_pds 192 TI_SCI_PD_EXCLUSIVE>; + status = "disabled"; + }; }; From patchwork Tue Oct 3 09:11:31 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jai Luthra X-Patchwork-Id: 147770 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2a8e:b0:403:3b70:6f57 with SMTP id in14csp1953083vqb; Tue, 3 Oct 2023 02:12:34 -0700 (PDT) X-Google-Smtp-Source: AGHT+IF//w7nIChRwJvWh42r0QvnkTjdiEiikwtl4jpzjDvSKyPfZwAV2aBBXY90jWZHEYTiu7m+ X-Received: by 2002:a05:6870:b4aa:b0:1c8:39a6:779e with SMTP id y42-20020a056870b4aa00b001c839a6779emr17068597oap.19.1696324353766; Tue, 03 Oct 2023 02:12:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1696324353; cv=none; d=google.com; s=arc-20160816; b=Gwwpc6MW5RnXWsnLsBqrtmcHdRGQseHP5m3+UnTlezGPGhIQF3vYr2zsMwftITu/eb KIGpt+6WVbReUAozdxQfxYLQvRpDKP2Q7tqAhqqOLNvcN72s1z48QegJQBOTm6nRARmN fgGy63r8RafujeLtwaBMRWN8FR+uVmi0zoPkm3CodXbNzd3jOkqyVJmAFTaJMek1tZPK ICkOqaZhSGIkJC6GuXsdq/cjeSanknstbukEOzVS9lX9Pua6YSUadosuYOsTYmmlAHKr LqoMIuizWDX217aZdxDKfQjhyLAvHZbHgrxkEnCUDA1XDjVwjkZ1pBwRVQxZHgt3DHkM 0A1g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=VOgmZjppaNHRvb+fq7iB4eyXgEBm+n29yek9u6VmbPM=; fh=ftKU8xb951ucjgYEObgA/c3GJvlbkTWWeCtjR8QevbU=; b=lkBkldM0gYyyYPGHvecNNFY+sKvJcpcXUCD3CasWDfb6HAwEGo4pVlh6caTTbp4gKW uwPtkn9wXTE4glgYww9Jzlrivz+OA9JwpV883ye+vo64pH4bUioKEq2xWeQCRg/OtOXS VkFPvPrTkjGjG+dn8qugmYWnI0j+t9iNcz4CLUyAGnVKA/FzKMygq8owoblqfuXAuXtf 9RMv6FDKtp0n1fRcdDm0xCEGsP5ozRMZaZTmO7JOUzKoFkbGt0uGQQfZgf20zvDmccTl Y/xlMSVsNZv/lV0XsdiFe2YmIqeTau8EwrRrQHl8qwbquUP0V+w/Gip5CE3OK8bdF+Ta G81w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=U6GLRy3s; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:4 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: from howler.vger.email (howler.vger.email. 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Tue, 3 Oct 2023 04:11:54 -0500 Received: from DFLE108.ent.ti.com (10.64.6.29) by DFLE111.ent.ti.com (10.64.6.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Tue, 3 Oct 2023 04:11:54 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Tue, 3 Oct 2023 04:11:54 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 3939Brm1019187; Tue, 3 Oct 2023 04:11:53 -0500 From: Jai Luthra Date: Tue, 3 Oct 2023 14:41:31 +0530 Subject: [PATCH v3 2/6] arm64: dts: ti: k3-am62a7-sk: Split vcc_3v3 regulators MIME-Version: 1.0 Message-ID: <20231003-mcasp_am62a-v3-2-2b631ff319ca@ti.com> References: <20231003-mcasp_am62a-v3-0-2b631ff319ca@ti.com> In-Reply-To: <20231003-mcasp_am62a-v3-0-2b631ff319ca@ti.com> To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Catalin Marinas , Will Deacon CC: , , , , , Jai Luthra X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; 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a=openpgp; fpr=4DE0D818E5D575E8D45AAFC543DE91F9249A7145 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (howler.vger.email [0.0.0.0]); Tue, 03 Oct 2023 02:12:32 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1778725005770356238 X-GMAIL-MSGID: 1778725005770356238 VCC_3V3_MAIN is the output of LM5141-Q1, and it serves as an input to TPS22965DSGT which produces VCC_3V3_SYS. [1] Link: https://www.ti.com/lit/zip/sprr459 [1] Signed-off-by: Jai Luthra Reviewed-by: Devarsh Thakkar --- arch/arm64/boot/dts/ti/k3-am62a7-sk.dts | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts index cff283c75f8e..c689d3da2def 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts @@ -79,10 +79,10 @@ vcc_5v0: regulator-1 { regulator-boot-on; }; - vcc_3v3_sys: regulator-2 { + vcc_3v3_main: regulator-2 { /* output of LM5141-Q1 */ compatible = "regulator-fixed"; - regulator-name = "vcc_3v3_sys"; + regulator-name = "vcc_3v3_main"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; vin-supply = <&vmain_pd>; @@ -101,6 +101,17 @@ vdd_mmc1: regulator-3 { gpio = <&exp1 3 GPIO_ACTIVE_HIGH>; }; + vcc_3v3_sys: regulator-4 { + /* output of TPS222965DSGT */ + compatible = "regulator-fixed"; + regulator-name = "vcc_3v3_sys"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc_3v3_main>; + regulator-always-on; + regulator-boot-on; + }; + leds { compatible = "gpio-leds"; pinctrl-names = "default"; From patchwork Tue Oct 3 09:11:32 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jai Luthra X-Patchwork-Id: 147769 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2a8e:b0:403:3b70:6f57 with SMTP id in14csp1953045vqb; Tue, 3 Oct 2023 02:12:30 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGSE/AhD/Ie1VaRQRIBNJOQyhrIv+oF6W58rpDttC8FoADZmlQql+G6vnQzkBrld4hZxLXk X-Received: by 2002:a05:6870:e2d1:b0:1d6:5c40:11b5 with SMTP id w17-20020a056870e2d100b001d65c4011b5mr16834549oad.48.1696324350040; Tue, 03 Oct 2023 02:12:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1696324350; cv=none; d=google.com; s=arc-20160816; b=riAv8ERW09g4rd1ZJCNK4uGOhOOfCaI3A5Y0Pv59SEhJalV3hiBI48ReaUUWwEtuAF Qz+R+09v+2KnLz/xa5fbHV8QrmIsRpYSWK2jZMw/tmIA9gRGfn3S4eYSmXc8kxWZ2A1i DrWw8vdWv/lY14lgGQquAYAGFrP1AQs4lugO00C/AsfzcxN/xCxnm6bE/JzTj+kTgfkt 0TZYZlKcGS/syNd1Nj+b8eYzar5C7ew3k9Z2Msk+cbOn4sLkXxfUOxwiM2kjLPAWXu/i EaE49LqCXMx+8yVwrwhfE7YnLhzXdEoTKRp4qeklegjERgvnmn/nG4jUIRXcRo0Jo5eJ bNnw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=hFOR+BafjthIcZVU9B2FFehUzOmrBZCSwFOWCdHH4CM=; fh=ftKU8xb951ucjgYEObgA/c3GJvlbkTWWeCtjR8QevbU=; b=xZJPXLsDTGeynX8cWXVvF7ggyQtoXPbC0MqKNePwYahKgqk89cNmU+fHOPKAaW68Ji zKf+avmoP0PZzP22Pe5hE5BI+8G3GxyhJIp0EhewNgkKaxxZZpwlWioAJrzEOdGB5HsD ZsMoGVGrWJ1uKqWujJWvBcdK2nSnCbUssuLhMFCQWVtPBYr6D9h9JqeKs8i3nLHRP7Y7 pqvZVFIiDdsHNTlBtt5EWVog4W31CKc2diRn0yDjetVijBdVTO2t5kGRK0+gWALXbaX4 OolE4JrXGSvaVvJxW2d0tgBlIgdVDaW+w1uGpe7NAza94TGEKnX9ugWgyf1oYLzCNhxI 5+aQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=SP5g4Mtf; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: from snail.vger.email (snail.vger.email. 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Tue, 3 Oct 2023 04:11:56 -0500 Received: from DLEE106.ent.ti.com (157.170.170.36) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Tue, 3 Oct 2023 04:11:55 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE106.ent.ti.com (157.170.170.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Tue, 3 Oct 2023 04:11:55 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 3939Bsmb074062; Tue, 3 Oct 2023 04:11:55 -0500 From: Jai Luthra Date: Tue, 3 Oct 2023 14:41:32 +0530 Subject: [PATCH v3 3/6] arm64: dts: ti: k3-am62a7-sk: Drop i2c-1 to 100Khz MIME-Version: 1.0 Message-ID: <20231003-mcasp_am62a-v3-3-2b631ff319ca@ti.com> References: <20231003-mcasp_am62a-v3-0-2b631ff319ca@ti.com> In-Reply-To: <20231003-mcasp_am62a-v3-0-2b631ff319ca@ti.com> To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Catalin Marinas , Will Deacon CC: , , , , , Jai Luthra X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; 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a=openpgp; fpr=4DE0D818E5D575E8D45AAFC543DE91F9249A7145 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Tue, 03 Oct 2023 02:12:28 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1778725002040442146 X-GMAIL-MSGID: 1778725002040442146 The TLV320AIC3106 audio codec is interfaced on the i2c-1 bus. With the default rate of 400Khz the i2c register writes fail to sync: [ 36.026387] tlv320aic3x 1-001b: Unable to sync registers 0x16-0x16. -110 [ 38.101130] omap_i2c 20010000.i2c: controller timed out Dropping the rate to 100Khz fixes the issue. Fixes: 38c4a08c820c ("arm64: dts: ti: Add support for AM62A7-SK") Reviewed-by: Devarsh Thakkar Reviewed-by: Aradhya Bhatia Signed-off-by: Jai Luthra --- arch/arm64/boot/dts/ti/k3-am62a7-sk.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts index c689d3da2def..866b2725f775 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts @@ -261,7 +261,7 @@ &main_i2c1 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&main_i2c1_pins_default>; - clock-frequency = <400000>; + clock-frequency = <100000>; exp1: gpio@22 { compatible = "ti,tca6424"; From patchwork Tue Oct 3 09:11:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jai Luthra X-Patchwork-Id: 147767 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2a8e:b0:403:3b70:6f57 with SMTP id in14csp1953005vqb; Tue, 3 Oct 2023 02:12:24 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGe4DydpYp0Lmy+73darsW89sErDuqApOPNJEfqTKoKasG6BWOIvE1Vj1upXChce1hvMd44 X-Received: by 2002:a05:6358:9989:b0:13c:dd43:f741 with SMTP id j9-20020a056358998900b0013cdd43f741mr10403151rwb.24.1696324343777; Tue, 03 Oct 2023 02:12:23 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1696324343; cv=none; d=google.com; s=arc-20160816; b=G3kiorQupPe2+jUgO5mvQdweguRqgzA3hmLNOR+RT0QACr7IyVnEV1lxG3paJ0RWqh nXTdVxC79bA0jSI3+yKunh+Vg97i9AQHvZ0On5mfxDHgCA8z5XuIDv6iNVQ8shdbWVbV qYBcELMES3HVG2nK80Lh2zdXPlDFusX90iNHaPH/l6sHD4O0KJjIE9zzGDu8tcEVl77G PSxDF31HPjp86iQa2fdCRZdM2iQXKCa9ZXIRjthgchhyYzx6mmP6J/sMSkd1/1OA/sjE dwLlOXxFLbxwTDtW/NPbvhm1fcY/06/ONWmMdfjISoVw7l5zHRntyjzzBwlOowY19/m4 t6JA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=THpNGIXD7z+n0ObTIdk4Tqnh5fvfLcLedV5S/VNCL18=; fh=dWpnCBC7U+7b+mMIRvkjf+/7YhZyjSZeZ8NvaeiRo0k=; b=RpgAssA91UmkLJO24WbHL/iMiu+CED2tDAQbRJwEhGpB1bBNLFlUbmm2ekqAdqLfet Wg5KGprkP/na3108AfRVtig/jJJ0Hf1xZee0tZFjFVVNJCilvkdfolGzpHq4v0LRX/kz QBER5h3NBeKet9FCt6F70cKBCZ1GlMa0mGknTYu1DuIj19rJtF4U3iG8Qr/e/00bEtpo jk/nCvwgyaXgPymsiBCM1j2haPiER+8hv6F4DK6yMndk76/UlajYedrdr7SapSAj3Fpc 5oRcuI0929Grgh+TEuKL5MX9DIc+NkoTO6CNWnWpCjWy7sL123XQg61QEEVuYQjJSEq/ VYnA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b="WNbPW+n/"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: from snail.vger.email (snail.vger.email. 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Tue, 3 Oct 2023 04:11:57 -0500 Received: from DLEE103.ent.ti.com (157.170.170.33) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Tue, 3 Oct 2023 04:11:57 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Tue, 3 Oct 2023 04:11:56 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 3939BuqB021429; Tue, 3 Oct 2023 04:11:56 -0500 From: Jai Luthra Date: Tue, 3 Oct 2023 14:41:33 +0530 Subject: [PATCH v3 4/6] arm64: dts: ti: k3-am62a7-sk: Add support for TPS6593 PMIC MIME-Version: 1.0 Message-ID: <20231003-mcasp_am62a-v3-4-2b631ff319ca@ti.com> References: <20231003-mcasp_am62a-v3-0-2b631ff319ca@ti.com> In-Reply-To: <20231003-mcasp_am62a-v3-0-2b631ff319ca@ti.com> To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Catalin Marinas , Will Deacon CC: , , , , , Jai Luthra , Julien Panis , Esteban Blanc X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; 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a=openpgp; fpr=4DE0D818E5D575E8D45AAFC543DE91F9249A7145 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-2.7 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_BLOCKED,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Tue, 03 Oct 2023 02:12:22 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1778724994603811430 X-GMAIL-MSGID: 1778724994603811430 From: Julien Panis This patch adds support for TPS6593 PMIC on main I2C0 bus. This device provides regulators (bucks and LDOs), but also GPIOs, a RTC, a watchdog, an ESM (Error Signal Monitor) which monitors the SoC error output signal, and a PFSM (Pre-configurable Finite State Machine) which manages the operational modes of the PMIC. Signed-off-by: Julien Panis Signed-off-by: Esteban Blanc Signed-off-by: Jai Luthra --- arch/arm64/boot/dts/ti/k3-am62a7-sk.dts | 95 +++++++++++++++++++++++++++++++++ 1 file changed, 95 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts index 866b2725f775..377ab823bbcc 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts @@ -232,6 +232,20 @@ AM62AX_IOPAD(0x12c, PIN_INPUT, 0) /* (W16) RGMII1_TX_CTL */ }; }; +&mcu_pmx0 { + status = "okay"; + + pmic_irq_pins_default: pmic-irq-default-pins { + pinctrl-single,pins = < + AM62AX_MCU_IOPAD(0x000, PIN_INPUT, 7) /* (E11) MCU_GPIO0_0 */ + >; + }; +}; + +&mcu_gpio0 { + status = "okay"; +}; + &main_i2c0 { status = "okay"; pinctrl-names = "default"; @@ -255,6 +269,87 @@ usb_con_hs: endpoint { }; }; }; + + tps659312: pmic@48 { + compatible = "ti,tps6593-q1"; + reg = <0x48>; + ti,primary-pmic; + system-power-controller; + + gpio-controller; + #gpio-cells = <2>; + + pinctrl-names = "default"; + pinctrl-0 = <&pmic_irq_pins_default>; + interrupt-parent = <&mcu_gpio0>; + interrupts = <0 IRQ_TYPE_EDGE_FALLING>; + + buck123-supply = <&vcc_3v3_sys>; + buck4-supply = <&vcc_3v3_sys>; + buck5-supply = <&vcc_3v3_sys>; + ldo1-supply = <&vcc_3v3_sys>; + ldo2-supply = <&vcc_3v3_sys>; + ldo3-supply = <&buck5>; + ldo4-supply = <&vcc_3v3_sys>; + + regulators { + buck123: buck123 { + regulator-name = "vcc_core"; + regulator-min-microvolt = <715000>; + regulator-max-microvolt = <895000>; + regulator-boot-on; + regulator-always-on; + }; + + buck4: buck4 { + regulator-name = "vcc_1v1"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-boot-on; + regulator-always-on; + }; + + buck5: buck5 { + regulator-name = "vcc_1v8_sys"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + ldo1: ldo1 { + regulator-name = "vddshv5_sdio"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + ldo2: ldo2 { + regulator-name = "vpp_1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + ldo3: ldo3 { + regulator-name = "vcc_0v85"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + regulator-boot-on; + regulator-always-on; + }; + + ldo4: ldo4 { + regulator-name = "vdda_1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + }; + }; }; &main_i2c1 { From patchwork Tue Oct 3 09:11:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jai Luthra X-Patchwork-Id: 147773 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2a8e:b0:403:3b70:6f57 with SMTP id in14csp1953271vqb; Tue, 3 Oct 2023 02:13:01 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEH3cu1nQcB+1E45whuwLVlk0Egvm4kwWxQcITQAV9R9KdIdNvcdwaCiLudcCH8BmQD2a8N X-Received: by 2002:a05:6358:590d:b0:14a:ddb8:9a12 with SMTP id g13-20020a056358590d00b0014addb89a12mr15904366rwf.6.1696324381047; Tue, 03 Oct 2023 02:13:01 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1696324381; cv=none; d=google.com; s=arc-20160816; b=KIp9pfeTBu7z3JUYepH3rNHk0yCJ0ECovlLgFh68kXOCaZZ6zdu0Px9R7OsOglNiVd rLAY43NmNJesUTYZcC2RsOzjSBPXxTeuZ5BRo37YEVJB54nyYEcErgd5IhxrEQ+6cjLf Ksa4jNfdSO6WsWwE3cM8vHxdHbp8Ersuf03CbjvR/8bQP9BSYJ7DrD91HT8qCOBEOs7d /q9xmU2rqNbyeayVqMxAHiVc9ZyvvkLxc7F7M+aaoXuLFDv2uHzQt9QeyURN6Wld60vC uuv25ObYbr+/Fve++jpmnpTdPhueHLjJkGinwCZmGgWHTjQ/pk1RhJWfgpG+Wz7tbm7t NXpQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=KKr+QvZEnvmd560G3Pi+nMek1mf67eakn+QhxahTASg=; fh=tLhAGTttXh18u18d6UOsWdUMeB3VfA1IORyQttQE6rQ=; b=K6ZkwdoXOazOVJ3hY0Mxz2txq/9lyAaVKqHkUODK4VIjmjC3Sg6H/FOCWdKqhTS6Xa QXTLPaRotaHYALumTIo2kUA1sZxamS5wApUpGNlCjSyQBT94vtgq6OgsPqDWy7W4mqQK XzeU5AKHDlQJyJGTV/o+6+Umt8VZ0Ncg4y74avoOThicE6yHBsW1/osDZvL4O+4RY/of i6QEe20dk6AhMWtcUDXRu2+sKDXqsi2oOT77NEmPKUFRetowLxrBdI4J+Y5A5SDdLkTb eJdP6bhjecXnoMMunZKDKwLLiGxiCIWWp0zrcR87JFovy60yELtAnnHPvzgcqch8f/tr wFOQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=VHWf01ju; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.32 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: from agentk.vger.email (agentk.vger.email. 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a=openpgp; fpr=4DE0D818E5D575E8D45AAFC543DE91F9249A7145 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on agentk.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (agentk.vger.email [0.0.0.0]); Tue, 03 Oct 2023 02:12:54 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1778725034061671877 X-GMAIL-MSGID: 1778725034061671877 Add nodes for audio codec and sound card, enable the audio serializer (McASP1) under use and update pinmux. Reviewed-by: Jayesh Choudhary Reviewed-by: Devarsh Thakkar Link: https://www.ti.com/lit/zip/sprr459 Signed-off-by: Jai Luthra --- arch/arm64/boot/dts/ti/k3-am62a7-sk.dts | 77 +++++++++++++++++++++++++++++++++ 1 file changed, 77 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts index 377ab823bbcc..8f64ac2c7568 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts @@ -125,6 +125,41 @@ led-0 { default-state = "off"; }; }; + + tlv320_mclk: clk-0 { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <12288000>; + }; + + codec_audio: sound { + compatible = "simple-audio-card"; + simple-audio-card,name = "AM62Ax-SKEVM"; + simple-audio-card,widgets = + "Headphone", "Headphone Jack", + "Line", "Line In", + "Microphone", "Microphone Jack"; + simple-audio-card,routing = + "Headphone Jack", "HPLOUT", + "Headphone Jack", "HPROUT", + "LINE1L", "Line In", + "LINE1R", "Line In", + "MIC3R", "Microphone Jack", + "Microphone Jack", "Mic Bias"; + simple-audio-card,format = "dsp_b"; + simple-audio-card,bitclock-master = <&sound_master>; + simple-audio-card,frame-master = <&sound_master>; + simple-audio-card,bitclock-inversion; + + simple-audio-card,cpu { + sound-dai = <&mcasp1>; + }; + + sound_master: simple-audio-card,codec { + sound-dai = <&tlv320aic3106>; + clocks = <&tlv320_mclk>; + }; + }; }; &mcu_pmx0 { @@ -230,6 +265,15 @@ AM62AX_IOPAD(0x130, PIN_INPUT, 0) /* (AB17) RGMII1_TXC */ AM62AX_IOPAD(0x12c, PIN_INPUT, 0) /* (W16) RGMII1_TX_CTL */ >; }; + + main_mcasp1_pins_default: main-mcasp1-default-pins { + pinctrl-single,pins = < + AM62AX_IOPAD(0x090, PIN_INPUT, 2) /* (L19) GPMC0_BE0n_CLE.MCASP1_ACLKX */ + AM62AX_IOPAD(0x098, PIN_INPUT, 2) /* (R18) GPMC0_WAIT0.MCASP1_AFSX */ + AM62AX_IOPAD(0x08c, PIN_OUTPUT, 2) /* (K19) GPMC0_WEn.MCASP1_AXR0 */ + AM62AX_IOPAD(0x084, PIN_INPUT, 2) /* (L18) GPMC0_ADVn_ALE.MCASP1_AXR2 */ + >; + }; }; &mcu_pmx0 { @@ -377,6 +421,19 @@ exp1: gpio@22 { "MCASP1_FET_SEL", "UART1_FET_SEL", "PD_I2C_IRQ", "IO_EXP_TEST_LED"; }; + + tlv320aic3106: audio-codec@1b { + #sound-dai-cells = <0>; + compatible = "ti,tlv320aic3106"; + reg = <0x1b>; + ai3x-micbias-vg = <1>; /* 2.0V */ + + /* Regulators */ + AVDD-supply = <&vcc_3v3_sys>; + IOVDD-supply = <&vcc_3v3_sys>; + DRVDD-supply = <&vcc_3v3_sys>; + DVDD-supply = <&buck5>; + }; }; &sdhci1 { @@ -467,3 +524,23 @@ cpsw3g_phy0: ethernet-phy@0 { ti,min-output-impedance; }; }; + +&mcasp1 { + status = "okay"; + #sound-dai-cells = <0>; + + pinctrl-names = "default"; + pinctrl-0 = <&main_mcasp1_pins_default>; + + op-mode = <0>; /* MCASP_IIS_MODE */ + tdm-slots = <2>; + + serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ + 1 0 2 0 + 0 0 0 0 + 0 0 0 0 + 0 0 0 0 + >; + tx-num-evt = <32>; + rx-num-evt = <32>; +}; From patchwork Tue Oct 3 09:11:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jai Luthra X-Patchwork-Id: 147772 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2a8e:b0:403:3b70:6f57 with SMTP id in14csp1953259vqb; Tue, 3 Oct 2023 02:12:59 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEWYv17YjADg+D49REsH2RW+HrKzVXZOxUdmcZzZAa25/aMbKIvX7giFjhQdgX2dpXHFnEp X-Received: by 2002:a05:6a00:230b:b0:691:2d4:23b2 with SMTP id h11-20020a056a00230b00b0069102d423b2mr14633938pfh.15.1696324378630; Tue, 03 Oct 2023 02:12:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1696324378; cv=none; d=google.com; s=arc-20160816; b=R2V5BAQRHM8klLTdeFIZHX6qkAaysjy6d9ZRoDw7qFmMjfBsXpghUzup2qIXsliHii nGfTQ6EAxgaDsqzclg/OcnVzxVKXv+OvGfKvHecN1WAAtsqAHQdafsz12tRj7qnjv+aE kEUzXvoXPAhVDiya+1Blcey/MGSzy1d6ypZuLXJ3QiGaUuLKca/LwG/8I6nx5mO0aGNZ O8wnw4Roj8kofSM4BMY12UJyKHfc70CyzFynMPVPq/I9zavsUxXm6QUx2gtWILr2DCyV Sb5TKbUq6uMtLfKzbtfQV7jQ71bZ60aj+/V3bHrefkrs7Py8TCf2bOyATgw6ClcUQekr jBxw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=o0ED1kfJG1RufpI9CAgyV1TxWurfgTv4TIBc7Zp6N1g=; fh=ftKU8xb951ucjgYEObgA/c3GJvlbkTWWeCtjR8QevbU=; b=I1moSqOPg6wqabtlPOk+Z/vDIf+LHcxegAvlt4L5Pq3x7MPV9x9dT1p2aQhlqKKZnJ 4XO+Gt9uGmdyMxY9yj0PDgrXOmTXXe2E//DsPM3wQ2VwsxhOMLz5Pps7/10HMGGQDfaI 7ahNvEhwPX24Kdf8vQrNBMX8scjFC/oBMuo7cASrsH7uw3lIdhW57cwfeKZ5CNJYcP/2 1ow0sIaKwZ9uwgLQ8BpLSxUtCpgwOFAo6pOMcasft9ySdEF7YGcCUds73yOa2OFt1cZp kXbmXwNS05/fFervOh/nBnA5kFMEc2DdWfGfcJo1RlFpaobut+ZnEpjMw6w/0lMlIaKl 8TOg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=vmStWs+H; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.36 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: from pete.vger.email (pete.vger.email. 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a=openpgp; fpr=4DE0D818E5D575E8D45AAFC543DE91F9249A7145 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on pete.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (pete.vger.email [0.0.0.0]); Tue, 03 Oct 2023 02:12:53 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1778725031233426354 X-GMAIL-MSGID: 1778725031233426354 SK-AM62A-LP uses TPS6593x PMIC (interfaced over I2C) to power the SoC and various other peripherals on the board [1]. Specifically, the audio codec (TLV320AIC3106) on the board relies on the PMIC for the DVDD (1.8V) supply. [1]: https://www.ti.com/lit/zip/sprr459 Reviewed-by: Devarsh Thakkar Signed-off-by: Jai Luthra --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 66bfbef73324..38f0ce9cd2a3 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -725,6 +725,7 @@ CONFIG_MFD_SEC_CORE=y CONFIG_MFD_SL28CPLD=y CONFIG_RZ_MTU3=y CONFIG_MFD_TPS65219=y +CONFIG_MFD_TPS6594_I2C=m CONFIG_MFD_TI_AM335X_TSCADC=m CONFIG_MFD_ROHM_BD718XX=y CONFIG_MFD_WCD934X=m