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[2620:137:e000::3:5]) by mx.google.com with ESMTPS id v6-20020a634646000000b005852a35aff4si610314pgk.227.2023.10.02.21.21.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Oct 2023 21:21:35 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:5 as permitted sender) client-ip=2620:137:e000::3:5; Authentication-Results: mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b="a/vXWqKB"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:5 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=microchip.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by groat.vger.email (Postfix) with ESMTP id 7FED48092C9C; Mon, 2 Oct 2023 21:21:29 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at groat.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239033AbjJCEVN (ORCPT + 18 others); Tue, 3 Oct 2023 00:21:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36722 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230105AbjJCEVL (ORCPT ); Tue, 3 Oct 2023 00:21:11 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 864B9BB; Mon, 2 Oct 2023 21:21:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1696306869; x=1727842869; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=w9nQM23CfY907qE7wT+2FXo1ONLHkiWlscDbAurV5jU=; b=a/vXWqKBkGtkFL+7gTKTi1fPGTChqn5FzDdtGw9+veGqeIE0YjlN7gzX xM9cuskNFqjsvGez9KxOSqWMqlPzaVVpDV1Jpq9ImDNy7RUVq6syKM8LE +MgCpGkEXbiroeYrKmaBWoE3xuCHN1XGwqKn6jD700RtG0okmdhASGN5X 3J69LZUieeauk6OBc7F796urSRL6vAdXh2UA0YNzty2IoI2QjChjieFmk pI/SvV2FRz84kNp5t1o4FQ26w14N9X3ppZPNjes7KbLYcRCBACt80JY3n zuh1woPNqoZfWCXABtfzjmbfh4yR2SZdqlcCIqEp1K+lJyFBToE83AUcl w==; X-CSE-ConnectionGUID: jqZ0WZzzR+yIkleglJXjmA== X-CSE-MsgGUID: vkkS5b0XQsKBfQM2XXOaQA== X-ThreatScanner-Verdict: Negative X-IronPort-AV: E=Sophos;i="6.03,196,1694761200"; d="scan'208";a="7744201" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa3.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 02 Oct 2023 21:21:09 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Mon, 2 Oct 2023 21:21:07 -0700 Received: from microchip1-OptiPlex-9020.microchip.com (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.21 via Frontend Transport; Mon, 2 Oct 2023 21:21:02 -0700 From: shravan chippa To: , , , , , , CC: , , , , , , Subject: [PATCH v2 1/4] dmaengine: sf-pdma: Support of_dma_controller_register() Date: Tue, 3 Oct 2023 09:52:12 +0530 Message-ID: <20231003042215.142678-2-shravan.chippa@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231003042215.142678-1-shravan.chippa@microchip.com> References: <20231003042215.142678-1-shravan.chippa@microchip.com> MIME-Version: 1.0 X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on groat.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (groat.vger.email [0.0.0.0]); Mon, 02 Oct 2023 21:21:29 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1778706698822928388 X-GMAIL-MSGID: 1778706698822928388 From: Shravan Chippa Update sf-pdma driver to adopt generic DMA device tree bindings. It calls of_dma_controller_register() with sf-pdma specific of_dma_xlate to get the generic DMA device tree helper support and the DMA clients can look up the sf-pdma controller using standard APIs. Signed-off-by: Shravan Chippa --- drivers/dma/sf-pdma/sf-pdma.c | 44 +++++++++++++++++++++++++++++++++++ 1 file changed, 44 insertions(+) diff --git a/drivers/dma/sf-pdma/sf-pdma.c b/drivers/dma/sf-pdma/sf-pdma.c index d1c6956af452..06a0912a12a1 100644 --- a/drivers/dma/sf-pdma/sf-pdma.c +++ b/drivers/dma/sf-pdma/sf-pdma.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include "sf-pdma.h" @@ -490,6 +491,33 @@ static void sf_pdma_setup_chans(struct sf_pdma *pdma) } } +static struct dma_chan *sf_pdma_of_xlate(struct of_phandle_args *dma_spec, + struct of_dma *ofdma) +{ + struct sf_pdma *pdma = ofdma->of_dma_data; + struct device *dev = pdma->dma_dev.dev; + struct sf_pdma_chan *chan; + struct dma_chan *c; + u32 channel_id; + + if (dma_spec->args_count != 1) { + dev_err(dev, "Bad number of cells\n"); + return NULL; + } + + channel_id = dma_spec->args[0]; + + chan = &pdma->chans[channel_id]; + + c = dma_get_slave_channel(&chan->vchan.chan); + if (!c) { + dev_err(dev, "No more channels available\n"); + return NULL; + } + + return c; +} + static int sf_pdma_probe(struct platform_device *pdev) { struct sf_pdma *pdma; @@ -563,7 +591,20 @@ static int sf_pdma_probe(struct platform_device *pdev) return ret; } + ret = of_dma_controller_register(pdev->dev.of_node, + sf_pdma_of_xlate, pdma); + if (ret < 0) { + dev_err(&pdev->dev, + "Can't register SiFive Platform OF_DMA. (%d)\n", ret); + goto err_unregister; + } + return 0; + +err_unregister: + dma_async_device_unregister(&pdma->dma_dev); + + return ret; } static int sf_pdma_remove(struct platform_device *pdev) @@ -583,6 +624,9 @@ static int sf_pdma_remove(struct platform_device *pdev) tasklet_kill(&ch->err_tasklet); } + if (pdev->dev.of_node) + of_dma_controller_free(pdev->dev.of_node); + dma_async_device_unregister(&pdma->dma_dev); return 0; From patchwork Tue Oct 3 04:22:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: shravan chippa X-Patchwork-Id: 147612 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2a8e:b0:403:3b70:6f57 with SMTP id in14csp1846592vqb; Mon, 2 Oct 2023 21:21:38 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHcWQgE6WWUhqZHSRwg/woHV5+5Qrt8nVomNRS8M/YH9mGcSRF/l/fm6b0EOvQGbBvCne6T X-Received: by 2002:a05:6a21:1f20:b0:15d:7767:6553 with SMTP id ry32-20020a056a211f2000b0015d77676553mr11871681pzb.35.1696306898478; Mon, 02 Oct 2023 21:21:38 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1696306898; cv=none; d=google.com; s=arc-20160816; b=HMHnYt7XUKrd5cahhh2QyEE5nnVn5hkKxM99rP+dsxIU3xPliPVLfoKIGv1iLSMuTm GpWZg8MtVfE2D7cJAfCWmmZiu7V1LQAry5WhhB6XtIJKT8FXN8mmQwa++ni1ompLblMT 4USHN+JySDfpybvQcGmSdG7kB+hWu/+Bvb2tBv6QIq05/wdZ/MY30zmK5DlTtQagFZ5i f2BXCsVqDLZk6sW3l0IUDLvF+7GBP1uBAwQEC6aUrQ5P3R+q977KjCiT1j8HJsnBONCc ekqkiE/B/h3QnNAodI3vnPC0rSALBxRW0evkWnsruBnjUOUEhT4MWT/WF8n4XbwZ/mHv kK6w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=NwUmpMH/ylm6F8JFYbZQH/jCCk/kRHBV8z1WbG+8+6U=; fh=G3bdubTV0+o+8hUeMfd0vNMrcf0Z3JqHvJT+qGOcRCw=; b=Li8a96e1h5bhOZTqqRzABdqmaAfFeT1y1OPhbimloQVwLS8mzrny9MGArMjroHIpxG eA541/QPDVKoP49RdoqP4wWPigFZ+2P4BdJZnt65dNfJyOXAtbJfnsAaw9BOB1HRt2Mi 6L1o/TzWdP0IQEY/2dEhw5BYksOkPPHuRyr4liMAtvr0S/e3/rjlzq0QWyke17eEwx9L 2m8EzWYWGF7UayDIeonfi83tUIMWQh5/afkCqtq3ytUd81RnIkNG7IY9wM4xV2YqMRW+ zXaToyT8TWuxVf4TCvRnzg8e2aEP/RGNs0YugmnGcYHxqyfi/y7swFDiiB+0ZXsUHR89 zsgg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b=jZc5Tvkg; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:5 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=microchip.com Received: from groat.vger.email (groat.vger.email. [2620:137:e000::3:5]) by mx.google.com with ESMTPS id s17-20020a056a00179100b006933e5559a3si624364pfg.310.2023.10.02.21.21.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Oct 2023 21:21:38 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:5 as permitted sender) client-ip=2620:137:e000::3:5; Authentication-Results: mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b=jZc5Tvkg; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:5 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=microchip.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by groat.vger.email (Postfix) with ESMTP id 5F5FD8092C9C; Mon, 2 Oct 2023 21:21:36 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at groat.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230105AbjJCEV2 (ORCPT + 18 others); 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X-CSE-ConnectionGUID: ryNJk9XvTIqOWjKHHkWxlA== X-CSE-MsgGUID: Ekm9/htGRBKlxh3uJwPLog== X-ThreatScanner-Verdict: Negative X-IronPort-AV: E=Sophos;i="6.03,196,1694761200"; d="scan'208";a="238350654" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa5.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 02 Oct 2023 21:21:20 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.87.72) by chn-vm-ex02.mchp-main.com (10.10.87.72) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Mon, 2 Oct 2023 21:21:14 -0700 Received: from microchip1-OptiPlex-9020.microchip.com (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.21 via Frontend Transport; Mon, 2 Oct 2023 21:21:09 -0700 From: shravan chippa To: , , , , , , CC: , , , , , , , Conor Dooley Subject: [PATCH v2 2/4] dt-bindings: dma: sf-pdma: add new compatible name Date: Tue, 3 Oct 2023 09:52:13 +0530 Message-ID: <20231003042215.142678-3-shravan.chippa@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231003042215.142678-1-shravan.chippa@microchip.com> References: <20231003042215.142678-1-shravan.chippa@microchip.com> MIME-Version: 1.0 X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on groat.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (groat.vger.email [0.0.0.0]); Mon, 02 Oct 2023 21:21:36 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1778706702612368622 X-GMAIL-MSGID: 1778706702612368622 From: Shravan Chippa Add new compatible name microchip,mpfs-pdma to support out of order dma transfers Reviewed-by: Conor Dooley Signed-off-by: Shravan Chippa --- .../bindings/dma/sifive,fu540-c000-pdma.yaml | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml b/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml index a1af0b906365..974467c4bacb 100644 --- a/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml +++ b/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml @@ -27,10 +27,14 @@ allOf: properties: compatible: - items: - - enum: - - sifive,fu540-c000-pdma - - const: sifive,pdma0 + oneOf: + - items: + - const: microchip,mpfs-pdma # Microchip out of order DMA transfer + - const: sifive,fu540-c000-pdma # Sifive in-order DMA transfer + - items: + - enum: + - sifive,fu540-c000-pdma + - const: sifive,pdma0 description: Should be "sifive,-pdma" and "sifive,pdma". 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Mon, 02 Oct 2023 21:22:15 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1778706741828289114 X-GMAIL-MSGID: 1778706741828289114 From: Shravan Chippa Sifive platform dma does not allow out-of-order transfers, Add a PolarFire SoC specific compatible and code to support for out-of-order dma transfers Signed-off-by: Shravan Chippa --- drivers/dma/sf-pdma/sf-pdma.c | 27 ++++++++++++++++++++++++--- drivers/dma/sf-pdma/sf-pdma.h | 6 ++++++ 2 files changed, 30 insertions(+), 3 deletions(-) diff --git a/drivers/dma/sf-pdma/sf-pdma.c b/drivers/dma/sf-pdma/sf-pdma.c index 06a0912a12a1..a9ff319d4ca3 100644 --- a/drivers/dma/sf-pdma/sf-pdma.c +++ b/drivers/dma/sf-pdma/sf-pdma.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #include "sf-pdma.h" @@ -66,7 +67,7 @@ static struct sf_pdma_desc *sf_pdma_alloc_desc(struct sf_pdma_chan *chan) static void sf_pdma_fill_desc(struct sf_pdma_desc *desc, u64 dst, u64 src, u64 size) { - desc->xfer_type = PDMA_FULL_SPEED; + desc->xfer_type = desc->chan->pdma->transfer_type; desc->xfer_size = size; desc->dst_addr = dst; desc->src_addr = src; @@ -520,6 +521,7 @@ static struct dma_chan *sf_pdma_of_xlate(struct of_phandle_args *dma_spec, static int sf_pdma_probe(struct platform_device *pdev) { + const struct sf_pdma_driver_platdata *ddata; struct sf_pdma *pdma; int ret, n_chans; const enum dma_slave_buswidth widths = @@ -545,6 +547,14 @@ static int sf_pdma_probe(struct platform_device *pdev) pdma->n_chans = n_chans; + pdma->transfer_type = PDMA_FULL_SPEED; + + ddata = of_device_get_match_data(&pdev->dev); + if (ddata) { + if (ddata->quirks & NO_STRICT_ORDERING) + pdma->transfer_type &= ~(NO_STRICT_ORDERING); + } + pdma->membase = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(pdma->membase)) return PTR_ERR(pdma->membase); @@ -632,11 +642,22 @@ static int sf_pdma_remove(struct platform_device *pdev) return 0; } +static const struct sf_pdma_driver_platdata mpfs_pdma = { + .quirks = NO_STRICT_ORDERING, +}; + static const struct of_device_id sf_pdma_dt_ids[] = { - { .compatible = "sifive,fu540-c000-pdma" }, - { .compatible = "sifive,pdma0" }, + { + .compatible = "sifive,fu540-c000-pdma", + }, { + .compatible = "sifive,pdma0", + }, { + .compatible = "microchip,mpfs-pdma", + .data = &mpfs_pdma, + }, {}, }; + MODULE_DEVICE_TABLE(of, sf_pdma_dt_ids); static struct platform_driver sf_pdma_driver = { diff --git a/drivers/dma/sf-pdma/sf-pdma.h b/drivers/dma/sf-pdma/sf-pdma.h index 5c398a83b491..3b16db4daa0b 100644 --- a/drivers/dma/sf-pdma/sf-pdma.h +++ b/drivers/dma/sf-pdma/sf-pdma.h @@ -49,6 +49,7 @@ /* Transfer Type */ #define PDMA_FULL_SPEED 0xFF000008 +#define NO_STRICT_ORDERING BIT(3) /* Error Recovery */ #define MAX_RETRY 1 @@ -112,8 +113,13 @@ struct sf_pdma { struct dma_device dma_dev; void __iomem *membase; void __iomem *mappedbase; + u32 transfer_type; u32 n_chans; struct sf_pdma_chan chans[]; }; +struct sf_pdma_driver_platdata { + u32 quirks; +}; + #endif /* _SF_PDMA_H */ From patchwork Tue Oct 3 04:22:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: shravan chippa X-Patchwork-Id: 147614 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2a8e:b0:403:3b70:6f57 with SMTP id in14csp1846805vqb; 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[2620:137:e000::3:6]) by mx.google.com with ESMTPS id bs125-20020a632883000000b00578cbee11easi569890pgb.9.2023.10.02.21.22.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Oct 2023 21:22:24 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:6 as permitted sender) client-ip=2620:137:e000::3:6; Authentication-Results: mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b=l3EqC9q5; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:6 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=microchip.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by pete.vger.email (Postfix) with ESMTP id AD7AF801B493; Mon, 2 Oct 2023 21:22:22 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at pete.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239075AbjJCEV6 (ORCPT + 18 others); Tue, 3 Oct 2023 00:21:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54906 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239033AbjJCEV4 (ORCPT ); Tue, 3 Oct 2023 00:21:56 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1D3AECC; Mon, 2 Oct 2023 21:21:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1696306915; x=1727842915; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=oGnYDVYlhxSOhgTr4iUbpKBCV4C+XeuVk7jPWfYQ5Os=; b=l3EqC9q5UkcflsMCFPMdOEQMzv2tspleMy1ex3ERDpAhBJZeJ1MPi/T8 dc9hfjqcW4BU+7RD3bewxYnR3gBXCtGlB9GbXG+fWVNndU2RdV6/Sq+ey lMdDzptcqjFZ5lMh8w9ifB0m9Eel6eIZUBWv3f91j5rt+ZOWw13wQF1un lEAshkwIZu0HGN0FYXiSKNmBri871mPz74QPf0u1w+B682JyR3j0XS6bh HCfd2qQ7v9pxT+3bLhCCyVx8WISz7iTLZEy3PQoA+BK8s2JpDNiCHsRxA sNvilyg89aOw3ekJp89AUtOoMmWMTBRBOqnutJ2qd80wpscTvd+pVzsfZ g==; X-CSE-ConnectionGUID: vej+VRO8Q1y2r3o3Bac/dQ== X-CSE-MsgGUID: 5Ei/Ysn1Q1mgStJD23Cb0A== X-ThreatScanner-Verdict: Negative X-IronPort-AV: E=Sophos;i="6.03,196,1694761200"; d="scan'208";a="238350717" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa5.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 02 Oct 2023 21:21:54 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Mon, 2 Oct 2023 21:21:29 -0700 Received: from microchip1-OptiPlex-9020.microchip.com (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.21 via Frontend Transport; Mon, 2 Oct 2023 21:21:24 -0700 From: shravan chippa To: , , , , , , CC: , , , , , , Subject: [PATCH v2 4/4] riscv: dts: microchip: add specific compatible for mpfs' pdma Date: Tue, 3 Oct 2023 09:52:15 +0530 Message-ID: <20231003042215.142678-5-shravan.chippa@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231003042215.142678-1-shravan.chippa@microchip.com> References: <20231003042215.142678-1-shravan.chippa@microchip.com> MIME-Version: 1.0 X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on pete.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (pete.vger.email [0.0.0.0]); Mon, 02 Oct 2023 21:22:22 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1778706750925806295 X-GMAIL-MSGID: 1778706750925806295 From: Shravan Chippa Add specific compatible for PolarFire SoC for The SiFive PDMA driver Signed-off-by: Shravan Chippa --- arch/riscv/boot/dts/microchip/mpfs.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/riscv/boot/dts/microchip/mpfs.dtsi b/arch/riscv/boot/dts/microchip/mpfs.dtsi index 104504352e99..05525d5c2c82 100644 --- a/arch/riscv/boot/dts/microchip/mpfs.dtsi +++ b/arch/riscv/boot/dts/microchip/mpfs.dtsi @@ -221,7 +221,7 @@ plic: interrupt-controller@c000000 { }; pdma: dma-controller@3000000 { - compatible = "sifive,fu540-c000-pdma", "sifive,pdma0"; + compatible = "microchip,mpfs-pdma", "sifive,fu540-c000-pdma"; reg = <0x0 0x3000000 0x0 0x8000>; interrupt-parent = <&plic>; interrupts = <5 6>, <7 8>, <9 10>, <11 12>;