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([2400:4050:c3e1:100:7ab1:199:d138:f054]) by smtp.gmail.com with ESMTPSA id mg11-20020a17090b370b00b002609cadc56esm5278319pjb.11.2023.10.01.19.17.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 01 Oct 2023 19:17:19 -0700 (PDT) From: AKASHI Takahiro To: sudeep.holla@arm.com, cristian.marussi@arm.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, linus.walleij@linaro.org Cc: Oleksii_Moisieiev@epam.com, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, AKASHI Takahiro Subject: [RFC 1/4] pinctrl: define PIN_CONFIG_INPUT Date: Mon, 2 Oct 2023 11:15:59 +0900 Message-Id: <20231002021602.260100-2-takahiro.akashi@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231002021602.260100-1-takahiro.akashi@linaro.org> References: <20231002021602.260100-1-takahiro.akashi@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Sun, 01 Oct 2023 19:17:32 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1778609827168702075 X-GMAIL-MSGID: 1778609827168702075 This allows for enabling SCMI pinctrl based GPIO driver to obtain an input gpio pin. Signed-off-by: AKASHI Takahiro --- include/linux/pinctrl/pinconf-generic.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/linux/pinctrl/pinconf-generic.h b/include/linux/pinctrl/pinconf-generic.h index d74b7a4ea154..842b328ea504 100644 --- a/include/linux/pinctrl/pinconf-generic.h +++ b/include/linux/pinctrl/pinconf-generic.h @@ -67,6 +67,8 @@ struct pinctrl_map; * passed as argument. The argument is in mA. * @PIN_CONFIG_DRIVE_STRENGTH_UA: the pin will sink or source at most the current * passed as argument. The argument is in uA. + * @PIN_CONFIG_INPUT: This will obtain a value on an input pin. The returned + * argument indicates the value. * @PIN_CONFIG_INPUT_DEBOUNCE: this will configure the pin to debounce mode, * which means it will wait for signals to settle when reading inputs. The * argument gives the debounce time in usecs. Setting the @@ -128,6 +130,7 @@ enum pin_config_param { PIN_CONFIG_DRIVE_PUSH_PULL, PIN_CONFIG_DRIVE_STRENGTH, PIN_CONFIG_DRIVE_STRENGTH_UA, + PIN_CONFIG_INPUT, PIN_CONFIG_INPUT_DEBOUNCE, PIN_CONFIG_INPUT_ENABLE, PIN_CONFIG_INPUT_SCHMITT, From patchwork Mon Oct 2 02:16:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Takahiro Akashi X-Patchwork-Id: 147223 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2a8e:b0:403:3b70:6f57 with SMTP id in14csp1301088vqb; Mon, 2 Oct 2023 02:27:43 -0700 (PDT) X-Google-Smtp-Source: AGHT+IENzOHr9UlH5EP7+4e00yt2GB0djjRBmlPG5uuWMllUKipAXR5vwo0RUT7g5JaX5SwNgt5a X-Received: by 2002:a05:6a20:6a25:b0:15e:1351:f33a with SMTP id p37-20020a056a206a2500b0015e1351f33amr10697670pzk.47.1696238862687; Mon, 02 Oct 2023 02:27:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1696238862; cv=none; d=google.com; s=arc-20160816; b=KGoROxCGsCWqr74OTNuCQOR3tFa2roCNZ8oyeY+BueZGhcZ+Tr+4N/mr3mBEVGuf+M COM6oyfLZclaAQ2h2sgNh+mpvNEYC21RXyWDTcm+UKB8FZ+0vrsl5OvVRjmWenyyhVA8 R16EZc9S8bm2WciDD0NzBzRlJKFcCuJOP/Cf2GRgcZgldXCv3YoWX7FwhSGbMTl9lE0B 6+2y0vN1ozae1tMdbGSjLp/ZxPF6g1edL5u1x8nj7G/+vC6wf+NN6Il6Hnvg0CHkx64c Cj/3YWzJQ4vGmZWBbkgri8K8O+5IHXSXl1MkF/0iRLuMLe7iiriKN2SyGbdriwz1W2OU Ut+Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=BpQqEZJbjzE/OtRVWr6AW4/d2IDgozzxIJunGcQEruc=; fh=5LIWo2D/PeZk6SC/rjjkha3vijtdzmZAJYKHEnFRQDY=; b=ZZKjZ1PHcPF6wheXJrSpqukXHwimcYhQYNpGRB/fgr2szCkkRUgq4Foy2TeaMw0AYu /z1VfW372AfBA8wan5OLB9J/ga+Ilo4x9g1HtbK8UWfP7t62GY3nRUPbfXQyipjcf9jW KsJAvjBXGl87MqpkLgLKoviykAUet+KyOftIm7dOTtVfbYRoMpIR6mySeVuIi1t/XL8h +NX2PMtjzBoa9w3AU204YoiMt0KyZ/C24qwU6/EU+xNC++3eelmS/8Hol98nu+YkYY8U zU7UcSYUQLlqVrkDv7LZ0xqZTAwSvaO6K/wJTHjT9E5UpLYeyDXX7lJ5Am8f9n566BVI lXLw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=FBc3uiB0; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:5 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from groat.vger.email (groat.vger.email. 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([2400:4050:c3e1:100:7ab1:199:d138:f054]) by smtp.gmail.com with ESMTPSA id mg11-20020a17090b370b00b002609cadc56esm5278319pjb.11.2023.10.01.19.17.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 01 Oct 2023 19:17:22 -0700 (PDT) From: AKASHI Takahiro To: sudeep.holla@arm.com, cristian.marussi@arm.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, linus.walleij@linaro.org Cc: Oleksii_Moisieiev@epam.com, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, AKASHI Takahiro Subject: [RFC 2/4] pinctrl: add pinctrl_gpio_get_config() Date: Mon, 2 Oct 2023 11:16:00 +0900 Message-Id: <20231002021602.260100-3-takahiro.akashi@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231002021602.260100-1-takahiro.akashi@linaro.org> References: <20231002021602.260100-1-takahiro.akashi@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on groat.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (groat.vger.email [0.0.0.0]); Sun, 01 Oct 2023 19:18:11 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1778635361702976121 X-GMAIL-MSGID: 1778635361702976121 This is a counterpart of pinctrl_gpio_set_config(), which will initially be used to implement gpio_get interface in SCMI pinctrl based GPIO driver. Signed-off-by: AKASHI Takahiro Reviewed-by: Linus Walleij --- drivers/pinctrl/core.c | 19 +++++++++++++++++++ include/linux/pinctrl/consumer.h | 8 ++++++++ 2 files changed, 27 insertions(+) diff --git a/drivers/pinctrl/core.c b/drivers/pinctrl/core.c index e9dc9638120a..2f9c2efdfe0e 100644 --- a/drivers/pinctrl/core.c +++ b/drivers/pinctrl/core.c @@ -926,6 +926,25 @@ int pinctrl_gpio_set_config(unsigned gpio, unsigned long config) } EXPORT_SYMBOL_GPL(pinctrl_gpio_set_config); +int pinctrl_gpio_get_config(unsigned int gpio, unsigned long *config) +{ + struct pinctrl_gpio_range *range; + struct pinctrl_dev *pctldev; + int ret, pin; + + ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); + if (ret) + return ret; + + mutex_lock(&pctldev->mutex); + pin = gpio_to_pin(range, gpio); + ret = pin_config_get_for_pin(pctldev, pin, config); + mutex_unlock(&pctldev->mutex); + + return ret; +} +EXPORT_SYMBOL_GPL(pinctrl_gpio_get_config); + static struct pinctrl_state *find_state(struct pinctrl *p, const char *name) { diff --git a/include/linux/pinctrl/consumer.h b/include/linux/pinctrl/consumer.h index 4729d54e8995..852fac97a79b 100644 --- a/include/linux/pinctrl/consumer.h +++ b/include/linux/pinctrl/consumer.h @@ -31,6 +31,8 @@ extern void pinctrl_gpio_free(unsigned gpio); extern int pinctrl_gpio_direction_input(unsigned gpio); extern int pinctrl_gpio_direction_output(unsigned gpio); extern int pinctrl_gpio_set_config(unsigned gpio, unsigned long config); +extern int pinctrl_gpio_get_config(unsigned int gpio, + unsigned long *config); extern struct pinctrl * __must_check pinctrl_get(struct device *dev); extern void pinctrl_put(struct pinctrl *p); @@ -92,6 +94,12 @@ static inline int pinctrl_gpio_set_config(unsigned gpio, unsigned long config) return 0; } +static inline int pinctrl_gpio_get_config(unsigned int gpio, + unsigned long *config) +{ + return 0; +} + static inline struct pinctrl * __must_check pinctrl_get(struct device *dev) { return NULL; From patchwork Mon Oct 2 02:16:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Takahiro Akashi X-Patchwork-Id: 147184 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2a8e:b0:403:3b70:6f57 with SMTP id in14csp1151743vqb; Sun, 1 Oct 2023 19:27:47 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHnEs2jMi1W+zwpekXVSNr3lv2LO1YXKy3TN5wKCA2bigl1qqZ07qENq1xICPpKyV+uMupv X-Received: by 2002:a17:903:44e:b0:1b8:c580:5fb9 with SMTP id iw14-20020a170903044e00b001b8c5805fb9mr8411779plb.14.1696213667451; Sun, 01 Oct 2023 19:27:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1696213667; cv=none; d=google.com; s=arc-20160816; b=QN07aD5m/bHfCWGhAXGIHnV2h6xvq4EBFa1AIMCAfRnvbV6OqxjN9w2XSIWYbaU8Eu waN19wGu8so6ned4ZAJuE4gRHTlwHR010uL6bsPmDTga+12jzO3v73fixybbf7HyZWpA j4KKNityi4gEXPqdoF6P92B8QKwSdvdsFrgb7RD22PdceQM+tQA8l1BIan0yJxFmCdcW rOANPzIXjBo64Y1e/5Jsc2eMj6d/1QThcG6MNKpPUxs8tJRfGQcmnPDqobvhTSX0q/vF 4L1WrIdBNkYtBxtgttzb8SoEp0v5g5p6kMg69HR983xu2mUFMEgxQfZRO5nw/3zbBGtd aHtg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=0lhRzM6KnB/PywI33Jm04a+skJPYEHXmin9uZYbICJM=; fh=5LIWo2D/PeZk6SC/rjjkha3vijtdzmZAJYKHEnFRQDY=; b=eQ1W5SEIMiMro8H9Ieufg3KEfT16QNmJPBxetsLOLbLwXX0BeD0uHe8/p/haXXqDnQ iRKcfWsc6d7z06q0dFY94oOj+to0+u4Df89N1tH98E8bCIm9gX6sDvdZtMfhnEda2GM9 iL4SHL4Pz1V9ZkrU9N+bHWHZUXXo76c7y3hQnZKbU48Jr9dva4f3+r/danab3XSo+WzP ycI0TVkCdaqYZRVtJq6XH2yf3OXMOwMlhcISVDJ4uhpHnGA6IuL5mcDVwFIf/SsBifZz QRmrdNjP8wXrqidHFWrT80IFu/8cvZEi595q25HgWtxSnU+Ve9y+H+WsRMQqbDuHNSB5 TAnQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Tj1zTJh0; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:4 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from howler.vger.email (howler.vger.email. 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([2400:4050:c3e1:100:7ab1:199:d138:f054]) by smtp.gmail.com with ESMTPSA id mg11-20020a17090b370b00b002609cadc56esm5278319pjb.11.2023.10.01.19.17.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 01 Oct 2023 19:17:25 -0700 (PDT) From: AKASHI Takahiro To: sudeep.holla@arm.com, cristian.marussi@arm.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, linus.walleij@linaro.org Cc: Oleksii_Moisieiev@epam.com, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, AKASHI Takahiro Subject: [RFC 3/4] gpio: scmi: add SCMI pinctrl based gpio driver Date: Mon, 2 Oct 2023 11:16:01 +0900 Message-Id: <20231002021602.260100-4-takahiro.akashi@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231002021602.260100-1-takahiro.akashi@linaro.org> References: <20231002021602.260100-1-takahiro.akashi@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (howler.vger.email [0.0.0.0]); Sun, 01 Oct 2023 19:17:55 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1778608942822922833 X-GMAIL-MSGID: 1778608942822922833 SCMI pin control protocol supports not only pin controllers, but also gpio controllers by design. This patch includes a generic gpio driver which allows consumer drivers to access gpio pins that are handled through SCMI interfaces. Signed-off-by: AKASHI Takahiro --- drivers/gpio/Kconfig | 8 ++ drivers/gpio/Makefile | 1 + drivers/gpio/gpio-scmi.c | 154 +++++++++++++++++++++++++++++++++++++++ 3 files changed, 163 insertions(+) create mode 100644 drivers/gpio/gpio-scmi.c diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 673bafb8be58..1a968b950f3a 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -566,6 +566,14 @@ config GPIO_SAMA5D2_PIOBU The difference from regular GPIOs is that they maintain their value during backup/self-refresh. +config GPIO_SCMI + tristate "GPIO support based on SCMI pinctrl" + depends on OF_GPIO + depends on PINCTRL_SCMI + help + Select this option to support GPIO devices based on SCMI pin + control protocol. + config GPIO_SIFIVE tristate "SiFive GPIO support" depends on OF_GPIO diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index eb73b5d633eb..2abe1e9d5e77 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -141,6 +141,7 @@ obj-$(CONFIG_ARCH_SA1100) += gpio-sa1100.o obj-$(CONFIG_GPIO_SAMA5D2_PIOBU) += gpio-sama5d2-piobu.o obj-$(CONFIG_GPIO_SCH311X) += gpio-sch311x.o obj-$(CONFIG_GPIO_SCH) += gpio-sch.o +obj-$(CONFIG_GPIO_SCMI) += gpio-scmi.o obj-$(CONFIG_GPIO_SIFIVE) += gpio-sifive.o obj-$(CONFIG_GPIO_SIM) += gpio-sim.o obj-$(CONFIG_GPIO_SIOX) += gpio-siox.o diff --git a/drivers/gpio/gpio-scmi.c b/drivers/gpio/gpio-scmi.c new file mode 100644 index 000000000000..ece63ea62b70 --- /dev/null +++ b/drivers/gpio/gpio-scmi.c @@ -0,0 +1,154 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Copyright (C) 2023 Linaro Inc. +// Author: AKASHI takahiro + +#include +#include +#include +#include +#include +#include +#include +#include "gpiolib.h" + +struct scmi_gpio_priv { + struct gpio_chip chip; +}; + +static int scmi_gpio_get_direction(struct gpio_chip *chip, unsigned int offset) +{ + unsigned long config; + + config = PIN_CONFIG_OUTPUT_ENABLE; + if (pinctrl_gpio_get_config(chip->gpiodev->base + offset, &config)) + return -1; + if (config) + return GPIO_LINE_DIRECTION_OUT; + + config = PIN_CONFIG_INPUT_ENABLE; + if (pinctrl_gpio_get_config(chip->gpiodev->base + offset, &config)) + return -1; + if (config) + return GPIO_LINE_DIRECTION_IN; + + return -1; +} + +static int scmi_gpio_direction_input(struct gpio_chip *chip, + unsigned int offset) +{ + return pinctrl_gpio_direction_input(chip->gpiodev->base + offset); +} + +static int scmi_gpio_direction_output(struct gpio_chip *chip, + unsigned int offset, int val) +{ + return pinctrl_gpio_direction_output(chip->gpiodev->base + offset); +} + +static int scmi_gpio_get(struct gpio_chip *chip, unsigned int offset) +{ + unsigned long config; + + /* FIXME: currently, PIN_CONFIG_INPUT not defined */ + config = PIN_CONFIG_INPUT; + if (pinctrl_gpio_get_config(chip->gpiodev->base + offset, &config)) + return -1; + + /* FIXME: the packed format not defined */ + if (config >> 8) + return 1; + + return 0; +} + +static void scmi_gpio_set(struct gpio_chip *chip, unsigned int offset, int val) +{ + unsigned long config; + + config = PIN_CONF_PACKED(PIN_CONFIG_OUTPUT, val & 0x1); +; + pinctrl_gpio_set_config(chip->gpiodev->base + offset, config); +} + +static u16 sum_up_ngpios(struct gpio_chip *chip) +{ + struct gpio_pin_range *range; + struct gpio_device *gdev = chip->gpiodev; + u16 ngpios = 0; + + list_for_each_entry(range, &gdev->pin_ranges, node) { + ngpios += range->range.npins; + } + + return ngpios; +} + +static int scmi_gpio_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct device_node *parent_np; + struct scmi_gpio_priv *priv; + struct gpio_chip *chip; + int ret; + + /* FIXME: who should be the parent */ + parent_np = NULL; + + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + chip = &priv->chip; + chip->label = dev_name(dev); + chip->parent = dev; + chip->base = -1; + + chip->request = gpiochip_generic_request; + chip->free = gpiochip_generic_free; + chip->get_direction = scmi_gpio_get_direction; + chip->direction_input = scmi_gpio_direction_input; + chip->direction_output = scmi_gpio_direction_output; + chip->get = scmi_gpio_get; + chip->set = scmi_gpio_set; + + ret = devm_gpiochip_add_data(dev, chip, priv); + if (ret) + return ret; + + chip->ngpio = sum_up_ngpios(chip); + + platform_set_drvdata(pdev, priv); + + return 0; +} + +static int scmi_gpio_remove(struct platform_device *pdev) +{ + struct scmi_gpio_priv *priv = platform_get_drvdata(pdev); + + gpiochip_remove(&priv->chip); + + return 0; +} + +static const struct of_device_id scmi_gpio_match[] = { + { .compatible = "arm,scmi-gpio-generic" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, scmi_gpio_match); + +static struct platform_driver scmi_gpio_driver = { + .probe = scmi_gpio_probe, + .remove = scmi_gpio_remove, + .driver = { + .name = "scmi-gpio", + .of_match_table = scmi_gpio_match, + }, +}; +module_platform_driver(scmi_gpio_driver); + +MODULE_AUTHOR("AKASHI Takahiro "); +MODULE_DESCRIPTION("SCMI Pinctrl based GPIO driver"); +MODULE_LICENSE("GPL"); From patchwork Mon Oct 2 02:16:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Takahiro Akashi X-Patchwork-Id: 147192 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2a8e:b0:403:3b70:6f57 with SMTP id in14csp1220985vqb; Sun, 1 Oct 2023 23:06:46 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEKcOa1S1aSe7QIWTUPI06CN4zSFJ6fQBjxskhv6pJPsZ0Hw9WmaFwz29LaQgF7e/iRS7sQ X-Received: by 2002:a17:90b:f85:b0:279:1035:4443 with SMTP id ft5-20020a17090b0f8500b0027910354443mr8796461pjb.8.1696226805976; Sun, 01 Oct 2023 23:06:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1696226805; cv=none; d=google.com; s=arc-20160816; b=C3BETbbX4+/+efWS5sANfxryFvkZjgij9rNyFQCAcX83DhKaMBffLbqpULdfm42zpQ cdS6hgiX+qF3eaoG448nJ2xYh5h4/llRFRlSh80pg7llwEMm8T7oYJsfPVbaGQonTmAW 4X3oNZCywW5eHibWJYpQPvnIkamXLRN22cQkFenoXI5TThSRLf0WKe9hjijshHIB0QoF X85sNZiBEZgBBS7BB88zump2fn/qtQWc/8so5cLCarlKwxuEjc+SA4HVnSkTmOPl92N+ QW+5jDH1uX0VXNX19eELPeMR64qj5LEZ03gPRRBwmeOl+IiR5dpzi3YB+2BJ+FC/y+g6 IqGg== ARC-Message-Signature: i=1; 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([2400:4050:c3e1:100:7ab1:199:d138:f054]) by smtp.gmail.com with ESMTPSA id mg11-20020a17090b370b00b002609cadc56esm5278319pjb.11.2023.10.01.19.17.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 01 Oct 2023 19:17:29 -0700 (PDT) From: AKASHI Takahiro To: sudeep.holla@arm.com, cristian.marussi@arm.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, linus.walleij@linaro.org Cc: Oleksii_Moisieiev@epam.com, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, AKASHI Takahiro Subject: [RFC 4/4] dt-bindings: gpio: Add bindings for SCMI pinctrl based gpio Date: Mon, 2 Oct 2023 11:16:02 +0900 Message-Id: <20231002021602.260100-5-takahiro.akashi@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231002021602.260100-1-takahiro.akashi@linaro.org> References: <20231002021602.260100-1-takahiro.akashi@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on agentk.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (agentk.vger.email [0.0.0.0]); Sun, 01 Oct 2023 19:17:53 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1778612628558000011 X-GMAIL-MSGID: 1778622719329393735 A dt binding for SCMI pinctrl based gpio driver is defined in this commit. It basically conforms to generic pinctrl-gpio mapping framework. Signed-off-by: AKASHI Takahiro --- .../bindings/gpio/arm,scmi-gpio.yaml | 71 +++++++++++++++++++ 1 file changed, 71 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpio/arm,scmi-gpio.yaml diff --git a/Documentation/devicetree/bindings/gpio/arm,scmi-gpio.yaml b/Documentation/devicetree/bindings/gpio/arm,scmi-gpio.yaml new file mode 100644 index 000000000000..2601c5594567 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/arm,scmi-gpio.yaml @@ -0,0 +1,71 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpio/arm,scmi-gpio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: SCMI pinctrl based generic GPIO controller + +maintainers: + - AKASHI Takahiro + +properties: + $nodename: + pattern: "^scmi_gpio(@[0-9a-f]+)$" + + compatible: + const: arm,scmi-gpio-generic + + gpio-controller: true + + "#gpio-cells": + const: 2 + + gpio-ranges: true + + gpio-ranges-group-names: true + +patternProperties: + "^.+-hog(-[0-9]+)?$": + type: object + properties: + gpio-hog: true + gpios: true + input: true + output-high: true + output-low: true + line-name: true + + required: + - gpio-hog + - gpios + + additionalProperties: false + +required: + - compatible + - gpio-controller + - "#gpio-cells" + - gpio-ranges + +additionalProperties: false + +examples: + - | + #include + + scmi_gpio_0: scmi_gpio@0 { + compatible = "arm,scmi-gpio"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&scmi_pinctrl 0 10 5>, + <&scmi_pinctrl 5 0 0>; + gpio-ranges-group-names = "", + "pinmux_gpio"; + }; + + // Consumer: + sdhci0_pwrseq { + compatible = "mmc-pwrseq-emmc"; + reset-gpios = <&scmi_gpio_0 0 GPIO_ACTIVE_LOW>; + };