From patchwork Fri Sep 29 15:54:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Sayle X-Patchwork-Id: 146659 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:cae8:0:b0:403:3b70:6f57 with SMTP id r8csp4134142vqu; Fri, 29 Sep 2023 08:54:43 -0700 (PDT) X-Google-Smtp-Source: AGHT+IG5iyjVe7WvMt1Ku5p4pTXKLzyTcDQQyQt5ggUgqlCYVm9dSXHtK19NYvXOfTb9ccl8Kd55 X-Received: by 2002:a05:6402:3202:b0:537:fb3e:2229 with SMTP id g2-20020a056402320200b00537fb3e2229mr449439eda.6.1696002883227; Fri, 29 Sep 2023 08:54:43 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1696002883; cv=none; d=google.com; s=arc-20160816; b=vo6xEAVYkeXtb4T0nXJSl5hSWleHOfU8DulBWdtvs5fjYfeKPEmGG8Oe+/HZgAZ1WT T/+ezxHqCJi+7jLZaHIJNXG9de+LJVQAF7HUJTHXwk0z6EwHKM/+XajiNRnIV2EVk5Hk qfrTDEaiiUICo1P88TCfBieVhcvVehBafC7P+fdoaKUwyMK6j4WrX8TGSG5sI1/Sx6nV uIy0OF3iptX6VqfBP1uPxRHk8wqGNXhy8A4QDO0iEKeG9CRztAmyb2e8R5jT48/OZVCI PNH/mAzjV3vkEhIjVfyjSJaTvMJ/YiFu0imjps/E18iC8/hwy9z365GXLcO3JhaThgVY P3Aw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-language:thread-index :mime-version:message-id:date:subject:cc:to:from:dkim-signature :dmarc-filter:delivered-to; bh=WjqnRIKDLsyeVKuxyOh8y4Aen+/XFhz2fk2skPUYb08=; fh=ytmiQUGz1el9bIChVBBMRBbw4QxAF81V2sBb/TuC0ZY=; b=IbMvq8/oQEZNRwYd/xazAEqTRhUkRMCpIl00DyE3AAxI4WLutwDrA8Z9wddcguxw5+ G83xA1siNyQaZB9o52L1GPcSSQRG19BJwhMBoiPQOkHbbG8vpyM1iV8iZd2B1vXkXvV0 mTs4VeKivoU3FgGtb5sDEIHMcydnTHFKnPfFPbXdqr9FDfR0qL1EJMp18PWvXwnRxVMO 14DdeDzlsGGixf5S30a7tt20FZrXFyq4edFkiu0SIvB8pM7ZwSU0N/JYkJLUAKtdx66D gzO7gNVAoUu4KMmSxPVJ/u0ESZOy0IYc6CSNNipyb2/VjwE/dqGraiUScZe0AYcLj7jO /1bQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@nextmovesoftware.com header.s=default header.b="WwMoh/fT"; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org" Received: from server2.sourceware.org (ip-8-43-85-97.sourceware.org. [8.43.85.97]) by mx.google.com with ESMTPS id er25-20020a056402449900b00533d75a63dfsi12537018edb.312.2023.09.29.08.54.42 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 Sep 2023 08:54:43 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; dkim=fail header.i=@nextmovesoftware.com header.s=default header.b="WwMoh/fT"; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org" Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 621F6387689D for ; Fri, 29 Sep 2023 15:54:36 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from server.nextmovesoftware.com (server.nextmovesoftware.com [162.254.253.69]) by sourceware.org (Postfix) with ESMTPS id EE6143858C78 for ; Fri, 29 Sep 2023 15:54:08 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org EE6143858C78 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=nextmovesoftware.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=nextmovesoftware.com DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=nextmovesoftware.com; s=default; h=Content-Type:MIME-Version:Message-ID: Date:Subject:Cc:To:From:Sender:Reply-To:Content-Transfer-Encoding:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:In-Reply-To:References:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=WjqnRIKDLsyeVKuxyOh8y4Aen+/XFhz2fk2skPUYb08=; b=WwMoh/fTr0WIVlNBycIR0p81Qx q4hC5ivbRivuPxqjDcSisIquS2dg8RL8tMpmybBaP47jH2k3IQ3U2tNaen3eIn6Uwj7p/FG9UISCm 8VuVelkntgWNthA/z1Gf2twvXnJzmb2EyHOGIw6qAzcRpYBh6R3KCGG2ApHlidLWusYgNwYTNnc0d vbAiEsm0OvjjVxwYPfGuN33fh3ug3G2IgB59X4L/521Bw/IIFfLM1TqqQQOwYzY3AOLh+KJq/Y+h2 dO58U+5D63G6EdHbYVaBPM6eTkahBtvxT6k5/jP4D8oPvp0DxV+7M1USnDtgyVFM9KPkQfox9qSGt IFfjNWRg==; Received: from [185.62.158.67] (port=52313 helo=Dell) by server.nextmovesoftware.com with esmtpsa (TLS1.2) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1qmFoe-0004Vi-0g; Fri, 29 Sep 2023 11:54:08 -0400 From: "Roger Sayle" To: Cc: "'Claudiu Zissulescu'" Subject: [ARC PATCH] Use rlc r0, 0 to implement scc_ltu (i.e. carry_flag ? 1 : 0) Date: Fri, 29 Sep 2023 16:54:06 +0100 Message-ID: <015501d9f2ed$2e299bb0$8a7cd310$@nextmovesoftware.com> MIME-Version: 1.0 X-Mailer: Microsoft Outlook 16.0 Thread-Index: Adny7DoRKbrB5v3fSU+zQfruulWVsA== Content-Language: en-gb X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - server.nextmovesoftware.com X-AntiAbuse: Original Domain - gcc.gnu.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - nextmovesoftware.com X-Get-Message-Sender-Via: server.nextmovesoftware.com: authenticated_id: roger@nextmovesoftware.com X-Authenticated-Sender: server.nextmovesoftware.com: roger@nextmovesoftware.com X-Source: X-Source-Args: X-Source-Dir: X-Spam-Status: No, score=-12.5 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1778387919230249965 X-GMAIL-MSGID: 1778387919230249965 This patch teaches the ARC backend that the contents of the carry flag can be placed in an integer register conveniently using the "rlc rX,0" instruction, which is a rotate-left-through-carry using zero as a source. This is a convenient special case for the LTU form of the scc pattern. unsigned int foo(unsigned int x, unsigned int y) { return (x+y) < x; } With -O2 -mcpu=em this is currently compiled to: foo: add.f 0,r0,r1 mov_s r0,1 ;3 j_s.d [blink] mov.hs r0,0 [which after an addition to set the carry flag, sets r0 to 1, followed by a conditional assignment of r0 to zero if the carry flag is clear]. With the new define_insn/optimization in this patch, this becomes: foo: add.f 0,r0,r1 j_s.d [blink] rlc r0,0 This define_insn is also a useful building block for implementing shifts and rotates. Tested on a cross-compiler to arc-linux (hosted on x86_64-pc-linux-gnu), and a partial tool chain, where the new case passes and there are no new regressions. Ok for mainline? 2023-09-29 Roger Sayle gcc/ChangeLog * config/arc/arc.md (CC_ltu): New mode iterator for CC and CC_C. (scc_ltu_): New define_insn to handle LTU form of scc_insn. (*scc_insn): Don't split to a conditional move sequence for LTU. gcc/testsuite/ChangeLog * gcc.target/arc/scc-ltu.c: New test case. Thanks in advance, Roger diff --git a/gcc/config/arc/arc.md b/gcc/config/arc/arc.md index d37ecbf..fe2e7fb 100644 --- a/gcc/config/arc/arc.md +++ b/gcc/config/arc/arc.md @@ -3658,12 +3658,24 @@ archs4x, archs4xd" (define_expand "scc_insn" [(set (match_operand:SI 0 "dest_reg_operand" "=w") (match_operand:SI 1 ""))]) +(define_mode_iterator CC_ltu [CC_C CC]) + +(define_insn "scc_ltu_" + [(set (match_operand:SI 0 "dest_reg_operand" "=w") + (ltu:SI (reg:CC_ltu CC_REG) (const_int 0)))] + "" + "rlc\\t%0,0" + [(set_attr "type" "shift") + (set_attr "predicable" "no") + (set_attr "length" "4")]) + (define_insn_and_split "*scc_insn" [(set (match_operand:SI 0 "dest_reg_operand" "=w") (match_operator:SI 1 "proper_comparison_operator" [(reg CC_REG) (const_int 0)]))] "" "#" - "reload_completed" + "reload_completed + && GET_CODE (operands[1]) != LTU" [(set (match_dup 0) (const_int 1)) (cond_exec (match_dup 1) diff --git a/gcc/testsuite/gcc.target/arc/scc-ltu.c b/gcc/testsuite/gcc.target/arc/scc-ltu.c new file mode 100644 index 0000000..653c55d --- /dev/null +++ b/gcc/testsuite/gcc.target/arc/scc-ltu.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mcpu=em" } */ + +unsigned int foo(unsigned int x, unsigned int y) +{ + return (x+y) < x; +} + +/* { dg-final { scan-assembler "rlc\\s+r0,0" } } */ +/* { dg-final { scan-assembler "add.f\\s+0,r0,r1" } } */ +/* { dg-final { scan-assembler-not "mov_s\\s+r0,1" } } */ +/* { dg-final { scan-assembler-not "mov\.hs\\s+r0,0" } } */